1 // Code for handling EHCI USB controllers.
3 // Copyright (C) 2010 Kevin O'Connor <kevin@koconnor.net>
5 // This file may be distributed under the terms of the GNU LGPLv3 license.
7 #include "util.h" // dprintf
8 #include "pci.h" // pci_bdf_to_bus
9 #include "config.h" // CONFIG_*
10 #include "ioport.h" // outw
11 #include "usb-ehci.h" // struct ehci_qh
12 #include "pci_ids.h" // PCI_CLASS_SERIAL_USB_UHCI
13 #include "pci_regs.h" // PCI_BASE_ADDRESS_0
14 #include "usb.h" // struct usb_s
15 #include "farptr.h" // GET_FLATPTR
16 #include "usb-hub.h" // struct usbhub_s
17 #include "usb-uhci.h" // init_uhci
18 #include "usb-ohci.h" // init_ohci
27 struct ehci_caps *caps;
28 struct ehci_regs *regs;
29 struct ehci_qh *async_qh;
30 struct companion_s companion[8];
36 /****************************************************************
38 ****************************************************************/
40 #define EHCI_TIME_POSTPOWER 20
41 #define EHCI_TIME_POSTRESET 2
43 // Start processing of companion controllers for full/low speed devices
45 ehci_startcompanion(struct usb_ehci_s *cntl)
47 if (! cntl->legacycount)
48 // No full/low speed devices found.
51 for (i=0; i<ARRAY_SIZE(cntl->companion); i++) {
52 u16 type = cntl->companion[i].type;
53 if (type == USB_TYPE_UHCI)
54 uhci_init(cntl->companion[i].bdf, cntl->usb.busid + i);
55 else if (type == USB_TYPE_OHCI)
56 ohci_init(cntl->companion[i].bdf, cntl->usb.busid + i);
63 init_ehci_port(void *data)
65 struct usbhub_s *hub = data;
66 u32 port = hub->port; // XXX - find better way to pass port
67 struct usb_ehci_s *cntl = container_of(hub->cntl, struct usb_ehci_s, usb);
69 u32 *portreg = &cntl->regs->portsc[port];
70 u32 portsc = readl(portreg);
73 if (!(portsc & PORT_POWER)) {
75 writel(portreg, portsc);
76 msleep(EHCI_TIME_POSTPOWER);
78 msleep(1); // XXX - time for connect to be detected.
80 portsc = readl(portreg);
82 if (!(portsc & PORT_CONNECT))
86 if ((portsc & PORT_LINESTATUS_MASK) == PORT_LINESTATUS_KSTATE) {
89 writel(portreg, portsc | PORT_OWNER);
93 // XXX - if just powered up, need to wait for USB_TIME_ATTDB?
96 portsc = (portsc & ~PORT_PE) | PORT_RESET;
97 writel(portreg, portsc);
98 msleep(USB_TIME_DRSTR);
99 mutex_lock(&cntl->usb.resetlock);
100 portsc &= ~PORT_RESET;
101 writel(portreg, portsc);
102 msleep(EHCI_TIME_POSTRESET);
104 portsc = readl(portreg);
105 if (!(portsc & PORT_CONNECT))
106 // No longer connected
108 if (!(portsc & PORT_PE)) {
111 writel(portreg, portsc | PORT_OWNER);
115 if (! --cntl->checkports)
116 ehci_startcompanion(cntl);
118 struct usb_pipe *pipe = usb_set_address(hub, port, USB_HIGHSPEED);
120 writel(portreg, portsc & ~PORT_PE);
121 mutex_unlock(&cntl->usb.resetlock);
124 mutex_unlock(&cntl->usb.resetlock);
127 int count = configure_usb_device(pipe);
131 writel(portreg, portsc & ~PORT_PE);
132 hub->devcount += count;
138 mutex_unlock(&cntl->usb.resetlock);
140 if (! --cntl->checkports)
141 ehci_startcompanion(cntl);
145 // Find any devices connected to the root hub.
147 check_ehci_ports(struct usb_ehci_s *cntl)
151 // Launch a thread for every port.
153 memset(&hub, 0, sizeof(hub));
154 hub.cntl = &cntl->usb;
155 int ports = cntl->checkports;
158 for (i=0; i<ports; i++) {
160 run_thread(init_ehci_port, &hub);
163 // Wait for threads to complete.
171 /****************************************************************
173 ****************************************************************/
176 configure_ehci(void *data)
178 struct usb_ehci_s *cntl = data;
180 // Allocate ram for schedule storage
181 struct ehci_framelist *fl = memalign_high(sizeof(*fl), sizeof(*fl));
182 struct ehci_qh *intr_qh = memalign_high(EHCI_QH_ALIGN, sizeof(*intr_qh));
183 struct ehci_qh *async_qh = memalign_high(EHCI_QH_ALIGN, sizeof(*async_qh));
184 if (!fl || !intr_qh || !async_qh) {
189 // XXX - check for halted?
192 u32 cmd = readl(&cntl->regs->usbcmd);
193 writel(&cntl->regs->usbcmd, (cmd & ~(CMD_ASE | CMD_PSE)) | CMD_HCRESET);
194 u64 end = calc_future_tsc(250);
196 cmd = readl(&cntl->regs->usbcmd);
197 if (!(cmd & CMD_HCRESET))
199 if (check_time(end)) {
205 // Disable interrupts (just to be safe).
206 writel(&cntl->regs->usbintr, 0);
208 // Set schedule to point to primary intr queue head
209 memset(intr_qh, 0, sizeof(*intr_qh));
210 intr_qh->next = EHCI_PTR_TERM;
211 intr_qh->info2 = (0x01 << QH_SMASK_SHIFT);
212 intr_qh->token = QTD_STS_HALT;
213 intr_qh->qtd_next = intr_qh->alt_next = EHCI_PTR_TERM;
215 for (i=0; i<ARRAY_SIZE(fl->links); i++)
216 fl->links[i] = (u32)intr_qh | EHCI_PTR_QH;
217 writel(&cntl->regs->periodiclistbase, (u32)fl);
219 // Set async list to point to primary async queue head
220 memset(async_qh, 0, sizeof(*async_qh));
221 async_qh->next = (u32)async_qh | EHCI_PTR_QH;
222 async_qh->info1 = QH_HEAD;
223 async_qh->token = QTD_STS_HALT;
224 async_qh->qtd_next = async_qh->alt_next = EHCI_PTR_TERM;
225 cntl->async_qh = async_qh;
226 writel(&cntl->regs->asynclistbase, (u32)async_qh);
229 writel(&cntl->regs->usbcmd, cmd | CMD_ASE | CMD_PSE | CMD_RUN);
231 // Set default of high speed for root hub.
232 writel(&cntl->regs->configflag, 1);
233 cntl->checkports = readl(&cntl->caps->hcsparams) & HCS_N_PORTS_MASK;
236 int count = check_ehci_ports(cntl);
237 free_pipe(cntl->usb.defaultpipe);
242 // No devices found - shutdown and free controller.
243 writel(&cntl->regs->usbcmd, cmd & ~CMD_RUN);
244 msleep(4); // 2ms to stop reading memory - XXX
253 ehci_init(u16 bdf, int busid, int compbdf)
255 if (! CONFIG_USB_EHCI)
258 u32 baseaddr = pci_config_readl(bdf, PCI_BASE_ADDRESS_0);
259 struct ehci_caps *caps = (void*)(baseaddr & PCI_BASE_ADDRESS_MEM_MASK);
260 u32 hcc_params = readl(&caps->hccparams);
261 if (hcc_params & HCC_64BIT_ADDR) {
262 dprintf(1, "No support for 64bit EHCI\n");
266 struct usb_ehci_s *cntl = malloc_tmphigh(sizeof(*cntl));
267 memset(cntl, 0, sizeof(*cntl));
268 cntl->usb.busid = busid;
269 cntl->usb.type = USB_TYPE_EHCI;
271 cntl->regs = (void*)caps + readb(&caps->caplength);
273 dprintf(1, "EHCI init on dev %02x:%02x.%x (regs=%p)\n"
274 , pci_bdf_to_bus(bdf), pci_bdf_to_dev(bdf)
275 , pci_bdf_to_fn(bdf), cntl->regs);
277 pci_config_maskw(bdf, PCI_COMMAND, 0, PCI_COMMAND_MASTER);
279 // XXX - check for and disable SMM control?
281 // Find companion controllers.
283 int max = pci_to_bdf(pci_bdf_to_bus(bdf) + 1, 0, 0);
285 if (compbdf < 0 || compbdf >= bdf)
287 u32 code = pci_config_readl(compbdf, PCI_CLASS_REVISION) >> 8;
288 if (code == PCI_CLASS_SERIAL_USB_UHCI) {
289 cntl->companion[count].bdf = compbdf;
290 cntl->companion[count].type = USB_TYPE_UHCI;
292 } else if (code == PCI_CLASS_SERIAL_USB_OHCI) {
293 cntl->companion[count].bdf = compbdf;
294 cntl->companion[count].type = USB_TYPE_OHCI;
297 compbdf = pci_next(compbdf+1, &max);
300 run_thread(configure_ehci, cntl);
305 /****************************************************************
306 * End point communication
307 ****************************************************************/
310 ehci_wait_qh(struct usb_ehci_s *cntl, struct ehci_qh *qh)
312 // XXX - 500ms just a guess
313 u64 end = calc_future_tsc(500);
315 if (qh->qtd_next & EHCI_PTR_TERM)
318 if (check_time(end)) {
326 // Wait for next USB async frame to start - for ensuring safe memory release.
328 ehci_waittick(struct usb_ehci_s *cntl)
334 // Wait for access to "doorbell"
337 u64 end = calc_future_tsc(100);
339 sts = readl(&cntl->regs->usbsts);
340 if (!(sts & STS_IAA)) {
341 cmd = readl(&cntl->regs->usbcmd);
342 if (!(cmd & CMD_IAAD))
345 if (check_time(end)) {
352 writel(&cntl->regs->usbcmd, cmd | CMD_IAAD);
353 // Wait for completion
355 sts = readl(&cntl->regs->usbsts);
358 if (check_time(end)) {
365 writel(&cntl->regs->usbsts, STS_IAA);
370 struct ehci_qtd *next_td, *tds;
372 struct usb_pipe pipe;
376 ehci_free_pipe(struct usb_pipe *p)
378 if (! CONFIG_USB_EHCI)
380 dprintf(7, "ehci_free_pipe %p\n", p);
381 struct ehci_pipe *pipe = container_of(p, struct ehci_pipe, pipe);
382 struct usb_ehci_s *cntl = container_of(
383 pipe->pipe.cntl, struct usb_ehci_s, usb);
385 struct ehci_qh *start = cntl->async_qh;
386 struct ehci_qh *pos = start;
388 struct ehci_qh *next = (void*)(pos->next & ~EHCI_PTR_BITS);
390 // Not found?! Exit without freeing.
391 warn_internalerror();
394 if (next == &pipe->qh) {
395 pos->next = next->next;
405 ehci_alloc_control_pipe(struct usb_pipe *dummy)
407 if (! CONFIG_USB_EHCI)
409 struct usb_ehci_s *cntl = container_of(
410 dummy->cntl, struct usb_ehci_s, usb);
411 dprintf(7, "ehci_alloc_control_pipe %p\n", &cntl->usb);
413 // Allocate a queue head.
414 struct ehci_pipe *pipe = memalign_tmphigh(EHCI_QH_ALIGN, sizeof(*pipe));
419 memset(pipe, 0, sizeof(*pipe));
420 memcpy(&pipe->pipe, dummy, sizeof(pipe->pipe));
421 pipe->qh.qtd_next = pipe->qh.alt_next = EHCI_PTR_TERM;
422 pipe->qh.token = QTD_STS_HALT;
424 // Add queue head to controller list.
425 struct ehci_qh *async_qh = cntl->async_qh;
426 pipe->qh.next = async_qh->next;
428 async_qh->next = (u32)&pipe->qh | EHCI_PTR_QH;
433 fillTDbuffer(struct ehci_qtd *td, u16 maxpacket, const void *buf, int bytes)
438 if (pos >= &td->buf[ARRAY_SIZE(td->buf)])
439 // More data than can transfer in a single qtd - only use
440 // full packets to prevent a babble error.
441 return ALIGN_DOWN(dest - (u32)buf, maxpacket);
443 u32 max = 0x1000 - (dest & 0xfff);
451 return dest - (u32)buf;
455 ehci_control(struct usb_pipe *p, int dir, const void *cmd, int cmdsize
456 , void *data, int datasize)
459 if (! CONFIG_USB_EHCI)
461 dprintf(5, "ehci_control %p\n", p);
462 if (datasize > 4*4096 || cmdsize > 4*4096) {
463 // XXX - should support larger sizes.
467 struct ehci_pipe *pipe = container_of(p, struct ehci_pipe, pipe);
468 struct usb_ehci_s *cntl = container_of(
469 pipe->pipe.cntl, struct usb_ehci_s, usb);
471 u16 maxpacket = pipe->pipe.maxpacket;
472 int speed = pipe->pipe.speed;
474 // Setup fields in qh
476 (1 << QH_MULT_SHIFT) | (speed != USB_HIGHSPEED ? QH_CONTROL : 0)
477 | (maxpacket << QH_MAXPACKET_SHIFT)
479 | (speed << QH_SPEED_SHIFT)
480 | (pipe->pipe.ep << QH_EP_SHIFT)
481 | (pipe->pipe.devaddr << QH_DEVADDR_SHIFT));
482 pipe->qh.info2 = ((1 << QH_MULT_SHIFT)
483 | (pipe->pipe.tt_port << QH_HUBPORT_SHIFT)
484 | (pipe->pipe.tt_devaddr << QH_HUBADDR_SHIFT));
486 // Setup transfer descriptors
487 struct ehci_qtd *tds = memalign_tmphigh(EHCI_QTD_ALIGN, sizeof(*tds) * 3);
492 memset(tds, 0, sizeof(*tds) * 3);
493 struct ehci_qtd *td = tds;
495 td->qtd_next = (u32)&td[1];
496 td->alt_next = EHCI_PTR_TERM;
497 td->token = (ehci_explen(cmdsize) | QTD_STS_ACTIVE
498 | QTD_PID_SETUP | ehci_maxerr(3));
499 fillTDbuffer(td, maxpacket, cmd, cmdsize);
503 td->qtd_next = (u32)&td[1];
504 td->alt_next = EHCI_PTR_TERM;
505 td->token = (QTD_TOGGLE | ehci_explen(datasize) | QTD_STS_ACTIVE
506 | (dir ? QTD_PID_IN : QTD_PID_OUT) | ehci_maxerr(3));
507 fillTDbuffer(td, maxpacket, data, datasize);
511 td->qtd_next = EHCI_PTR_TERM;
512 td->alt_next = EHCI_PTR_TERM;
513 td->token = (QTD_TOGGLE | QTD_STS_ACTIVE
514 | (dir ? QTD_PID_OUT : QTD_PID_IN) | ehci_maxerr(3));
518 pipe->qh.qtd_next = (u32)tds;
521 int ret = ehci_wait_qh(cntl, &pipe->qh);
522 pipe->qh.token = QTD_STS_HALT;
524 pipe->qh.qtd_next = pipe->qh.alt_next = EHCI_PTR_TERM;
533 ehci_alloc_bulk_pipe(struct usb_pipe *dummy)
535 // XXX - this func is same as alloc_control except for malloc_low
536 if (! CONFIG_USB_EHCI)
538 struct usb_ehci_s *cntl = container_of(
539 dummy->cntl, struct usb_ehci_s, usb);
540 dprintf(7, "ehci_alloc_bulk_pipe %p\n", &cntl->usb);
542 // Allocate a queue head.
543 struct ehci_pipe *pipe = memalign_low(EHCI_QH_ALIGN, sizeof(*pipe));
548 memset(pipe, 0, sizeof(*pipe));
549 memcpy(&pipe->pipe, dummy, sizeof(pipe->pipe));
550 pipe->qh.qtd_next = pipe->qh.alt_next = EHCI_PTR_TERM;
551 pipe->qh.token = QTD_STS_HALT;
553 // Add queue head to controller list.
554 struct ehci_qh *async_qh = cntl->async_qh;
555 pipe->qh.next = async_qh->next;
557 async_qh->next = (u32)&pipe->qh | EHCI_PTR_QH;
562 ehci_wait_td(struct ehci_qtd *td)
564 u64 end = calc_future_tsc(5000); // XXX - lookup real time.
568 if (!(status & QTD_STS_ACTIVE))
570 if (check_time(end)) {
576 if (status & QTD_STS_HALT) {
577 dprintf(1, "ehci_wait_td error - status=%x\n", status);
586 ehci_send_bulk(struct usb_pipe *p, int dir, void *data, int datasize)
588 if (! CONFIG_USB_EHCI)
590 struct ehci_pipe *pipe = container_of(p, struct ehci_pipe, pipe);
591 dprintf(7, "ehci_send_bulk qh=%p dir=%d data=%p size=%d\n"
592 , &pipe->qh, dir, data, datasize);
594 // Allocate 4 tds on stack (16byte aligned)
595 u8 tdsbuf[sizeof(struct ehci_qtd) * STACKQTDS + EHCI_QTD_ALIGN - 1];
596 struct ehci_qtd *tds = (void*)ALIGN((u32)tdsbuf, EHCI_QTD_ALIGN);
597 memset(tds, 0, sizeof(*tds) * STACKQTDS);
599 // Setup fields in qh
600 u16 maxpacket = GET_FLATPTR(pipe->pipe.maxpacket);
601 SET_FLATPTR(pipe->qh.info1
602 , ((1 << QH_MULT_SHIFT)
603 | (maxpacket << QH_MAXPACKET_SHIFT)
604 | (GET_FLATPTR(pipe->pipe.speed) << QH_SPEED_SHIFT)
605 | (GET_FLATPTR(pipe->pipe.ep) << QH_EP_SHIFT)
606 | (GET_FLATPTR(pipe->pipe.devaddr) << QH_DEVADDR_SHIFT)));
607 SET_FLATPTR(pipe->qh.info2
608 , ((1 << QH_MULT_SHIFT)
609 | (GET_FLATPTR(pipe->pipe.tt_port) << QH_HUBPORT_SHIFT)
610 | (GET_FLATPTR(pipe->pipe.tt_devaddr) << QH_HUBADDR_SHIFT)));
612 SET_FLATPTR(pipe->qh.qtd_next, (u32)MAKE_FLATPTR(GET_SEG(SS), tds));
614 SET_FLATPTR(pipe->qh.token, GET_FLATPTR(pipe->qh.token) & QTD_TOGGLE);
618 struct ehci_qtd *td = &tds[tdpos++ % STACKQTDS];
619 int ret = ehci_wait_td(td);
623 struct ehci_qtd *nexttd_fl = MAKE_FLATPTR(GET_SEG(SS)
624 , &tds[tdpos % STACKQTDS]);
626 int transfer = fillTDbuffer(td, maxpacket, data, datasize);
627 td->qtd_next = (transfer==datasize ? EHCI_PTR_TERM : (u32)nexttd_fl);
628 td->alt_next = EHCI_PTR_TERM;
630 td->token = (ehci_explen(transfer) | QTD_STS_ACTIVE
631 | (dir ? QTD_PID_IN : QTD_PID_OUT) | ehci_maxerr(3));
634 datasize -= transfer;
637 for (i=0; i<STACKQTDS; i++) {
638 struct ehci_qtd *td = &tds[tdpos++ % STACKQTDS];
639 int ret = ehci_wait_td(td);
646 dprintf(1, "ehci_send_bulk failed\n");
647 SET_FLATPTR(pipe->qh.qtd_next, EHCI_PTR_TERM);
648 SET_FLATPTR(pipe->qh.alt_next, EHCI_PTR_TERM);
650 struct usb_ehci_s *cntl = container_of(
651 GET_FLATPTR(pipe->pipe.cntl), struct usb_ehci_s, usb);
657 ehci_alloc_intr_pipe(struct usb_pipe *dummy, int frameexp)
659 if (! CONFIG_USB_EHCI)
661 struct usb_ehci_s *cntl = container_of(
662 dummy->cntl, struct usb_ehci_s, usb);
663 dprintf(7, "ehci_alloc_intr_pipe %p %d\n", &cntl->usb, frameexp);
667 int maxpacket = dummy->maxpacket;
668 // Determine number of entries needed for 2 timer ticks.
669 int ms = 1<<frameexp;
670 int count = DIV_ROUND_UP(PIT_TICK_INTERVAL * 1000 * 2, PIT_TICK_RATE * ms);
671 struct ehci_pipe *pipe = memalign_low(EHCI_QH_ALIGN, sizeof(*pipe));
672 struct ehci_qtd *tds = memalign_low(EHCI_QTD_ALIGN, sizeof(*tds) * count);
673 void *data = malloc_low(maxpacket * count);
674 if (!pipe || !tds || !data) {
678 memset(pipe, 0, sizeof(*pipe));
679 memcpy(&pipe->pipe, dummy, sizeof(pipe->pipe));
680 pipe->next_td = pipe->tds = tds;
685 | (maxpacket << QH_MAXPACKET_SHIFT)
686 | (pipe->pipe.speed << QH_SPEED_SHIFT)
687 | (pipe->pipe.ep << QH_EP_SHIFT)
688 | (pipe->pipe.devaddr << QH_DEVADDR_SHIFT));
689 pipe->qh.info2 = ((1 << QH_MULT_SHIFT)
690 | (pipe->pipe.tt_port << QH_HUBPORT_SHIFT)
691 | (pipe->pipe.tt_devaddr << QH_HUBADDR_SHIFT)
692 | (0x01 << QH_SMASK_SHIFT)
693 | (0x1c << QH_CMASK_SHIFT));
694 pipe->qh.qtd_next = (u32)tds;
697 for (i=0; i<count; i++) {
698 struct ehci_qtd *td = &tds[i];
699 td->qtd_next = (i==count-1 ? (u32)tds : (u32)&td[1]);
700 td->alt_next = EHCI_PTR_TERM;
701 td->token = (ehci_explen(maxpacket) | QTD_STS_ACTIVE
702 | QTD_PID_IN | ehci_maxerr(3));
703 td->buf[0] = (u32)data + maxpacket * i;
706 // Add to interrupt schedule.
707 struct ehci_framelist *fl = (void*)readl(&cntl->regs->periodiclistbase);
709 // Add to existing interrupt entry.
710 struct ehci_qh *intr_qh = (void*)(fl->links[0] & ~EHCI_PTR_BITS);
711 pipe->qh.next = intr_qh->next;
713 intr_qh->next = (u32)&pipe->qh | EHCI_PTR_QH;
715 int startpos = 1<<(frameexp-1);
716 pipe->qh.next = fl->links[startpos];
718 for (i=startpos; i<ARRAY_SIZE(fl->links); i+=ms)
719 fl->links[i] = (u32)&pipe->qh | EHCI_PTR_QH;
731 ehci_poll_intr(struct usb_pipe *p, void *data)
734 if (! CONFIG_USB_EHCI)
736 struct ehci_pipe *pipe = container_of(p, struct ehci_pipe, pipe);
737 struct ehci_qtd *td = GET_FLATPTR(pipe->next_td);
738 u32 token = GET_FLATPTR(td->token);
739 if (token & QTD_STS_ACTIVE)
742 // XXX - check for errors.
745 int maxpacket = GET_FLATPTR(pipe->pipe.maxpacket);
746 int pos = td - GET_FLATPTR(pipe->tds);
747 void *tddata = GET_FLATPTR(pipe->data) + maxpacket * pos;
748 memcpy_far(GET_SEG(SS), data
749 , FLATPTR_TO_SEG(tddata), (void*)FLATPTR_TO_OFFSET(tddata)
753 struct ehci_qtd *next = (void*)(GET_FLATPTR(td->qtd_next) & ~EHCI_PTR_BITS);
754 SET_FLATPTR(pipe->next_td, next);
755 SET_FLATPTR(td->buf[0], (u32)tddata);
757 SET_FLATPTR(td->token, (ehci_explen(maxpacket) | QTD_STS_ACTIVE
758 | QTD_PID_IN | ehci_maxerr(3)));