1 // Code for handling EHCI USB controllers.
3 // Copyright (C) 2010 Kevin O'Connor <kevin@koconnor.net>
5 // This file may be distributed under the terms of the GNU LGPLv3 license.
7 #include "util.h" // dprintf
8 #include "pci.h" // pci_bdf_to_bus
9 #include "config.h" // CONFIG_*
10 #include "ioport.h" // outw
11 #include "usb-ehci.h" // struct ehci_qh
12 #include "pci_ids.h" // PCI_CLASS_SERIAL_USB_UHCI
13 #include "pci_regs.h" // PCI_BASE_ADDRESS_0
14 #include "usb.h" // struct usb_s
15 #include "farptr.h" // GET_FLATPTR
16 #include "usb-uhci.h" // init_uhci
17 #include "usb-ohci.h" // init_ohci
21 struct ehci_caps *caps;
22 struct ehci_regs *regs;
23 struct ehci_qh *async_qh;
24 struct pci_device *companion[8];
30 /****************************************************************
32 ****************************************************************/
34 #define EHCI_TIME_POSTPOWER 20
35 #define EHCI_TIME_POSTRESET 2
37 // Check if need companion controllers for full/low speed devices
39 ehci_note_port(struct usb_ehci_s *cntl)
41 if (--cntl->checkports)
42 // Ports still being detected.
44 if (! cntl->legacycount)
45 // No full/low speed devices found.
47 // Start companion controllers.
49 for (i=0; i<ARRAY_SIZE(cntl->companion); i++) {
50 struct pci_device *pci = cntl->companion[i];
54 // ohci/uhci_init call pci_config_XXX - don't run from irq handler.
57 if (pci_classprog(pci) == PCI_CLASS_SERIAL_USB_UHCI)
58 uhci_init(pci, cntl->usb.busid + i);
59 else if (pci_classprog(pci) == PCI_CLASS_SERIAL_USB_OHCI)
60 ohci_init(pci, cntl->usb.busid + i);
64 // Check if device attached to port
66 ehci_hub_detect(struct usbhub_s *hub, u32 port)
68 struct usb_ehci_s *cntl = container_of(hub->cntl, struct usb_ehci_s, usb);
69 u32 *portreg = &cntl->regs->portsc[port];
70 u32 portsc = readl(portreg);
73 if (!(portsc & PORT_POWER)) {
75 writel(portreg, portsc);
76 msleep(EHCI_TIME_POSTPOWER);
78 msleep(1); // XXX - time for connect to be detected.
80 portsc = readl(portreg);
82 if (!(portsc & PORT_CONNECT))
86 if ((portsc & PORT_LINESTATUS_MASK) == PORT_LINESTATUS_KSTATE) {
89 writel(portreg, portsc | PORT_OWNER);
93 // XXX - if just powered up, need to wait for USB_TIME_ATTDB?
95 // Begin reset on port
96 portsc = (portsc & ~PORT_PE) | PORT_RESET;
97 writel(portreg, portsc);
98 msleep(USB_TIME_DRSTR);
102 ehci_note_port(cntl);
106 // Reset device on port
108 ehci_hub_reset(struct usbhub_s *hub, u32 port)
110 struct usb_ehci_s *cntl = container_of(hub->cntl, struct usb_ehci_s, usb);
111 u32 *portreg = &cntl->regs->portsc[port];
112 u32 portsc = readl(portreg);
114 // Finish reset on port
115 portsc &= ~PORT_RESET;
116 writel(portreg, portsc);
117 msleep(EHCI_TIME_POSTRESET);
120 portsc = readl(portreg);
121 if (!(portsc & PORT_CONNECT))
122 // No longer connected
124 if (!(portsc & PORT_PE)) {
127 writel(portreg, portsc | PORT_OWNER);
133 ehci_note_port(cntl);
139 ehci_hub_disconnect(struct usbhub_s *hub, u32 port)
141 struct usb_ehci_s *cntl = container_of(hub->cntl, struct usb_ehci_s, usb);
142 u32 *portreg = &cntl->regs->portsc[port];
143 u32 portsc = readl(portreg);
144 writel(portreg, portsc & ~PORT_PE);
147 static struct usbhub_op_s ehci_HubOp = {
148 .detect = ehci_hub_detect,
149 .reset = ehci_hub_reset,
150 .disconnect = ehci_hub_disconnect,
153 // Find any devices connected to the root hub.
155 check_ehci_ports(struct usb_ehci_s *cntl)
159 memset(&hub, 0, sizeof(hub));
160 hub.cntl = &cntl->usb;
161 hub.portcount = cntl->checkports;
162 hub.op = &ehci_HubOp;
168 /****************************************************************
170 ****************************************************************/
173 configure_ehci(void *data)
175 struct usb_ehci_s *cntl = data;
177 // Allocate ram for schedule storage
178 struct ehci_framelist *fl = memalign_high(sizeof(*fl), sizeof(*fl));
179 struct ehci_qh *intr_qh = memalign_high(EHCI_QH_ALIGN, sizeof(*intr_qh));
180 struct ehci_qh *async_qh = memalign_high(EHCI_QH_ALIGN, sizeof(*async_qh));
181 if (!fl || !intr_qh || !async_qh) {
186 // XXX - check for halted?
189 u32 cmd = readl(&cntl->regs->usbcmd);
190 writel(&cntl->regs->usbcmd, (cmd & ~(CMD_ASE | CMD_PSE)) | CMD_HCRESET);
191 u64 end = calc_future_tsc(250);
193 cmd = readl(&cntl->regs->usbcmd);
194 if (!(cmd & CMD_HCRESET))
196 if (check_tsc(end)) {
203 // Disable interrupts (just to be safe).
204 writel(&cntl->regs->usbintr, 0);
206 // Set schedule to point to primary intr queue head
207 memset(intr_qh, 0, sizeof(*intr_qh));
208 intr_qh->next = EHCI_PTR_TERM;
209 intr_qh->info2 = (0x01 << QH_SMASK_SHIFT);
210 intr_qh->token = QTD_STS_HALT;
211 intr_qh->qtd_next = intr_qh->alt_next = EHCI_PTR_TERM;
213 for (i=0; i<ARRAY_SIZE(fl->links); i++)
214 fl->links[i] = (u32)intr_qh | EHCI_PTR_QH;
215 writel(&cntl->regs->periodiclistbase, (u32)fl);
217 // Set async list to point to primary async queue head
218 memset(async_qh, 0, sizeof(*async_qh));
219 async_qh->next = (u32)async_qh | EHCI_PTR_QH;
220 async_qh->info1 = QH_HEAD;
221 async_qh->token = QTD_STS_HALT;
222 async_qh->qtd_next = async_qh->alt_next = EHCI_PTR_TERM;
223 cntl->async_qh = async_qh;
224 writel(&cntl->regs->asynclistbase, (u32)async_qh);
227 writel(&cntl->regs->usbcmd, cmd | CMD_ASE | CMD_PSE | CMD_RUN);
229 // Set default of high speed for root hub.
230 writel(&cntl->regs->configflag, 1);
231 cntl->checkports = readl(&cntl->caps->hcsparams) & HCS_N_PORTS_MASK;
234 int count = check_ehci_ports(cntl);
235 free_pipe(cntl->usb.defaultpipe);
240 // No devices found - shutdown and free controller.
241 writel(&cntl->regs->usbcmd, cmd & ~CMD_RUN);
242 msleep(4); // 2ms to stop reading memory - XXX
251 ehci_init(struct pci_device *pci, int busid, struct pci_device *comppci)
253 if (! CONFIG_USB_EHCI)
257 u32 baseaddr = pci_config_readl(bdf, PCI_BASE_ADDRESS_0);
258 struct ehci_caps *caps = (void*)(baseaddr & PCI_BASE_ADDRESS_MEM_MASK);
259 u32 hcc_params = readl(&caps->hccparams);
260 if (hcc_params & HCC_64BIT_ADDR) {
261 dprintf(1, "No support for 64bit EHCI\n");
265 struct usb_ehci_s *cntl = malloc_tmphigh(sizeof(*cntl));
266 memset(cntl, 0, sizeof(*cntl));
267 cntl->usb.busid = busid;
269 cntl->usb.type = USB_TYPE_EHCI;
271 cntl->regs = (void*)caps + readb(&caps->caplength);
273 dprintf(1, "EHCI init on dev %02x:%02x.%x (regs=%p)\n"
274 , pci_bdf_to_bus(bdf), pci_bdf_to_dev(bdf)
275 , pci_bdf_to_fn(bdf), cntl->regs);
277 pci_config_maskw(bdf, PCI_COMMAND, 0, PCI_COMMAND_MASTER);
279 // XXX - check for and disable SMM control?
281 // Find companion controllers.
284 if (!comppci || comppci == pci)
286 if (pci_classprog(comppci) == PCI_CLASS_SERIAL_USB_UHCI)
287 cntl->companion[count++] = comppci;
288 else if (pci_classprog(comppci) == PCI_CLASS_SERIAL_USB_OHCI)
289 cntl->companion[count++] = comppci;
290 comppci = comppci->next;
293 run_thread(configure_ehci, cntl);
298 /****************************************************************
299 * End point communication
300 ****************************************************************/
303 ehci_wait_qh(struct usb_ehci_s *cntl, struct ehci_qh *qh)
305 // XXX - 500ms just a guess
306 u64 end = calc_future_tsc(500);
308 if (qh->qtd_next & EHCI_PTR_TERM)
311 if (check_tsc(end)) {
319 // Wait for next USB async frame to start - for ensuring safe memory release.
321 ehci_waittick(struct usb_ehci_s *cntl)
327 // Wait for access to "doorbell"
330 u64 end = calc_future_tsc(100);
332 sts = readl(&cntl->regs->usbsts);
333 if (!(sts & STS_IAA)) {
334 cmd = readl(&cntl->regs->usbcmd);
335 if (!(cmd & CMD_IAAD))
338 if (check_tsc(end)) {
345 writel(&cntl->regs->usbcmd, cmd | CMD_IAAD);
346 // Wait for completion
348 sts = readl(&cntl->regs->usbsts);
351 if (check_tsc(end)) {
358 writel(&cntl->regs->usbsts, STS_IAA);
363 struct ehci_qtd *next_td, *tds;
365 struct usb_pipe pipe;
369 ehci_free_pipe(struct usb_pipe *p)
371 if (! CONFIG_USB_EHCI)
373 dprintf(7, "ehci_free_pipe %p\n", p);
374 struct ehci_pipe *pipe = container_of(p, struct ehci_pipe, pipe);
375 struct usb_ehci_s *cntl = container_of(
376 pipe->pipe.cntl, struct usb_ehci_s, usb);
378 struct ehci_qh *start = cntl->async_qh;
379 struct ehci_qh *pos = start;
381 struct ehci_qh *next = (void*)(pos->next & ~EHCI_PTR_BITS);
383 // Not found?! Exit without freeing.
384 warn_internalerror();
387 if (next == &pipe->qh) {
388 pos->next = next->next;
398 ehci_alloc_control_pipe(struct usb_pipe *dummy)
400 if (! CONFIG_USB_EHCI)
402 struct usb_ehci_s *cntl = container_of(
403 dummy->cntl, struct usb_ehci_s, usb);
404 dprintf(7, "ehci_alloc_control_pipe %p\n", &cntl->usb);
406 // Allocate a queue head.
407 struct ehci_pipe *pipe = memalign_tmphigh(EHCI_QH_ALIGN, sizeof(*pipe));
412 memset(pipe, 0, sizeof(*pipe));
413 memcpy(&pipe->pipe, dummy, sizeof(pipe->pipe));
414 pipe->qh.qtd_next = pipe->qh.alt_next = EHCI_PTR_TERM;
415 pipe->qh.token = QTD_STS_HALT;
417 // Add queue head to controller list.
418 struct ehci_qh *async_qh = cntl->async_qh;
419 pipe->qh.next = async_qh->next;
421 async_qh->next = (u32)&pipe->qh | EHCI_PTR_QH;
426 fillTDbuffer(struct ehci_qtd *td, u16 maxpacket, const void *buf, int bytes)
431 if (pos >= &td->buf[ARRAY_SIZE(td->buf)])
432 // More data than can transfer in a single qtd - only use
433 // full packets to prevent a babble error.
434 return ALIGN_DOWN(dest - (u32)buf, maxpacket);
436 u32 max = 0x1000 - (dest & 0xfff);
444 return dest - (u32)buf;
448 ehci_control(struct usb_pipe *p, int dir, const void *cmd, int cmdsize
449 , void *data, int datasize)
452 if (! CONFIG_USB_EHCI)
454 dprintf(5, "ehci_control %p\n", p);
455 if (datasize > 4*4096 || cmdsize > 4*4096) {
456 // XXX - should support larger sizes.
460 struct ehci_pipe *pipe = container_of(p, struct ehci_pipe, pipe);
461 struct usb_ehci_s *cntl = container_of(
462 pipe->pipe.cntl, struct usb_ehci_s, usb);
464 u16 maxpacket = pipe->pipe.maxpacket;
465 int speed = pipe->pipe.speed;
467 // Setup fields in qh
469 (1 << QH_MULT_SHIFT) | (speed != USB_HIGHSPEED ? QH_CONTROL : 0)
470 | (maxpacket << QH_MAXPACKET_SHIFT)
472 | (speed << QH_SPEED_SHIFT)
473 | (pipe->pipe.ep << QH_EP_SHIFT)
474 | (pipe->pipe.devaddr << QH_DEVADDR_SHIFT));
475 pipe->qh.info2 = ((1 << QH_MULT_SHIFT)
476 | (pipe->pipe.tt_port << QH_HUBPORT_SHIFT)
477 | (pipe->pipe.tt_devaddr << QH_HUBADDR_SHIFT));
479 // Setup transfer descriptors
480 struct ehci_qtd *tds = memalign_tmphigh(EHCI_QTD_ALIGN, sizeof(*tds) * 3);
485 memset(tds, 0, sizeof(*tds) * 3);
486 struct ehci_qtd *td = tds;
488 td->qtd_next = (u32)&td[1];
489 td->alt_next = EHCI_PTR_TERM;
490 td->token = (ehci_explen(cmdsize) | QTD_STS_ACTIVE
491 | QTD_PID_SETUP | ehci_maxerr(3));
492 fillTDbuffer(td, maxpacket, cmd, cmdsize);
496 td->qtd_next = (u32)&td[1];
497 td->alt_next = EHCI_PTR_TERM;
498 td->token = (QTD_TOGGLE | ehci_explen(datasize) | QTD_STS_ACTIVE
499 | (dir ? QTD_PID_IN : QTD_PID_OUT) | ehci_maxerr(3));
500 fillTDbuffer(td, maxpacket, data, datasize);
504 td->qtd_next = EHCI_PTR_TERM;
505 td->alt_next = EHCI_PTR_TERM;
506 td->token = (QTD_TOGGLE | QTD_STS_ACTIVE
507 | (dir ? QTD_PID_OUT : QTD_PID_IN) | ehci_maxerr(3));
511 pipe->qh.qtd_next = (u32)tds;
514 int ret = ehci_wait_qh(cntl, &pipe->qh);
515 pipe->qh.token = QTD_STS_HALT;
517 pipe->qh.qtd_next = pipe->qh.alt_next = EHCI_PTR_TERM;
526 ehci_alloc_bulk_pipe(struct usb_pipe *dummy)
528 // XXX - this func is same as alloc_control except for malloc_low
529 if (! CONFIG_USB_EHCI)
531 struct usb_ehci_s *cntl = container_of(
532 dummy->cntl, struct usb_ehci_s, usb);
533 dprintf(7, "ehci_alloc_bulk_pipe %p\n", &cntl->usb);
535 // Allocate a queue head.
536 struct ehci_pipe *pipe = memalign_low(EHCI_QH_ALIGN, sizeof(*pipe));
541 memset(pipe, 0, sizeof(*pipe));
542 memcpy(&pipe->pipe, dummy, sizeof(pipe->pipe));
543 pipe->qh.qtd_next = pipe->qh.alt_next = EHCI_PTR_TERM;
544 pipe->qh.token = QTD_STS_HALT;
546 // Add queue head to controller list.
547 struct ehci_qh *async_qh = cntl->async_qh;
548 pipe->qh.next = async_qh->next;
550 async_qh->next = (u32)&pipe->qh | EHCI_PTR_QH;
555 ehci_wait_td(struct ehci_qtd *td)
557 u64 end = calc_future_tsc(5000); // XXX - lookup real time.
561 if (!(status & QTD_STS_ACTIVE))
563 if (check_tsc(end)) {
569 if (status & QTD_STS_HALT) {
570 dprintf(1, "ehci_wait_td error - status=%x\n", status);
579 ehci_send_bulk(struct usb_pipe *p, int dir, void *data, int datasize)
581 if (! CONFIG_USB_EHCI)
583 struct ehci_pipe *pipe = container_of(p, struct ehci_pipe, pipe);
584 dprintf(7, "ehci_send_bulk qh=%p dir=%d data=%p size=%d\n"
585 , &pipe->qh, dir, data, datasize);
587 // Allocate 4 tds on stack (16byte aligned)
588 u8 tdsbuf[sizeof(struct ehci_qtd) * STACKQTDS + EHCI_QTD_ALIGN - 1];
589 struct ehci_qtd *tds = (void*)ALIGN((u32)tdsbuf, EHCI_QTD_ALIGN);
590 memset(tds, 0, sizeof(*tds) * STACKQTDS);
592 // Setup fields in qh
593 u16 maxpacket = GET_FLATPTR(pipe->pipe.maxpacket);
594 SET_FLATPTR(pipe->qh.info1
595 , ((1 << QH_MULT_SHIFT)
596 | (maxpacket << QH_MAXPACKET_SHIFT)
597 | (GET_FLATPTR(pipe->pipe.speed) << QH_SPEED_SHIFT)
598 | (GET_FLATPTR(pipe->pipe.ep) << QH_EP_SHIFT)
599 | (GET_FLATPTR(pipe->pipe.devaddr) << QH_DEVADDR_SHIFT)));
600 SET_FLATPTR(pipe->qh.info2
601 , ((1 << QH_MULT_SHIFT)
602 | (GET_FLATPTR(pipe->pipe.tt_port) << QH_HUBPORT_SHIFT)
603 | (GET_FLATPTR(pipe->pipe.tt_devaddr) << QH_HUBADDR_SHIFT)));
605 SET_FLATPTR(pipe->qh.qtd_next, (u32)MAKE_FLATPTR(GET_SEG(SS), tds));
607 SET_FLATPTR(pipe->qh.token, GET_FLATPTR(pipe->qh.token) & QTD_TOGGLE);
611 struct ehci_qtd *td = &tds[tdpos++ % STACKQTDS];
612 int ret = ehci_wait_td(td);
616 struct ehci_qtd *nexttd_fl = MAKE_FLATPTR(GET_SEG(SS)
617 , &tds[tdpos % STACKQTDS]);
619 int transfer = fillTDbuffer(td, maxpacket, data, datasize);
620 td->qtd_next = (transfer==datasize ? EHCI_PTR_TERM : (u32)nexttd_fl);
621 td->alt_next = EHCI_PTR_TERM;
623 td->token = (ehci_explen(transfer) | QTD_STS_ACTIVE
624 | (dir ? QTD_PID_IN : QTD_PID_OUT) | ehci_maxerr(3));
627 datasize -= transfer;
630 for (i=0; i<STACKQTDS; i++) {
631 struct ehci_qtd *td = &tds[tdpos++ % STACKQTDS];
632 int ret = ehci_wait_td(td);
639 dprintf(1, "ehci_send_bulk failed\n");
640 SET_FLATPTR(pipe->qh.qtd_next, EHCI_PTR_TERM);
641 SET_FLATPTR(pipe->qh.alt_next, EHCI_PTR_TERM);
643 struct usb_ehci_s *cntl = container_of(
644 GET_FLATPTR(pipe->pipe.cntl), struct usb_ehci_s, usb);
650 ehci_alloc_intr_pipe(struct usb_pipe *dummy, int frameexp)
652 if (! CONFIG_USB_EHCI)
654 struct usb_ehci_s *cntl = container_of(
655 dummy->cntl, struct usb_ehci_s, usb);
656 dprintf(7, "ehci_alloc_intr_pipe %p %d\n", &cntl->usb, frameexp);
660 int maxpacket = dummy->maxpacket;
661 // Determine number of entries needed for 2 timer ticks.
662 int ms = 1<<frameexp;
663 int count = DIV_ROUND_UP(PIT_TICK_INTERVAL * 1000 * 2, PIT_TICK_RATE * ms);
664 struct ehci_pipe *pipe = memalign_low(EHCI_QH_ALIGN, sizeof(*pipe));
665 struct ehci_qtd *tds = memalign_low(EHCI_QTD_ALIGN, sizeof(*tds) * count);
666 void *data = malloc_low(maxpacket * count);
667 if (!pipe || !tds || !data) {
671 memset(pipe, 0, sizeof(*pipe));
672 memcpy(&pipe->pipe, dummy, sizeof(pipe->pipe));
673 pipe->next_td = pipe->tds = tds;
678 | (maxpacket << QH_MAXPACKET_SHIFT)
679 | (pipe->pipe.speed << QH_SPEED_SHIFT)
680 | (pipe->pipe.ep << QH_EP_SHIFT)
681 | (pipe->pipe.devaddr << QH_DEVADDR_SHIFT));
682 pipe->qh.info2 = ((1 << QH_MULT_SHIFT)
683 | (pipe->pipe.tt_port << QH_HUBPORT_SHIFT)
684 | (pipe->pipe.tt_devaddr << QH_HUBADDR_SHIFT)
685 | (0x01 << QH_SMASK_SHIFT)
686 | (0x1c << QH_CMASK_SHIFT));
687 pipe->qh.qtd_next = (u32)tds;
690 for (i=0; i<count; i++) {
691 struct ehci_qtd *td = &tds[i];
692 td->qtd_next = (i==count-1 ? (u32)tds : (u32)&td[1]);
693 td->alt_next = EHCI_PTR_TERM;
694 td->token = (ehci_explen(maxpacket) | QTD_STS_ACTIVE
695 | QTD_PID_IN | ehci_maxerr(3));
696 td->buf[0] = (u32)data + maxpacket * i;
699 // Add to interrupt schedule.
700 struct ehci_framelist *fl = (void*)readl(&cntl->regs->periodiclistbase);
702 // Add to existing interrupt entry.
703 struct ehci_qh *intr_qh = (void*)(fl->links[0] & ~EHCI_PTR_BITS);
704 pipe->qh.next = intr_qh->next;
706 intr_qh->next = (u32)&pipe->qh | EHCI_PTR_QH;
708 int startpos = 1<<(frameexp-1);
709 pipe->qh.next = fl->links[startpos];
711 for (i=startpos; i<ARRAY_SIZE(fl->links); i+=ms)
712 fl->links[i] = (u32)&pipe->qh | EHCI_PTR_QH;
724 ehci_poll_intr(struct usb_pipe *p, void *data)
727 if (! CONFIG_USB_EHCI)
729 struct ehci_pipe *pipe = container_of(p, struct ehci_pipe, pipe);
730 struct ehci_qtd *td = GET_FLATPTR(pipe->next_td);
731 u32 token = GET_FLATPTR(td->token);
732 if (token & QTD_STS_ACTIVE)
735 // XXX - check for errors.
738 int maxpacket = GET_FLATPTR(pipe->pipe.maxpacket);
739 int pos = td - GET_FLATPTR(pipe->tds);
740 void *tddata = GET_FLATPTR(pipe->data) + maxpacket * pos;
741 memcpy_far(GET_SEG(SS), data
742 , FLATPTR_TO_SEG(tddata), (void*)FLATPTR_TO_OFFSET(tddata)
746 struct ehci_qtd *next = (void*)(GET_FLATPTR(td->qtd_next) & ~EHCI_PTR_BITS);
747 SET_FLATPTR(pipe->next_td, next);
748 SET_FLATPTR(td->buf[0], (u32)tddata);
750 SET_FLATPTR(td->token, (ehci_explen(maxpacket) | QTD_STS_ACTIVE
751 | QTD_PID_IN | ehci_maxerr(3)));