1 // 16bit system callbacks
3 // Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
4 // Copyright (C) 2002 MandrakeSoft S.A.
6 // This file may be distributed under the terms of the GNU GPLv3 license.
8 #include "util.h" // irq_restore
9 #include "biosvar.h" // BIOS_CONFIG_TABLE
10 #include "ioport.h" // inb
11 #include "memmap.h" // E820_RAM
12 #include "pic.h" // eoi_pic2
13 #include "bregs.h" // struct bregs
15 // Use PS2 System Control port A to set A20 enable
19 // get current setting first
20 u8 newval, oldval = inb(PORT_A20);
22 newval = oldval | A20_ENABLE_BIT;
24 newval = oldval & ~A20_ENABLE_BIT;
25 outb(newval, PORT_A20);
27 return (oldval & A20_ENABLE_BIT) != 0;
31 handle_152400(struct bregs *regs)
34 set_code_success(regs);
38 handle_152401(struct bregs *regs)
41 set_code_success(regs);
45 handle_152402(struct bregs *regs)
47 regs->al = (inb(PORT_A20) & A20_ENABLE_BIT) != 0;
48 set_code_success(regs);
52 handle_152403(struct bregs *regs)
55 set_code_success(regs);
59 handle_1524XX(struct bregs *regs)
61 set_code_fail(regs, RET_EUNSUPPORTED);
65 handle_1524(struct bregs *regs)
68 case 0x00: handle_152400(regs); break;
69 case 0x01: handle_152401(regs); break;
70 case 0x02: handle_152402(regs); break;
71 case 0x03: handle_152403(regs); break;
72 default: handle_1524XX(regs); break;
76 // removable media eject
78 handle_1552(struct bregs *regs)
80 set_code_success(regs);
84 handle_1587(struct bregs *regs)
86 // +++ should probably have descriptor checks
87 // +++ should have exception handlers
89 u8 prev_a20_enable = set_a20(1); // enable A20 line
91 // 128K max of transfer on 386+ ???
92 // source == destination ???
94 // ES:SI points to descriptor table
95 // offset use initially comments
96 // ==============================================
97 // 00..07 Unused zeros Null descriptor
98 // 08..0f GDT zeros filled in by BIOS
99 // 10..17 source ssssssss source of data
100 // 18..1f dest dddddddd destination of data
101 // 20..27 CS zeros filled in by BIOS
102 // 28..2f SS zeros filled in by BIOS
109 // check for access rights of source & dest here
111 // Initialize GDT descriptor
112 SET_SEG(ES, regs->es);
114 u16 base15_00 = (regs->es << 4) + si;
115 u16 base23_16 = regs->es >> 12;
116 if (base15_00 < (u16)(regs->es<<4))
118 SET_VAR(ES, *(u16*)(si+0x08+0), 47); // limit 15:00 = 6 * 8bytes/descriptor
119 SET_VAR(ES, *(u16*)(si+0x08+2), base15_00);// base 15:00
120 SET_VAR(ES, *(u8 *)(si+0x08+4), base23_16);// base 23:16
121 SET_VAR(ES, *(u8 *)(si+0x08+5), 0x93); // access
122 SET_VAR(ES, *(u16*)(si+0x08+6), 0x0000); // base 31:24/reserved/limit 19:16
124 // Initialize CS descriptor
125 SET_VAR(ES, *(u16*)(si+0x20+0), 0xffff);// limit 15:00 = normal 64K limit
126 SET_VAR(ES, *(u16*)(si+0x20+2), 0x0000);// base 15:00
127 SET_VAR(ES, *(u8 *)(si+0x20+4), 0x000f);// base 23:16
128 SET_VAR(ES, *(u8 *)(si+0x20+5), 0x9b); // access
129 SET_VAR(ES, *(u16*)(si+0x20+6), 0x0000);// base 31:24/reserved/limit 19:16
131 // Initialize SS descriptor
132 u16 ss = GET_SEG(SS);
134 base23_16 = ss >> 12;
135 SET_VAR(ES, *(u16*)(si+0x28+0), 0xffff); // limit 15:00 = normal 64K limit
136 SET_VAR(ES, *(u16*)(si+0x28+2), base15_00);// base 15:00
137 SET_VAR(ES, *(u8 *)(si+0x28+4), base23_16);// base 23:16
138 SET_VAR(ES, *(u8 *)(si+0x28+5), 0x93); // access
139 SET_VAR(ES, *(u16*)(si+0x28+6), 0x0000); // base 31:24/reserved/limit 19:16
141 u16 count = regs->cx;
143 // Load new descriptor tables
144 "lgdtw %%es:0x8(%%si)\n"
145 "lidtw %%cs:pmode_IDT_info\n"
147 // Enable protected mode
148 "movl %%cr0, %%eax\n"
149 "orl $" __stringify(CR0_PE) ", %%eax\n"
150 "movl %%eax, %%cr0\n"
152 // far jump to flush CPU queue after transition to protected mode
153 "ljmpw $0x0020, $1f\n"
156 // GDT points to valid descriptor table, now load DS, ES
157 "movw $0x10, %%ax\n" // 010 000 = 2nd descriptor in table, TI=GDT, RPL=00
159 "movw $0x18, %%ax\n" // 011 000 = 3rd descriptor in table, TI=GDT, RPL=00
162 // move CX words from DS:SI to ES:DI
167 // Disable protected mode
168 "movl %%cr0, %%eax\n"
169 "andl $~" __stringify(CR0_PE) ", %%eax\n"
170 "movl %%eax, %%cr0\n"
172 // far jump to flush CPU queue after transition to real mode
173 "ljmpw $" __stringify(SEG_BIOS) ", $2f\n"
176 // restore IDT to normal real-mode defaults
177 "lidtw %%cs:rmode_IDT_info\n"
179 // Restore %ds (from %ss)
182 : "+c"(count), "+S"(si)
183 : : "eax", "di", "cc"); // XXX - also clobbers %es
185 set_a20(prev_a20_enable);
187 set_code_success(regs);
190 // Get the amount of extended memory (above 1M)
192 handle_1588(struct bregs *regs)
194 u32 rs = GET_GLOBAL(RamSize);
196 // According to Ralf Brown's interrupt the limit should be 15M,
197 // but real machines mostly return max. 63M.
198 if (rs > 64*1024*1024)
199 regs->ax = 63 * 1024;
201 regs->ax = (rs - 1*1024*1024) / 1024;
205 // Device busy interrupt. Called by Int 16h when no key available
207 handle_1590(struct bregs *regs)
211 // Interrupt complete. Called by Int 16h when key becomes available
213 handle_1591(struct bregs *regs)
217 // keyboard intercept
219 handle_154f(struct bregs *regs)
221 set_fail_silent(regs);
225 handle_15c0(struct bregs *regs)
228 regs->bx = (u32)&BIOS_CONFIG_TABLE;
229 set_code_success(regs);
233 handle_15c1(struct bregs *regs)
235 regs->es = get_ebda_seg();
240 handle_15e801(struct bregs *regs)
242 // my real system sets ax and bx to 0
243 // this is confirmed by Ralph Brown list
244 // but syslinux v1.48 is known to behave
245 // strangely if ax is set to 0
246 // regs.u.r16.ax = 0;
247 // regs.u.r16.bx = 0;
249 u32 rs = GET_GLOBAL(RamSize);
251 // Get the amount of extended memory (above 1M)
252 if (rs > 16*1024*1024) {
255 // Get the amount of extended memory above 16M in 64k blocks
256 regs->dx = (rs - 16*1024*1024) / (64*1024);
258 regs->cx = (rs - 1*1024*1024) / 1024;
262 // Set configured memory equal to extended memory
269 // Info on e820 map location and size.
270 struct e820entry *e820_list VAR16_32;
271 int e820_count VAR16_32;
272 // Amount of continuous ram under 4Gig
273 u32 RamSize VAR16_32;
274 // Amount of continuous ram >4Gig
278 handle_15e820(struct bregs *regs)
280 int count = GET_GLOBAL(e820_count);
281 if (regs->edx != 0x534D4150 || regs->bx >= count) {
282 set_code_fail(regs, RET_EUNSUPPORTED);
286 struct e820entry *l = GET_GLOBAL(e820_list);
287 memcpy_far(MAKE_FARPTR(regs->es, regs->di), &l[regs->bx], sizeof(l[0]));
288 if (regs->bx == count-1)
292 regs->eax = 0x534D4150;
293 regs->ecx = sizeof(l[0]);
298 handle_15e8XX(struct bregs *regs)
300 set_code_fail(regs, RET_EUNSUPPORTED);
304 handle_15e8(struct bregs *regs)
307 case 0x01: handle_15e801(regs); break;
308 case 0x20: handle_15e820(regs); break;
309 default: handle_15e8XX(regs); break;
314 handle_15XX(struct bregs *regs)
316 set_code_fail(regs, RET_EUNSUPPORTED);
319 // INT 15h System Services Entry Point
321 handle_15(struct bregs *regs)
323 debug_enter(regs, DEBUG_HDL_15);
325 case 0x24: handle_1524(regs); break;
326 case 0x4f: handle_154f(regs); break;
327 case 0x52: handle_1552(regs); break;
328 case 0x53: handle_1553(regs); break;
329 case 0x5f: handle_155f(regs); break;
330 case 0x83: handle_1583(regs); break;
331 case 0x86: handle_1586(regs); break;
332 case 0x87: handle_1587(regs); break;
333 case 0x88: handle_1588(regs); break;
334 case 0x90: handle_1590(regs); break;
335 case 0x91: handle_1591(regs); break;
336 case 0xc0: handle_15c0(regs); break;
337 case 0xc1: handle_15c1(regs); break;
338 case 0xc2: handle_15c2(regs); break;
339 case 0xe8: handle_15e8(regs); break;
340 default: handle_15XX(regs); break;
344 // INT 12h Memory Size Service Entry Point
346 handle_12(struct bregs *regs)
348 debug_enter(regs, DEBUG_HDL_12);
349 regs->ax = GET_BDA(mem_size_kb);
352 // INT 11h Equipment List Service Entry Point
354 handle_11(struct bregs *regs)
356 debug_enter(regs, DEBUG_HDL_11);
357 regs->ax = GET_BDA(equipment_list_flags);
360 // INT 05h Print Screen Service Entry Point
362 handle_05(struct bregs *regs)
364 debug_enter(regs, DEBUG_HDL_05);
367 // INT 10h Video Support Service Entry Point
369 handle_10(struct bregs *regs)
371 debug_enter(regs, DEBUG_HDL_10);
372 // dont do anything, since the VGA BIOS handles int10h requests
378 debug_isr(DEBUG_ISR_nmi);
379 BX_PANIC("NMI Handler called\n");
385 dprintf(3, "math cp init\n");
386 // 80x87 coprocessor installed
387 SETBITS_BDA(equipment_list_flags, 0x02);
388 enable_hwirq(13, entry_75);
391 // INT 75 - IRQ13 - MATH COPROCESSOR EXCEPTION
395 debug_isr(DEBUG_ISR_75);
398 outb(0, PORT_MATH_CLEAR);
403 call16_simpint(0x02, &eax, &flags);