3 * SMM support for BIOS.
5 * Copyright (C) 2002 MandrakeSoft S.A.
6 * Copyright (C) 2008 Nguyen Anh Quynh <aquynh@gmail.com>
8 * This file may be distributed under the terms of the GNU GPLv3 license.
13 #include "smm.h" // smm_init
14 #include "config.h" // CONFIG_*
15 #include "util.h" // memcpy
20 " .global smm_relocation_start \n"
21 " .global smm_relocation_end \n"
22 " .global smm_code_start \n"
23 " .global smm_code_end \n"
26 " /* code to relocate SMBASE to 0xa0000 */ \n"
27 "smm_relocation_start: \n"
28 " movl $0x38000 + 0x7efc, %ebx \n"
29 " /* revision ID to see if x86_64 or x86 */ \n"
33 " movl $0x38000 + 0x7ef8, %ebx \n"
36 " movl $0x38000 + 0x7f00, %ebx \n"
38 " movl $0xa0000, %eax \n"
39 " movl %eax, (%ebx) \n"
40 " /* indicate to the BIOS that the SMM code was executed */ \n"
45 "smm_relocation_end: \n"
47 " /* minimal SMM code to enable or disable ACPI */ \n"
54 " /* ACPI disable */ \n"
55 " //mov $PM_IO_BASE + 0x04, %dx /* PMCNTRL */ \n"
56 " mov $0xb000 + 0x04, %dx /* PMCNTRL */ \n"
66 " /* ACPI enable */ \n"
67 " //mov $PM_IO_BASE + 0x04, %dx /* PMCNTRL */ \n"
68 " mov $0xb000 + 0x04, %dx /* PMCNTRL */ \n"
79 extern u8 smm_relocation_start, smm_relocation_end;
80 extern u8 smm_code_start, smm_code_end;
83 smm_init(PCIDevice *d)
87 /* check if SMM init is already done */
88 value = pci_config_readl(d, 0x58);
89 if ((value & (1 << 25)) == 0) {
90 /* copy the SMM relocation code */
91 memcpy((void *)0x38000, &smm_relocation_start,
92 &smm_relocation_end - &smm_relocation_start);
94 /* enable SMI generation when writing to the APMC register */
95 pci_config_writel(d, 0x58, value | (1 << 25));
97 /* init APM status port */
100 /* raise an SMI interrupt */
103 /* wait until SMM code executed */
104 while (inb(0xb3) != 0x00);
106 /* enable the SMM memory window */
107 pci_config_writeb(&i440_pcidev, 0x72, 0x02 | 0x48);
109 /* copy the SMM code */
110 memcpy((void *)0xa8000, &smm_code_start,
111 &smm_code_end - &smm_code_start);
114 /* close the SMM memory window and enable normal SMM */
115 pci_config_writeb(&i440_pcidev, 0x72, 0x02 | 0x08);