1 // Rom layout and bios assembler to C interface.
3 // Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
4 // Copyright (C) 2002 MandrakeSoft S.A.
6 // This file may be distributed under the terms of the GNU GPLv3 license.
8 #include "config.h" // CONFIG_*
9 #include "ioport.h" // PORT_A20
10 #include "bregs.h" // CR0_*
13 /****************************************************************
14 * Include of 16bit C code
15 ****************************************************************/
18 .include "out/blob.16.s"
21 /****************************************************************
23 ****************************************************************/
25 // Call a C function - this does the minimal work necessary to
26 // call into C. It sets up %ds, backs up %es, and backs up
27 // those registers that are call clobbered by the C compiler.
30 pushl %eax // Save registers clobbered by C code
35 movw %ss, %ax // Move %ss to %ds
37 pushl %esp // Backup %esp, then clear high bits
40 popl %esp // Restore %esp (including high bits)
41 popw %ds // Restore registers saved above
48 // Call a C function with current register list as an
49 // argument. This backs up the registers and sets %eax
50 // to point to the backup. On return, the registers are
51 // restored from the structure.
52 .macro ENTRY_ARG cfunc
54 pushl %eax // Save registers (matches struct bregs)
62 movw %ss, %ax // Move %ss to %ds
64 movl %esp, %ebx // Backup %esp, then zero high bits
66 movl %esp, %eax // First arg is pointer to struct bregs
68 movl %ebx, %esp // Restore %esp (including high bits)
69 popw %ds // Restore registers (from struct bregs)
79 // As above, but don't mangle %esp
80 .macro ENTRY_ARG_ESP cfunc
82 pushl %eax // Save registers (matches struct bregs)
90 movw %ss, %ax // Move %ss to %ds
92 movl %esp, %eax // First arg is pointer to struct bregs
94 popw %ds // Restore registers (from struct bregs)
104 // Macro to reset the 16bit stack
109 movl $ BUILD_STACK_ADDR , %esp
113 // Specify a location in the fixed part of bios area.
115 .section .text.fixed.addr
116 .org \addr - BUILD_START_FIXED
120 /****************************************************************
122 ****************************************************************/
128 andl $~(CR0_CD|CR0_NW), %eax
131 // init the stack pointer
134 pushl $_code32__start
136 // Fall through to transition32 function below
139 /****************************************************************
141 ****************************************************************/
143 // Place CPU into 32bit mode from 16bit mode.
144 // Clobbers: %eax, flags, stack registers, cr0, idt/gdt
151 orb $A20_ENABLE_BIT, %al
154 // Set segment descriptors
155 lidt %cs:pmode_IDT_info
156 lgdt %cs:rombios32_gdt_48
158 // Enable protected mode
163 // start protected mode code
164 ljmpl $SEG32_MODE32_CS, $(BUILD_BIOS_ADDR + 1f)
168 // init data segments
169 movl $SEG32_MODE32_DS, %eax
179 // Call a 16bit function from 32bit mode.
180 // %eax = address of struct bregs
181 // Clobbers: all gp registers, flags, stack registers, cr0, idt/gdt
182 .global __call16_from32
186 // restore data segment limits to 0xffff
187 movw $SEG32_MODE16_DS, %ax
196 andb $~A20_ENABLE_BIT, %al
199 // Jump to 16bit mode
200 ljmpw $SEG32_MODE16_CS, $1f
204 // Disable protected mode
209 // far jump to flush CPU queue after transition to real mode
213 // restore IDT to normal real-mode defaults
214 lidt %cs:rmode_IDT_info
216 // Clear segment registers
222 movw %ax, %ss // Assume stack is in segment 0
226 // Set __call16 return address to be transition32
229 // Fall through to __call16
232 // Call a 16bit function from 16bit mode with a specified cpu register state
233 // %eax = address of struct bregs
234 // Clobbers: all gp registers, es
240 // Setup for iretw call
242 pushw $1f // return point
243 pushw 0x20(%eax) // flags
244 pushl 0x1c(%eax) // CS:IP
246 // Load calling registers.
247 movl 0x04(%eax), %edi
248 movl 0x08(%eax), %esi
249 movl 0x0c(%eax), %ebx
250 movl 0x10(%eax), %edx
251 movl 0x14(%eax), %ecx
252 movw 0x02(%eax), %es // XXX - should load %ds too
253 movl 0x18(%eax), %eax
256 iretw // XXX - just do a lcalll
258 // Store flags, eax, ecx
261 movl 0x06(%esp), %eax
262 movl %ecx, %ss:0x14(%eax) // Save %ecx
264 movw %cx, %ds // Restore %ds == %ss
266 movl %ecx, 0x18(%eax) // Save %eax
268 movw %cx, 0x20(%eax) // Save flags
270 // Store remaining registers
272 movl %edi, 0x04(%eax)
273 movl %esi, 0x08(%eax)
274 movl %ebx, 0x0c(%eax)
275 movl %edx, 0x10(%eax)
286 .global apm16protected_entry
287 apm16protected_entry:
290 ENTRY_ARG handle_1553
291 addw $4, %sp // pop dummy
292 popfw // restore flags
296 .global apm32protected_entry
297 apm32protected_entry:
299 pushw %cs // Setup for long jump to 16bit mode
305 ENTRY_ARG_ESP handle_1553
307 movw $2f,(%esp) // Setup for long jump back to 32bit mode
312 addl $4, %esp // pop call address
316 // 32bit elf entry point
321 lidtl (BUILD_BIOS_ADDR + pmode_IDT_info)
322 lgdtl (BUILD_BIOS_ADDR + rombios32_gdt_48)
323 movl $BUILD_STACK_ADDR, %esp
324 ljmpl $SEG32_MODE32_CS, $_code32__start
328 // Shutdown a CPU. We want this in the 0xf000 section to ensure that
329 // the code wont be overwritten with something else. (Should
330 // something spurious wake up the CPU, we want to be sure that the hlt
331 // insn will still be present and will shutdown the CPU.)
332 .global permanent_halt
339 /****************************************************************
341 ****************************************************************/
343 // Protected mode IDT descriptor
345 // I just make the limit 0, so the machine will shutdown
346 // if an exception occurs during protected mode memory
349 // Set base to f0000 to correspond to beginning of BIOS,
350 // in case I actually define an IDT later
353 .word 0x0000 // limit 15:00
354 .long 0xf0000 // base 16:47
356 // Real mode IDT descriptor
358 // Set to typical real-mode values.
362 .word 0x03ff // limit 15:00
363 .long 0 // base 16:47
374 // 32 bit flat code segment (SEG32_MODE32_CS)
375 .word 0xffff, 0, 0x9b00, 0x00cf
376 // 32 bit flat data segment (SEG32_MODE32_DS)
377 .word 0xffff, 0, 0x9300, 0x00cf
378 // 16 bit code segment base=0xf0000 limit=0xffff (SEG32_MODE16_CS)
379 .word 0xffff, 0, 0x9b0f, 0x0000
380 // 16 bit data segment base=0x0 limit=0xffff (SEG32_MODE16_DS)
381 .word 0xffff, 0, 0x9300, 0x0000
383 // We need a copy of this string in the 0xf000 segment, but we are not
384 // actually a PnP BIOS, so make sure it is *not* aligned, so OSes will
385 // not see it if they scan.
393 /****************************************************************
394 * Interrupt entry points
395 ****************************************************************/
397 // Define an entry point for an interrupt (no args passed).
401 cli // In case something far-calls instead of using "int"
406 // Define an entry point for an interrupt (can read/modify args).
407 .macro IRQ_ENTRY_ARG num
410 cli // In case something far-calls instead of using "int"
411 ENTRY_ARG handle_\num
429 // XXX - Fixed Disk Parameter Table
435 .include "out/cbt.proc.16.s"
439 // XXX - Baud Rate Generator Table
447 // int 18/19 are special - they reset the stack and do not return.
451 pushl $_code32_handle_19
457 pushl $_code32_handle_18
461 .macro IRQ_TRAMPOLINE num
462 .global irq_trampoline_0x\num
463 irq_trampoline_0x\num :
494 .include "out/floppy_dbt.proc.16.s"
511 .global freespace2_start, freespace2_end
525 .include "out/font.proc.16.s"
535 // XXX - Initial Interrupt Vector Offsets Loaded by POST
538 // XXX - BIOS_COPYRIGHT_STRING
539 .ascii "(c) 2002 MandrakeSoft S.A. Written by Kevin Lawton & the Bochs team."
542 .global dummy_iret_handler
549 ORG 0xfff0 // Power-up Entry Point
550 ljmpw $SEG_BIOS, $post16
557 .byte CONFIG_MODEL_ID
559 .global bios_checksum