1 // 32bit code to Power On Self Test (POST) a machine.
3 // Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
4 // Copyright (C) 2002 MandrakeSoft S.A.
6 // This file may be distributed under the terms of the GNU GPLv3 license.
8 #include "ioport.h" // PORT_*
9 #include "../out/rom16.offset.auto.h" // OFFSET_*
10 #include "config.h" // CONFIG_*
11 #include "cmos.h" // CMOS_*
12 #include "util.h" // memset
13 #include "biosvar.h" // struct bios_data_area_s
14 #include "ata.h" // hard_drive_setup
15 #include "disk.h" // floppy_drive_setup
16 #include "memmap.h" // add_e820
17 #include "pic.h" // pic_setup
18 #include "pci.h" // create_pirtable
19 #include "acpi.h" // acpi_bios_init
20 #include "bregs.h" // struct bregs
22 #define bda ((struct bios_data_area_s *)MAKE_FARPTR(SEG_BDA, 0))
23 #define ebda ((struct extended_bios_data_area_s *)MAKE_FARPTR(SEG_EBDA, 0))
26 set_irq(int vector, u32 loc)
28 SET_BDA(ivecs[vector].seg, SEG_BIOS);
29 SET_BDA(ivecs[vector].offset, loc - BUILD_BIOS_ADDR);
35 dprintf(3, "init bda\n");
36 memset(bda, 0, sizeof(*bda));
38 SET_BDA(mem_size_kb, BASE_MEM_IN_K);
42 set_irq(i, OFFSET_dummy_iret_handler);
44 set_irq(0x08, OFFSET_entry_08);
45 set_irq(0x09, OFFSET_entry_09);
46 //set_irq(0x0a, OFFSET_entry_hwirq);
47 //set_irq(0x0b, OFFSET_entry_hwirq);
48 //set_irq(0x0c, OFFSET_entry_hwirq);
49 //set_irq(0x0d, OFFSET_entry_hwirq);
50 set_irq(0x0e, OFFSET_entry_0e);
51 //set_irq(0x0f, OFFSET_entry_hwirq);
52 set_irq(0x10, OFFSET_entry_10);
53 set_irq(0x11, OFFSET_entry_11);
54 set_irq(0x12, OFFSET_entry_12);
55 set_irq(0x13, OFFSET_entry_13);
56 set_irq(0x14, OFFSET_entry_14);
57 set_irq(0x15, OFFSET_entry_15);
58 set_irq(0x16, OFFSET_entry_16);
59 set_irq(0x17, OFFSET_entry_17);
60 set_irq(0x18, OFFSET_entry_18);
61 set_irq(0x19, OFFSET_entry_19);
62 set_irq(0x1a, OFFSET_entry_1a);
63 set_irq(0x1c, OFFSET_entry_1c);
64 set_irq(0x40, OFFSET_entry_40);
65 set_irq(0x70, OFFSET_entry_70);
66 //set_irq(0x71, OFFSET_entry_hwirq);
67 //set_irq(0x72, OFFSET_entry_hwirq);
68 //set_irq(0x73, OFFSET_entry_hwirq);
69 set_irq(0x74, OFFSET_entry_74);
70 set_irq(0x75, OFFSET_entry_75);
71 set_irq(0x76, OFFSET_entry_76);
72 //set_irq(0x77, OFFSET_entry_hwirq);
74 // set vector 0x79 to zero
75 // this is used by 'gardian angel' protection system
76 SET_BDA(ivecs[0x79].seg, 0);
77 SET_BDA(ivecs[0x79].offset, 0);
79 set_irq(0x1E, OFFSET_diskette_param_table2);
85 memset(ebda, 0, sizeof(*ebda));
86 ebda->size = EBDA_SIZE;
87 SET_BDA(ebda_seg, SEG_EBDA);
88 SET_BDA(ivecs[0x41].seg, SEG_EBDA);
89 SET_BDA(ivecs[0x41].offset
90 , offsetof(struct extended_bios_data_area_s, fdpt[0]));
91 SET_BDA(ivecs[0x46].seg, SEG_EBDA);
92 SET_BDA(ivecs[0x41].offset
93 , offsetof(struct extended_bios_data_area_s, fdpt[1]));
99 dprintf(3, "Find memory size\n");
100 if (CONFIG_COREBOOT) {
103 // On emulators, get memory size from nvram.
104 u32 rs = (inb_cmos(CMOS_MEM_EXTMEM2_LOW)
105 | (inb_cmos(CMOS_MEM_EXTMEM2_HIGH) << 8)) * 65536;
107 rs += 16 * 1024 * 1024;
109 rs = ((inb_cmos(CMOS_MEM_EXTMEM_LOW)
110 | (inb_cmos(CMOS_MEM_EXTMEM_HIGH) << 8)) * 1024
112 SET_EBDA(ram_size, rs);
113 add_e820(0, rs, E820_RAM);
115 /* reserve 256KB BIOS area at the end of 4 GB */
116 add_e820(0xfffc0000, 256*1024, E820_RESERVED);
119 // Don't declare any memory between 0xa0000 and 0x100000
120 add_e820(0xa0000, 0x50000, E820_HOLE);
122 // Mark known areas as reserved.
123 add_e820((u32)MAKE_FARPTR(SEG_EBDA, 0), EBDA_SIZE * 1024, E820_RESERVED);
124 add_e820(BUILD_BIOS_ADDR, BUILD_BIOS_SIZE, E820_RESERVED);
126 dprintf(1, "ram_size=0x%08x\n", GET_EBDA(ram_size));
130 init_bios_tables(void)
133 // XXX - not supported on coreboot yet.
150 dprintf(3, "init boot device ordering\n");
153 struct ipl_entry_s *ip = &ebda->ipl.table[0];
154 ip->type = IPL_TYPE_FLOPPY;
158 ip->type = IPL_TYPE_HARDDISK;
162 if (CONFIG_CDROM_BOOT) {
163 ip->type = IPL_TYPE_CDROM;
167 ebda->ipl.count = ip - ebda->ipl.table;
168 ebda->ipl.sequence = 0xffff;
169 if (CONFIG_COREBOOT) {
170 // XXX - hardcode defaults for coreboot.
171 ebda->ipl.bootorder = 0x00000231;
172 ebda->ipl.checkfloppysig = 1;
174 // On emulators, get boot order from nvram.
175 ebda->ipl.bootorder = (inb_cmos(CMOS_BIOS_BOOTFLAG2)
176 | ((inb_cmos(CMOS_BIOS_BOOTFLAG1) & 0xf0) << 4));
177 if (!(inb_cmos(CMOS_BIOS_BOOTFLAG1) & 1))
178 ebda->ipl.checkfloppysig = 1;
182 // Execute a given option rom.
184 callrom(u16 seg, u16 offset)
187 memset(&br, 0, sizeof(br));
189 // starts 1 past for alignment
190 br.di = OFFSET_pnp_string - BUILD_BIOS_ADDR + 1;
195 debug_serial_setup();
198 // Find and run any "option roms" found in the given address range.
200 rom_scan(u32 start, u32 end)
203 for (; p <= (u8*)end; p += 2048) {
205 if (*(u16*)rom != 0xaa55)
207 u32 len = rom[2] * 512;
208 u8 sum = checksum(rom, len);
210 dprintf(1, "Found option rom with bad checksum:"
211 " loc=%p len=%d sum=%x\n"
215 p = (u8*)(((u32)p + len) / 2048 * 2048);
216 dprintf(1, "Running option rom at %p\n", rom+3);
217 callrom(FARPTR_TO_SEG(rom), FARPTR_TO_OFFSET(rom + 3));
219 if (GET_BDA(ebda_seg) != SEG_EBDA)
220 BX_PANIC("Option rom at %p attempted to move ebda from %x to %x\n"
221 , rom, SEG_EBDA, GET_BDA(ebda_seg));
223 // Look at the ROM's PnP Expansion header. Properly, we're supposed
224 // to init all the ROMs and then go back and build an IPL table of
225 // all the bootable devices, but we can get away with one pass.
226 if (rom[0x1a] != '$' || rom[0x1b] != 'P'
227 || rom[0x1c] != 'n' || rom[0x1d] != 'P')
229 // 0x1A is also the offset into the expansion header of...
230 // the Bootstrap Entry Vector, or zero if there is none.
231 u16 entry = *(u16*)&rom[0x1a+0x1a];
234 // Found a device that thinks it can boot the system. Record
235 // its BEV and product name string.
237 if (ebda->ipl.count >= ARRAY_SIZE(ebda->ipl.table))
240 struct ipl_entry_s *ip = &ebda->ipl.table[ebda->ipl.count];
241 ip->type = IPL_TYPE_BEV;
242 ip->vector = (FARPTR_TO_SEG(rom) << 16) | entry;
244 u16 desc = *(u16*)&rom[0x1a+0x10];
246 ip->description = (u32)MAKE_FARPTR(FARPTR_TO_SEG(rom), desc);
271 dprintf(1, "Scan for VGA option rom\n");
272 rom_scan(0xc0000, 0xc7800);
274 printf("BIOS - begin\n\n");
282 floppy_drive_setup();
287 dprintf(1, "Scan for option roms\n");
288 rom_scan(0xc8000, 0xe0000);
291 // Clear .bss section for C code.
295 dprintf(3, "clearing .bss section\n");
296 extern char __bss_start[], __bss_end[];
297 memset(__bss_start, 0, __bss_end - __bss_start);
300 // Reset DMA controller
304 // first reset the DMA controllers
305 outb(0, PORT_DMA1_MASTER_CLEAR);
306 outb(0, PORT_DMA2_MASTER_CLEAR);
308 // then initialize the DMA controllers
309 outb(0xc0, PORT_DMA2_MODE_REG);
310 outb(0x00, PORT_DMA2_MASK_REG);
313 // Check if the machine was setup with a special restart vector.
315 check_restart_status()
317 // Get and then clear CMOS shutdown status.
318 u8 status = inb_cmos(CMOS_RESET_CODE);
319 outb_cmos(0, CMOS_RESET_CODE);
321 if (status == 0x00 || status == 0x09 || status >= 0x0d)
325 if (status != 0x05) {
326 BX_PANIC("Unimplemented shutdown status: %02x\n", status);
330 // XXX - this is supposed to jump without changing any memory -
331 // but the stack has been altered by the time the code gets here.
334 memset(&br, 0, sizeof(br));
335 br.cs = GET_BDA(jump_cs_ip) >> 16;
336 br.ip = GET_BDA(jump_cs_ip);
340 // 32-bit entry point.
345 check_restart_status();
347 debug_serial_setup();
348 dprintf(1, "Start bios\n");
350 // Setup for .bss and .data sections
352 make_bios_writable();
354 // Perform main setup code.
357 // Present the user with a bootup menu.
358 interactive_bootmenu();
360 // Setup bios checksum.
361 *(u8*)OFFSET_bios_checksum = -checksum((u8*)BUILD_BIOS_ADDR
362 , BUILD_BIOS_SIZE - 1);
364 // Prep for boot process.
365 make_bios_readonly();
368 // Invoke int 19 to start boot process.
369 dprintf(3, "Jump to int19\n");
371 memset(&br, 0, sizeof(br));
372 call16_int(0x19, &br);
375 // Externally visible 32bit entry point.
381 "lidtl " __stringify(OFFSET_pmode_IDT_info) "\n"
382 "lgdtl " __stringify(OFFSET_rombios32_gdt_48) "\n"
383 "movl $" __stringify(BUILD_STACK_ADDR) ", %esp\n"
384 "ljmp $0x10, $_start\n"