Generate PIR table at post time.
[seabios.git] / src / pirtable.c
1 // PIR table generation (for emulators)
2 //
3 // Copyright (C) 2008  Kevin O'Connor <kevin@koconnor.net>
4 // Copyright (C) 2002  MandrakeSoft S.A.
5 //
6 // This file may be distributed under the terms of the GNU GPLv3 license.
7
8 #include "pci.h" // struct pir_header
9 #include "util.h" // checksum
10
11 struct pir_table {
12     struct pir_header pir;
13     struct pir_slot slots[6];
14 } PACKED PIR_TABLE VISIBLE16 __attribute__((aligned(16))) = {
15 #if CONFIG_PIRTABLE
16     .pir = {
17         .signature = PIR_SIGNATURE,
18         .version = 0x0100,
19         .size = sizeof(struct pir_table),
20         .router_devfunc = 0x08,
21         .compatible_devid = 0x122e8086,
22         .checksum = 0x37, // XXX - should auto calculate
23     },
24     .slots = {
25         {
26             // first slot entry PCI-to-ISA (embedded)
27             .dev = 1<<3,
28             .links = {
29                 {.link = 0x60, .bitmap = 0xdef8}, // INTA#
30                 {.link = 0x61, .bitmap = 0xdef8}, // INTB#
31                 {.link = 0x62, .bitmap = 0xdef8}, // INTC#
32                 {.link = 0x63, .bitmap = 0xdef8}, // INTD#
33             },
34             .slot_nr = 0, // embedded
35         }, {
36             // second slot entry: 1st PCI slot
37             .dev = 2<<3,
38             .links = {
39                 {.link = 0x61, .bitmap = 0xdef8}, // INTA#
40                 {.link = 0x62, .bitmap = 0xdef8}, // INTB#
41                 {.link = 0x63, .bitmap = 0xdef8}, // INTC#
42                 {.link = 0x60, .bitmap = 0xdef8}, // INTD#
43             },
44             .slot_nr = 1,
45         }, {
46             // third slot entry: 2nd PCI slot
47             .dev = 3<<3,
48             .links = {
49                 {.link = 0x62, .bitmap = 0xdef8}, // INTA#
50                 {.link = 0x63, .bitmap = 0xdef8}, // INTB#
51                 {.link = 0x60, .bitmap = 0xdef8}, // INTC#
52                 {.link = 0x61, .bitmap = 0xdef8}, // INTD#
53             },
54             .slot_nr = 2,
55         }, {
56             // 4th slot entry: 3rd PCI slot
57             .dev = 4<<3,
58             .links = {
59                 {.link = 0x63, .bitmap = 0xdef8}, // INTA#
60                 {.link = 0x60, .bitmap = 0xdef8}, // INTB#
61                 {.link = 0x61, .bitmap = 0xdef8}, // INTC#
62                 {.link = 0x62, .bitmap = 0xdef8}, // INTD#
63             },
64             .slot_nr = 3,
65         }, {
66             // 5th slot entry: 4rd PCI slot
67             .dev = 5<<3,
68             .links = {
69                 {.link = 0x60, .bitmap = 0xdef8}, // INTA#
70                 {.link = 0x61, .bitmap = 0xdef8}, // INTB#
71                 {.link = 0x62, .bitmap = 0xdef8}, // INTC#
72                 {.link = 0x63, .bitmap = 0xdef8}, // INTD#
73             },
74             .slot_nr = 4,
75         }, {
76             // 6th slot entry: 5rd PCI slot
77             .dev = 6<<3,
78             .links = {
79                 {.link = 0x61, .bitmap = 0xdef8}, // INTA#
80                 {.link = 0x62, .bitmap = 0xdef8}, // INTB#
81                 {.link = 0x63, .bitmap = 0xdef8}, // INTC#
82                 {.link = 0x60, .bitmap = 0xdef8}, // INTD#
83             },
84             .slot_nr = 5,
85         },
86     }
87 #endif // CONFIG_PIRTABLE
88 };
89
90 void
91 create_pirtable()
92 {
93     if (! CONFIG_PIRTABLE)
94         return;
95
96     PIR_TABLE.pir.checksum = -checksum((u8*)&PIR_TABLE, sizeof(PIR_TABLE));
97     SET_EBDA(pir_loc, (u32)&PIR_TABLE);
98 }