4 * Copyright (C) 2008 Nguyen Anh Quynh <aquynh@gmail.com>
5 * Copyright (C) 2002 MandrakeSoft S.A.
7 * This file may be distributed under the terms of the GNU GPLv3 license.
13 #include "ioport.h" // outl
16 #define PCI_ADDRESS_SPACE_IO 0x01
18 #define PCI_ROM_SLOT 6
19 #define PCI_NUM_REGIONS 7
21 #define PCI_VENDOR_ID 0x00 /* 16 bits */
22 #define PCI_DEVICE_ID 0x02 /* 16 bits */
23 #define PCI_COMMAND 0x04 /* 16 bits */
24 #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
25 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
26 #define PCI_CLASS_DEVICE 0x0a /* Device class */
27 #define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
28 #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
30 #define PCI_VENDOR_ID_INTEL 0x8086
31 #define PCI_DEVICE_ID_INTEL_82441 0x1237
32 #define PCI_DEVICE_ID_INTEL_82371SB_0 0x7000
33 #define PCI_DEVICE_ID_INTEL_82371SB_1 0x7010
34 #define PCI_DEVICE_ID_INTEL_82371AB_3 0x7113
36 #define PCI_VENDOR_ID_IBM 0x1014
37 #define PCI_VENDOR_ID_APPLE 0x106b
39 /* 64 KB used to copy the BIOS to shadow RAM */
40 #define BIOS_TMP_STORAGE 0x00030000
42 #define SMB_IO_BASE 0xb100
43 #define PM_IO_BASE 0xb000
45 #define wbinvd() asm volatile("wbinvd")
47 typedef struct PCIDevice {
53 pci_config_writel(PCIDevice *d, u32 addr, u32 val)
55 outl(0x80000000 | (d->bus << 16) | (d->devfn << 8) | (addr & 0xfc), 0xcf8);
60 pci_config_writew(PCIDevice *d, u32 addr, u32 val)
62 outl(0x80000000 | (d->bus << 16) | (d->devfn << 8) | (addr & 0xfc), 0xcf8);
63 outw(val, 0xcfc + (addr & 2));
67 pci_config_writeb(PCIDevice *d, u32 addr, u32 val)
69 outl(0x80000000 | (d->bus << 16) | (d->devfn << 8) | (addr & 0xfc), 0xcf8);
70 outb(val, 0xcfc + (addr & 3));
74 pci_config_readl(PCIDevice *d, u32 addr)
76 outl(0x80000000 | (d->bus << 16) | (d->devfn << 8) | (addr & 0xfc), 0xcf8);
82 pci_config_readw(PCIDevice *d, u32 addr)
84 outl(0x80000000 | (d->bus << 16) | (d->devfn << 8) | (addr & 0xfc), 0xcf8);
85 return inw(0xcfc + (addr & 2));
89 pci_config_readb(PCIDevice *d, u32 addr)
91 outl(0x80000000 | (d->bus << 16) | (d->devfn << 8) | (addr & 0xfc), 0xcf8);
93 return inb(0xcfc + (addr & 3));
96 void pci_bios_init(void);
98 void bios_lock_shadow_ram(void);
100 extern PCIDevice i440_pcidev;