1 // PCI config space access functions.
3 // Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
4 // Copyright (C) 2002 MandrakeSoft S.A.
6 // This file may be distributed under the terms of the GNU LGPLv3 license.
8 #include "pci.h" // pci_config_writel
9 #include "ioport.h" // outl
10 #include "util.h" // dprintf
11 #include "config.h" // CONFIG_*
12 #include "farptr.h" // CONFIG_*
13 #include "pci_regs.h" // PCI_VENDOR_ID
14 #include "pci_ids.h" // PCI_CLASS_DISPLAY_VGA
16 void pci_config_writel(u16 bdf, u32 addr, u32 val)
18 outl(0x80000000 | (bdf << 8) | (addr & 0xfc), PORT_PCI_CMD);
19 outl(val, PORT_PCI_DATA);
22 void pci_config_writew(u16 bdf, u32 addr, u16 val)
24 outl(0x80000000 | (bdf << 8) | (addr & 0xfc), PORT_PCI_CMD);
25 outw(val, PORT_PCI_DATA + (addr & 2));
28 void pci_config_writeb(u16 bdf, u32 addr, u8 val)
30 outl(0x80000000 | (bdf << 8) | (addr & 0xfc), PORT_PCI_CMD);
31 outb(val, PORT_PCI_DATA + (addr & 3));
34 u32 pci_config_readl(u16 bdf, u32 addr)
36 outl(0x80000000 | (bdf << 8) | (addr & 0xfc), PORT_PCI_CMD);
37 return inl(PORT_PCI_DATA);
40 u16 pci_config_readw(u16 bdf, u32 addr)
42 outl(0x80000000 | (bdf << 8) | (addr & 0xfc), PORT_PCI_CMD);
43 return inw(PORT_PCI_DATA + (addr & 2));
46 u8 pci_config_readb(u16 bdf, u32 addr)
48 outl(0x80000000 | (bdf << 8) | (addr & 0xfc), PORT_PCI_CMD);
49 return inb(PORT_PCI_DATA + (addr & 3));
53 pci_config_maskw(u16 bdf, u32 addr, u16 off, u16 on)
55 u16 val = pci_config_readw(bdf, addr);
56 val = (val & ~off) | on;
57 pci_config_writew(bdf, addr, val);
60 // Helper function for foreachpci() macro - return next device
62 pci_next(int bdf, int *pmax)
64 if (pci_bdf_to_fn(bdf) == 1
65 && (pci_config_readb(bdf-1, PCI_HEADER_TYPE) & 0x80) == 0)
66 // Last found device wasn't a multi-function device - skip to
73 if (CONFIG_PCI_ROOT1 && bdf <= (CONFIG_PCI_ROOT1 << 8))
74 bdf = CONFIG_PCI_ROOT1 << 8;
75 else if (CONFIG_PCI_ROOT2 && bdf <= (CONFIG_PCI_ROOT2 << 8))
76 bdf = CONFIG_PCI_ROOT2 << 8;
79 *pmax = max = bdf + 0x0100;
82 u16 v = pci_config_readw(bdf, PCI_VENDOR_ID);
83 if (v != 0x0000 && v != 0xffff)
87 if (pci_bdf_to_fn(bdf) == 0)
93 // Check if found device is a bridge.
94 u32 v = pci_config_readb(bdf, PCI_HEADER_TYPE);
96 if (v == PCI_HEADER_TYPE_BRIDGE || v == PCI_HEADER_TYPE_CARDBUS) {
97 v = pci_config_readl(bdf, PCI_PRIMARY_BUS);
98 int newmax = (v & 0xff00) + 0x0100;
106 // Find a vga device with legacy address decoding enabled.
110 int bdf = 0x0000, max = 0x0100;
113 if (CONFIG_PCI_ROOT1 && bdf <= (CONFIG_PCI_ROOT1 << 8))
114 bdf = CONFIG_PCI_ROOT1 << 8;
115 else if (CONFIG_PCI_ROOT2 && bdf <= (CONFIG_PCI_ROOT2 << 8))
116 bdf = CONFIG_PCI_ROOT2 << 8;
122 u16 cls = pci_config_readw(bdf, PCI_CLASS_DEVICE);
123 if (cls == 0x0000 || cls == 0xffff) {
124 // Device not present.
125 if (pci_bdf_to_fn(bdf) == 0)
131 if (cls == PCI_CLASS_DISPLAY_VGA) {
132 u16 cmd = pci_config_readw(bdf, PCI_COMMAND);
133 if (cmd & PCI_COMMAND_IO && cmd & PCI_COMMAND_MEMORY)
134 // Found active vga card
138 // Check if device is a bridge.
139 u8 hdr = pci_config_readb(bdf, PCI_HEADER_TYPE);
141 if (ht == PCI_HEADER_TYPE_BRIDGE || ht == PCI_HEADER_TYPE_CARDBUS) {
142 u32 ctrl = pci_config_readb(bdf, PCI_BRIDGE_CONTROL);
143 if (ctrl & PCI_BRIDGE_CTL_VGA) {
144 // Found a VGA enabled bridge.
145 u32 pbus = pci_config_readl(bdf, PCI_PRIMARY_BUS);
146 bdf = (pbus & 0xff00);
152 if (pci_bdf_to_fn(bdf) == 0 && (hdr & 0x80) == 0)
153 // Last found device wasn't a multi-function device - skip to
161 // Search for a device with the specified vendor and device ids.
163 pci_find_device(u16 vendid, u16 devid)
165 u32 id = (devid << 16) | vendid;
167 foreachpci(bdf, max) {
168 u32 v = pci_config_readl(bdf, PCI_VENDOR_ID);
175 // Search for a device with the specified class id.
177 pci_find_class(u16 classid)
180 foreachpci(bdf, max) {
181 u16 v = pci_config_readw(bdf, PCI_CLASS_DEVICE);
188 int pci_init_device(const struct pci_device_id *ids, u16 bdf, void *arg)
190 u16 vendor_id = pci_config_readw(bdf, PCI_VENDOR_ID);
191 u16 device_id = pci_config_readw(bdf, PCI_DEVICE_ID);
192 u16 class = pci_config_readw(bdf, PCI_CLASS_DEVICE);
194 while (ids->vendid || ids->class_mask) {
195 if ((ids->vendid == PCI_ANY_ID || ids->vendid == vendor_id) &&
196 (ids->devid == PCI_ANY_ID || ids->devid == device_id) &&
197 !((ids->class ^ class) & ids->class_mask)) {
208 int pci_find_init_device(const struct pci_device_id *ids, void *arg)
212 foreachpci(bdf, max) {
213 if (pci_init_device(ids, bdf, arg) == 0) {
223 u8 v = inb(PORT_PCI_REBOOT) & ~6;
224 outb(v|2, PORT_PCI_REBOOT); /* Request hard reset */
226 outb(v|6, PORT_PCI_REBOOT); /* Actually do the reset */
230 // helper functions to access pci mmio bars from real mode
232 extern u32 pci_readl_32(u32 addr);
235 pci_readl_32(u32 addr)
237 dprintf(3, "32: pci read : %x\n", addr);
238 return readl((void*)addr);
242 u32 pci_readl(u32 addr)
245 dprintf(3, "16: pci read : %x\n", addr);
246 return call32(pci_readl_32, addr, -1);
248 return pci_readl_32(addr);
257 extern void pci_writel_32(struct reg32 *reg32);
260 pci_writel_32(struct reg32 *reg32)
262 dprintf(3, "32: pci write: %x, %x (%p)\n", reg32->addr, reg32->data, reg32);
263 writel((void*)(reg32->addr), reg32->data);
267 void pci_writel(u32 addr, u32 val)
269 struct reg32 reg32 = { .addr = addr, .data = val };
271 dprintf(3, "16: pci write: %x, %x (%x:%p)\n",
272 reg32.addr, reg32.data, GET_SEG(SS), ®32);
273 void *flatptr = MAKE_FLATPTR(GET_SEG(SS), ®32);
274 call32(pci_writel_32, (u32)flatptr, -1);
276 pci_writel_32(®32);