1 // Code for misc 16bit handlers and variables.
3 // Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
4 // Copyright (C) 2002 MandrakeSoft S.A.
6 // This file may be distributed under the terms of the GNU LGPLv3 license.
8 #include "bregs.h" // struct bregs
9 #include "biosvar.h" // GET_BDA
10 #include "util.h" // debug_enter
11 #include "pic.h" // enable_hwirq
13 // Amount of continuous ram under 4Gig
15 // Amount of continuous ram >4Gig
17 // Space for bios tables built an run-time.
18 u32 bios_table_cur_addr, bios_table_end_addr;
19 char BiosTableSpace[CONFIG_MAX_BIOSTABLE] VAR16_32;
22 /****************************************************************
24 ****************************************************************/
26 // INT 12h Memory Size Service Entry Point
28 handle_12(struct bregs *regs)
30 debug_enter(regs, DEBUG_HDL_12);
31 regs->ax = GET_BDA(mem_size_kb);
34 // INT 11h Equipment List Service Entry Point
36 handle_11(struct bregs *regs)
38 debug_enter(regs, DEBUG_HDL_11);
39 regs->ax = GET_BDA(equipment_list_flags);
42 // INT 05h Print Screen Service Entry Point
44 handle_05(struct bregs *regs)
46 debug_enter(regs, DEBUG_HDL_05);
49 // INT 10h Video Support Service Entry Point
51 handle_10(struct bregs *regs)
53 debug_enter(regs, DEBUG_HDL_10);
54 // dont do anything, since the VGA BIOS handles int10h requests
60 debug_isr(DEBUG_ISR_nmi);
61 BX_PANIC("NMI Handler called\n");
67 dprintf(3, "math cp init\n");
68 // 80x87 coprocessor installed
69 SETBITS_BDA(equipment_list_flags, 0x02);
70 enable_hwirq(13, entry_75);
73 // INT 75 - IRQ13 - MATH COPROCESSOR EXCEPTION
77 debug_isr(DEBUG_ISR_75);
80 outb(0, PORT_MATH_CLEAR);
85 call16_simpint(0x02, &eax, &flags);
89 /****************************************************************
91 ****************************************************************/
93 // DMA channel 3 used by hard disk BIOS
94 #define CBT_F1_DMA3USED (1<<7)
95 // 2nd interrupt controller (8259) installed
96 #define CBT_F1_2NDPIC (1<<6)
97 // Real-Time Clock installed
98 #define CBT_F1_RTC (1<<5)
99 // INT 15/AH=4Fh called upon INT 09h
100 #define CBT_F1_INT154F (1<<4)
101 // wait for external event (INT 15/AH=41h) supported
102 #define CBT_F1_WAITEXT (1<<3)
103 // extended BIOS area allocated (usually at top of RAM)
104 #define CBT_F1_EBDA (1<<2)
105 // bus is Micro Channel instead of ISA
106 #define CBT_F1_MCA (1<<1)
107 // system has dual bus (Micro Channel + ISA)
108 #define CBT_F1_MCAISA (1<<0)
110 // INT 16/AH=09h (keyboard functionality) supported
111 #define CBT_F2_INT1609 (1<<6)
113 struct bios_config_table_s BIOS_CONFIG_TABLE VAR16FIXED(0xe6f5) = {
114 .size = sizeof(BIOS_CONFIG_TABLE) - 2,
115 .model = CONFIG_MODEL_ID,
116 .submodel = CONFIG_SUBMODEL_ID,
117 .biosrev = CONFIG_BIOS_REVISION,
119 CBT_F1_2NDPIC | CBT_F1_RTC | CBT_F1_EBDA
120 | (CONFIG_KBD_CALL_INT15_4F ? CBT_F1_INT154F : 0)),
121 .feature2 = CBT_F2_INT1609,
128 /****************************************************************
130 ****************************************************************/
137 // Real mode IDT descriptor
138 struct descloc_s rmode_IDT_info VAR16_32 = {
139 .length = sizeof(struct rmode_IVT) - 1,
140 .addr = (u32)MAKE_FARPTR(SEG_IVT, 0),
143 // Dummy IDT that forces a machine shutdown if an irq happens in
145 u8 dummy_IDT VAR16_32;
147 // Protected mode IDT descriptor
148 struct descloc_s pmode_IDT_info VAR16_32 = {
149 .length = sizeof(dummy_IDT) - 1,
150 .addr = (u32)MAKE_FARPTR(SEG_BIOS, &dummy_IDT),
154 u64 rombios32_gdt[] VAR16_32 __aligned(8) = {
155 // First entry can't be used.
156 0x0000000000000000LL,
157 // 32 bit flat code segment (SEG32_MODE32_CS)
158 0x00cf9b000000ffffLL,
159 // 32 bit flat data segment (SEG32_MODE32_DS)
160 0x00cf93000000ffffLL,
161 // 16 bit code segment base=0xf0000 limit=0xffff (SEG32_MODE16_CS)
162 0x00009b0f0000ffffLL,
163 // 16 bit data segment base=0x0 limit=0xffff (SEG32_MODE16_DS)
164 0x000093000000ffffLL,
165 // 16 bit code segment base=0 limit=0xffffffff (SEG32_MODE16BIG_CS)
166 0x008f9b000000ffffLL,
167 // 16 bit data segment base=0 limit=0xffffffff (SEG32_MODE16BIG_DS)
168 0x008f93000000ffffLL,
172 struct descloc_s rombios32_gdt_48 VAR16_32 = {
173 .length = sizeof(rombios32_gdt) - 1,
174 .addr = (u32)MAKE_FARPTR(SEG_BIOS, rombios32_gdt),
178 /****************************************************************
180 ****************************************************************/
182 char BiosCopyright[] VAR16FIXED(0xff00) =
183 "(c) 2002 MandrakeSoft S.A. Written by Kevin Lawton & the Bochs team.";
186 char BiosDate[] VAR16FIXED(0xfff5) = "06/23/99";
188 u8 BiosModelId VAR16FIXED(0xfffe) = CONFIG_MODEL_ID;
190 u8 BiosChecksum VAR16FIXED(0xffff);
192 // XXX - Initial Interrupt Vector Offsets Loaded by POST
193 u8 InitVectors[13] VAR16FIXED(0xfef3);
195 // XXX - INT 1D - SYSTEM DATA - VIDEO PARAMETER TABLES
196 u8 VideoParams[88] VAR16FIXED(0xf0a4);