4 // Configuration definitions.
6 //#define CONFIG_APPNAME "QEMU"
7 //#define CONFIG_CPUNAME8 "QEMUCPU "
8 //#define CONFIG_APPNAME6 "QEMU "
9 //#define CONFIG_APPNAME4 "QEMU"
10 #define CONFIG_APPNAME "Bochs"
11 #define CONFIG_CPUNAME8 "BOCHSCPU"
12 #define CONFIG_APPNAME6 "BOCHS "
13 #define CONFIG_APPNAME4 "BXPC"
15 // Configure as a coreboot payload.
16 #define CONFIG_COREBOOT 0
18 // Control how verbose debug output is.
19 #define CONFIG_DEBUG_LEVEL 1
21 // Send debugging information to serial port
22 #define CONFIG_DEBUG_SERIAL 0
24 // Support for int13 floppy drive access
25 #define CONFIG_FLOPPY_SUPPORT 1
26 // Support for int15c2 mouse calls
27 #define CONFIG_PS2_MOUSE 1
28 // Support for IDE disk code
30 // Support calling int155f on each keyboard press
31 #define CONFIG_KBD_CALL_INT15_4F 1
32 // Support for booting from a CD
33 #define CONFIG_CDROM_BOOT 1
34 // Support for emulating a boot CD as a floppy/harddrive
35 #define CONFIG_CDROM_EMU 1
36 // Support int 1a/b1 PCI BIOS calls
37 #define CONFIG_PCIBIOS 1
38 // Support int 15/53 APM BIOS calls
39 #define CONFIG_APMBIOS 1
40 // Support int 19/18 system bootup support
42 // Support int 14 parallel port calls
43 #define CONFIG_SERIAL 1
44 // Support int 17 parallel port calls
46 // Support int 16 keyboard calls
47 #define CONFIG_KEYBOARD 1
48 // Support finding and running option roms during post.
49 #define CONFIG_OPTIONROMS 1
50 // Set if option roms are already copied to 0xc0000-0xf0000
51 #define CONFIG_OPTIONROMS_DEPLOYED 1
52 // Support an interactive boot menu at end of post.
53 #define CONFIG_BOOTMENU 1
55 // Support generation of a PIR table in 0xf000 segment (for emulators)
56 #define CONFIG_PIRTABLE 1
57 // Support generation of MPTable (for emulators)
58 #define CONFIG_MPTABLE 1
59 // Support generation of SM BIOS tables (for emulators)
60 #define CONFIG_SMBIOS 1
61 // Support finding a UUID (for smbios) via "magic" outl sequence.
62 #define CONFIG_UUID_BACKDOOR 1
63 // Support generation of ACPI tables (for emulators)
65 // Support bios callbacks specific to via vgabios.
66 #define CONFIG_VGAHOOKS 0
67 // Maximum number of map entries in the e820 map
68 #define CONFIG_MAX_E820 32
70 /* define it if the (emulated) hardware supports SMM mode */
71 #define CONFIG_USE_SMM 1
73 #define CONFIG_MAX_ATA_INTERFACES 4
74 #define CONFIG_MAX_ATA_DEVICES (CONFIG_MAX_ATA_INTERFACES*2)
76 #define CONFIG_ACPI_DATA_SIZE 0x00010000L
78 #define CONFIG_MODEL_ID 0xFC
79 #define CONFIG_SUBMODEL_ID 0x00
80 #define CONFIG_BIOS_REVISION 0x01
82 // Various memory addresses used by the code.
83 #define BUILD_STACK_ADDR 0x7c00
84 #define BUILD_CPU_COUNT_ADDR 0xf000
85 #define BUILD_AP_BOOT_ADDR 0x10000
86 #define BUILD_BIOS_ADDR 0xf0000
87 #define BUILD_BIOS_SIZE 0x10000
88 /* 64 KB used to copy the BIOS to shadow RAM */
89 #define BUILD_BIOS_TMP_ADDR 0x30000
91 #define BUILD_PM_IO_BASE 0xb000
92 #define BUILD_SMB_IO_BASE 0xb100
93 #define BUILD_SMI_CMD_IO_ADDR 0xb2
95 // Start of fixed addresses in 0xf0000 segment.
96 #define BUILD_START_FIXED 0xe050
98 // Important real-mode segments
99 #define SEG_BIOS 0xf000
100 #define SEG_EBDA 0x9fc0
101 #define SEG_BDA 0x0000
103 // Segment definitions in 32bit mode.
104 #define SEG32_MODE32_CS (2 << 3) // 0x10
105 #define SEG32_MODE32_DS (3 << 3) // 0x18
106 #define SEG32_MODE16_CS (4 << 3) // 0x20
107 #define SEG32_MODE16_DS (5 << 3) // 0x28
109 // Debugging levels. If non-zero and CONFIG_DEBUG_LEVEL is greater
110 // than the specified value, then the corresponding irq handler will
111 // report every enter event.
112 #define DEBUG_ISR_nmi 1
113 #define DEBUG_HDL_05 1
114 #define DEBUG_ISR_08 20
115 #define DEBUG_ISR_09 9
116 #define DEBUG_ISR_0e 9
117 #define DEBUG_HDL_10 20
118 #define DEBUG_HDL_11 1
119 #define DEBUG_HDL_12 1
120 #define DEBUG_HDL_13 10
121 #define DEBUG_HDL_14 1
122 #define DEBUG_HDL_15 9
123 #define DEBUG_HDL_16 9
124 #define DEBUG_HDL_17 1
125 #define DEBUG_HDL_18 1
126 #define DEBUG_HDL_19 1
127 #define DEBUG_HDL_1a 9
128 #define DEBUG_ISR_1c 20
129 #define DEBUG_HDL_40 1
130 #define DEBUG_ISR_70 9
131 #define DEBUG_ISR_74 9
132 #define DEBUG_ISR_75 1
133 #define DEBUG_ISR_76 10
134 #define DEBUG_ISR_hwirq 30