1 // 16bit code to handle system clocks.
3 // Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
4 // Copyright (C) 2002 MandrakeSoft S.A.
6 // This file may be distributed under the terms of the GNU GPLv3 license.
8 #include "biosvar.h" // struct bregs
9 #include "util.h" // debug_enter
10 #include "disk.h" // floppy_tick
11 #include "cmos.h" // inb_cmos
13 #define DEBUGF1(fmt, args...) bprintf(0, fmt , ##args)
14 #define DEBUGF(fmt, args...)
17 #define RTC_A_UIP 0x80
18 #define RTC_B_SET 0x80
19 #define RTC_B_PIE 0x40
20 #define RTC_B_AIE 0x20
21 #define RTC_B_UIE 0x10
24 /****************************************************************
26 ****************************************************************/
31 // timer0: binary count, 16bit count, mode 2
32 outb(0x34, PORT_PIT_MODE);
33 // maximum count of 0000H = 18.2Hz
34 outb(0x0, PORT_PIT_COUNTER0);
35 outb(0x0, PORT_PIT_COUNTER0);
41 return (val & 0xf) + ((val >> 4) * 10);
47 dprintf(3, "init timer\n");
50 u32 seconds = bcd2bin(inb_cmos(CMOS_RTC_SECONDS));
51 u32 ticks = (seconds * 18206507) / 1000000;
52 u32 minutes = bcd2bin(inb_cmos(CMOS_RTC_MINUTES));
53 ticks += (minutes * 10923904) / 10000;
54 u32 hours = bcd2bin(inb_cmos(CMOS_RTC_HOURS));
55 ticks += (hours * 65543427) / 1000;
56 SET_BDA(timer_counter, ticks);
57 SET_BDA(timer_rollover, 0);
63 outb_cmos(0x26, CMOS_STATUS_A);
64 outb_cmos(0x02, CMOS_STATUS_B);
65 inb_cmos(CMOS_STATUS_C);
66 inb_cmos(CMOS_STATUS_D);
70 /****************************************************************
71 * Standard clock functions
72 ****************************************************************/
77 // This function checks to see if the update-in-progress bit
78 // is set in CMOS Status Register A. If not, it returns 0.
79 // If it is set, it tries to wait until there is a transition
80 // to 0, and will return 0 if such a transition occurs. A 1
81 // is returned only after timing out. The maximum period
82 // that this bit should be set is constrained to 244useconds.
83 // The count I use below guarantees coverage or more than
84 // this time, with any reasonable IPS setting.
87 while (--count != 0) {
88 if ( (inb_cmos(CMOS_STATUS_A) & 0x80) == 0 )
91 return 1; // update-in-progress never transitioned to 0
94 // get current clock count
96 handle_1a00(struct bregs *regs)
98 u32 ticks = GET_BDA(timer_counter);
99 regs->cx = ticks >> 16;
101 regs->al = GET_BDA(timer_rollover);
102 SET_BDA(timer_rollover, 0); // reset flag
106 // Set Current Clock Count
108 handle_1a01(struct bregs *regs)
110 u32 ticks = (regs->cx << 16) | regs->dx;
111 SET_BDA(timer_counter, ticks);
112 SET_BDA(timer_rollover, 0); // reset flag
119 handle_1a02(struct bregs *regs)
121 if (rtc_updating()) {
126 regs->dh = inb_cmos(CMOS_RTC_SECONDS);
127 regs->cl = inb_cmos(CMOS_RTC_MINUTES);
128 regs->ch = inb_cmos(CMOS_RTC_HOURS);
129 regs->dl = inb_cmos(CMOS_STATUS_B) & 0x01;
137 handle_1a03(struct bregs *regs)
139 // Using a debugger, I notice the following masking/setting
140 // of bits in Status Register B, by setting Reg B to
141 // a few values and getting its value after INT 1A was called.
144 // before 1111 1101 0111 1101 0000 0000
145 // after 0110 0010 0110 0010 0000 0010
147 // Bit4 in try#1 flipped in hardware (forced low) due to bit7=1
148 // My assumption: RegB = ((RegB & 01100000b) | 00000010b)
149 if (rtc_updating()) {
151 // fall through as if an update were not in progress
153 outb_cmos(regs->dh, CMOS_RTC_SECONDS);
154 outb_cmos(regs->cl, CMOS_RTC_MINUTES);
155 outb_cmos(regs->ch, CMOS_RTC_HOURS);
156 // Set Daylight Savings time enabled bit to requested value
157 u8 val8 = (inb_cmos(CMOS_STATUS_B) & 0x60) | 0x02 | (regs->dl & 0x01);
158 outb_cmos(val8, CMOS_STATUS_B);
160 regs->al = val8; // val last written to Reg B
166 handle_1a04(struct bregs *regs)
169 if (rtc_updating()) {
173 regs->cl = inb_cmos(CMOS_RTC_YEAR);
174 regs->dh = inb_cmos(CMOS_RTC_MONTH);
175 regs->dl = inb_cmos(CMOS_RTC_DAY_MONTH);
176 regs->ch = inb_cmos(CMOS_CENTURY);
183 handle_1a05(struct bregs *regs)
185 // Using a debugger, I notice the following masking/setting
186 // of bits in Status Register B, by setting Reg B to
187 // a few values and getting its value after INT 1A was called.
189 // try#1 try#2 try#3 try#4
190 // before 1111 1101 0111 1101 0000 0010 0000 0000
191 // after 0110 1101 0111 1101 0000 0010 0000 0000
193 // Bit4 in try#1 flipped in hardware (forced low) due to bit7=1
194 // My assumption: RegB = (RegB & 01111111b)
195 if (rtc_updating()) {
200 outb_cmos(regs->cl, CMOS_RTC_YEAR);
201 outb_cmos(regs->dh, CMOS_RTC_MONTH);
202 outb_cmos(regs->dl, CMOS_RTC_DAY_MONTH);
203 outb_cmos(regs->ch, CMOS_CENTURY);
204 // clear halt-clock bit
205 u8 val8 = inb_cmos(CMOS_STATUS_B) & ~RTC_B_SET;
206 outb_cmos(val8, CMOS_STATUS_B);
208 regs->al = val8; // AL = val last written to Reg B
212 // Set Alarm Time in CMOS
214 handle_1a06(struct bregs *regs)
216 // Using a debugger, I notice the following masking/setting
217 // of bits in Status Register B, by setting Reg B to
218 // a few values and getting its value after INT 1A was called.
221 // before 1101 1111 0101 1111 0000 0000
222 // after 0110 1111 0111 1111 0010 0000
224 // Bit4 in try#1 flipped in hardware (forced low) due to bit7=1
225 // My assumption: RegB = ((RegB & 01111111b) | 00100000b)
226 u8 val8 = inb_cmos(CMOS_STATUS_B); // Get Status Reg B
229 // Alarm interrupt enabled already
233 if (rtc_updating()) {
235 // fall through as if an update were not in progress
237 outb_cmos(regs->dh, CMOS_RTC_SECONDS_ALARM);
238 outb_cmos(regs->cl, CMOS_RTC_MINUTES_ALARM);
239 outb_cmos(regs->ch, CMOS_RTC_HOURS_ALARM);
240 outb(inb(PORT_PIC2_DATA) & ~PIC2_IRQ8, PORT_PIC2_DATA); // enable IRQ 8
241 // enable Status Reg B alarm bit, clear halt clock bit
242 outb_cmos((val8 & ~RTC_B_SET) | RTC_B_AIE, CMOS_STATUS_B);
248 handle_1a07(struct bregs *regs)
250 // Using a debugger, I notice the following masking/setting
251 // of bits in Status Register B, by setting Reg B to
252 // a few values and getting its value after INT 1A was called.
254 // try#1 try#2 try#3 try#4
255 // before 1111 1101 0111 1101 0010 0000 0010 0010
256 // after 0100 0101 0101 0101 0000 0000 0000 0010
258 // Bit4 in try#1 flipped in hardware (forced low) due to bit7=1
259 // My assumption: RegB = (RegB & 01010111b)
260 u8 val8 = inb_cmos(CMOS_STATUS_B); // Get Status Reg B
261 // clear clock-halt bit, disable alarm bit
262 outb_cmos(val8 & ~(RTC_B_SET|RTC_B_AIE), CMOS_STATUS_B);
264 regs->al = val8; // val last written to Reg B
270 handle_1aXX(struct bregs *regs)
275 // INT 1Ah Time-of-day Service Entry Point
277 handle_1a(struct bregs *regs)
279 debug_enter(regs, DEBUG_HDL_1a);
281 case 0x00: handle_1a00(regs); break;
282 case 0x01: handle_1a01(regs); break;
283 case 0x02: handle_1a02(regs); break;
284 case 0x03: handle_1a03(regs); break;
285 case 0x04: handle_1a04(regs); break;
286 case 0x05: handle_1a05(regs); break;
287 case 0x06: handle_1a06(regs); break;
288 case 0x07: handle_1a07(regs); break;
289 case 0xb1: handle_1ab1(regs); break;
290 default: handle_1aXX(regs); break;
298 debug_isr(DEBUG_ISR_1c);
301 // INT 08h System Timer ISR Entry Point
305 debug_isr(DEBUG_ISR_08);
310 u32 counter = GET_BDA(timer_counter);
312 // compare to one days worth of timer ticks at 18.2 hz
313 if (counter >= 0x001800B0) {
314 // there has been a midnight rollover at this point
316 SET_BDA(timer_rollover, GET_BDA(timer_rollover) + 1);
319 SET_BDA(timer_counter, counter);
321 // chain to user timer tick INT #0x1c
323 memset(&br, 0, sizeof(br));
324 call16_int(0x1c, &br);
332 /****************************************************************
334 ****************************************************************/
337 set_usertimer(u32 usecs, u16 seg, u16 offset)
339 if (GET_BDA(rtc_wait_flag) & RWS_WAIT_PENDING)
342 // Interval not already set.
343 SET_BDA(rtc_wait_flag, RWS_WAIT_PENDING); // Set status byte.
344 SET_BDA(ptr_user_wait_complete_flag, (seg << 16) | offset);
345 SET_BDA(user_wait_timeout, usecs);
347 // Unmask IRQ8 so INT70 will get through.
348 u8 irqDisable = inb(PORT_PIC2_DATA);
349 outb(irqDisable & ~PIC2_IRQ8, PORT_PIC2_DATA);
350 // Turn on the Periodic Interrupt timer
351 u8 bRegister = inb_cmos(CMOS_STATUS_B);
352 outb_cmos(bRegister | RTC_B_PIE, CMOS_STATUS_B);
360 // Turn off status byte.
361 SET_BDA(rtc_wait_flag, 0);
362 // Clear the Periodic Interrupt.
363 u8 bRegister = inb_cmos(CMOS_STATUS_B);
364 outb_cmos(bRegister & ~RTC_B_PIE, CMOS_STATUS_B);
367 // Sleep for n microseconds.
372 // In 16bit mode, use the rtc to wait for the specified time.
374 int ret = set_usertimer(count, GET_SEG(SS), (u32)&statusflag);
383 // In 32bit mode, we need to call into 16bit mode to sleep.
385 memset(&br, 0, sizeof(br));
389 call16_int(0x15, &br);
396 #define RET_ECLOCKINUSE 0x83
398 // Wait for CX:DX microseconds. currently using the
399 // refresh request port 0x61 bit4, toggling every 15usec
401 handle_1586(struct bregs *regs)
403 int ret = usleep((regs->cx << 16) | regs->dx);
405 set_code_fail(regs, RET_ECLOCKINUSE);
410 // Set Interval requested.
412 handle_158300(struct bregs *regs)
414 int ret = set_usertimer((regs->cx << 16) | regs->dx, regs->es, regs->bx);
416 // Interval already set.
417 set_code_fail(regs, RET_EUNSUPPORTED);
422 // Clear interval requested
424 handle_158301(struct bregs *regs)
431 handle_1583XX(struct bregs *regs)
433 set_code_fail(regs, RET_EUNSUPPORTED);
438 handle_1583(struct bregs *regs)
441 case 0x00: handle_158300(regs); break;
442 case 0x01: handle_158301(regs); break;
443 default: handle_1583XX(regs); break;
447 // int70h: IRQ8 - CMOS RTC
451 debug_isr(DEBUG_ISR_70);
453 // Check which modes are enabled and have occurred.
454 u8 registerB = inb_cmos(CMOS_STATUS_B);
455 u8 registerC = inb_cmos(CMOS_STATUS_C);
457 if (!(registerB & (RTC_B_PIE|RTC_B_AIE)))
459 if (registerC & 0x20) {
460 // Handle Alarm Interrupt.
462 memset(&br, 0, sizeof(br));
463 call16_int(0x4a, &br);
466 if (!(registerC & 0x40))
469 // Handle Periodic Interrupt.
471 if (!GET_BDA(rtc_wait_flag))
474 // Wait Interval (Int 15, AH=83) active.
475 u32 time = GET_BDA(user_wait_timeout); // Time left in microseconds.
477 // Done waiting - write to specified flag byte.
478 u32 segoff = GET_BDA(ptr_user_wait_complete_flag);
479 u16 segment = segoff >> 16;
480 u16 offset = segoff & 0xffff;
481 u8 oldval = GET_FARVAR(segment, *(u8*)(offset+0));
482 SET_FARVAR(segment, *(u8*)(offset+0), oldval | 0x80);
488 SET_BDA(user_wait_timeout, time);