1 // Low level ATA disk definitions
3 // Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
4 // Copyright (C) 2002 MandrakeSoft S.A.
6 // This file may be distributed under the terms of the GNU GPLv3 license.
11 #include "types.h" // u16
13 // Function definitions
14 void ata_reset(u16 device);
15 u16 ata_cmd_data(u16 device, u16 command, u16 count, u16 cylinder
16 , u16 head, u16 sector, u32 lba, u16 segment, u16 offset);
17 u16 ata_cmd_packet(u16 device, u8 *cmdbuf, u8 cmdlen, u16 header
18 , u32 length, u8 inout, u16 bufseg, u16 bufoff);
19 u16 cdrom_read(u16 device, u32 lba, u32 count
20 , u16 segment, u16 offset, u16 skip);
23 // Global defines -- ATA register and register bits.
24 // command block & control block regs
25 #define ATA_CB_DATA 0 // data reg in/out pio_base_addr1+0
26 #define ATA_CB_ERR 1 // error in pio_base_addr1+1
27 #define ATA_CB_FR 1 // feature reg out pio_base_addr1+1
28 #define ATA_CB_SC 2 // sector count in/out pio_base_addr1+2
29 #define ATA_CB_SN 3 // sector number in/out pio_base_addr1+3
30 #define ATA_CB_CL 4 // cylinder low in/out pio_base_addr1+4
31 #define ATA_CB_CH 5 // cylinder high in/out pio_base_addr1+5
32 #define ATA_CB_DH 6 // device head in/out pio_base_addr1+6
33 #define ATA_CB_STAT 7 // primary status in pio_base_addr1+7
34 #define ATA_CB_CMD 7 // command out pio_base_addr1+7
35 #define ATA_CB_ASTAT 6 // alternate status in pio_base_addr2+6
36 #define ATA_CB_DC 6 // device control out pio_base_addr2+6
37 #define ATA_CB_DA 7 // device address in pio_base_addr2+7
39 #define ATA_CB_ER_ICRC 0x80 // ATA Ultra DMA bad CRC
40 #define ATA_CB_ER_BBK 0x80 // ATA bad block
41 #define ATA_CB_ER_UNC 0x40 // ATA uncorrected error
42 #define ATA_CB_ER_MC 0x20 // ATA media change
43 #define ATA_CB_ER_IDNF 0x10 // ATA id not found
44 #define ATA_CB_ER_MCR 0x08 // ATA media change request
45 #define ATA_CB_ER_ABRT 0x04 // ATA command aborted
46 #define ATA_CB_ER_NTK0 0x02 // ATA track 0 not found
47 #define ATA_CB_ER_NDAM 0x01 // ATA address mark not found
49 #define ATA_CB_ER_P_SNSKEY 0xf0 // ATAPI sense key (mask)
50 #define ATA_CB_ER_P_MCR 0x08 // ATAPI Media Change Request
51 #define ATA_CB_ER_P_ABRT 0x04 // ATAPI command abort
52 #define ATA_CB_ER_P_EOM 0x02 // ATAPI End of Media
53 #define ATA_CB_ER_P_ILI 0x01 // ATAPI Illegal Length Indication
55 // ATAPI Interrupt Reason bits in the Sector Count reg (CB_SC)
56 #define ATA_CB_SC_P_TAG 0xf8 // ATAPI tag (mask)
57 #define ATA_CB_SC_P_REL 0x04 // ATAPI release
58 #define ATA_CB_SC_P_IO 0x02 // ATAPI I/O
59 #define ATA_CB_SC_P_CD 0x01 // ATAPI C/D
61 // bits 7-4 of the device/head (CB_DH) reg
62 #define ATA_CB_DH_DEV0 0xa0 // select device 0
63 #define ATA_CB_DH_DEV1 0xb0 // select device 1
64 #define ATA_CB_DH_LBA 0x40 // use LBA
66 // status reg (CB_STAT and CB_ASTAT) bits
67 #define ATA_CB_STAT_BSY 0x80 // busy
68 #define ATA_CB_STAT_RDY 0x40 // ready
69 #define ATA_CB_STAT_DF 0x20 // device fault
70 #define ATA_CB_STAT_WFT 0x20 // write fault (old name)
71 #define ATA_CB_STAT_SKC 0x10 // seek complete
72 #define ATA_CB_STAT_SERV 0x10 // service
73 #define ATA_CB_STAT_DRQ 0x08 // data request
74 #define ATA_CB_STAT_CORR 0x04 // corrected
75 #define ATA_CB_STAT_IDX 0x02 // index
76 #define ATA_CB_STAT_ERR 0x01 // error (ATA)
77 #define ATA_CB_STAT_CHK 0x01 // check (ATAPI)
79 // device control reg (CB_DC) bits
80 #define ATA_CB_DC_HD15 0x08 // bit should always be set to one
81 #define ATA_CB_DC_SRST 0x04 // soft reset
82 #define ATA_CB_DC_NIEN 0x02 // disable interrupts
84 // Most mandtory and optional ATA commands (from ATA-3),
85 #define ATA_CMD_CFA_ERASE_SECTORS 0xC0
86 #define ATA_CMD_CFA_REQUEST_EXT_ERR_CODE 0x03
87 #define ATA_CMD_CFA_TRANSLATE_SECTOR 0x87
88 #define ATA_CMD_CFA_WRITE_MULTIPLE_WO_ERASE 0xCD
89 #define ATA_CMD_CFA_WRITE_SECTORS_WO_ERASE 0x38
90 #define ATA_CMD_CHECK_POWER_MODE1 0xE5
91 #define ATA_CMD_CHECK_POWER_MODE2 0x98
92 #define ATA_CMD_DEVICE_RESET 0x08
93 #define ATA_CMD_EXECUTE_DEVICE_DIAGNOSTIC 0x90
94 #define ATA_CMD_FLUSH_CACHE 0xE7
95 #define ATA_CMD_FORMAT_TRACK 0x50
96 #define ATA_CMD_IDENTIFY_DEVICE 0xEC
97 #define ATA_CMD_IDENTIFY_DEVICE_PACKET 0xA1
98 #define ATA_CMD_IDENTIFY_PACKET_DEVICE 0xA1
99 #define ATA_CMD_IDLE1 0xE3
100 #define ATA_CMD_IDLE2 0x97
101 #define ATA_CMD_IDLE_IMMEDIATE1 0xE1
102 #define ATA_CMD_IDLE_IMMEDIATE2 0x95
103 #define ATA_CMD_INITIALIZE_DRIVE_PARAMETERS 0x91
104 #define ATA_CMD_INITIALIZE_DEVICE_PARAMETERS 0x91
105 #define ATA_CMD_NOP 0x00
106 #define ATA_CMD_PACKET 0xA0
107 #define ATA_CMD_READ_BUFFER 0xE4
108 #define ATA_CMD_READ_DMA 0xC8
109 #define ATA_CMD_READ_DMA_QUEUED 0xC7
110 #define ATA_CMD_READ_MULTIPLE 0xC4
111 #define ATA_CMD_READ_SECTORS 0x20
112 #define ATA_CMD_READ_VERIFY_SECTORS 0x40
113 #define ATA_CMD_RECALIBRATE 0x10
114 #define ATA_CMD_REQUEST_SENSE 0x03
115 #define ATA_CMD_SEEK 0x70
116 #define ATA_CMD_SET_FEATURES 0xEF
117 #define ATA_CMD_SET_MULTIPLE_MODE 0xC6
118 #define ATA_CMD_SLEEP1 0xE6
119 #define ATA_CMD_SLEEP2 0x99
120 #define ATA_CMD_STANDBY1 0xE2
121 #define ATA_CMD_STANDBY2 0x96
122 #define ATA_CMD_STANDBY_IMMEDIATE1 0xE0
123 #define ATA_CMD_STANDBY_IMMEDIATE2 0x94
124 #define ATA_CMD_WRITE_BUFFER 0xE8
125 #define ATA_CMD_WRITE_DMA 0xCA
126 #define ATA_CMD_WRITE_DMA_QUEUED 0xCC
127 #define ATA_CMD_WRITE_MULTIPLE 0xC5
128 #define ATA_CMD_WRITE_SECTORS 0x30
129 #define ATA_CMD_WRITE_VERIFY 0x3C
131 #define ATA_IFACE_NONE 0x00
132 #define ATA_IFACE_ISA 0x00
133 #define ATA_IFACE_PCI 0x01
135 #define ATA_TYPE_NONE 0x00
136 #define ATA_TYPE_UNKNOWN 0x01
137 #define ATA_TYPE_ATA 0x02
138 #define ATA_TYPE_ATAPI 0x03
140 #define ATA_DEVICE_NONE 0x00
141 #define ATA_DEVICE_HD 0xFF
142 #define ATA_DEVICE_CDROM 0x05
144 #define ATA_MODE_NONE 0x00
145 #define ATA_MODE_PIO16 0x00
146 #define ATA_MODE_PIO32 0x01
147 #define ATA_MODE_ISADMA 0x02
148 #define ATA_MODE_PCIDMA 0x03
149 #define ATA_MODE_USEIRQ 0x10
151 #define ATA_TRANSLATION_NONE 0
152 #define ATA_TRANSLATION_LBA 1
153 #define ATA_TRANSLATION_LARGE 2
154 #define ATA_TRANSLATION_RECHS 3
156 #define ATA_DATA_NO 0x00
157 #define ATA_DATA_IN 0x01
158 #define ATA_DATA_OUT 0x02