1 // Low level ATA disk access
3 // Copyright (C) 2008,2009 Kevin O'Connor <kevin@koconnor.net>
4 // Copyright (C) 2002 MandrakeSoft S.A.
6 // This file may be distributed under the terms of the GNU LGPLv3 license.
8 #include "types.h" // u8
9 #include "ioport.h" // inb
10 #include "util.h" // dprintf
11 #include "cmos.h" // inb_cmos
12 #include "pic.h" // enable_hwirq
13 #include "biosvar.h" // GET_EBDA
14 #include "pci.h" // foreachpci
15 #include "pci_ids.h" // PCI_CLASS_STORAGE_OTHER
16 #include "pci_regs.h" // PCI_INTERRUPT_LINE
17 #include "boot.h" // add_bcv_hd
18 #include "disk.h" // struct ata_s
19 #include "ata.h" // ATA_CB_STAT
20 #include "blockcmd.h" // CDB_CMD_READ_10
22 #define IDE_TIMEOUT 32000 //32 seconds max for IDE ops
24 struct ata_channel_s ATA_channels[CONFIG_MAX_ATA_INTERFACES] VAR16VISIBLE;
27 /****************************************************************
29 ****************************************************************/
31 // Wait for the specified ide state
33 await_ide(u8 mask, u8 flags, u16 base, u16 timeout)
35 u64 end = calc_future_tsc(timeout);
37 u8 status = inb(base+ATA_CB_STAT);
38 if ((status & mask) == flags)
40 if (check_time(end)) {
48 // Wait for the device to be not-busy.
50 await_not_bsy(u16 base)
52 return await_ide(ATA_CB_STAT_BSY, 0, base, IDE_TIMEOUT);
55 // Wait for the device to be ready.
59 return await_ide(ATA_CB_STAT_RDY, ATA_CB_STAT_RDY, base, IDE_TIMEOUT);
62 // Wait for ide state - pauses for one ata cycle first.
64 pause_await_not_bsy(u16 iobase1, u16 iobase2)
66 // Wait one PIO transfer cycle.
67 inb(iobase2 + ATA_CB_ASTAT);
69 return await_not_bsy(iobase1);
72 // Wait for ide state - pause for 400ns first.
74 ndelay_await_not_bsy(u16 iobase1)
77 return await_not_bsy(iobase1);
82 ata_reset(struct drive_s *drive_g)
84 u8 ataid = GET_GLOBAL(drive_g->cntl_id);
85 u8 channel = ataid / 2;
87 u16 iobase1 = GET_GLOBAL(ATA_channels[channel].iobase1);
88 u16 iobase2 = GET_GLOBAL(ATA_channels[channel].iobase2);
90 dprintf(6, "ata_reset drive=%p\n", drive_g);
92 outb(ATA_CB_DC_HD15 | ATA_CB_DC_NIEN | ATA_CB_DC_SRST, iobase2+ATA_CB_DC);
94 outb(ATA_CB_DC_HD15 | ATA_CB_DC_NIEN, iobase2+ATA_CB_DC);
97 // wait for device to become not busy.
98 int status = await_not_bsy(iobase1);
103 u64 end = calc_future_tsc(IDE_TIMEOUT);
105 outb(ATA_CB_DH_DEV1, iobase1 + ATA_CB_DH);
106 status = ndelay_await_not_bsy(iobase1);
109 if (inb(iobase1 + ATA_CB_DH) == ATA_CB_DH_DEV1)
111 // Change drive request failed to take effect - retry.
112 if (check_time(end)) {
118 // QEMU doesn't reset dh on reset, so set it explicitly.
119 outb(ATA_CB_DH_DEV0, iobase1 + ATA_CB_DH);
122 // On a user-reset request, wait for RDY if it is an ATA device.
123 u8 type=GET_GLOBAL(drive_g->type);
124 if (type == DTYPE_ATA)
125 status = await_rdy(iobase1);
129 outb(ATA_CB_DC_HD15, iobase2+ATA_CB_DC);
131 dprintf(6, "ata_reset exit status=%x\n", status);
134 // Check for drive RDY for 16bit interface command.
136 isready(struct drive_s *drive_g)
138 // Read the status from controller
139 u8 ataid = GET_GLOBAL(drive_g->cntl_id);
140 u8 channel = ataid / 2;
141 u16 iobase1 = GET_GLOBAL(ATA_channels[channel].iobase1);
142 u8 status = inb(iobase1 + ATA_CB_STAT);
143 if ((status & (ATA_CB_STAT_BSY|ATA_CB_STAT_RDY)) == ATA_CB_STAT_RDY)
144 return DISK_RET_SUCCESS;
145 return DISK_RET_ENOTREADY;
148 // Default 16bit command demuxer for ATA and ATAPI devices.
150 process_ata_misc_op(struct disk_op_s *op)
155 switch (op->command) {
157 ata_reset(op->drive_g);
158 return DISK_RET_SUCCESS;
160 return isready(op->drive_g);
164 return DISK_RET_SUCCESS;
167 return DISK_RET_EPARAM;
172 /****************************************************************
174 ****************************************************************/
176 struct ata_pio_command {
192 // Send an ata command to the drive.
194 send_cmd(struct drive_s *drive_g, struct ata_pio_command *cmd)
196 u8 ataid = GET_GLOBAL(drive_g->cntl_id);
197 u8 channel = ataid / 2;
198 u8 slave = ataid % 2;
199 u16 iobase1 = GET_GLOBAL(ATA_channels[channel].iobase1);
202 int status = await_not_bsy(iobase1);
205 u8 newdh = ((cmd->device & ~ATA_CB_DH_DEV1)
206 | (slave ? ATA_CB_DH_DEV1 : ATA_CB_DH_DEV0));
207 u8 olddh = inb(iobase1 + ATA_CB_DH);
208 outb(newdh, iobase1 + ATA_CB_DH);
209 if ((olddh ^ newdh) & (1<<4)) {
210 // Was a device change - wait for device to become not busy.
211 status = ndelay_await_not_bsy(iobase1);
216 // Check for ATA_CMD_(READ|WRITE)_(SECTORS|DMA)_EXT commands.
217 if ((cmd->command & ~0x11) == ATA_CMD_READ_SECTORS_EXT) {
218 outb(cmd->feature2, iobase1 + ATA_CB_FR);
219 outb(cmd->sector_count2, iobase1 + ATA_CB_SC);
220 outb(cmd->lba_low2, iobase1 + ATA_CB_SN);
221 outb(cmd->lba_mid2, iobase1 + ATA_CB_CL);
222 outb(cmd->lba_high2, iobase1 + ATA_CB_CH);
224 outb(cmd->feature, iobase1 + ATA_CB_FR);
225 outb(cmd->sector_count, iobase1 + ATA_CB_SC);
226 outb(cmd->lba_low, iobase1 + ATA_CB_SN);
227 outb(cmd->lba_mid, iobase1 + ATA_CB_CL);
228 outb(cmd->lba_high, iobase1 + ATA_CB_CH);
229 outb(cmd->command, iobase1 + ATA_CB_CMD);
234 // Wait for data after calling 'send_cmd'.
236 ata_wait_data(u16 iobase1)
238 int status = ndelay_await_not_bsy(iobase1);
242 if (status & ATA_CB_STAT_ERR) {
243 dprintf(6, "send_cmd : read error (status=%02x err=%02x)\n"
244 , status, inb(iobase1 + ATA_CB_ERR));
247 if (!(status & ATA_CB_STAT_DRQ)) {
248 dprintf(6, "send_cmd : DRQ not set (status %02x)\n", status);
255 // Send an ata command that does not transfer any further data.
257 ata_cmd_nondata(struct drive_s *drive_g, struct ata_pio_command *cmd)
259 u8 ataid = GET_GLOBAL(drive_g->cntl_id);
260 u8 channel = ataid / 2;
261 u16 iobase1 = GET_GLOBAL(ATA_channels[channel].iobase1);
262 u16 iobase2 = GET_GLOBAL(ATA_channels[channel].iobase2);
264 // Disable interrupts
265 outb(ATA_CB_DC_HD15 | ATA_CB_DC_NIEN, iobase2 + ATA_CB_DC);
267 int ret = send_cmd(drive_g, cmd);
270 ret = ndelay_await_not_bsy(iobase1);
274 if (ret & ATA_CB_STAT_ERR) {
275 dprintf(6, "nondata cmd : read error (status=%02x err=%02x)\n"
276 , ret, inb(iobase1 + ATA_CB_ERR));
280 if (ret & ATA_CB_STAT_DRQ) {
281 dprintf(6, "nondata cmd : DRQ set (status %02x)\n", ret);
288 outb(ATA_CB_DC_HD15, iobase2+ATA_CB_DC);
294 /****************************************************************
296 ****************************************************************/
298 // Transfer 'op->count' blocks (of 'blocksize' bytes) to/from drive
301 ata_pio_transfer(struct disk_op_s *op, int iswrite, int blocksize)
303 dprintf(16, "ata_pio_transfer id=%p write=%d count=%d bs=%d buf=%p\n"
304 , op->drive_g, iswrite, op->count, blocksize, op->buf_fl);
306 u8 ataid = GET_GLOBAL(op->drive_g->cntl_id);
307 u8 channel = ataid / 2;
308 u16 iobase1 = GET_GLOBAL(ATA_channels[channel].iobase1);
309 u16 iobase2 = GET_GLOBAL(ATA_channels[channel].iobase2);
310 int count = op->count;
311 void *buf_fl = op->buf_fl;
315 // Write data to controller
316 dprintf(16, "Write sector id=%p dest=%p\n", op->drive_g, buf_fl);
317 if (CONFIG_ATA_PIO32)
318 outsl_fl(iobase1, buf_fl, blocksize / 4);
320 outsw_fl(iobase1, buf_fl, blocksize / 2);
322 // Read data from controller
323 dprintf(16, "Read sector id=%p dest=%p\n", op->drive_g, buf_fl);
324 if (CONFIG_ATA_PIO32)
325 insl_fl(iobase1, buf_fl, blocksize / 4);
327 insw_fl(iobase1, buf_fl, blocksize / 2);
331 status = pause_await_not_bsy(iobase1, iobase2);
341 status &= (ATA_CB_STAT_BSY | ATA_CB_STAT_DRQ | ATA_CB_STAT_ERR);
342 if (status != ATA_CB_STAT_DRQ) {
343 dprintf(6, "ata_pio_transfer : more sectors left (status %02x)\n"
350 status &= (ATA_CB_STAT_BSY | ATA_CB_STAT_DF | ATA_CB_STAT_DRQ
353 status &= ~ATA_CB_STAT_DF;
355 dprintf(6, "ata_pio_transfer : no sectors left (status %02x)\n", status);
363 /****************************************************************
365 ****************************************************************/
368 #define BM_CMD_MEMWRITE 0x08
369 #define BM_CMD_START 0x01
371 #define BM_STATUS_IRQ 0x04
372 #define BM_STATUS_ERROR 0x02
373 #define BM_STATUS_ACTIVE 0x01
381 // Check if DMA available and setup transfer if so.
383 ata_try_dma(struct disk_op_s *op, int iswrite, int blocksize)
385 if (! CONFIG_ATA_DMA)
387 u32 dest = (u32)op->buf_fl;
389 // Need minimum alignment of 1.
391 u8 ataid = GET_GLOBAL(op->drive_g->cntl_id);
392 u8 channel = ataid / 2;
393 u16 iomaster = GET_GLOBAL(ATA_channels[channel].iomaster);
396 u32 bytes = op->count * blocksize;
400 // Build PRD dma structure.
401 struct sff_dma_prd *dma = MAKE_FLATPTR(
403 , (void*)offsetof(struct extended_bios_data_area_s, extra_stack));
404 struct sff_dma_prd *origdma = dma;
406 if (dma >= &origdma[16])
407 // Too many descriptors..
412 u32 max = 0x10000 - (dest & 0xffff);
416 SET_FLATPTR(dma->buf_fl, dest);
421 dprintf(16, "dma@%p: %08x %08x\n", dma, dest, count);
423 SET_FLATPTR(dma->count, count);
427 // Program bus-master controller.
428 outl((u32)origdma, iomaster + BM_TABLE);
429 u8 oldcmd = inb(iomaster + BM_CMD) & ~(BM_CMD_MEMWRITE|BM_CMD_START);
430 outb(oldcmd | (iswrite ? 0x00 : BM_CMD_MEMWRITE), iomaster + BM_CMD);
431 outb(BM_STATUS_ERROR|BM_STATUS_IRQ, iomaster + BM_STATUS);
436 // Transfer data using DMA.
438 ata_dma_transfer(struct disk_op_s *op)
440 if (! CONFIG_ATA_DMA)
442 dprintf(16, "ata_dma_transfer id=%p buf=%p\n"
443 , op->drive_g, op->buf_fl);
445 u8 ataid = GET_GLOBAL(op->drive_g->cntl_id);
446 u8 channel = ataid / 2;
447 u16 iomaster = GET_GLOBAL(ATA_channels[channel].iomaster);
449 // Start bus-master controller.
450 u8 oldcmd = inb(iomaster + BM_CMD);
451 outb(oldcmd | BM_CMD_START, iomaster + BM_CMD);
453 u64 end = calc_future_tsc(IDE_TIMEOUT);
456 status = inb(iomaster + BM_STATUS);
457 if (status & BM_STATUS_IRQ)
459 // Transfer in progress
460 if (check_time(end)) {
467 outb(oldcmd & ~BM_CMD_START, iomaster + BM_CMD);
469 u16 iobase1 = GET_GLOBAL(ATA_channels[channel].iobase1);
470 u16 iobase2 = GET_GLOBAL(ATA_channels[channel].iobase2);
471 int idestatus = pause_await_not_bsy(iobase1, iobase2);
473 if ((status & (BM_STATUS_IRQ|BM_STATUS_ACTIVE)) == BM_STATUS_IRQ
475 && (idestatus & (ATA_CB_STAT_BSY | ATA_CB_STAT_DF | ATA_CB_STAT_DRQ
476 | ATA_CB_STAT_ERR)) == 0x00)
480 dprintf(6, "IDE DMA error (dma=%x ide=%x/%x/%x)\n", status, idestatus
481 , inb(iobase2 + ATA_CB_ASTAT), inb(iobase1 + ATA_CB_ERR));
487 /****************************************************************
488 * ATA hard drive functions
489 ****************************************************************/
491 // Transfer data to harddrive using PIO protocol.
493 ata_pio_cmd_data(struct disk_op_s *op, int iswrite, struct ata_pio_command *cmd)
495 u8 ataid = GET_GLOBAL(op->drive_g->cntl_id);
496 u8 channel = ataid / 2;
497 u16 iobase1 = GET_GLOBAL(ATA_channels[channel].iobase1);
498 u16 iobase2 = GET_GLOBAL(ATA_channels[channel].iobase2);
500 // Disable interrupts
501 outb(ATA_CB_DC_HD15 | ATA_CB_DC_NIEN, iobase2 + ATA_CB_DC);
503 int ret = send_cmd(op->drive_g, cmd);
506 ret = ata_wait_data(iobase1);
509 ret = ata_pio_transfer(op, iswrite, DISK_SECTOR_SIZE);
513 outb(ATA_CB_DC_HD15, iobase2+ATA_CB_DC);
517 // Transfer data to harddrive using DMA protocol.
519 ata_dma_cmd_data(struct disk_op_s *op, struct ata_pio_command *cmd)
521 if (! CONFIG_ATA_DMA)
523 int ret = send_cmd(op->drive_g, cmd);
526 return ata_dma_transfer(op);
529 // Read/write count blocks from a harddrive.
531 ata_readwrite(struct disk_op_s *op, int iswrite)
535 int usepio = ata_try_dma(op, iswrite, DISK_SECTOR_SIZE);
537 struct ata_pio_command cmd;
538 memset(&cmd, 0, sizeof(cmd));
540 if (op->count >= (1<<8) || lba + op->count >= (1<<28)) {
541 cmd.sector_count2 = op->count >> 8;
542 cmd.lba_low2 = lba >> 24;
543 cmd.lba_mid2 = lba >> 32;
544 cmd.lba_high2 = lba >> 40;
548 cmd.command = (iswrite ? ATA_CMD_WRITE_SECTORS_EXT
549 : ATA_CMD_READ_SECTORS_EXT);
551 cmd.command = (iswrite ? ATA_CMD_WRITE_DMA_EXT
552 : ATA_CMD_READ_DMA_EXT);
555 cmd.command = (iswrite ? ATA_CMD_WRITE_SECTORS
556 : ATA_CMD_READ_SECTORS);
558 cmd.command = (iswrite ? ATA_CMD_WRITE_DMA
562 cmd.sector_count = op->count;
564 cmd.lba_mid = lba >> 8;
565 cmd.lba_high = lba >> 16;
566 cmd.device = ((lba >> 24) & 0xf) | ATA_CB_DH_LBA;
570 ret = ata_pio_cmd_data(op, iswrite, &cmd);
572 ret = ata_dma_cmd_data(op, &cmd);
574 return DISK_RET_EBADTRACK;
575 return DISK_RET_SUCCESS;
578 // 16bit command demuxer for ATA harddrives.
580 process_ata_op(struct disk_op_s *op)
585 switch (op->command) {
587 return ata_readwrite(op, 0);
589 return ata_readwrite(op, 1);
591 return process_ata_misc_op(op);
596 /****************************************************************
598 ****************************************************************/
600 #define CDROM_CDB_SIZE 12
602 // Low-level atapi command transmit function.
604 atapi_cmd_data(struct disk_op_s *op, void *cdbcmd, u16 blocksize)
606 u8 ataid = GET_GLOBAL(op->drive_g->cntl_id);
607 u8 channel = ataid / 2;
608 u16 iobase1 = GET_GLOBAL(ATA_channels[channel].iobase1);
609 u16 iobase2 = GET_GLOBAL(ATA_channels[channel].iobase2);
611 struct ata_pio_command cmd;
612 memset(&cmd, 0, sizeof(cmd));
613 cmd.lba_mid = blocksize;
614 cmd.lba_high = blocksize >> 8;
615 cmd.command = ATA_CMD_PACKET;
617 // Disable interrupts
618 outb(ATA_CB_DC_HD15 | ATA_CB_DC_NIEN, iobase2 + ATA_CB_DC);
620 int ret = send_cmd(op->drive_g, &cmd);
623 ret = ata_wait_data(iobase1);
627 // Send command to device
628 outsw_fl(iobase1, MAKE_FLATPTR(GET_SEG(SS), cdbcmd), CDROM_CDB_SIZE / 2);
630 int status = pause_await_not_bsy(iobase1, iobase2);
636 if (status & ATA_CB_STAT_ERR) {
637 u8 err = inb(iobase1 + ATA_CB_ERR);
640 dprintf(6, "send_atapi_cmd : read error (status=%02x err=%02x)\n"
645 if (!(status & ATA_CB_STAT_DRQ)) {
646 dprintf(6, "send_atapi_cmd : DRQ not set (status %02x)\n", status);
651 ret = ata_pio_transfer(op, 0, blocksize);
655 outb(ATA_CB_DC_HD15, iobase2+ATA_CB_DC);
657 return DISK_RET_EBADTRACK;
658 return DISK_RET_SUCCESS;
661 // 16bit command demuxer for ATAPI cdroms.
663 process_atapi_op(struct disk_op_s *op)
665 switch (op->command) {
670 return DISK_RET_EWRITEPROTECT;
672 return process_ata_misc_op(op);
677 /****************************************************************
678 * ATA detect and init
679 ****************************************************************/
681 // Send an identify device or identify device packet command.
683 send_ata_identity(struct drive_s *drive_g, u16 *buffer, int command)
685 memset(buffer, 0, DISK_SECTOR_SIZE);
687 struct disk_op_s dop;
688 memset(&dop, 0, sizeof(dop));
689 dop.drive_g = drive_g;
692 dop.buf_fl = MAKE_FLATPTR(GET_SEG(SS), buffer);
694 struct ata_pio_command cmd;
695 memset(&cmd, 0, sizeof(cmd));
696 cmd.command = command;
698 return ata_pio_cmd_data(&dop, 0, &cmd);
701 // Extract the ATA/ATAPI version info.
703 extract_version(u16 *buffer)
705 // Extract ATA/ATAPI version.
706 u16 ataversion = buffer[80];
708 for (version=15; version>0; version--)
709 if (ataversion & (1<<version))
714 // Extract common information from IDENTIFY commands.
716 extract_identify(struct drive_s *drive_g, u16 *buffer)
718 dprintf(3, "Identify w0=%x w2=%x\n", buffer[0], buffer[2]);
721 char *model = drive_g->model;
722 int maxsize = ARRAY_SIZE(drive_g->model);
724 for (i=0; i<maxsize/2; i++) {
725 u16 v = buffer[27+i];
727 model[i*2+1] = v & 0xff;
729 model[maxsize-1] = 0x00;
731 // Trim trailing spaces from model name.
732 for (i=maxsize-2; i>0 && model[i] == 0x20; i--)
736 SET_GLOBAL(drive_g->removable, (buffer[0] & 0x80) ? 1 : 0);
737 SET_GLOBAL(drive_g->cntl_info, extract_version(buffer));
740 // Print out a description of the given atapi drive.
742 describe_atapi(struct drive_s *drive_g)
744 u8 ataid = drive_g->cntl_id;
745 u8 channel = ataid / 2;
746 u8 slave = ataid % 2;
747 u8 version = drive_g->cntl_info;
748 int iscd = drive_g->floppy_type;
749 printf("ata%d-%d: %s ATAPI-%d %s", channel, slave
750 , drive_g->model, version
751 , (iscd ? "CD-Rom/DVD-Rom" : "Device"));
754 // Detect if the given drive is an atapi - initialize it if so.
755 static struct drive_s *
756 init_drive_atapi(struct drive_s *dummy, u16 *buffer)
758 // Send an IDENTIFY_DEVICE_PACKET command to device
759 int ret = send_ata_identity(dummy, buffer, ATA_CMD_IDENTIFY_PACKET_DEVICE);
763 // Success - setup as ATAPI.
764 struct drive_s *drive_g = malloc_fseg(sizeof(*drive_g));
769 memset(drive_g, 0, sizeof(*drive_g));
770 SET_GLOBAL(drive_g->cntl_id, dummy->cntl_id);
771 extract_identify(drive_g, buffer);
772 SET_GLOBAL(drive_g->type, DTYPE_ATAPI);
773 SET_GLOBAL(drive_g->blksize, CDROM_SECTOR_SIZE);
774 SET_GLOBAL(drive_g->sectors, (u64)-1);
775 u8 iscd = ((buffer[0] >> 8) & 0x1f) == 0x05;
776 SET_GLOBAL(drive_g->floppy_type, iscd);
780 map_cd_drive(drive_g);
785 // Print out a description of the given ata drive.
787 describe_ata(struct drive_s *drive_g)
789 u8 ataid = drive_g->cntl_id;
790 u8 channel = ataid / 2;
791 u8 slave = ataid % 2;
792 u64 sectors = drive_g->sectors;
793 u8 version = drive_g->cntl_info;
794 char *model = drive_g->model;
795 printf("ata%d-%d: %s ATA-%d Hard-Disk", channel, slave, model, version);
796 u64 sizeinmb = sectors >> 11;
797 if (sizeinmb < (1 << 16))
798 printf(" (%u MiBytes)", (u32)sizeinmb);
800 printf(" (%u GiBytes)", (u32)(sizeinmb >> 10));
803 // Detect if the given drive is a regular ata drive - initialize it if so.
804 static struct drive_s *
805 init_drive_ata(struct drive_s *dummy, u16 *buffer)
807 // Send an IDENTIFY_DEVICE command to device
808 int ret = send_ata_identity(dummy, buffer, ATA_CMD_IDENTIFY_DEVICE);
812 // Success - setup as ATA.
813 struct drive_s *drive_g = malloc_fseg(sizeof(*drive_g));
818 memset(drive_g, 0, sizeof(*drive_g));
819 SET_GLOBAL(drive_g->cntl_id, dummy->cntl_id);
820 extract_identify(drive_g, buffer);
821 SET_GLOBAL(drive_g->type, DTYPE_ATA);
822 SET_GLOBAL(drive_g->blksize, DISK_SECTOR_SIZE);
824 SET_GLOBAL(drive_g->pchs.cylinders, buffer[1]);
825 SET_GLOBAL(drive_g->pchs.heads, buffer[3]);
826 SET_GLOBAL(drive_g->pchs.spt, buffer[6]);
829 if (buffer[83] & (1 << 10)) // word 83 - lba48 support
830 sectors = *(u64*)&buffer[100]; // word 100-103
832 sectors = *(u32*)&buffer[60]; // word 60 and word 61
833 SET_GLOBAL(drive_g->sectors, sectors);
835 // Setup disk geometry translation.
836 setup_translation(drive_g);
838 // Register with bcv system.
839 add_bcv_internal(drive_g);
844 static u64 SpinupEnd;
846 // Wait for non-busy status and check for "floating bus" condition.
848 powerup_await_non_bsy(u16 base)
853 status = inb(base+ATA_CB_STAT);
854 if (!(status & ATA_CB_STAT_BSY))
857 if (orstatus == 0xff) {
858 dprintf(1, "powerup IDE floating\n");
861 if (check_time(SpinupEnd)) {
867 dprintf(6, "powerup iobase=%x st=%x\n", base, status);
871 // Detect any drives attached to a given controller.
873 ata_detect(void *data)
875 struct ata_channel_s *atachannel = data;
876 int startid = (atachannel - ATA_channels) * 2;
877 struct drive_s dummy;
878 memset(&dummy, 0, sizeof(dummy));
880 int ataid, last_reset_ataid=-1;
881 for (ataid=startid; ataid<startid+2; ataid++) {
882 u8 channel = ataid / 2;
883 u8 slave = ataid % 2;
885 u16 iobase1 = GET_GLOBAL(ATA_channels[channel].iobase1);
890 int status = powerup_await_non_bsy(iobase1);
893 u8 newdh = slave ? ATA_CB_DH_DEV1 : ATA_CB_DH_DEV0;
894 outb(newdh, iobase1+ATA_CB_DH);
896 status = powerup_await_non_bsy(iobase1);
900 // Check if ioport registers look valid.
901 outb(newdh, iobase1+ATA_CB_DH);
902 u8 dh = inb(iobase1+ATA_CB_DH);
903 outb(0x55, iobase1+ATA_CB_SC);
904 outb(0xaa, iobase1+ATA_CB_SN);
905 u8 sc = inb(iobase1+ATA_CB_SC);
906 u8 sn = inb(iobase1+ATA_CB_SN);
907 dprintf(6, "ata_detect ataid=%d sc=%x sn=%x dh=%x\n"
908 , ataid, sc, sn, dh);
909 if (sc != 0x55 || sn != 0xaa || dh != newdh)
912 // Prepare new drive.
913 dummy.cntl_id = ataid;
916 if (slave && ataid == last_reset_ataid + 1) {
917 // The drive was just reset - no need to reset it again.
920 last_reset_ataid = ataid;
925 struct drive_s *drive_g = init_drive_atapi(&dummy, buffer);
927 // Didn't find an ATAPI drive - look for ATA drive.
928 u8 st = inb(iobase1+ATA_CB_STAT);
930 // Status not set - can't be a valid drive.
934 int ret = await_rdy(iobase1);
939 drive_g = init_drive_ata(&dummy, buffer);
941 // No ATA drive found
945 u16 resetresult = buffer[93];
946 dprintf(6, "ata_detect resetresult=%04x\n", resetresult);
947 if (!slave && (resetresult & 0xdf61) == 0x4041)
948 // resetresult looks valid and device 0 is responding to
949 // device 1 requests - device 1 must not be present - skip
955 // Initialize an ata controller and detect its drives.
957 init_controller(struct ata_channel_s *atachannel
958 , int bdf, int irq, u32 port1, u32 port2, u32 master)
960 SET_GLOBAL(atachannel->irq, irq);
961 SET_GLOBAL(atachannel->pci_bdf, bdf);
962 SET_GLOBAL(atachannel->iobase1, port1);
963 SET_GLOBAL(atachannel->iobase2, port2);
964 SET_GLOBAL(atachannel->iomaster, master);
965 dprintf(1, "ATA controller %d at %x/%x/%x (irq %d dev %x)\n"
966 , atachannel - ATA_channels, port1, port2, master, irq, bdf);
967 run_thread(ata_detect, atachannel);
973 // Locate and init ata controllers.
977 // Scan PCI bus for ATA adapters
978 int count=0, pcicount=0;
980 foreachpci(bdf, max) {
982 if (pci_config_readw(bdf, PCI_CLASS_DEVICE) != PCI_CLASS_STORAGE_IDE)
984 if (count >= ARRAY_SIZE(ATA_channels))
987 u8 pciirq = pci_config_readb(bdf, PCI_INTERRUPT_LINE);
988 u8 prog_if = pci_config_readb(bdf, PCI_CLASS_PROG);
990 if (CONFIG_ATA_DMA && prog_if & 0x80) {
991 // Check for bus-mastering.
992 u32 bar = pci_config_readl(bdf, PCI_BASE_ADDRESS_4);
993 if (bar & PCI_BASE_ADDRESS_SPACE_IO) {
994 master = bar & PCI_BASE_ADDRESS_IO_MASK;
995 pci_config_maskw(bdf, PCI_COMMAND, 0, PCI_COMMAND_MASTER);
999 u32 port1, port2, irq;
1001 port1 = pci_config_readl(bdf, PCI_BASE_ADDRESS_0) & ~3;
1002 port2 = pci_config_readl(bdf, PCI_BASE_ADDRESS_1) & ~3;
1005 port1 = PORT_ATA1_CMD_BASE;
1006 port2 = PORT_ATA1_CTRL_BASE;
1009 init_controller(&ATA_channels[count], bdf, irq, port1, port2, master);
1013 port1 = pci_config_readl(bdf, PCI_BASE_ADDRESS_2) & ~3;
1014 port2 = pci_config_readl(bdf, PCI_BASE_ADDRESS_3) & ~3;
1017 port1 = PORT_ATA2_CMD_BASE;
1018 port2 = PORT_ATA2_CTRL_BASE;
1021 init_controller(&ATA_channels[count], bdf, irq, port1, port2
1022 , master ? master + 8 : 0);
1026 if (!CONFIG_COREBOOT && !pcicount && ARRAY_SIZE(ATA_channels) >= 2) {
1027 // No PCI devices found - probably a QEMU "-M isapc" machine.
1028 // Try using ISA ports for ATA controllers.
1029 init_controller(&ATA_channels[0], -1, IRQ_ATA1
1030 , PORT_ATA1_CMD_BASE, PORT_ATA1_CTRL_BASE, 0);
1031 init_controller(&ATA_channels[1], -1, IRQ_ATA2
1032 , PORT_ATA2_CMD_BASE, PORT_ATA2_CTRL_BASE, 0);
1043 dprintf(3, "init hard drives\n");
1045 SpinupEnd = calc_future_tsc(IDE_TIMEOUT);
1048 SET_BDA(disk_control_byte, 0xc0);
1050 enable_hwirq(14, entry_76);