1 # Kconfig SeaBIOS configuration
3 mainmenu "SeaBIOS Configuration"
5 menu "General Features"
8 bool "Build for coreboot"
11 Configure as a coreboot payload.
15 bool "Build for Xen HVM"
18 Configure to be used by xen hvmloader, for a HVM guest.
21 bool "Parallelize hardware init"
24 Support running hardware initialization in parallel.
25 config THREAD_OPTIONROMS
27 bool "Hardware init during option ROM execution"
30 Allow hardware init to run in parallel with optionrom execution.
32 This can reduce boot time, but can cause some timing
33 variations during option ROM code execution. It is not
34 known if all option ROMs will behave properly with this
38 bool "Copy init code to high memory"
41 Support relocating the one time initialization code to high memory.
48 Support an interactive boot menu at end of post.
54 Amount of time (in ms) to wait at menu before selecting normal boot.
57 bool "Graphical boot splash screen"
60 Support showing a graphical boot splash screen.
66 Support controlling of the boot order via the fw_cfg/CBFS
71 bool "coreboot CBFS support"
74 Support searching coreboot flash format.
76 depends on COREBOOT_FLASH
77 bool "CBFS lzma support"
80 Support CBFS files compressed using the lzma decompression
83 depends on COREBOOT_FLASH
84 bool "Floppy images in CBFS"
87 Support floppy images in coreboot flash.
91 menu "Hardware support"
94 bool "ATA controllers"
97 Support for IDE disk code.
103 Detect and try to use ATA bus mastering DMA controllers.
109 Use 32bit PIO accesses on ATA (minor optimization on PCI transfers).
112 bool "AHCI controllers"
115 Support for AHCI disk code.
117 depends on DRIVES && !COREBOOT
118 bool "VirtIO controllers"
121 Support boot from virtio storage.
124 bool "Floppy controller"
127 Support floppy drive access.
130 depends on KEYBOARD || MOUSE
134 Support PS2 ports (keyboard and mouse).
135 config PS2_KEYBOARD_SPINUP
136 depends on PS2PORT && COREBOOT
137 int "Extra time (in ms) to allow a keyboard to initialize"
140 Some PS2 keyboards don't respond to commands immediately
141 after powering on. Specify a positive value here to allow
142 additional time for the keyboard to become responsive.
151 bool "USB UHCI controllers"
154 Support USB UHCI controllers.
157 bool "USB OHCI controllers"
160 Support USB OHCI controllers.
163 bool "USB EHCI controllers"
166 Support USB EHCI controllers.
168 depends on USB && DRIVES
180 depends on USB && KEYBOARD
184 Support USB keyboards.
186 depends on USB && MOUSE
196 Support serial ports. This also enables int 14 serial port calls.
201 Support parallel ports. This also enables int 17 parallel port calls.
203 config EXTRA_PCI_ROOTS
204 int "Number of extra root buses"
207 If the target machine has multiple independent root buses
208 set this to a positive value. The SeaBIOS PCI probe will
209 then search for the given number of extra root buses.
211 Most machines do not have multiple root buses and this
212 setting should be zero.
216 bool "System Management Mode (SMM)"
219 Support System Management Mode (on emulators).
222 bool "Initialize MTRRs"
225 Initialize the Memory Type Range Registers (on emulators).
228 menu "BIOS interfaces"
230 bool "Drive interface"
233 Support int13 disk/floppy drive functions.
237 bool "DVD/CDROM booting"
240 Support for booting from a CD. (El Torito spec support.)
242 depends on CDROM_BOOT
243 bool "DVD/CDROM boot drive emulation"
246 Support bootable CDROMs that emulate a floppy/harddrive.
249 bool "PCIBIOS interface"
252 Support int 1a/b1 PCI BIOS calls.
257 Support int 15/53 APM BIOS calls.
259 bool "PnP BIOS interface"
262 Support PnP BIOS entry point.
267 Support finding and running option roms during POST.
268 config OPTIONROMS_DEPLOYED
269 depends on OPTIONROMS
270 bool "Option roms are already at 0xc0000-0xf0000"
273 Select this if option ROMs are already copied to
274 0xc0000-0xf0000. This must only be selected when using
275 Bochs or QEMU versions older than 0.12.
276 config OPTIONROMS_CHECKSUM
277 depends on OPTIONROMS
278 bool "Require correct checksum on option ROMs"
281 Option ROMs are required to have correct checksums.
282 However, some option ROMs in the wild don't correctly
283 follow the specifications and have bad checksums.
284 Say N here to allow SeaBIOS to execute them anyways.
288 depends on OPTIONROMS
292 Support Post Memory Manager (PMM) entry point.
294 bool "Boot interface"
297 Support int 19/18 system bootup support.
299 bool "Keyboard interface"
302 Support int 16 keyboard calls.
303 config KBD_CALL_INT15_4F
305 bool "Keyboard hook interface"
308 Support calling int155f on each keyboard event.
310 bool "Mouse interface"
313 Support for int15c2 mouse calls.
319 Support S3 resume handler.
320 config S3_RESUME_VGA_INIT
322 bool "Run VGA rom on S3 resume"
325 Run the vga rom during S3 resume.
329 bool "Hardware specific VGA helpers"
332 Support int 155f BIOS callbacks specific to some Intel and
333 VIA on-board vga devices.
339 Disable A20 on 16bit boot.
348 Support generation of a PIR table in 0xf000 segment.
354 Support generation of MPTable.
359 Support generation of SM BIOS tables. This is also
360 sometimes called DMI.
366 Support generation of ACPI tables.
374 Control how verbose debug output is. The higher the
375 number, the more verbose SeaBIOS will be.
377 Set to zero to disable debugging.
380 depends on DEBUG_LEVEL != 0
381 bool "Serial port debugging"
384 Send debugging information to serial port.
385 config DEBUG_SERIAL_PORT
386 depends on DEBUG_SERIAL
387 hex "Serial port base address"
390 Base port for serial - generally 0x3f8, 0x2f8, 0x3e8, or 0x2e8.
392 config SCREEN_AND_DEBUG
393 depends on DEBUG_LEVEL != 0
394 bool "Show screen writes on debug ports"
397 Send characters that SeaBIOS writes to the screen to the