1 # Kconfig SeaBIOS configuration
3 mainmenu "SeaBIOS Configuration"
5 menu "General Features"
8 bool "Build for coreboot"
11 Configure as a coreboot payload.
14 bool "Parallelize hardware init"
17 Support running hardware initialization in parallel.
18 config THREAD_OPTIONROMS
20 bool "Hardware init during option ROM execution"
23 Allow hardware init to run in parallel with optionrom execution.
25 This can reduce boot time, but can cause some timing
26 variations during option ROM code execution. It is not
27 known if all option ROMs will behave properly with this
31 bool "Copy init code to high memory"
34 Support relocating the one time initialization code to high memory.
41 Support an interactive boot menu at end of post.
47 Amount of time (in ms) to wait at menu before selecting normal boot.
50 bool "Graphical boot splash screen"
53 Support showing a graphical boot splash screen.
59 Support controlling of the boot order via the fw_cfg/CBFS
64 bool "coreboot CBFS support"
67 Support searching coreboot flash format.
69 depends on COREBOOT_FLASH
70 bool "CBFS lzma support"
73 Support CBFS files compressed using the lzma decompression
76 depends on COREBOOT_FLASH
77 bool "Floppy images in CBFS"
80 Support floppy images in coreboot flash.
84 menu "Hardware support"
87 bool "ATA controllers"
90 Support for IDE disk code.
96 Detect and try to use ATA bus mastering DMA controllers.
102 Use 32bit PIO accesses on ATA (minor optimization on PCI transfers).
105 bool "AHCI controllers"
108 Support for AHCI disk code.
110 depends on DRIVES && !COREBOOT
111 bool "VirtIO controllers"
114 Support boot from virtio storage.
117 bool "Floppy controller"
120 Support floppy drive access.
123 depends on KEYBOARD || MOUSE
127 Support PS2 ports (keyboard and mouse).
128 config PS2_KEYBOARD_SPINUP
130 int "Extra time (in ms) to allow a keyboard to initialize"
133 Some PS2 keyboards don't respond to commands immediately
134 after powering on. Specify a positive value here to allow
135 additional time for the keyboard to become responsive.
144 bool "USB UHCI controllers"
147 Support USB UHCI controllers.
150 bool "USB OHCI controllers"
153 Support USB OHCI controllers.
156 bool "USB EHCI controllers"
159 Support USB EHCI controllers.
161 depends on USB && DRIVES
173 depends on USB && KEYBOARD
177 Support USB keyboards.
179 depends on USB && MOUSE
189 Support serial ports. This also enables int 14 serial port calls.
194 Support parallel ports. This also enables int 17 parallel port calls.
196 config EXTRA_PCI_ROOTS
197 bool "Extra root buses"
200 If the target machine has multiple independent root buses,
201 the extra buses may be specified here.
203 depends on EXTRA_PCI_ROOTS
204 hex "Extra primary PCI root bus number"
207 depends on EXTRA_PCI_ROOTS
208 hex "Extra secondary PCI root bus number"
213 bool "System Management Mode (SMM)"
216 Support System Management Mode (on emulators).
219 bool "Initialize MTRRs"
222 Initialize the Memory Type Range Registers (on emulators).
225 menu "BIOS interfaces"
227 bool "Drive interface"
230 Support int13 disk/floppy drive functions.
234 bool "DVD/CDROM booting"
237 Support for booting from a CD. (El Torito spec support.)
239 depends on CDROM_BOOT
240 bool "DVD/CDROM boot drive emulation"
243 Support bootable CDROMs that emulate a floppy/harddrive.
246 bool "PCIBIOS interface"
249 Support int 1a/b1 PCI BIOS calls.
254 Support int 15/53 APM BIOS calls.
256 bool "PnP BIOS interface"
259 Support PnP BIOS entry point.
264 Support finding and running option roms during POST.
265 config OPTIONROMS_DEPLOYED
266 depends on OPTIONROMS
267 bool "Option roms are already at 0xc0000-0xf0000"
270 Select this if option ROMs are already copied to
271 0xc0000-0xf0000. This must only be selected when using
272 Bochs or QEMU versions older than 0.12.
273 config OPTIONROMS_CHECKSUM
274 depends on OPTIONROMS
275 bool "Require correct checksum on option ROMs"
278 Option ROMs are required to have correct checksums.
279 However, some option ROMs in the wild don't correctly
280 follow the specifications and have bad checksums.
281 Say N here to allow SeaBIOS to execute them anyways.
285 depends on OPTIONROMS
289 Support Post Memory Manager (PMM) entry point.
291 bool "Boot interface"
294 Support int 19/18 system bootup support.
296 bool "Keyboard interface"
299 Support int 16 keyboard calls.
300 config KBD_CALL_INT15_4F
302 bool "Keyboard hook interface"
305 Support calling int155f on each keyboard event.
307 bool "Mouse interface"
310 Support for int15c2 mouse calls.
316 Support S3 resume handler.
317 config S3_RESUME_VGA_INIT
319 bool "Run VGA rom on S3 resume"
322 Run the vga rom during S3 resume.
326 bool "Hardware specific VGA helpers"
329 Support int 155f BIOS callbacks specific to some Intel and
330 VIA on-board vga devices.
336 Disable A20 on 16bit boot.
345 Support generation of a PIR table in 0xf000 segment.
351 Support generation of MPTable.
356 Support generation of SM BIOS tables. This is also
357 sometimes called DMI.
363 Support generation of ACPI tables.
371 Control how verbose debug output is. The higher the
372 number, the more verbose SeaBIOS will be.
374 Set to zero to disable debugging.
377 depends on DEBUG_LEVEL != 0
378 bool "Serial port debugging"
381 Send debugging information to serial port.
382 config DEBUG_SERIAL_PORT
383 depends on DEBUG_SERIAL
384 hex "Serial port base address"
387 Base port for serial - generally 0x3f8, 0x2f8, 0x3e8, or 0x2e8.
389 config SCREEN_AND_DEBUG
390 depends on DEBUG_LEVEL != 0
391 bool "Show screen writes on debug ports"
394 Send characters that SeaBIOS writes to the screen to the