1 /* FR IO-MAP HEADER FILE */
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2 /* ===================== */
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3 /* CREATED BY IO-WIZARD V2.26 */
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4 /* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
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5 /* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
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6 /* ELIGIBILITY FOR ANY PURPOSES. */
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7 /* (C) Fujitsu Microelectronics Europe GmbH */
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9 /* ************************************************************************* */
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10 /* Fujitsu Microelectronics Europe GmbH */
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11 /* Pittlerstrasse 47, 63225 Langen */
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12 /* Tel.: +49 (6103) 690-0, Fax -122 */
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14 /* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
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15 /* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
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16 /* ELIGIBILITY FOR ANY PURPOSES */
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17 /* (C) Fujitsu Microelectronics Europe GmbH */
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18 /* ************************************************************************* */
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19 /* ---------------------------------------------------------------------- */
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20 /* Id: MB91465K.h,v 1.5 2007/01/04 11:04:48 meffen Exp */
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21 /* ---------------------------------------------------------------------- */
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22 /* Id: MB91465K.h,v 1.5 2007/01/04 11:04:48 meffen Exp */
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23 /* - removed LCD and Sound Controller */
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24 /* Id: MB91465K.h,v 1.4 2006/11/30 14:39:18 meffen Exp */
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25 /* - -added registers: ADER (32Bit access) */
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26 /* ADCS (16Bit access) */
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27 /* ADCR (16Bit access) */
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28 /* ADCT (16Bit access) */
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30 /* ASSEMBLER DEFINITIONS : */
\r
35 #define __IO_EXTERN extern volatile
\r
39 .GLOBAL _pdr14, _pdr15, _pdr16, _pdr17, _pdr18, _pdr19
\r
40 .GLOBAL _pdr20, _pdr21, _pdr22, _pdr24, _pdr26, _pdr27
\r
41 .GLOBAL _pdr28, _pdr29, _eirr0, _enir0, _elvr0, _eirr1
\r
42 .GLOBAL _enir1, _elvr1, _dicr, _hrcl, _rbsync, _scr00
\r
43 .GLOBAL _smr00, _ssr00, _rdr00, _tdr00, _escr00, _eccr00
\r
44 .GLOBAL _scr01, _smr01, _ssr01, _rdr01, _tdr01, _escr01
\r
45 .GLOBAL _eccr01, _scr02, _smr02, _ssr02, _rdr02, _tdr02
\r
46 .GLOBAL _escr02, _eccr02, _scr03, _smr03, _ssr03, _rdr03
\r
47 .GLOBAL _tdr03, _escr03, _eccr03, _scr04, _smr04, _ssr04
\r
48 .GLOBAL _rdr04, _tdr04, _escr04, _eccr04, _fsr04, _fcr04
\r
49 .GLOBAL _bgr00, _bgr100, _bgr000, _bgr01, _bgr101, _bgr001
\r
50 .GLOBAL _bgr02, _bgr102, _bgr002, _bgr03, _bgr103, _bgr003
\r
51 .GLOBAL _bgr04, _bgr104, _bgr004, _ibcr0, _ibsr0, _itba0
\r
52 .GLOBAL _itbah0, _itbal0, _itmk0, _itmkh0, _itmkl0, _ismk0
\r
53 .GLOBAL _isba0, _idar0, _iccr0, _gcn10, _gcn20, _gcn11
\r
54 .GLOBAL _gcn21, _gcn12, _gcn22, _ptmr00, _pcsr00, _pdut00
\r
55 .GLOBAL _pcn00, _pcnh00, _pcnl00, _ptmr01, _pcsr01, _pdut01
\r
56 .GLOBAL _pcn01, _pcnh01, _pcnl01, _ptmr02, _pcsr02, _pdut02
\r
57 .GLOBAL _pcn02, _pcnh02, _pcnl02, _ptmr03, _pcsr03, _pdut03
\r
58 .GLOBAL _pcn03, _pcnh03, _pcnl03, _ptmr04, _pcsr04, _pdut04
\r
59 .GLOBAL _pcn04, _pcnh04, _pcnl04, _ptmr05, _pcsr05, _pdut05
\r
60 .GLOBAL _pcn05, _pcnh05, _pcnl05, _ptmr06, _pcsr06, _pdut06
\r
61 .GLOBAL _pcn06, _pcnh06, _pcnl06, _ptmr07, _pcsr07, _pdut07
\r
62 .GLOBAL _pcn07, _pcnh07, _pcnl07, _ptmr08, _pcsr08, _pdut08
\r
63 .GLOBAL _pcn08, _pcnh08, _pcnl08, _ptmr09, _pcsr09, _pdut09
\r
64 .GLOBAL _pcn09, _pcnh09, _pcnl09, _ptmr10, _pcsr10, _pdut10
\r
65 .GLOBAL _pcn10, _pcnh10, _pcnl10, _ptmr11, _pcsr11, _pdut11
\r
66 .GLOBAL _pcn11, _pcnh11, _pcnl11, _ics01, _ics23, _ipcp0
\r
67 .GLOBAL _ipcp1, _ipcp2, _ipcp3, _ocs01, _ocs23, _occp0
\r
68 .GLOBAL _occp1, _occp2, _occp3, _aderh, _aderl, _ader
\r
69 .GLOBAL _adcs1, _adcs0, _adcs, _adcr1, _adcr0, _adcr
\r
70 .GLOBAL _adct1, _adct0, _adct, _adsch, _adech, _tmrlr0
\r
71 .GLOBAL _tmr0, _tmcsr0, _tmcsrh0, _tmcsrl0, _tmrlr1, _tmr1
\r
72 .GLOBAL _tmcsr1, _tmcsrh1, _tmcsrl1, _tmrlr2, _tmr2, _tmcsr2
\r
73 .GLOBAL _tmcsrh2, _tmcsrl2, _tmrlr3, _tmr3, _tmcsr3, _tmcsrh3
\r
74 .GLOBAL _tmcsrl3, _tmrlr4, _tmr4, _tmcsr4, _tmcsrh4, _tmcsrl4
\r
75 .GLOBAL _tmrlr5, _tmr5, _tmcsr5, _tmcsrh5, _tmcsrl5, _tmrlr6
\r
76 .GLOBAL _tmr6, _tmcsr6, _tmcsrh6, _tmcsrl6, _tmrlr7, _tmr7
\r
77 .GLOBAL _tmcsr7, _tmcsrh7, _tmcsrl7, _tcdt0, _tccs0, _tcdt1
\r
78 .GLOBAL _tccs1, _tcdt2, _tccs2, _tcdt3, _tccs3, _dmaca0
\r
79 .GLOBAL _dmacb0, _dmaca1, _dmacb1, _dmaca2, _dmacb2, _dmaca3
\r
80 .GLOBAL _dmacb3, _dmaca4, _dmacb4, _dmacr, _ics45, _ics67
\r
81 .GLOBAL _ipcp4, _ipcp5, _ipcp6, _ipcp7, _ocs45, _ocs67
\r
82 .GLOBAL _occp4, _occp5, _occp6, _occp7, _tcdt4, _tccs4
\r
83 .GLOBAL _tcdt5, _tccs5, _tcdt6, _tccs6, _tcdt7, _tccs7
\r
84 .GLOBAL _roms, _bsd0, _bsd1, _bsdc, _bsrr, _icr00
\r
85 .GLOBAL _icr01, _icr02, _icr03, _icr04, _icr05, _icr06
\r
86 .GLOBAL _icr07, _icr08, _icr09, _icr10, _icr11, _icr12
\r
87 .GLOBAL _icr13, _icr14, _icr15, _icr16, _icr17, _icr18
\r
88 .GLOBAL _icr19, _icr20, _icr21, _icr22, _icr23, _icr24
\r
89 .GLOBAL _icr25, _icr26, _icr27, _icr28, _icr29, _icr30
\r
90 .GLOBAL _icr31, _icr32, _icr33, _icr34, _icr35, _icr36
\r
91 .GLOBAL _icr37, _icr38, _icr39, _icr40, _icr41, _icr42
\r
92 .GLOBAL _icr43, _icr44, _icr45, _icr46, _icr47, _icr48
\r
93 .GLOBAL _icr49, _icr50, _icr51, _icr52, _icr53, _icr54
\r
94 .GLOBAL _icr55, _icr56, _icr57, _icr58, _icr59, _icr60
\r
95 .GLOBAL _icr61, _icr62, _icr63, _rsrr, _stcr, _tbcr
\r
96 .GLOBAL _ctbr, _clkr, _wpr, _divr0, _divr1, _plldivm
\r
97 .GLOBAL _plldivn, _plldivg, _pllmulg, _pllctrl, _oscc1, _oscs1
\r
98 .GLOBAL _oscc2, _oscs2, _porten, _wtcer, _wtcr, _wtbr
\r
99 .GLOBAL _wthr, _wtmr, _wtsr, _csvtr, _csvcr, _cscfg
\r
100 .GLOBAL _cmcfg, _cucr, _cutd, _cutr1, _cutr2, _cmpr
\r
101 .GLOBAL _cmcr, _cmt1, _cmt2, _canpre, _canckd, _lvsel
\r
102 .GLOBAL _lvdet, _hwwde, _hwwd, _oscrh, _oscrl, _wpcrh
\r
103 .GLOBAL _wpcrl, _osccr, _regsel, _regctr, _modr, _pdrd14
\r
104 .GLOBAL _pdrd15, _pdrd16, _pdrd17, _pdrd18, _pdrd19, _pdrd20
\r
105 .GLOBAL _pdrd21, _pdrd22, _pdrd24, _pdrd26, _pdrd27, _pdrd28
\r
106 .GLOBAL _pdrd29, _ddr14, _ddr15, _ddr16, _ddr17, _ddr18
\r
107 .GLOBAL _ddr19, _ddr20, _ddr21, _ddr22, _ddr24, _ddr26
\r
108 .GLOBAL _ddr27, _ddr28, _ddr29, _pfr14, _pfr15, _pfr16
\r
109 .GLOBAL _pfr17, _pfr18, _pfr19, _pfr20, _pfr21, _pfr22
\r
110 .GLOBAL _pfr24, _pfr26, _pfr27, _pfr28, _pfr29, _epfr14
\r
111 .GLOBAL _epfr15, _epfr16, _epfr17, _epfr18, _epfr19, _epfr20
\r
112 .GLOBAL _epfr21, _epfr22, _epfr24, _epfr26, _epfr27, _epfr29
\r
113 .GLOBAL _podr14, _podr15, _podr16, _podr17, _podr18, _podr19
\r
114 .GLOBAL _podr20, _podr21, _podr22, _podr24, _podr26, _podr27
\r
115 .GLOBAL _podr28, _podr29, _pilr14, _pilr15, _pilr16, _pilr17
\r
116 .GLOBAL _pilr18, _pilr19, _pilr20, _pilr21, _pilr22, _pilr24
\r
117 .GLOBAL _pilr26, _pilr27, _pilr28, _pilr29, _epilr14, _epilr15
\r
118 .GLOBAL _epilr16, _epilr17, _epilr18, _epilr19, _epilr20, _epilr21
\r
119 .GLOBAL _epilr22, _epilr24, _epilr26, _epilr27, _epilr28, _epilr29
\r
120 .GLOBAL _pper14, _pper15, _pper16, _pper17, _pper18, _pper19
\r
121 .GLOBAL _pper20, _pper21, _pper22, _pper24, _pper26, _pper27
\r
122 .GLOBAL _pper28, _pper29, _ppcr14, _ppcr15, _ppcr16, _ppcr17
\r
123 .GLOBAL _ppcr18, _ppcr19, _ppcr20, _ppcr21, _ppcr22, _ppcr24
\r
124 .GLOBAL _ppcr26, _ppcr27, _ppcr28, _ppcr29, _dmasa0, _dmada0
\r
125 .GLOBAL _dmasa1, _dmada1, _dmasa2, _dmada2, _dmasa3, _dmada3
\r
126 .GLOBAL _dmasa4, _dmada4, _fmcs, _fmcr, _fchcr, _fmwt
\r
127 .GLOBAL _fmwt2, _fmps, _fmac, _fcha0, _fcha1, _fscr0
\r
128 .GLOBAL _fscr1, _ctrlr4, _statr4, _errcnt4, _btr4, _intr4
\r
129 .GLOBAL _testr4, _brper4, _brpe4, _if1creq4, _if1cmsk4, _if1msk124
\r
130 .GLOBAL _if1msk24, _if1msk14, _if1arb124, _if1arb24, _if1arb14, _if1mctr4
\r
131 .GLOBAL _if1dta124, _if1dta14, _if1dta24, _if1dtb124, _if1dtb14, _if1dtb24
\r
132 .GLOBAL _if1dta_swp124, _if1dta_swp24, _if1dta_swp14, _if1dtb_swp124, _if1dtb_swp24, _if1dtb_swp14
\r
133 .GLOBAL _if2creq4, _if2cmsk4, _if2msk124, _if2msk24, _if2msk14, _if2arb124
\r
134 .GLOBAL _if2arb24, _if2arb14, _if2mctr4, _if2dta124, _if2dta14, _if2dta24
\r
135 .GLOBAL _if2dtb124, _if2dtb14, _if2dtb24, _if2dta_swp124, _if2dta_swp24, _if2dta_swp14
\r
136 .GLOBAL _if2dtb_swp124, _if2dtb_swp24, _if2dtb_swp14, _treqr124, _treqr24, _treqr14
\r
137 .GLOBAL _treqr344, _newdt124, _newdt24, _newdt14, _intpnd124, _intpnd24
\r
138 .GLOBAL _intpnd14, _msgval124, _msgval24, _msgval14, _bctrl, _bstat
\r
139 .GLOBAL _biac, _boac, _birq, _bcr0, _bcr1, _bad0
\r
140 .GLOBAL _bad1, _bad2, _bad3, _bad4, _bad5, _bad6
\r
141 .GLOBAL _bad7, _fsv1, _bsv1, _fsv2, _bsv2
\r
143 _pdr14 .EQU 0x00000E
\r
144 PDR14 .EQU 0x00000E /* Port Data Register */
\r
145 _pdr15 .EQU 0x00000F
\r
146 PDR15 .EQU 0x00000F
\r
147 _pdr16 .EQU 0x000010
\r
148 PDR16 .EQU 0x000010
\r
149 _pdr17 .EQU 0x000011
\r
150 PDR17 .EQU 0x000011
\r
151 _pdr18 .EQU 0x000012
\r
152 PDR18 .EQU 0x000012
\r
153 _pdr19 .EQU 0x000013
\r
154 PDR19 .EQU 0x000013
\r
155 _pdr20 .EQU 0x000014
\r
156 PDR20 .EQU 0x000014
\r
157 _pdr21 .EQU 0x000015
\r
158 PDR21 .EQU 0x000015
\r
159 _pdr22 .EQU 0x000016
\r
160 PDR22 .EQU 0x000016
\r
161 _pdr24 .EQU 0x000018
\r
162 PDR24 .EQU 0x000018
\r
163 _pdr26 .EQU 0x00001A
\r
164 PDR26 .EQU 0x00001A
\r
165 _pdr27 .EQU 0x00001B
\r
166 PDR27 .EQU 0x00001B
\r
167 _pdr28 .EQU 0x00001C
\r
168 PDR28 .EQU 0x00001C
\r
169 _pdr29 .EQU 0x00001D
\r
170 PDR29 .EQU 0x00001D
\r
171 _eirr0 .EQU 0x000030
\r
172 EIRR0 .EQU 0x000030 /* External Interrupt 0-7 */
\r
173 _enir0 .EQU 0x000031
\r
174 ENIR0 .EQU 0x000031
\r
175 _elvr0 .EQU 0x000032
\r
176 ELVR0 .EQU 0x000032
\r
177 _eirr1 .EQU 0x000034
\r
178 EIRR1 .EQU 0x000034 /* External Interrupt 8-15 */
\r
179 _enir1 .EQU 0x000035
\r
180 ENIR1 .EQU 0x000035
\r
181 _elvr1 .EQU 0x000036
\r
182 ELVR1 .EQU 0x000036
\r
183 _dicr .EQU 0x000038
\r
184 DICR .EQU 0x000038 /* DLYI/I-unit */
\r
185 _hrcl .EQU 0x000039
\r
187 _rbsync .EQU 0x00003A
\r
188 RBSYNC .EQU 0x00003A /* R-Bus Sync */
\r
189 _scr00 .EQU 0x000040
\r
190 SCR00 .EQU 0x000040 /* USART (LIN) 0 */
\r
191 _smr00 .EQU 0x000041
\r
192 SMR00 .EQU 0x000041
\r
193 _ssr00 .EQU 0x000042
\r
194 SSR00 .EQU 0x000042
\r
195 _rdr00 .EQU 0x000043
\r
196 RDR00 .EQU 0x000043
\r
197 _tdr00 .EQU 0x000043
\r
198 TDR00 .EQU 0x000043
\r
199 _escr00 .EQU 0x000044
\r
200 ESCR00 .EQU 0x000044
\r
201 _eccr00 .EQU 0x000045
\r
202 ECCR00 .EQU 0x000045
\r
203 _scr01 .EQU 0x000048
\r
204 SCR01 .EQU 0x000048 /* USART (LIN) 1 */
\r
205 _smr01 .EQU 0x000049
\r
206 SMR01 .EQU 0x000049
\r
207 _ssr01 .EQU 0x00004A
\r
208 SSR01 .EQU 0x00004A
\r
209 _rdr01 .EQU 0x00004B
\r
210 RDR01 .EQU 0x00004B
\r
211 _tdr01 .EQU 0x00004B
\r
212 TDR01 .EQU 0x00004B
\r
213 _escr01 .EQU 0x00004C
\r
214 ESCR01 .EQU 0x00004C
\r
215 _eccr01 .EQU 0x00004D
\r
216 ECCR01 .EQU 0x00004D
\r
217 _scr02 .EQU 0x000050
\r
218 SCR02 .EQU 0x000050 /* USART (LIN) 2 */
\r
219 _smr02 .EQU 0x000051
\r
220 SMR02 .EQU 0x000051
\r
221 _ssr02 .EQU 0x000052
\r
222 SSR02 .EQU 0x000052
\r
223 _rdr02 .EQU 0x000053
\r
224 RDR02 .EQU 0x000053
\r
225 _tdr02 .EQU 0x000053
\r
226 TDR02 .EQU 0x000053
\r
227 _escr02 .EQU 0x000054
\r
228 ESCR02 .EQU 0x000054
\r
229 _eccr02 .EQU 0x000055
\r
230 ECCR02 .EQU 0x000055
\r
231 _scr03 .EQU 0x000058
\r
232 SCR03 .EQU 0x000058 /* USART (LIN) 3 */
\r
233 _smr03 .EQU 0x000059
\r
234 SMR03 .EQU 0x000059
\r
235 _ssr03 .EQU 0x00005A
\r
236 SSR03 .EQU 0x00005A
\r
237 _rdr03 .EQU 0x00005B
\r
238 RDR03 .EQU 0x00005B
\r
239 _tdr03 .EQU 0x00005B
\r
240 TDR03 .EQU 0x00005B
\r
241 _escr03 .EQU 0x00005C
\r
242 ESCR03 .EQU 0x00005C
\r
243 _eccr03 .EQU 0x00005D
\r
244 ECCR03 .EQU 0x00005D
\r
245 _scr04 .EQU 0x000060
\r
246 SCR04 .EQU 0x000060 /* USART (LIN) 4 with FIFO */
\r
247 _smr04 .EQU 0x000061
\r
248 SMR04 .EQU 0x000061
\r
249 _ssr04 .EQU 0x000062
\r
250 SSR04 .EQU 0x000062
\r
251 _rdr04 .EQU 0x000063
\r
252 RDR04 .EQU 0x000063
\r
253 _tdr04 .EQU 0x000063
\r
254 TDR04 .EQU 0x000063
\r
255 _escr04 .EQU 0x000064
\r
256 ESCR04 .EQU 0x000064
\r
257 _eccr04 .EQU 0x000065
\r
258 ECCR04 .EQU 0x000065
\r
259 _fsr04 .EQU 0x000066
\r
260 FSR04 .EQU 0x000066
\r
261 _fcr04 .EQU 0x000067
\r
262 FCR04 .EQU 0x000067
\r
263 _bgr00 .EQU 0x000080
\r
264 BGR00 .EQU 0x000080 /* Bauderate Generator USART (LIN) 0-7 */
\r
265 _bgr100 .EQU 0x000080
\r
266 BGR100 .EQU 0x000080
\r
267 _bgr000 .EQU 0x000081
\r
268 BGR000 .EQU 0x000081
\r
269 _bgr01 .EQU 0x000082
\r
270 BGR01 .EQU 0x000082
\r
271 _bgr101 .EQU 0x000082
\r
272 BGR101 .EQU 0x000082
\r
273 _bgr001 .EQU 0x000083
\r
274 BGR001 .EQU 0x000083
\r
275 _bgr02 .EQU 0x000084
\r
276 BGR02 .EQU 0x000084
\r
277 _bgr102 .EQU 0x000084
\r
278 BGR102 .EQU 0x000084
\r
279 _bgr002 .EQU 0x000085
\r
280 BGR002 .EQU 0x000085
\r
281 _bgr03 .EQU 0x000086
\r
282 BGR03 .EQU 0x000086
\r
283 _bgr103 .EQU 0x000086
\r
284 BGR103 .EQU 0x000086
\r
285 _bgr003 .EQU 0x000087
\r
286 BGR003 .EQU 0x000087
\r
287 _bgr04 .EQU 0x000088
\r
288 BGR04 .EQU 0x000088
\r
289 _bgr104 .EQU 0x000088
\r
290 BGR104 .EQU 0x000088
\r
291 _bgr004 .EQU 0x000089
\r
292 BGR004 .EQU 0x000089
\r
293 _ibcr0 .EQU 0x0000D0
\r
294 IBCR0 .EQU 0x0000D0 /* I2C 0 */
\r
295 _ibsr0 .EQU 0x0000D1
\r
296 IBSR0 .EQU 0x0000D1
\r
297 _itba0 .EQU 0x0000D2
\r
298 ITBA0 .EQU 0x0000D2
\r
299 _itbah0 .EQU 0x0000D2
\r
300 ITBAH0 .EQU 0x0000D2
\r
301 _itbal0 .EQU 0x0000D3
\r
302 ITBAL0 .EQU 0x0000D3
\r
303 _itmk0 .EQU 0x0000D4
\r
304 ITMK0 .EQU 0x0000D4
\r
305 _itmkh0 .EQU 0x0000D4
\r
306 ITMKH0 .EQU 0x0000D4
\r
307 _itmkl0 .EQU 0x0000D5
\r
308 ITMKL0 .EQU 0x0000D5
\r
309 _ismk0 .EQU 0x0000D6
\r
310 ISMK0 .EQU 0x0000D6
\r
311 _isba0 .EQU 0x0000D7
\r
312 ISBA0 .EQU 0x0000D7
\r
313 _idar0 .EQU 0x0000D9
\r
314 IDAR0 .EQU 0x0000D9
\r
315 _iccr0 .EQU 0x0000DA
\r
316 ICCR0 .EQU 0x0000DA
\r
317 _gcn10 .EQU 0x000100
\r
318 GCN10 .EQU 0x000100 /* PPG Control 0-3 */
\r
319 _gcn20 .EQU 0x000103
\r
320 GCN20 .EQU 0x000103
\r
321 _gcn11 .EQU 0x000104
\r
322 GCN11 .EQU 0x000104 /* PPG Control 4-7 */
\r
323 _gcn21 .EQU 0x000107
\r
324 GCN21 .EQU 0x000107
\r
325 _gcn12 .EQU 0x000108
\r
326 GCN12 .EQU 0x000108 /* PPG Control 8-11 */
\r
327 _gcn22 .EQU 0x00010B
\r
328 GCN22 .EQU 0x00010B
\r
329 _ptmr00 .EQU 0x000110
\r
330 PTMR00 .EQU 0x000110 /* PPG 0 */
\r
331 _pcsr00 .EQU 0x000112
\r
332 PCSR00 .EQU 0x000112
\r
333 _pdut00 .EQU 0x000114
\r
334 PDUT00 .EQU 0x000114
\r
335 _pcn00 .EQU 0x000116
\r
336 PCN00 .EQU 0x000116
\r
337 _pcnh00 .EQU 0x000116
\r
338 PCNH00 .EQU 0x000116
\r
339 _pcnl00 .EQU 0x000117
\r
340 PCNL00 .EQU 0x000117
\r
341 _ptmr01 .EQU 0x000118
\r
342 PTMR01 .EQU 0x000118 /* PPG 1 */
\r
343 _pcsr01 .EQU 0x00011A
\r
344 PCSR01 .EQU 0x00011A
\r
345 _pdut01 .EQU 0x00011C
\r
346 PDUT01 .EQU 0x00011C
\r
347 _pcn01 .EQU 0x00011E
\r
348 PCN01 .EQU 0x00011E
\r
349 _pcnh01 .EQU 0x00011E
\r
350 PCNH01 .EQU 0x00011E
\r
351 _pcnl01 .EQU 0x00011F
\r
352 PCNL01 .EQU 0x00011F
\r
353 _ptmr02 .EQU 0x000120
\r
354 PTMR02 .EQU 0x000120 /* PPG 2 */
\r
355 _pcsr02 .EQU 0x000122
\r
356 PCSR02 .EQU 0x000122
\r
357 _pdut02 .EQU 0x000124
\r
358 PDUT02 .EQU 0x000124
\r
359 _pcn02 .EQU 0x000126
\r
360 PCN02 .EQU 0x000126
\r
361 _pcnh02 .EQU 0x000126
\r
362 PCNH02 .EQU 0x000126
\r
363 _pcnl02 .EQU 0x000127
\r
364 PCNL02 .EQU 0x000127
\r
365 _ptmr03 .EQU 0x000128
\r
366 PTMR03 .EQU 0x000128 /* PPG 3 */
\r
367 _pcsr03 .EQU 0x00012A
\r
368 PCSR03 .EQU 0x00012A
\r
369 _pdut03 .EQU 0x00012C
\r
370 PDUT03 .EQU 0x00012C
\r
371 _pcn03 .EQU 0x00012E
\r
372 PCN03 .EQU 0x00012E
\r
373 _pcnh03 .EQU 0x00012E
\r
374 PCNH03 .EQU 0x00012E
\r
375 _pcnl03 .EQU 0x00012F
\r
376 PCNL03 .EQU 0x00012F
\r
377 _ptmr04 .EQU 0x000130
\r
378 PTMR04 .EQU 0x000130 /* PPG 4 */
\r
379 _pcsr04 .EQU 0x000132
\r
380 PCSR04 .EQU 0x000132
\r
381 _pdut04 .EQU 0x000134
\r
382 PDUT04 .EQU 0x000134
\r
383 _pcn04 .EQU 0x000136
\r
384 PCN04 .EQU 0x000136
\r
385 _pcnh04 .EQU 0x000136
\r
386 PCNH04 .EQU 0x000136
\r
387 _pcnl04 .EQU 0x000137
\r
388 PCNL04 .EQU 0x000137
\r
389 _ptmr05 .EQU 0x000138
\r
390 PTMR05 .EQU 0x000138 /* PPG 5 */
\r
391 _pcsr05 .EQU 0x00013A
\r
392 PCSR05 .EQU 0x00013A
\r
393 _pdut05 .EQU 0x00013C
\r
394 PDUT05 .EQU 0x00013C
\r
395 _pcn05 .EQU 0x00013E
\r
396 PCN05 .EQU 0x00013E
\r
397 _pcnh05 .EQU 0x00013E
\r
398 PCNH05 .EQU 0x00013E
\r
399 _pcnl05 .EQU 0x00013F
\r
400 PCNL05 .EQU 0x00013F
\r
401 _ptmr06 .EQU 0x000140
\r
402 PTMR06 .EQU 0x000140 /* PPG 6 */
\r
403 _pcsr06 .EQU 0x000142
\r
404 PCSR06 .EQU 0x000142
\r
405 _pdut06 .EQU 0x000144
\r
406 PDUT06 .EQU 0x000144
\r
407 _pcn06 .EQU 0x000146
\r
408 PCN06 .EQU 0x000146
\r
409 _pcnh06 .EQU 0x000146
\r
410 PCNH06 .EQU 0x000146
\r
411 _pcnl06 .EQU 0x000147
\r
412 PCNL06 .EQU 0x000147
\r
413 _ptmr07 .EQU 0x000148
\r
414 PTMR07 .EQU 0x000148 /* PPG 7 */
\r
415 _pcsr07 .EQU 0x00014A
\r
416 PCSR07 .EQU 0x00014A
\r
417 _pdut07 .EQU 0x00014C
\r
418 PDUT07 .EQU 0x00014C
\r
419 _pcn07 .EQU 0x00014E
\r
420 PCN07 .EQU 0x00014E
\r
421 _pcnh07 .EQU 0x00014E
\r
422 PCNH07 .EQU 0x00014E
\r
423 _pcnl07 .EQU 0x00014F
\r
424 PCNL07 .EQU 0x00014F
\r
425 _ptmr08 .EQU 0x000150
\r
426 PTMR08 .EQU 0x000150 /* PPG 8 */
\r
427 _pcsr08 .EQU 0x000152
\r
428 PCSR08 .EQU 0x000152
\r
429 _pdut08 .EQU 0x000154
\r
430 PDUT08 .EQU 0x000154
\r
431 _pcn08 .EQU 0x000156
\r
432 PCN08 .EQU 0x000156
\r
433 _pcnh08 .EQU 0x000156
\r
434 PCNH08 .EQU 0x000156
\r
435 _pcnl08 .EQU 0x000157
\r
436 PCNL08 .EQU 0x000157
\r
437 _ptmr09 .EQU 0x000158
\r
438 PTMR09 .EQU 0x000158 /* PPG 9 */
\r
439 _pcsr09 .EQU 0x00015A
\r
440 PCSR09 .EQU 0x00015A
\r
441 _pdut09 .EQU 0x00015C
\r
442 PDUT09 .EQU 0x00015C
\r
443 _pcn09 .EQU 0x00015E
\r
444 PCN09 .EQU 0x00015E
\r
445 _pcnh09 .EQU 0x00015E
\r
446 PCNH09 .EQU 0x00015E
\r
447 _pcnl09 .EQU 0x00015F
\r
448 PCNL09 .EQU 0x00015F
\r
449 _ptmr10 .EQU 0x000160
\r
450 PTMR10 .EQU 0x000160 /* PPG 10 */
\r
451 _pcsr10 .EQU 0x000162
\r
452 PCSR10 .EQU 0x000162
\r
453 _pdut10 .EQU 0x000164
\r
454 PDUT10 .EQU 0x000164
\r
455 _pcn10 .EQU 0x000166
\r
456 PCN10 .EQU 0x000166
\r
457 _pcnh10 .EQU 0x000166
\r
458 PCNH10 .EQU 0x000166
\r
459 _pcnl10 .EQU 0x000167
\r
460 PCNL10 .EQU 0x000167
\r
461 _ptmr11 .EQU 0x000168
\r
462 PTMR11 .EQU 0x000168 /* PPG 11 */
\r
463 _pcsr11 .EQU 0x00016A
\r
464 PCSR11 .EQU 0x00016A
\r
465 _pdut11 .EQU 0x00016C
\r
466 PDUT11 .EQU 0x00016C
\r
467 _pcn11 .EQU 0x00016E
\r
468 PCN11 .EQU 0x00016E
\r
469 _pcnh11 .EQU 0x00016E
\r
470 PCNH11 .EQU 0x00016E
\r
471 _pcnl11 .EQU 0x00016F
\r
472 PCNL11 .EQU 0x00016F
\r
473 _ics01 .EQU 0x000181
\r
474 ICS01 .EQU 0x000181 /* Input Capture 0-3 */
\r
475 _ics23 .EQU 0x000183
\r
476 ICS23 .EQU 0x000183
\r
477 _ipcp0 .EQU 0x000184
\r
478 IPCP0 .EQU 0x000184
\r
479 _ipcp1 .EQU 0x000186
\r
480 IPCP1 .EQU 0x000186
\r
481 _ipcp2 .EQU 0x000188
\r
482 IPCP2 .EQU 0x000188
\r
483 _ipcp3 .EQU 0x00018A
\r
484 IPCP3 .EQU 0x00018A
\r
485 _ocs01 .EQU 0x00018C
\r
486 OCS01 .EQU 0x00018C /* Output Compare 0-3 */
\r
487 _ocs23 .EQU 0x00018E
\r
488 OCS23 .EQU 0x00018E
\r
489 _occp0 .EQU 0x000190
\r
490 OCCP0 .EQU 0x000190
\r
491 _occp1 .EQU 0x000192
\r
492 OCCP1 .EQU 0x000192
\r
493 _occp2 .EQU 0x000194
\r
494 OCCP2 .EQU 0x000194
\r
495 _occp3 .EQU 0x000196
\r
496 OCCP3 .EQU 0x000196
\r
497 _aderh .EQU 0x0001A0
\r
498 ADERH .EQU 0x0001A0 /* ADC */
\r
499 _aderl .EQU 0x0001A2
\r
500 ADERL .EQU 0x0001A2
\r
501 _ader .EQU 0x0001A0
\r
503 _adcs1 .EQU 0x0001A4
\r
504 ADCS1 .EQU 0x0001A4
\r
505 _adcs0 .EQU 0x0001A5
\r
506 ADCS0 .EQU 0x0001A5
\r
507 _adcs .EQU 0x0001A4
\r
509 _adcr1 .EQU 0x0001A6
\r
510 ADCR1 .EQU 0x0001A6
\r
511 _adcr0 .EQU 0x0001A7
\r
512 ADCR0 .EQU 0x0001A7
\r
513 _adcr .EQU 0x0001A6
\r
515 _adct1 .EQU 0x0001A8
\r
516 ADCT1 .EQU 0x0001A8
\r
517 _adct0 .EQU 0x0001A9
\r
518 ADCT0 .EQU 0x0001A9
\r
519 _adct .EQU 0x0001A8
\r
521 _adsch .EQU 0x0001AA
\r
522 ADSCH .EQU 0x0001AA
\r
523 _adech .EQU 0x0001AB
\r
524 ADECH .EQU 0x0001AB
\r
525 _tmrlr0 .EQU 0x0001B0
\r
526 TMRLR0 .EQU 0x0001B0 /* Reload Timer 0 */
\r
527 _tmr0 .EQU 0x0001B2
\r
529 _tmcsr0 .EQU 0x0001B6
\r
530 TMCSR0 .EQU 0x0001B6
\r
531 _tmcsrh0 .EQU 0x0001B6
\r
532 TMCSRH0 .EQU 0x0001B6
\r
533 _tmcsrl0 .EQU 0x0001B7
\r
534 TMCSRL0 .EQU 0x0001B7
\r
535 _tmrlr1 .EQU 0x0001B8
\r
536 TMRLR1 .EQU 0x0001B8 /* Reload Timer 1 */
\r
537 _tmr1 .EQU 0x0001BA
\r
539 _tmcsr1 .EQU 0x0001BE
\r
540 TMCSR1 .EQU 0x0001BE
\r
541 _tmcsrh1 .EQU 0x0001BE
\r
542 TMCSRH1 .EQU 0x0001BE
\r
543 _tmcsrl1 .EQU 0x0001BF
\r
544 TMCSRL1 .EQU 0x0001BF
\r
545 _tmrlr2 .EQU 0x0001C0
\r
546 TMRLR2 .EQU 0x0001C0 /* Reload Timer 2 */
\r
547 _tmr2 .EQU 0x0001C2
\r
549 _tmcsr2 .EQU 0x0001C6
\r
550 TMCSR2 .EQU 0x0001C6
\r
551 _tmcsrh2 .EQU 0x0001C6
\r
552 TMCSRH2 .EQU 0x0001C6
\r
553 _tmcsrl2 .EQU 0x0001C7
\r
554 TMCSRL2 .EQU 0x0001C7
\r
555 _tmrlr3 .EQU 0x0001C8
\r
556 TMRLR3 .EQU 0x0001C8 /* Reload Timer 3 */
\r
557 _tmr3 .EQU 0x0001CA
\r
559 _tmcsr3 .EQU 0x0001CE
\r
560 TMCSR3 .EQU 0x0001CE
\r
561 _tmcsrh3 .EQU 0x0001CE
\r
562 TMCSRH3 .EQU 0x0001CE
\r
563 _tmcsrl3 .EQU 0x0001CF
\r
564 TMCSRL3 .EQU 0x0001CF
\r
565 _tmrlr4 .EQU 0x0001D0
\r
566 TMRLR4 .EQU 0x0001D0 /* Reload Timer 4 */
\r
567 _tmr4 .EQU 0x0001D2
\r
569 _tmcsr4 .EQU 0x0001D6
\r
570 TMCSR4 .EQU 0x0001D6
\r
571 _tmcsrh4 .EQU 0x0001D6
\r
572 TMCSRH4 .EQU 0x0001D6
\r
573 _tmcsrl4 .EQU 0x0001D7
\r
574 TMCSRL4 .EQU 0x0001D7
\r
575 _tmrlr5 .EQU 0x0001D8
\r
576 TMRLR5 .EQU 0x0001D8 /* Reload Timer 5 */
\r
577 _tmr5 .EQU 0x0001DA
\r
579 _tmcsr5 .EQU 0x0001DE
\r
580 TMCSR5 .EQU 0x0001DE
\r
581 _tmcsrh5 .EQU 0x0001DE
\r
582 TMCSRH5 .EQU 0x0001DE
\r
583 _tmcsrl5 .EQU 0x0001DF
\r
584 TMCSRL5 .EQU 0x0001DF
\r
585 _tmrlr6 .EQU 0x0001E0
\r
586 TMRLR6 .EQU 0x0001E0 /* Reload Timer 6 */
\r
587 _tmr6 .EQU 0x0001E2
\r
589 _tmcsr6 .EQU 0x0001E6
\r
590 TMCSR6 .EQU 0x0001E6
\r
591 _tmcsrh6 .EQU 0x0001E6
\r
592 TMCSRH6 .EQU 0x0001E6
\r
593 _tmcsrl6 .EQU 0x0001E7
\r
594 TMCSRL6 .EQU 0x0001E7
\r
595 _tmrlr7 .EQU 0x0001E8
\r
596 TMRLR7 .EQU 0x0001E8 /* Reload Timer 7 */
\r
597 _tmr7 .EQU 0x0001EA
\r
599 _tmcsr7 .EQU 0x0001EE
\r
600 TMCSR7 .EQU 0x0001EE
\r
601 _tmcsrh7 .EQU 0x0001EE
\r
602 TMCSRH7 .EQU 0x0001EE
\r
603 _tmcsrl7 .EQU 0x0001EF
\r
604 TMCSRL7 .EQU 0x0001EF
\r
605 _tcdt0 .EQU 0x0001F0
\r
606 TCDT0 .EQU 0x0001F0 /* Free Running Timer0 */
\r
607 _tccs0 .EQU 0x0001F3
\r
608 TCCS0 .EQU 0x0001F3
\r
609 _tcdt1 .EQU 0x0001F4
\r
610 TCDT1 .EQU 0x0001F4 /* Free Running Timer1 */
\r
611 _tccs1 .EQU 0x0001F7
\r
612 TCCS1 .EQU 0x0001F7
\r
613 _tcdt2 .EQU 0x0001F8
\r
614 TCDT2 .EQU 0x0001F8 /* Free Running Timer2 */
\r
615 _tccs2 .EQU 0x0001FB
\r
616 TCCS2 .EQU 0x0001FB
\r
617 _tcdt3 .EQU 0x0001FC
\r
618 TCDT3 .EQU 0x0001FC /* Free Running Timer3 */
\r
619 _tccs3 .EQU 0x0001FF
\r
620 TCCS3 .EQU 0x0001FF
\r
621 _dmaca0 .EQU 0x000200
\r
622 DMACA0 .EQU 0x000200 /* DMAC */
\r
623 _dmacb0 .EQU 0x000204
\r
624 DMACB0 .EQU 0x000204
\r
625 _dmaca1 .EQU 0x000208
\r
626 DMACA1 .EQU 0x000208
\r
627 _dmacb1 .EQU 0x00020C
\r
628 DMACB1 .EQU 0x00020C
\r
629 _dmaca2 .EQU 0x000210
\r
630 DMACA2 .EQU 0x000210
\r
631 _dmacb2 .EQU 0x000214
\r
632 DMACB2 .EQU 0x000214
\r
633 _dmaca3 .EQU 0x000218
\r
634 DMACA3 .EQU 0x000218
\r
635 _dmacb3 .EQU 0x00021C
\r
636 DMACB3 .EQU 0x00021C
\r
637 _dmaca4 .EQU 0x000220
\r
638 DMACA4 .EQU 0x000220
\r
639 _dmacb4 .EQU 0x000224
\r
640 DMACB4 .EQU 0x000224
\r
641 _dmacr .EQU 0x000240
\r
642 DMACR .EQU 0x000240
\r
643 _ics45 .EQU 0x0002D1
\r
644 ICS45 .EQU 0x0002D1 /* Input Capture 4-7 */
\r
645 _ics67 .EQU 0x0002D3
\r
646 ICS67 .EQU 0x0002D3
\r
647 _ipcp4 .EQU 0x0002D4
\r
648 IPCP4 .EQU 0x0002D4
\r
649 _ipcp5 .EQU 0x0002D6
\r
650 IPCP5 .EQU 0x0002D6
\r
651 _ipcp6 .EQU 0x0002D8
\r
652 IPCP6 .EQU 0x0002D8
\r
653 _ipcp7 .EQU 0x0002DA
\r
654 IPCP7 .EQU 0x0002DA
\r
655 _ocs45 .EQU 0x0002DC
\r
656 OCS45 .EQU 0x0002DC /* Output Compare 4-7 */
\r
657 _ocs67 .EQU 0x0002DE
\r
658 OCS67 .EQU 0x0002DE
\r
659 _occp4 .EQU 0x0002E0
\r
660 OCCP4 .EQU 0x0002E0
\r
661 _occp5 .EQU 0x0002E2
\r
662 OCCP5 .EQU 0x0002E2
\r
663 _occp6 .EQU 0x0002E4
\r
664 OCCP6 .EQU 0x0002E4
\r
665 _occp7 .EQU 0x0002E6
\r
666 OCCP7 .EQU 0x0002E6
\r
667 _tcdt4 .EQU 0x0002F0
\r
668 TCDT4 .EQU 0x0002F0 /* Free Running Timer4 */
\r
669 _tccs4 .EQU 0x0002F3
\r
670 TCCS4 .EQU 0x0002F3
\r
671 _tcdt5 .EQU 0x0002F4
\r
672 TCDT5 .EQU 0x0002F4 /* Free Running Timer5 */
\r
673 _tccs5 .EQU 0x0002F7
\r
674 TCCS5 .EQU 0x0002F7
\r
675 _tcdt6 .EQU 0x0002F8
\r
676 TCDT6 .EQU 0x0002F8 /* Free Running Timer6 */
\r
677 _tccs6 .EQU 0x0002FB
\r
678 TCCS6 .EQU 0x0002FB
\r
679 _tcdt7 .EQU 0x0002FC
\r
680 TCDT7 .EQU 0x0002FC /* Free Running Timer7 */
\r
681 _tccs7 .EQU 0x0002FF
\r
682 TCCS7 .EQU 0x0002FF
\r
683 _roms .EQU 0x000390
\r
684 ROMS .EQU 0x000390 /* ROM Select Register */
\r
685 _bsd0 .EQU 0x0003F0
\r
686 BSD0 .EQU 0x0003F0 /* Bit Search Module */
\r
687 _bsd1 .EQU 0x0003F4
\r
689 _bsdc .EQU 0x0003F8
\r
691 _bsrr .EQU 0x0003FC
\r
693 _icr00 .EQU 0x000440
\r
694 ICR00 .EQU 0x000440 /* Interrupt Control Unit */
\r
695 _icr01 .EQU 0x000441
\r
696 ICR01 .EQU 0x000441
\r
697 _icr02 .EQU 0x000442
\r
698 ICR02 .EQU 0x000442
\r
699 _icr03 .EQU 0x000443
\r
700 ICR03 .EQU 0x000443
\r
701 _icr04 .EQU 0x000444
\r
702 ICR04 .EQU 0x000444
\r
703 _icr05 .EQU 0x000445
\r
704 ICR05 .EQU 0x000445
\r
705 _icr06 .EQU 0x000446
\r
706 ICR06 .EQU 0x000446
\r
707 _icr07 .EQU 0x000447
\r
708 ICR07 .EQU 0x000447
\r
709 _icr08 .EQU 0x000448
\r
710 ICR08 .EQU 0x000448
\r
711 _icr09 .EQU 0x000449
\r
712 ICR09 .EQU 0x000449
\r
713 _icr10 .EQU 0x00044A
\r
714 ICR10 .EQU 0x00044A
\r
715 _icr11 .EQU 0x00044B
\r
716 ICR11 .EQU 0x00044B
\r
717 _icr12 .EQU 0x00044C
\r
718 ICR12 .EQU 0x00044C
\r
719 _icr13 .EQU 0x00044D
\r
720 ICR13 .EQU 0x00044D
\r
721 _icr14 .EQU 0x00044E
\r
722 ICR14 .EQU 0x00044E
\r
723 _icr15 .EQU 0x00044F
\r
724 ICR15 .EQU 0x00044F
\r
725 _icr16 .EQU 0x000450
\r
726 ICR16 .EQU 0x000450
\r
727 _icr17 .EQU 0x000451
\r
728 ICR17 .EQU 0x000451
\r
729 _icr18 .EQU 0x000452
\r
730 ICR18 .EQU 0x000452
\r
731 _icr19 .EQU 0x000453
\r
732 ICR19 .EQU 0x000453
\r
733 _icr20 .EQU 0x000454
\r
734 ICR20 .EQU 0x000454
\r
735 _icr21 .EQU 0x000455
\r
736 ICR21 .EQU 0x000455
\r
737 _icr22 .EQU 0x000456
\r
738 ICR22 .EQU 0x000456
\r
739 _icr23 .EQU 0x000457
\r
740 ICR23 .EQU 0x000457
\r
741 _icr24 .EQU 0x000458
\r
742 ICR24 .EQU 0x000458
\r
743 _icr25 .EQU 0x000459
\r
744 ICR25 .EQU 0x000459
\r
745 _icr26 .EQU 0x00045A
\r
746 ICR26 .EQU 0x00045A
\r
747 _icr27 .EQU 0x00045B
\r
748 ICR27 .EQU 0x00045B
\r
749 _icr28 .EQU 0x00045C
\r
750 ICR28 .EQU 0x00045C
\r
751 _icr29 .EQU 0x00045D
\r
752 ICR29 .EQU 0x00045D
\r
753 _icr30 .EQU 0x00045E
\r
754 ICR30 .EQU 0x00045E
\r
755 _icr31 .EQU 0x00045F
\r
756 ICR31 .EQU 0x00045F
\r
757 _icr32 .EQU 0x000460
\r
758 ICR32 .EQU 0x000460
\r
759 _icr33 .EQU 0x000461
\r
760 ICR33 .EQU 0x000461
\r
761 _icr34 .EQU 0x000462
\r
762 ICR34 .EQU 0x000462
\r
763 _icr35 .EQU 0x000463
\r
764 ICR35 .EQU 0x000463
\r
765 _icr36 .EQU 0x000464
\r
766 ICR36 .EQU 0x000464
\r
767 _icr37 .EQU 0x000465
\r
768 ICR37 .EQU 0x000465
\r
769 _icr38 .EQU 0x000466
\r
770 ICR38 .EQU 0x000466
\r
771 _icr39 .EQU 0x000467
\r
772 ICR39 .EQU 0x000467
\r
773 _icr40 .EQU 0x000468
\r
774 ICR40 .EQU 0x000468
\r
775 _icr41 .EQU 0x000469
\r
776 ICR41 .EQU 0x000469
\r
777 _icr42 .EQU 0x00046A
\r
778 ICR42 .EQU 0x00046A
\r
779 _icr43 .EQU 0x00046B
\r
780 ICR43 .EQU 0x00046B
\r
781 _icr44 .EQU 0x00046C
\r
782 ICR44 .EQU 0x00046C
\r
783 _icr45 .EQU 0x00046D
\r
784 ICR45 .EQU 0x00046D
\r
785 _icr46 .EQU 0x00046E
\r
786 ICR46 .EQU 0x00046E
\r
787 _icr47 .EQU 0x00046F
\r
788 ICR47 .EQU 0x00046F
\r
789 _icr48 .EQU 0x000470
\r
790 ICR48 .EQU 0x000470
\r
791 _icr49 .EQU 0x000471
\r
792 ICR49 .EQU 0x000471
\r
793 _icr50 .EQU 0x000472
\r
794 ICR50 .EQU 0x000472
\r
795 _icr51 .EQU 0x000473
\r
796 ICR51 .EQU 0x000473
\r
797 _icr52 .EQU 0x000474
\r
798 ICR52 .EQU 0x000474
\r
799 _icr53 .EQU 0x000475
\r
800 ICR53 .EQU 0x000475
\r
801 _icr54 .EQU 0x000476
\r
802 ICR54 .EQU 0x000476
\r
803 _icr55 .EQU 0x000477
\r
804 ICR55 .EQU 0x000477
\r
805 _icr56 .EQU 0x000478
\r
806 ICR56 .EQU 0x000478
\r
807 _icr57 .EQU 0x000479
\r
808 ICR57 .EQU 0x000479
\r
809 _icr58 .EQU 0x00047A
\r
810 ICR58 .EQU 0x00047A
\r
811 _icr59 .EQU 0x00047B
\r
812 ICR59 .EQU 0x00047B
\r
813 _icr60 .EQU 0x00047C
\r
814 ICR60 .EQU 0x00047C
\r
815 _icr61 .EQU 0x00047D
\r
816 ICR61 .EQU 0x00047D
\r
817 _icr62 .EQU 0x00047E
\r
818 ICR62 .EQU 0x00047E
\r
819 _icr63 .EQU 0x00047F
\r
820 ICR63 .EQU 0x00047F
\r
821 _rsrr .EQU 0x000480
\r
822 RSRR .EQU 0x000480 /* Clock Control Unit */
\r
823 _stcr .EQU 0x000481
\r
825 _tbcr .EQU 0x000482
\r
827 _ctbr .EQU 0x000483
\r
829 _clkr .EQU 0x000484
\r
833 _divr0 .EQU 0x000486
\r
834 DIVR0 .EQU 0x000486
\r
835 _divr1 .EQU 0x000487
\r
836 DIVR1 .EQU 0x000487
\r
837 _plldivm .EQU 0x00048C
\r
838 PLLDIVM .EQU 0x00048C /* PLL - Clock Gear Unit: */
\r
839 _plldivn .EQU 0x00048D
\r
840 PLLDIVN .EQU 0x00048D
\r
841 _plldivg .EQU 0x00048E
\r
842 PLLDIVG .EQU 0x00048E
\r
843 _pllmulg .EQU 0x00048F
\r
844 PLLMULG .EQU 0x00048F
\r
845 _pllctrl .EQU 0x000490
\r
846 PLLCTRL .EQU 0x000490
\r
847 _oscc1 .EQU 0x000494
\r
848 OSCC1 .EQU 0x000494 /* Main/Sub Oscillator Control */
\r
849 _oscs1 .EQU 0x000495
\r
850 OSCS1 .EQU 0x000495
\r
851 _oscc2 .EQU 0x000496
\r
852 OSCC2 .EQU 0x000496
\r
853 _oscs2 .EQU 0x000497
\r
854 OSCS2 .EQU 0x000497
\r
855 _porten .EQU 0x000498
\r
856 PORTEN .EQU 0x000498 /* Port Input Enable Control */
\r
857 _wtcer .EQU 0x0004A1
\r
858 WTCER .EQU 0x0004A1 /* Real Time Clock (Watch Timer) */
\r
859 _wtcr .EQU 0x0004A2
\r
861 _wtbr .EQU 0x0004A4
\r
863 _wthr .EQU 0x0004A8
\r
865 _wtmr .EQU 0x0004A9
\r
867 _wtsr .EQU 0x0004AA
\r
869 _csvtr .EQU 0x0004AC
\r
870 CSVTR .EQU 0x0004AC /* Clock-Supervisor / Selecor / Monitor */
\r
871 _csvcr .EQU 0x0004AD
\r
872 CSVCR .EQU 0x0004AD
\r
873 _cscfg .EQU 0x0004AE
\r
874 CSCFG .EQU 0x0004AE
\r
875 _cmcfg .EQU 0x0004AF
\r
876 CMCFG .EQU 0x0004AF
\r
877 _cucr .EQU 0x0004B0
\r
878 CUCR .EQU 0x0004B0 /* Calibration Unit of Sub Oszillation */
\r
879 _cutd .EQU 0x0004B2
\r
881 _cutr1 .EQU 0x0004B4
\r
882 CUTR1 .EQU 0x0004B4
\r
883 _cutr2 .EQU 0x0004B6
\r
884 CUTR2 .EQU 0x0004B6
\r
885 _cmpr .EQU 0x0004B8
\r
886 CMPR .EQU 0x0004B8 /* Clock Modulator */
\r
887 _cmcr .EQU 0x0004BB
\r
889 _cmt1 .EQU 0x0004BC
\r
891 _cmt2 .EQU 0x0004BE
\r
893 _canpre .EQU 0x0004C0
\r
894 CANPRE .EQU 0x0004C0 /* CAN clock control */
\r
895 _canckd .EQU 0x0004C1
\r
896 CANCKD .EQU 0x0004C1
\r
897 _lvsel .EQU 0x0004C4
\r
898 LVSEL .EQU 0x0004C4 /* LV Detection / Hardware-Watchdog */
\r
899 _lvdet .EQU 0x0004C5
\r
900 LVDET .EQU 0x0004C5
\r
901 _hwwde .EQU 0x0004C6
\r
902 HWWDE .EQU 0x0004C6
\r
903 _hwwd .EQU 0x0004C7
\r
905 _oscrh .EQU 0x0004C8
\r
906 OSCRH .EQU 0x0004C8 /* Main-/Sub-Oscillatio Stabilization Timer */
\r
907 _oscrl .EQU 0x0004C9
\r
908 OSCRL .EQU 0x0004C9
\r
909 _wpcrh .EQU 0x0004CA
\r
910 WPCRH .EQU 0x0004CA
\r
911 _wpcrl .EQU 0x0004CB
\r
912 WPCRL .EQU 0x0004CB
\r
913 _osccr .EQU 0x0004CC
\r
914 OSCCR .EQU 0x0004CC /* Main-/Sub-Oscillatio Standby Control */
\r
915 _regsel .EQU 0x0004CE
\r
916 REGSEL .EQU 0x0004CE
\r
917 _regctr .EQU 0x0004CF
\r
918 REGCTR .EQU 0x0004CF
\r
919 _modr .EQU 0x0007FD
\r
920 MODR .EQU 0x0007FD /* Mode Register */
\r
921 _pdrd14 .EQU 0x000D0E
\r
922 PDRD14 .EQU 0x000D0E /* R-bus Port Data Direct Read Register */
\r
923 _pdrd15 .EQU 0x000D0F
\r
924 PDRD15 .EQU 0x000D0F
\r
925 _pdrd16 .EQU 0x000D10
\r
926 PDRD16 .EQU 0x000D10
\r
927 _pdrd17 .EQU 0x000D11
\r
928 PDRD17 .EQU 0x000D11
\r
929 _pdrd18 .EQU 0x000D12
\r
930 PDRD18 .EQU 0x000D12
\r
931 _pdrd19 .EQU 0x000D13
\r
932 PDRD19 .EQU 0x000D13
\r
933 _pdrd20 .EQU 0x000D14
\r
934 PDRD20 .EQU 0x000D14
\r
935 _pdrd21 .EQU 0x000D15
\r
936 PDRD21 .EQU 0x000D15
\r
937 _pdrd22 .EQU 0x000D16
\r
938 PDRD22 .EQU 0x000D16
\r
939 _pdrd24 .EQU 0x000D18
\r
940 PDRD24 .EQU 0x000D18
\r
941 _pdrd26 .EQU 0x000D1A
\r
942 PDRD26 .EQU 0x000D1A
\r
943 _pdrd27 .EQU 0x000D1B
\r
944 PDRD27 .EQU 0x000D1B
\r
945 _pdrd28 .EQU 0x000D1C
\r
946 PDRD28 .EQU 0x000D1C
\r
947 _pdrd29 .EQU 0x000D1D
\r
948 PDRD29 .EQU 0x000D1D
\r
949 _ddr14 .EQU 0x000D4E
\r
950 DDR14 .EQU 0x000D4E /* R-bus Port Direction Register */
\r
951 _ddr15 .EQU 0x000D4F
\r
952 DDR15 .EQU 0x000D4F
\r
953 _ddr16 .EQU 0x000D50
\r
954 DDR16 .EQU 0x000D50
\r
955 _ddr17 .EQU 0x000D51
\r
956 DDR17 .EQU 0x000D51
\r
957 _ddr18 .EQU 0x000D52
\r
958 DDR18 .EQU 0x000D52
\r
959 _ddr19 .EQU 0x000D53
\r
960 DDR19 .EQU 0x000D53
\r
961 _ddr20 .EQU 0x000D54
\r
962 DDR20 .EQU 0x000D54
\r
963 _ddr21 .EQU 0x000D55
\r
964 DDR21 .EQU 0x000D55
\r
965 _ddr22 .EQU 0x000D56
\r
966 DDR22 .EQU 0x000D56
\r
967 _ddr24 .EQU 0x000D58
\r
968 DDR24 .EQU 0x000D58
\r
969 _ddr26 .EQU 0x000D5A
\r
970 DDR26 .EQU 0x000D5A
\r
971 _ddr27 .EQU 0x000D5B
\r
972 DDR27 .EQU 0x000D5B
\r
973 _ddr28 .EQU 0x000D5C
\r
974 DDR28 .EQU 0x000D5C
\r
975 _ddr29 .EQU 0x000D5D
\r
976 DDR29 .EQU 0x000D5D
\r
977 _pfr14 .EQU 0x000D8E
\r
978 PFR14 .EQU 0x000D8E /* R-bus Port Function Register */
\r
979 _pfr15 .EQU 0x000D8F
\r
980 PFR15 .EQU 0x000D8F
\r
981 _pfr16 .EQU 0x000D90
\r
982 PFR16 .EQU 0x000D90
\r
983 _pfr17 .EQU 0x000D91
\r
984 PFR17 .EQU 0x000D91
\r
985 _pfr18 .EQU 0x000D92
\r
986 PFR18 .EQU 0x000D92
\r
987 _pfr19 .EQU 0x000D93
\r
988 PFR19 .EQU 0x000D93
\r
989 _pfr20 .EQU 0x000D94
\r
990 PFR20 .EQU 0x000D94
\r
991 _pfr21 .EQU 0x000D95
\r
992 PFR21 .EQU 0x000D95
\r
993 _pfr22 .EQU 0x000D96
\r
994 PFR22 .EQU 0x000D96
\r
995 _pfr24 .EQU 0x000D98
\r
996 PFR24 .EQU 0x000D98
\r
997 _pfr26 .EQU 0x000D9A
\r
998 PFR26 .EQU 0x000D9A
\r
999 _pfr27 .EQU 0x000D9B
\r
1000 PFR27 .EQU 0x000D9B
\r
1001 _pfr28 .EQU 0x000D9C
\r
1002 PFR28 .EQU 0x000D9C
\r
1003 _pfr29 .EQU 0x000D9D
\r
1004 PFR29 .EQU 0x000D9D
\r
1005 _epfr14 .EQU 0x000DCE
\r
1006 EPFR14 .EQU 0x000DCE /* R-bus Port Extra Function Register */
\r
1007 _epfr15 .EQU 0x000DCF
\r
1008 EPFR15 .EQU 0x000DCF
\r
1009 _epfr16 .EQU 0x000DD0
\r
1010 EPFR16 .EQU 0x000DD0
\r
1011 _epfr17 .EQU 0x000DD1
\r
1012 EPFR17 .EQU 0x000DD1
\r
1013 _epfr18 .EQU 0x000DD2
\r
1014 EPFR18 .EQU 0x000DD2
\r
1015 _epfr19 .EQU 0x000DD3
\r
1016 EPFR19 .EQU 0x000DD3
\r
1017 _epfr20 .EQU 0x000DD4
\r
1018 EPFR20 .EQU 0x000DD4
\r
1019 _epfr21 .EQU 0x000DD5
\r
1020 EPFR21 .EQU 0x000DD5
\r
1021 _epfr22 .EQU 0x000DD6
\r
1022 EPFR22 .EQU 0x000DD6
\r
1023 _epfr24 .EQU 0x000DD8
\r
1024 EPFR24 .EQU 0x000DD8
\r
1025 _epfr26 .EQU 0x000DDA
\r
1026 EPFR26 .EQU 0x000DDA
\r
1027 _epfr27 .EQU 0x000DDB
\r
1028 EPFR27 .EQU 0x000DDB
\r
1029 _epfr29 .EQU 0x000DDD
\r
1030 EPFR29 .EQU 0x000DDD
\r
1031 _podr14 .EQU 0x000E0E
\r
1032 PODR14 .EQU 0x000E0E /* R-bus Port Output Drive Select Register */
\r
1033 _podr15 .EQU 0x000E0F
\r
1034 PODR15 .EQU 0x000E0F
\r
1035 _podr16 .EQU 0x000E10
\r
1036 PODR16 .EQU 0x000E10
\r
1037 _podr17 .EQU 0x000E11
\r
1038 PODR17 .EQU 0x000E11
\r
1039 _podr18 .EQU 0x000E12
\r
1040 PODR18 .EQU 0x000E12
\r
1041 _podr19 .EQU 0x000E13
\r
1042 PODR19 .EQU 0x000E13
\r
1043 _podr20 .EQU 0x000E14
\r
1044 PODR20 .EQU 0x000E14
\r
1045 _podr21 .EQU 0x000E15
\r
1046 PODR21 .EQU 0x000E15
\r
1047 _podr22 .EQU 0x000E16
\r
1048 PODR22 .EQU 0x000E16
\r
1049 _podr24 .EQU 0x000E18
\r
1050 PODR24 .EQU 0x000E18
\r
1051 _podr26 .EQU 0x000E1A
\r
1052 PODR26 .EQU 0x000E1A
\r
1053 _podr27 .EQU 0x000E1B
\r
1054 PODR27 .EQU 0x000E1B
\r
1055 _podr28 .EQU 0x000E1C
\r
1056 PODR28 .EQU 0x000E1C
\r
1057 _podr29 .EQU 0x000E1D
\r
1058 PODR29 .EQU 0x000E1D
\r
1059 _pilr14 .EQU 0x000E4E
\r
1060 PILR14 .EQU 0x000E4E /* R-bus Port Input Level Select Register */
\r
1061 _pilr15 .EQU 0x000E4F
\r
1062 PILR15 .EQU 0x000E4F
\r
1063 _pilr16 .EQU 0x000E50
\r
1064 PILR16 .EQU 0x000E50
\r
1065 _pilr17 .EQU 0x000E51
\r
1066 PILR17 .EQU 0x000E51
\r
1067 _pilr18 .EQU 0x000E52
\r
1068 PILR18 .EQU 0x000E52
\r
1069 _pilr19 .EQU 0x000E53
\r
1070 PILR19 .EQU 0x000E53
\r
1071 _pilr20 .EQU 0x000E54
\r
1072 PILR20 .EQU 0x000E54
\r
1073 _pilr21 .EQU 0x000E55
\r
1074 PILR21 .EQU 0x000E55
\r
1075 _pilr22 .EQU 0x000E56
\r
1076 PILR22 .EQU 0x000E56
\r
1077 _pilr24 .EQU 0x000E58
\r
1078 PILR24 .EQU 0x000E58
\r
1079 _pilr26 .EQU 0x000E5A
\r
1080 PILR26 .EQU 0x000E5A
\r
1081 _pilr27 .EQU 0x000E5B
\r
1082 PILR27 .EQU 0x000E5B
\r
1083 _pilr28 .EQU 0x000E5C
\r
1084 PILR28 .EQU 0x000E5C
\r
1085 _pilr29 .EQU 0x000E5D
\r
1086 PILR29 .EQU 0x000E5D
\r
1087 _epilr14 .EQU 0x000E8E
\r
1088 EPILR14 .EQU 0x000E8E /* R-bus Port Extra Input Level Select Register */
\r
1089 _epilr15 .EQU 0x000E8F
\r
1090 EPILR15 .EQU 0x000E8F
\r
1091 _epilr16 .EQU 0x000E90
\r
1092 EPILR16 .EQU 0x000E90
\r
1093 _epilr17 .EQU 0x000E91
\r
1094 EPILR17 .EQU 0x000E91
\r
1095 _epilr18 .EQU 0x000E92
\r
1096 EPILR18 .EQU 0x000E92
\r
1097 _epilr19 .EQU 0x000E93
\r
1098 EPILR19 .EQU 0x000E93
\r
1099 _epilr20 .EQU 0x000E94
\r
1100 EPILR20 .EQU 0x000E94
\r
1101 _epilr21 .EQU 0x000E95
\r
1102 EPILR21 .EQU 0x000E95
\r
1103 _epilr22 .EQU 0x000E96
\r
1104 EPILR22 .EQU 0x000E96
\r
1105 _epilr24 .EQU 0x000E98
\r
1106 EPILR24 .EQU 0x000E98
\r
1107 _epilr26 .EQU 0x000E9A
\r
1108 EPILR26 .EQU 0x000E9A
\r
1109 _epilr27 .EQU 0x000E9B
\r
1110 EPILR27 .EQU 0x000E9B
\r
1111 _epilr28 .EQU 0x000E9C
\r
1112 EPILR28 .EQU 0x000E9C
\r
1113 _epilr29 .EQU 0x000E9D
\r
1114 EPILR29 .EQU 0x000E9D
\r
1115 _pper14 .EQU 0x000ECE
\r
1116 PPER14 .EQU 0x000ECE /* R-bus Port Pull-Up/Down Enable Register */
\r
1117 _pper15 .EQU 0x000ECF
\r
1118 PPER15 .EQU 0x000ECF
\r
1119 _pper16 .EQU 0x000ED0
\r
1120 PPER16 .EQU 0x000ED0
\r
1121 _pper17 .EQU 0x000ED1
\r
1122 PPER17 .EQU 0x000ED1
\r
1123 _pper18 .EQU 0x000ED1
\r
1124 PPER18 .EQU 0x000ED1
\r
1125 _pper19 .EQU 0x000ED2
\r
1126 PPER19 .EQU 0x000ED2
\r
1127 _pper20 .EQU 0x000ED4
\r
1128 PPER20 .EQU 0x000ED4
\r
1129 _pper21 .EQU 0x000ED5
\r
1130 PPER21 .EQU 0x000ED5
\r
1131 _pper22 .EQU 0x000ED6
\r
1132 PPER22 .EQU 0x000ED6
\r
1133 _pper24 .EQU 0x000ED8
\r
1134 PPER24 .EQU 0x000ED8
\r
1135 _pper26 .EQU 0x000EDA
\r
1136 PPER26 .EQU 0x000EDA
\r
1137 _pper27 .EQU 0x000EDB
\r
1138 PPER27 .EQU 0x000EDB
\r
1139 _pper28 .EQU 0x000EDC
\r
1140 PPER28 .EQU 0x000EDC
\r
1141 _pper29 .EQU 0x000EDD
\r
1142 PPER29 .EQU 0x000EDD
\r
1143 _ppcr14 .EQU 0x000F0E
\r
1144 PPCR14 .EQU 0x000F0E /* R-bus Port Pull-Up/Down Control Register */
\r
1145 _ppcr15 .EQU 0x000F0F
\r
1146 PPCR15 .EQU 0x000F0F
\r
1147 _ppcr16 .EQU 0x000F10
\r
1148 PPCR16 .EQU 0x000F10
\r
1149 _ppcr17 .EQU 0x000F11
\r
1150 PPCR17 .EQU 0x000F11
\r
1151 _ppcr18 .EQU 0x000F12
\r
1152 PPCR18 .EQU 0x000F12
\r
1153 _ppcr19 .EQU 0x000F13
\r
1154 PPCR19 .EQU 0x000F13
\r
1155 _ppcr20 .EQU 0x000F14
\r
1156 PPCR20 .EQU 0x000F14
\r
1157 _ppcr21 .EQU 0x000F15
\r
1158 PPCR21 .EQU 0x000F15
\r
1159 _ppcr22 .EQU 0x000F16
\r
1160 PPCR22 .EQU 0x000F16
\r
1161 _ppcr24 .EQU 0x000F18
\r
1162 PPCR24 .EQU 0x000F18
\r
1163 _ppcr26 .EQU 0x000F1A
\r
1164 PPCR26 .EQU 0x000F1A
\r
1165 _ppcr27 .EQU 0x000F1B
\r
1166 PPCR27 .EQU 0x000F1B
\r
1167 _ppcr28 .EQU 0x000F1C
\r
1168 PPCR28 .EQU 0x000F1C
\r
1169 _ppcr29 .EQU 0x000F1D
\r
1170 PPCR29 .EQU 0x000F1D
\r
1171 _dmasa0 .EQU 0x001000
\r
1172 DMASA0 .EQU 0x001000 /* DMAC */
\r
1173 _dmada0 .EQU 0x001004
\r
1174 DMADA0 .EQU 0x001004
\r
1175 _dmasa1 .EQU 0x001008
\r
1176 DMASA1 .EQU 0x001008
\r
1177 _dmada1 .EQU 0x00100C
\r
1178 DMADA1 .EQU 0x00100C
\r
1179 _dmasa2 .EQU 0x001010
\r
1180 DMASA2 .EQU 0x001010
\r
1181 _dmada2 .EQU 0x001014
\r
1182 DMADA2 .EQU 0x001014
\r
1183 _dmasa3 .EQU 0x001018
\r
1184 DMASA3 .EQU 0x001018
\r
1185 _dmada3 .EQU 0x00101C
\r
1186 DMADA3 .EQU 0x00101C
\r
1187 _dmasa4 .EQU 0x001020
\r
1188 DMASA4 .EQU 0x001020
\r
1189 _dmada4 .EQU 0x001024
\r
1190 DMADA4 .EQU 0x001024
\r
1191 _fmcs .EQU 0x007000
\r
1192 FMCS .EQU 0x007000 /* Flash Memory/I-Cache Control Register */
\r
1193 _fmcr .EQU 0x007001
\r
1194 FMCR .EQU 0x007001
\r
1195 _fchcr .EQU 0x007002
\r
1196 FCHCR .EQU 0x007002
\r
1197 _fmwt .EQU 0x007004
\r
1198 FMWT .EQU 0x007004
\r
1199 _fmwt2 .EQU 0x007006
\r
1200 FMWT2 .EQU 0x007006
\r
1201 _fmps .EQU 0x007007
\r
1202 FMPS .EQU 0x007007
\r
1203 _fmac .EQU 0x007008
\r
1204 FMAC .EQU 0x007008
\r
1205 _fcha0 .EQU 0x00700C
\r
1206 FCHA0 .EQU 0x00700C /* I_Cache Nonchachable area settings Register */
\r
1207 _fcha1 .EQU 0x007010
\r
1208 FCHA1 .EQU 0x007010
\r
1209 _fscr0 .EQU 0x007100
\r
1210 FSCR0 .EQU 0x007100 /* Flash Security Control Register */
\r
1211 _fscr1 .EQU 0x007104
\r
1212 FSCR1 .EQU 0x007104
\r
1213 _ctrlr4 .EQU 0x00C400
\r
1214 CTRLR4 .EQU 0x00C400 /* CAN 4 Control Register */
\r
1215 _statr4 .EQU 0x00C402
\r
1216 STATR4 .EQU 0x00C402
\r
1217 _errcnt4 .EQU 0x00C404
\r
1218 ERRCNT4 .EQU 0x00C404
\r
1219 _btr4 .EQU 0x00C406
\r
1220 BTR4 .EQU 0x00C406
\r
1221 _intr4 .EQU 0x00C408
\r
1222 INTR4 .EQU 0x00C408
\r
1223 _testr4 .EQU 0x00C40A
\r
1224 TESTR4 .EQU 0x00C40A
\r
1225 _brper4 .EQU 0x00C40C
\r
1226 BRPER4 .EQU 0x00C40C
\r
1227 _brpe4 .EQU 0x00C40C
\r
1228 BRPE4 .EQU 0x00C40C
\r
1229 _if1creq4 .EQU 0x00C410
\r
1230 IF1CREQ4 .EQU 0x00C410 /* CAN 4 IF 1 */
\r
1231 _if1cmsk4 .EQU 0x00C412
\r
1232 IF1CMSK4 .EQU 0x00C412
\r
1233 _if1msk124 .EQU 0x00C414
\r
1234 IF1MSK124 .EQU 0x00C414
\r
1235 _if1msk24 .EQU 0x00C414
\r
1236 IF1MSK24 .EQU 0x00C414
\r
1237 _if1msk14 .EQU 0x00C416
\r
1238 IF1MSK14 .EQU 0x00C416
\r
1239 _if1arb124 .EQU 0x00C418
\r
1240 IF1ARB124 .EQU 0x00C418
\r
1241 _if1arb24 .EQU 0x00C418
\r
1242 IF1ARB24 .EQU 0x00C418
\r
1243 _if1arb14 .EQU 0x00C41A
\r
1244 IF1ARB14 .EQU 0x00C41A
\r
1245 _if1mctr4 .EQU 0x00C41C
\r
1246 IF1MCTR4 .EQU 0x00C41C
\r
1247 _if1dta124 .EQU 0x00C420
\r
1248 IF1DTA124 .EQU 0x00C420
\r
1249 _if1dta14 .EQU 0x00C420
\r
1250 IF1DTA14 .EQU 0x00C420
\r
1251 _if1dta24 .EQU 0x00C422
\r
1252 IF1DTA24 .EQU 0x00C422
\r
1253 _if1dtb124 .EQU 0x00C424
\r
1254 IF1DTB124 .EQU 0x00C424
\r
1255 _if1dtb14 .EQU 0x00C424
\r
1256 IF1DTB14 .EQU 0x00C424
\r
1257 _if1dtb24 .EQU 0x00C426
\r
1258 IF1DTB24 .EQU 0x00C426
\r
1259 _if1dta_swp124 .EQU 0x00C430
\r
1260 IF1DTA_SWP124 .EQU 0x00C430
\r
1261 _if1dta_swp24 .EQU 0x00C430
\r
1262 IF1DTA_SWP24 .EQU 0x00C430
\r
1263 _if1dta_swp14 .EQU 0x00C432
\r
1264 IF1DTA_SWP14 .EQU 0x00C432
\r
1265 _if1dtb_swp124 .EQU 0x00C434
\r
1266 IF1DTB_SWP124 .EQU 0x00C434
\r
1267 _if1dtb_swp24 .EQU 0x00C434
\r
1268 IF1DTB_SWP24 .EQU 0x00C434
\r
1269 _if1dtb_swp14 .EQU 0x00C436
\r
1270 IF1DTB_SWP14 .EQU 0x00C436
\r
1271 _if2creq4 .EQU 0x00C440
\r
1272 IF2CREQ4 .EQU 0x00C440 /* CAN 4 IF 2 */
\r
1273 _if2cmsk4 .EQU 0x00C442
\r
1274 IF2CMSK4 .EQU 0x00C442
\r
1275 _if2msk124 .EQU 0x00C444
\r
1276 IF2MSK124 .EQU 0x00C444
\r
1277 _if2msk24 .EQU 0x00C444
\r
1278 IF2MSK24 .EQU 0x00C444
\r
1279 _if2msk14 .EQU 0x00C446
\r
1280 IF2MSK14 .EQU 0x00C446
\r
1281 _if2arb124 .EQU 0x00C448
\r
1282 IF2ARB124 .EQU 0x00C448
\r
1283 _if2arb24 .EQU 0x00C448
\r
1284 IF2ARB24 .EQU 0x00C448
\r
1285 _if2arb14 .EQU 0x00C44A
\r
1286 IF2ARB14 .EQU 0x00C44A
\r
1287 _if2mctr4 .EQU 0x00C44C
\r
1288 IF2MCTR4 .EQU 0x00C44C
\r
1289 _if2dta124 .EQU 0x00C450
\r
1290 IF2DTA124 .EQU 0x00C450
\r
1291 _if2dta14 .EQU 0x00C450
\r
1292 IF2DTA14 .EQU 0x00C450
\r
1293 _if2dta24 .EQU 0x00C452
\r
1294 IF2DTA24 .EQU 0x00C452
\r
1295 _if2dtb124 .EQU 0x00C454
\r
1296 IF2DTB124 .EQU 0x00C454
\r
1297 _if2dtb14 .EQU 0x00C454
\r
1298 IF2DTB14 .EQU 0x00C454
\r
1299 _if2dtb24 .EQU 0x00C456
\r
1300 IF2DTB24 .EQU 0x00C456
\r
1301 _if2dta_swp124 .EQU 0x00C460
\r
1302 IF2DTA_SWP124 .EQU 0x00C460
\r
1303 _if2dta_swp24 .EQU 0x00C460
\r
1304 IF2DTA_SWP24 .EQU 0x00C460
\r
1305 _if2dta_swp14 .EQU 0x00C462
\r
1306 IF2DTA_SWP14 .EQU 0x00C462
\r
1307 _if2dtb_swp124 .EQU 0x00C464
\r
1308 IF2DTB_SWP124 .EQU 0x00C464
\r
1309 _if2dtb_swp24 .EQU 0x00C464
\r
1310 IF2DTB_SWP24 .EQU 0x00C464
\r
1311 _if2dtb_swp14 .EQU 0x00C466
\r
1312 IF2DTB_SWP14 .EQU 0x00C466
\r
1313 _treqr124 .EQU 0x00C480
\r
1314 TREQR124 .EQU 0x00C480 /* CAN 4 Status Flags */
\r
1315 _treqr24 .EQU 0x00C480
\r
1316 TREQR24 .EQU 0x00C480
\r
1317 _treqr14 .EQU 0x00C482
\r
1318 TREQR14 .EQU 0x00C482
\r
1319 _treqr344 .EQU 0x00C484
\r
1320 TREQR344 .EQU 0x00C484
\r
1321 _newdt124 .EQU 0x00C490
\r
1322 NEWDT124 .EQU 0x00C490
\r
1323 _newdt24 .EQU 0x00C490
\r
1324 NEWDT24 .EQU 0x00C490
\r
1325 _newdt14 .EQU 0x00C492
\r
1326 NEWDT14 .EQU 0x00C492
\r
1327 _intpnd124 .EQU 0x00C4A0
\r
1328 INTPND124 .EQU 0x00C4A0
\r
1329 _intpnd24 .EQU 0x00C4A0
\r
1330 INTPND24 .EQU 0x00C4A0
\r
1331 _intpnd14 .EQU 0x00C4A2
\r
1332 INTPND14 .EQU 0x00C4A2
\r
1333 _msgval124 .EQU 0x00C4B0
\r
1334 MSGVAL124 .EQU 0x00C4B0
\r
1335 _msgval24 .EQU 0x00C4B0
\r
1336 MSGVAL24 .EQU 0x00C4B0
\r
1337 _msgval14 .EQU 0x00C4B2
\r
1338 MSGVAL14 .EQU 0x00C4B2
\r
1339 _bctrl .EQU 0x00F000
\r
1340 BCTRL .EQU 0x00F000 /* EDSU/MPU Registers */
\r
1341 _bstat .EQU 0x00F004
\r
1342 BSTAT .EQU 0x00F004
\r
1343 _biac .EQU 0x00F008
\r
1344 BIAC .EQU 0x00F008
\r
1345 _boac .EQU 0x00F00C
\r
1346 BOAC .EQU 0x00F00C
\r
1347 _birq .EQU 0x00F010
\r
1348 BIRQ .EQU 0x00F010
\r
1349 _bcr0 .EQU 0x00F020
\r
1350 BCR0 .EQU 0x00F020
\r
1351 _bcr1 .EQU 0x00F024
\r
1352 BCR1 .EQU 0x00F024
\r
1353 _bad0 .EQU 0x00F080
\r
1354 BAD0 .EQU 0x00F080
\r
1355 _bad1 .EQU 0x00F084
\r
1356 BAD1 .EQU 0x00F084
\r
1357 _bad2 .EQU 0x00F088
\r
1358 BAD2 .EQU 0x00F088
\r
1359 _bad3 .EQU 0x00F08C
\r
1360 BAD3 .EQU 0x00F08C
\r
1361 _bad4 .EQU 0x00F090
\r
1362 BAD4 .EQU 0x00F090
\r
1363 _bad5 .EQU 0x00F094
\r
1364 BAD5 .EQU 0x00F094
\r
1365 _bad6 .EQU 0x00F098
\r
1366 BAD6 .EQU 0x00F098
\r
1367 _bad7 .EQU 0x00F09C
\r
1368 BAD7 .EQU 0x00F09C
\r
1369 _fsv1 .EQU 0x148000
\r
1370 FSV1 .EQU 0x148000 /* FSV & BSV Registers */
\r
1371 _bsv1 .EQU 0x148004
\r
1372 BSV1 .EQU 0x148004
\r
1373 _fsv2 .EQU 0x148008
\r
1374 FSV2 .EQU 0x148008
\r
1375 _bsv2 .EQU 0x14800C
\r
1376 BSV2 .EQU 0x14800C
\r
1380 #ifndef _MB91XXX_H
\r
1381 #define _MB91XXX_H
\r
1385 .IMPORT _pdr14, _pdr15, _pdr16, _pdr17, _pdr18, _pdr19
\r
1386 .IMPORT _pdr20, _pdr21, _pdr22, _pdr24, _pdr26, _pdr27
\r
1387 .IMPORT _pdr28, _pdr29, _eirr0, _enir0, _elvr0, _eirr1
\r
1388 .IMPORT _enir1, _elvr1, _dicr, _hrcl, _rbsync, _scr00
\r
1389 .IMPORT _smr00, _ssr00, _rdr00, _tdr00, _escr00, _eccr00
\r
1390 .IMPORT _scr01, _smr01, _ssr01, _rdr01, _tdr01, _escr01
\r
1391 .IMPORT _eccr01, _scr02, _smr02, _ssr02, _rdr02, _tdr02
\r
1392 .IMPORT _escr02, _eccr02, _scr03, _smr03, _ssr03, _rdr03
\r
1393 .IMPORT _tdr03, _escr03, _eccr03, _scr04, _smr04, _ssr04
\r
1394 .IMPORT _rdr04, _tdr04, _escr04, _eccr04, _fsr04, _fcr04
\r
1395 .IMPORT _bgr00, _bgr100, _bgr000, _bgr01, _bgr101, _bgr001
\r
1396 .IMPORT _bgr02, _bgr102, _bgr002, _bgr03, _bgr103, _bgr003
\r
1397 .IMPORT _bgr04, _bgr104, _bgr004, _ibcr0, _ibsr0, _itba0
\r
1398 .IMPORT _itbah0, _itbal0, _itmk0, _itmkh0, _itmkl0, _ismk0
\r
1399 .IMPORT _isba0, _idar0, _iccr0, _gcn10, _gcn20, _gcn11
\r
1400 .IMPORT _gcn21, _gcn12, _gcn22, _ptmr00, _pcsr00, _pdut00
\r
1401 .IMPORT _pcn00, _pcnh00, _pcnl00, _ptmr01, _pcsr01, _pdut01
\r
1402 .IMPORT _pcn01, _pcnh01, _pcnl01, _ptmr02, _pcsr02, _pdut02
\r
1403 .IMPORT _pcn02, _pcnh02, _pcnl02, _ptmr03, _pcsr03, _pdut03
\r
1404 .IMPORT _pcn03, _pcnh03, _pcnl03, _ptmr04, _pcsr04, _pdut04
\r
1405 .IMPORT _pcn04, _pcnh04, _pcnl04, _ptmr05, _pcsr05, _pdut05
\r
1406 .IMPORT _pcn05, _pcnh05, _pcnl05, _ptmr06, _pcsr06, _pdut06
\r
1407 .IMPORT _pcn06, _pcnh06, _pcnl06, _ptmr07, _pcsr07, _pdut07
\r
1408 .IMPORT _pcn07, _pcnh07, _pcnl07, _ptmr08, _pcsr08, _pdut08
\r
1409 .IMPORT _pcn08, _pcnh08, _pcnl08, _ptmr09, _pcsr09, _pdut09
\r
1410 .IMPORT _pcn09, _pcnh09, _pcnl09, _ptmr10, _pcsr10, _pdut10
\r
1411 .IMPORT _pcn10, _pcnh10, _pcnl10, _ptmr11, _pcsr11, _pdut11
\r
1412 .IMPORT _pcn11, _pcnh11, _pcnl11, _ics01, _ics23, _ipcp0
\r
1413 .IMPORT _ipcp1, _ipcp2, _ipcp3, _ocs01, _ocs23, _occp0
\r
1414 .IMPORT _occp1, _occp2, _occp3, _aderh, _aderl, _ader
\r
1415 .IMPORT _adcs1, _adcs0, _adcs, _adcr1, _adcr0, _adcr
\r
1416 .IMPORT _adct1, _adct0, _adct, _adsch, _adech, _tmrlr0
\r
1417 .IMPORT _tmr0, _tmcsr0, _tmcsrh0, _tmcsrl0, _tmrlr1, _tmr1
\r
1418 .IMPORT _tmcsr1, _tmcsrh1, _tmcsrl1, _tmrlr2, _tmr2, _tmcsr2
\r
1419 .IMPORT _tmcsrh2, _tmcsrl2, _tmrlr3, _tmr3, _tmcsr3, _tmcsrh3
\r
1420 .IMPORT _tmcsrl3, _tmrlr4, _tmr4, _tmcsr4, _tmcsrh4, _tmcsrl4
\r
1421 .IMPORT _tmrlr5, _tmr5, _tmcsr5, _tmcsrh5, _tmcsrl5, _tmrlr6
\r
1422 .IMPORT _tmr6, _tmcsr6, _tmcsrh6, _tmcsrl6, _tmrlr7, _tmr7
\r
1423 .IMPORT _tmcsr7, _tmcsrh7, _tmcsrl7, _tcdt0, _tccs0, _tcdt1
\r
1424 .IMPORT _tccs1, _tcdt2, _tccs2, _tcdt3, _tccs3, _dmaca0
\r
1425 .IMPORT _dmacb0, _dmaca1, _dmacb1, _dmaca2, _dmacb2, _dmaca3
\r
1426 .IMPORT _dmacb3, _dmaca4, _dmacb4, _dmacr, _ics45, _ics67
\r
1427 .IMPORT _ipcp4, _ipcp5, _ipcp6, _ipcp7, _ocs45, _ocs67
\r
1428 .IMPORT _occp4, _occp5, _occp6, _occp7, _tcdt4, _tccs4
\r
1429 .IMPORT _tcdt5, _tccs5, _tcdt6, _tccs6, _tcdt7, _tccs7
\r
1430 .IMPORT _roms, _bsd0, _bsd1, _bsdc, _bsrr, _icr00
\r
1431 .IMPORT _icr01, _icr02, _icr03, _icr04, _icr05, _icr06
\r
1432 .IMPORT _icr07, _icr08, _icr09, _icr10, _icr11, _icr12
\r
1433 .IMPORT _icr13, _icr14, _icr15, _icr16, _icr17, _icr18
\r
1434 .IMPORT _icr19, _icr20, _icr21, _icr22, _icr23, _icr24
\r
1435 .IMPORT _icr25, _icr26, _icr27, _icr28, _icr29, _icr30
\r
1436 .IMPORT _icr31, _icr32, _icr33, _icr34, _icr35, _icr36
\r
1437 .IMPORT _icr37, _icr38, _icr39, _icr40, _icr41, _icr42
\r
1438 .IMPORT _icr43, _icr44, _icr45, _icr46, _icr47, _icr48
\r
1439 .IMPORT _icr49, _icr50, _icr51, _icr52, _icr53, _icr54
\r
1440 .IMPORT _icr55, _icr56, _icr57, _icr58, _icr59, _icr60
\r
1441 .IMPORT _icr61, _icr62, _icr63, _rsrr, _stcr, _tbcr
\r
1442 .IMPORT _ctbr, _clkr, _wpr, _divr0, _divr1, _plldivm
\r
1443 .IMPORT _plldivn, _plldivg, _pllmulg, _pllctrl, _oscc1, _oscs1
\r
1444 .IMPORT _oscc2, _oscs2, _porten, _wtcer, _wtcr, _wtbr
\r
1445 .IMPORT _wthr, _wtmr, _wtsr, _csvtr, _csvcr, _cscfg
\r
1446 .IMPORT _cmcfg, _cucr, _cutd, _cutr1, _cutr2, _cmpr
\r
1447 .IMPORT _cmcr, _cmt1, _cmt2, _canpre, _canckd, _lvsel
\r
1448 .IMPORT _lvdet, _hwwde, _hwwd, _oscrh, _oscrl, _wpcrh
\r
1449 .IMPORT _wpcrl, _osccr, _regsel, _regctr, _modr, _pdrd14
\r
1450 .IMPORT _pdrd15, _pdrd16, _pdrd17, _pdrd18, _pdrd19, _pdrd20
\r
1451 .IMPORT _pdrd21, _pdrd22, _pdrd24, _pdrd26, _pdrd27, _pdrd28
\r
1452 .IMPORT _pdrd29, _ddr14, _ddr15, _ddr16, _ddr17, _ddr18
\r
1453 .IMPORT _ddr19, _ddr20, _ddr21, _ddr22, _ddr24, _ddr26
\r
1454 .IMPORT _ddr27, _ddr28, _ddr29, _pfr14, _pfr15, _pfr16
\r
1455 .IMPORT _pfr17, _pfr18, _pfr19, _pfr20, _pfr21, _pfr22
\r
1456 .IMPORT _pfr24, _pfr26, _pfr27, _pfr28, _pfr29, _epfr14
\r
1457 .IMPORT _epfr15, _epfr16, _epfr17, _epfr18, _epfr19, _epfr20
\r
1458 .IMPORT _epfr21, _epfr22, _epfr24, _epfr26, _epfr27, _epfr29
\r
1459 .IMPORT _podr14, _podr15, _podr16, _podr17, _podr18, _podr19
\r
1460 .IMPORT _podr20, _podr21, _podr22, _podr24, _podr26, _podr27
\r
1461 .IMPORT _podr28, _podr29, _pilr14, _pilr15, _pilr16, _pilr17
\r
1462 .IMPORT _pilr18, _pilr19, _pilr20, _pilr21, _pilr22, _pilr24
\r
1463 .IMPORT _pilr26, _pilr27, _pilr28, _pilr29, _epilr14, _epilr15
\r
1464 .IMPORT _epilr16, _epilr17, _epilr18, _epilr19, _epilr20, _epilr21
\r
1465 .IMPORT _epilr22, _epilr24, _epilr26, _epilr27, _epilr28, _epilr29
\r
1466 .IMPORT _pper14, _pper15, _pper16, _pper17, _pper18, _pper19
\r
1467 .IMPORT _pper20, _pper21, _pper22, _pper24, _pper26, _pper27
\r
1468 .IMPORT _pper28, _pper29, _ppcr14, _ppcr15, _ppcr16, _ppcr17
\r
1469 .IMPORT _ppcr18, _ppcr19, _ppcr20, _ppcr21, _ppcr22, _ppcr24
\r
1470 .IMPORT _ppcr26, _ppcr27, _ppcr28, _ppcr29, _dmasa0, _dmada0
\r
1471 .IMPORT _dmasa1, _dmada1, _dmasa2, _dmada2, _dmasa3, _dmada3
\r
1472 .IMPORT _dmasa4, _dmada4, _fmcs, _fmcr, _fchcr, _fmwt
\r
1473 .IMPORT _fmwt2, _fmps, _fmac, _fcha0, _fcha1, _fscr0
\r
1474 .IMPORT _fscr1, _ctrlr4, _statr4, _errcnt4, _btr4, _intr4
\r
1475 .IMPORT _testr4, _brper4, _brpe4, _if1creq4, _if1cmsk4, _if1msk124
\r
1476 .IMPORT _if1msk24, _if1msk14, _if1arb124, _if1arb24, _if1arb14, _if1mctr4
\r
1477 .IMPORT _if1dta124, _if1dta14, _if1dta24, _if1dtb124, _if1dtb14, _if1dtb24
\r
1478 .IMPORT _if1dta_swp124, _if1dta_swp24, _if1dta_swp14, _if1dtb_swp124, _if1dtb_swp24, _if1dtb_swp14
\r
1479 .IMPORT _if2creq4, _if2cmsk4, _if2msk124, _if2msk24, _if2msk14, _if2arb124
\r
1480 .IMPORT _if2arb24, _if2arb14, _if2mctr4, _if2dta124, _if2dta14, _if2dta24
\r
1481 .IMPORT _if2dtb124, _if2dtb14, _if2dtb24, _if2dta_swp124, _if2dta_swp24, _if2dta_swp14
\r
1482 .IMPORT _if2dtb_swp124, _if2dtb_swp24, _if2dtb_swp14, _treqr124, _treqr24, _treqr14
\r
1483 .IMPORT _treqr344, _newdt124, _newdt24, _newdt14, _intpnd124, _intpnd24
\r
1484 .IMPORT _intpnd14, _msgval124, _msgval24, _msgval14, _bctrl, _bstat
\r
1485 .IMPORT _biac, _boac, _birq, _bcr0, _bcr1, _bad0
\r
1486 .IMPORT _bad1, _bad2, _bad3, _bad4, _bad5, _bad6
\r
1487 .IMPORT _bad7, _fsv1, _bsv1, _fsv2, _bsv2
\r
1489 #else /* __FASM__ */
\r
1490 /* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
\r
1491 /* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
\r
1492 /* ELIGIBILITY FOR ANY PURPOSES. */
\r
1493 /* (C) Fujitsu Microelectronics Europe GmbH */
\r
1495 /* ************************************************************************* */
\r
1496 /* Fujitsu Microelectronics Europe GmbH */
\r
1497 /* Pittlerstrasse 47, 63225 Langen */
\r
1498 /* Tel.: +49 (6103) 690-0, Fax -122 */
\r
1500 /* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
\r
1501 /* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
\r
1502 /* ELIGIBILITY FOR ANY PURPOSES */
\r
1503 /* (C) Fujitsu Microelectronics Europe GmbH */
\r
1504 /* ************************************************************************* */
\r
1505 /* ---------------------------------------------------------------------- */
\r
1506 /* Id: MB91465K.h,v 1.5 2007/01/04 11:04:48 meffen Exp */
\r
1507 /* ---------------------------------------------------------------------- */
\r
1508 /* Id: MB91465K.h,v 1.5 2007/01/04 11:04:48 meffen Exp */
\r
1509 /* - removed LCD and Sound Controller */
\r
1510 /* Id: MB91465K.iow,v 1.5 2006/11/30 14:39:18 meffen Exp */
\r
1511 /* - format of comment lines adapted */
\r
1512 /* BIT-STRUCTURE-DEFINITIONS */
\r
1514 typedef unsigned char IO_BYTE;
\r
1515 typedef unsigned short IO_WORD;
\r
1516 typedef unsigned long IO_LWORD;
\r
1517 typedef const unsigned short IO_WORD_READ;
\r
1519 typedef union{ /* Port Data Register */
\r
1701 typedef union{ /* External Interrupt 0-7 */
\r
1748 typedef union{ /* External Interrupt 8-15 */
\r
1795 typedef union{ /* DLYI/I-unit */
\r
1811 IO_BYTE _MHALTI :1;
\r
1827 typedef union{ /* USART (LIN) 0 */
\r
1900 typedef union{ /* USART (LIN) 1 */
\r
1973 typedef union{ /* USART (LIN) 2 */
\r
2046 typedef union{ /* USART (LIN) 3 */
\r
2119 typedef union{ /* USART (LIN) 4 with FIFO */
\r
2208 typedef union{ /* I2C 0 */
\r
2386 typedef union{ /* PPG Control 0-3 */
\r
2389 IO_WORD _TSEL33 :1;
\r
2390 IO_WORD _TSEL32 :1;
\r
2391 IO_WORD _TSEL31 :1;
\r
2392 IO_WORD _TSEL30 :1;
\r
2393 IO_WORD _TSEL23 :1;
\r
2394 IO_WORD _TSEL22 :1;
\r
2395 IO_WORD _TSEL21 :1;
\r
2396 IO_WORD _TSEL20 :1;
\r
2397 IO_WORD _TSEL13 :1;
\r
2398 IO_WORD _TSEL12 :1;
\r
2399 IO_WORD _TSEL11 :1;
\r
2400 IO_WORD _TSEL10 :1;
\r
2401 IO_WORD _TSEL03 :1;
\r
2402 IO_WORD _TSEL02 :1;
\r
2403 IO_WORD _TSEL01 :1;
\r
2404 IO_WORD _TSEL00 :1;
\r
2420 typedef union{ /* PPG Control 4-7 */
\r
2423 IO_WORD _TSEL33 :1;
\r
2424 IO_WORD _TSEL32 :1;
\r
2425 IO_WORD _TSEL31 :1;
\r
2426 IO_WORD _TSEL30 :1;
\r
2427 IO_WORD _TSEL23 :1;
\r
2428 IO_WORD _TSEL22 :1;
\r
2429 IO_WORD _TSEL21 :1;
\r
2430 IO_WORD _TSEL20 :1;
\r
2431 IO_WORD _TSEL13 :1;
\r
2432 IO_WORD _TSEL12 :1;
\r
2433 IO_WORD _TSEL11 :1;
\r
2434 IO_WORD _TSEL10 :1;
\r
2435 IO_WORD _TSEL03 :1;
\r
2436 IO_WORD _TSEL02 :1;
\r
2437 IO_WORD _TSEL01 :1;
\r
2438 IO_WORD _TSEL00 :1;
\r
2454 typedef union{ /* PPG Control 8-11 */
\r
2457 IO_WORD _TSEL33 :1;
\r
2458 IO_WORD _TSEL32 :1;
\r
2459 IO_WORD _TSEL31 :1;
\r
2460 IO_WORD _TSEL30 :1;
\r
2461 IO_WORD _TSEL23 :1;
\r
2462 IO_WORD _TSEL22 :1;
\r
2463 IO_WORD _TSEL21 :1;
\r
2464 IO_WORD _TSEL20 :1;
\r
2465 IO_WORD _TSEL13 :1;
\r
2466 IO_WORD _TSEL12 :1;
\r
2467 IO_WORD _TSEL11 :1;
\r
2468 IO_WORD _TSEL10 :1;
\r
2469 IO_WORD _TSEL03 :1;
\r
2470 IO_WORD _TSEL02 :1;
\r
2471 IO_WORD _TSEL01 :1;
\r
2472 IO_WORD _TSEL00 :1;
\r
3364 typedef union{ /* Input Capture 0-3 */
\r
3490 typedef union{ /* Output Compare 0-3 */
\r
3616 typedef union{ /* ADC */
\r
3619 IO_WORD _ADE31 :1;
\r
3620 IO_WORD _ADE30 :1;
\r
3621 IO_WORD _ADE29 :1;
\r
3622 IO_WORD _ADE28 :1;
\r
3623 IO_WORD _ADE27 :1;
\r
3624 IO_WORD _ADE26 :1;
\r
3625 IO_WORD _ADE25 :1;
\r
3626 IO_WORD _ADE24 :1;
\r
3627 IO_WORD _ADE23 :1;
\r
3628 IO_WORD _ADE22 :1;
\r
3629 IO_WORD _ADE21 :1;
\r
3630 IO_WORD _ADE20 :1;
\r
3631 IO_WORD _ADE19 :1;
\r
3632 IO_WORD _ADE18 :1;
\r
3633 IO_WORD _ADE17 :1;
\r
3634 IO_WORD _ADE16 :1;
\r
3640 IO_WORD _ADE15 :1;
\r
3641 IO_WORD _ADE14 :1;
\r
3642 IO_WORD _ADE13 :1;
\r
3643 IO_WORD _ADE12 :1;
\r
3644 IO_WORD _ADE11 :1;
\r
3645 IO_WORD _ADE10 :1;
\r
3786 typedef union{ /* Reload Timer 0 */
\r
3886 typedef union{ /* Reload Timer 1 */
\r
3986 typedef union{ /* Reload Timer 2 */
\r
4086 typedef union{ /* Reload Timer 3 */
\r
4186 typedef union{ /* Reload Timer 4 */
\r
4286 typedef union{ /* Reload Timer 5 */
\r
4386 typedef union{ /* Reload Timer 6 */
\r
4486 typedef union{ /* Reload Timer 7 */
\r
4586 typedef union{ /* Free Running Timer0 */
\r
4629 typedef union{ /* Free Running Timer1 */
\r
4672 typedef union{ /* Free Running Timer2 */
\r
4715 typedef union{ /* Free Running Timer3 */
\r
4758 typedef union{ /* DMAC */
\r
4761 IO_LWORD _DENB :1;
\r
4762 IO_LWORD _PAUS :1;
\r
4763 IO_LWORD _STRG :1;
\r
4769 IO_LWORD _EIS3 :1;
\r
4770 IO_LWORD _EIS2 :1;
\r
4771 IO_LWORD _EIS1 :1;
\r
4772 IO_LWORD _EIS0 :1;
\r
4773 IO_LWORD _BLK3 :1;
\r
4774 IO_LWORD _BLK2 :1;
\r
4775 IO_LWORD _BLK1 :1;
\r
4776 IO_LWORD _BLK0 :1;
\r
4777 IO_LWORD _DTCF :1;
\r
4778 IO_LWORD _DTCE :1;
\r
4779 IO_LWORD _DTCD :1;
\r
4780 IO_LWORD _DTCC :1;
\r
4781 IO_LWORD _DTCB :1;
\r
4782 IO_LWORD _DTCA :1;
\r
4783 IO_LWORD _DTC9 :1;
\r
4784 IO_LWORD _DTC8 :1;
\r
4785 IO_LWORD _DTC7 :1;
\r
4786 IO_LWORD _DTC6 :1;
\r
4787 IO_LWORD _DTC5 :1;
\r
4788 IO_LWORD _DTC4 :1;
\r
4789 IO_LWORD _DTC3 :1;
\r
4790 IO_LWORD _DTC2 :1;
\r
4791 IO_LWORD _DTC1 :1;
\r
4792 IO_LWORD _DTC0 :1;
\r
4801 IO_LWORD _DTC :16;
\r
4807 IO_LWORD _TYPE1 :1;
\r
4808 IO_LWORD _TYPE0 :1;
\r
4809 IO_LWORD _MOD1 :1;
\r
4810 IO_LWORD _MOD0 :1;
\r
4813 IO_LWORD _SADM :1;
\r
4814 IO_LWORD _DADM :1;
\r
4815 IO_LWORD _DTCR :1;
\r
4816 IO_LWORD _SADR :1;
\r
4817 IO_LWORD _DADR :1;
\r
4818 IO_LWORD _ERIE :1;
\r
4819 IO_LWORD _EDIE :1;
\r
4820 IO_LWORD _DSS2 :1;
\r
4821 IO_LWORD _DSS1 :1;
\r
4822 IO_LWORD _DSS0 :1;
\r
4823 IO_LWORD _SASZ7 :1;
\r
4824 IO_LWORD _SASZ6 :1;
\r
4825 IO_LWORD _SASZ5 :1;
\r
4826 IO_LWORD _SASZ4 :1;
\r
4827 IO_LWORD _SASZ3 :1;
\r
4828 IO_LWORD _SASZ2 :1;
\r
4829 IO_LWORD _SASZ1 :1;
\r
4830 IO_LWORD _SASZ0 :1;
\r
4831 IO_LWORD _DASZ7 :1;
\r
4832 IO_LWORD _DASZ6 :1;
\r
4833 IO_LWORD _DASZ5 :1;
\r
4834 IO_LWORD _DASZ4 :1;
\r
4835 IO_LWORD _DASZ3 :1;
\r
4836 IO_LWORD _DASZ2 :1;
\r
4837 IO_LWORD _DASZ1 :1;
\r
4838 IO_LWORD _DASZ0 :1;
\r
4841 IO_LWORD _TYPE :2;
\r
4852 IO_LWORD _SASZ :8;
\r
4853 IO_LWORD _DASZ :8;
\r
4859 IO_LWORD _DENB :1;
\r
4860 IO_LWORD _PAUS :1;
\r
4861 IO_LWORD _STRG :1;
\r
4867 IO_LWORD _EIS3 :1;
\r
4868 IO_LWORD _EIS2 :1;
\r
4869 IO_LWORD _EIS1 :1;
\r
4870 IO_LWORD _EIS0 :1;
\r
4871 IO_LWORD _BLK3 :1;
\r
4872 IO_LWORD _BLK2 :1;
\r
4873 IO_LWORD _BLK1 :1;
\r
4874 IO_LWORD _BLK0 :1;
\r
4875 IO_LWORD _DTCF :1;
\r
4876 IO_LWORD _DTCE :1;
\r
4877 IO_LWORD _DTCD :1;
\r
4878 IO_LWORD _DTCC :1;
\r
4879 IO_LWORD _DTCB :1;
\r
4880 IO_LWORD _DTCA :1;
\r
4881 IO_LWORD _DTC9 :1;
\r
4882 IO_LWORD _DTC8 :1;
\r
4883 IO_LWORD _DTC7 :1;
\r
4884 IO_LWORD _DTC6 :1;
\r
4885 IO_LWORD _DTC5 :1;
\r
4886 IO_LWORD _DTC4 :1;
\r
4887 IO_LWORD _DTC3 :1;
\r
4888 IO_LWORD _DTC2 :1;
\r
4889 IO_LWORD _DTC1 :1;
\r
4890 IO_LWORD _DTC0 :1;
\r
4899 IO_LWORD _DTC :16;
\r
4905 IO_LWORD _TYPE1 :1;
\r
4906 IO_LWORD _TYPE0 :1;
\r
4907 IO_LWORD _MOD1 :1;
\r
4908 IO_LWORD _MOD0 :1;
\r
4911 IO_LWORD _SADM :1;
\r
4912 IO_LWORD _DADM :1;
\r
4913 IO_LWORD _DTCR :1;
\r
4914 IO_LWORD _SADR :1;
\r
4915 IO_LWORD _DADR :1;
\r
4916 IO_LWORD _ERIE :1;
\r
4917 IO_LWORD _EDIE :1;
\r
4918 IO_LWORD _DSS2 :1;
\r
4919 IO_LWORD _DSS1 :1;
\r
4920 IO_LWORD _DSS0 :1;
\r
4921 IO_LWORD _SASZ7 :1;
\r
4922 IO_LWORD _SASZ6 :1;
\r
4923 IO_LWORD _SASZ5 :1;
\r
4924 IO_LWORD _SASZ4 :1;
\r
4925 IO_LWORD _SASZ3 :1;
\r
4926 IO_LWORD _SASZ2 :1;
\r
4927 IO_LWORD _SASZ1 :1;
\r
4928 IO_LWORD _SASZ0 :1;
\r
4929 IO_LWORD _DASZ7 :1;
\r
4930 IO_LWORD _DASZ6 :1;
\r
4931 IO_LWORD _DASZ5 :1;
\r
4932 IO_LWORD _DASZ4 :1;
\r
4933 IO_LWORD _DASZ3 :1;
\r
4934 IO_LWORD _DASZ2 :1;
\r
4935 IO_LWORD _DASZ1 :1;
\r
4936 IO_LWORD _DASZ0 :1;
\r
4939 IO_LWORD _TYPE :2;
\r
4950 IO_LWORD _SASZ :8;
\r
4951 IO_LWORD _DASZ :8;
\r
4957 IO_LWORD _DENB :1;
\r
4958 IO_LWORD _PAUS :1;
\r
4959 IO_LWORD _STRG :1;
\r
4965 IO_LWORD _EIS3 :1;
\r
4966 IO_LWORD _EIS2 :1;
\r
4967 IO_LWORD _EIS1 :1;
\r
4968 IO_LWORD _EIS0 :1;
\r
4969 IO_LWORD _BLK3 :1;
\r
4970 IO_LWORD _BLK2 :1;
\r
4971 IO_LWORD _BLK1 :1;
\r
4972 IO_LWORD _BLK0 :1;
\r
4973 IO_LWORD _DTCF :1;
\r
4974 IO_LWORD _DTCE :1;
\r
4975 IO_LWORD _DTCD :1;
\r
4976 IO_LWORD _DTCC :1;
\r
4977 IO_LWORD _DTCB :1;
\r
4978 IO_LWORD _DTCA :1;
\r
4979 IO_LWORD _DTC9 :1;
\r
4980 IO_LWORD _DTC8 :1;
\r
4981 IO_LWORD _DTC7 :1;
\r
4982 IO_LWORD _DTC6 :1;
\r
4983 IO_LWORD _DTC5 :1;
\r
4984 IO_LWORD _DTC4 :1;
\r
4985 IO_LWORD _DTC3 :1;
\r
4986 IO_LWORD _DTC2 :1;
\r
4987 IO_LWORD _DTC1 :1;
\r
4988 IO_LWORD _DTC0 :1;
\r
4997 IO_LWORD _DTC :16;
\r
5003 IO_LWORD _TYPE1 :1;
\r
5004 IO_LWORD _TYPE0 :1;
\r
5005 IO_LWORD _MOD1 :1;
\r
5006 IO_LWORD _MOD0 :1;
\r
5009 IO_LWORD _SADM :1;
\r
5010 IO_LWORD _DADM :1;
\r
5011 IO_LWORD _DTCR :1;
\r
5012 IO_LWORD _SADR :1;
\r
5013 IO_LWORD _DADR :1;
\r
5014 IO_LWORD _ERIE :1;
\r
5015 IO_LWORD _EDIE :1;
\r
5016 IO_LWORD _DSS2 :1;
\r
5017 IO_LWORD _DSS1 :1;
\r
5018 IO_LWORD _DSS0 :1;
\r
5019 IO_LWORD _SASZ7 :1;
\r
5020 IO_LWORD _SASZ6 :1;
\r
5021 IO_LWORD _SASZ5 :1;
\r
5022 IO_LWORD _SASZ4 :1;
\r
5023 IO_LWORD _SASZ3 :1;
\r
5024 IO_LWORD _SASZ2 :1;
\r
5025 IO_LWORD _SASZ1 :1;
\r
5026 IO_LWORD _SASZ0 :1;
\r
5027 IO_LWORD _DASZ7 :1;
\r
5028 IO_LWORD _DASZ6 :1;
\r
5029 IO_LWORD _DASZ5 :1;
\r
5030 IO_LWORD _DASZ4 :1;
\r
5031 IO_LWORD _DASZ3 :1;
\r
5032 IO_LWORD _DASZ2 :1;
\r
5033 IO_LWORD _DASZ1 :1;
\r
5034 IO_LWORD _DASZ0 :1;
\r
5037 IO_LWORD _TYPE :2;
\r
5048 IO_LWORD _SASZ :8;
\r
5049 IO_LWORD _DASZ :8;
\r
5055 IO_LWORD _DENB :1;
\r
5056 IO_LWORD _PAUS :1;
\r
5057 IO_LWORD _STRG :1;
\r
5063 IO_LWORD _EIS3 :1;
\r
5064 IO_LWORD _EIS2 :1;
\r
5065 IO_LWORD _EIS1 :1;
\r
5066 IO_LWORD _EIS0 :1;
\r
5067 IO_LWORD _BLK3 :1;
\r
5068 IO_LWORD _BLK2 :1;
\r
5069 IO_LWORD _BLK1 :1;
\r
5070 IO_LWORD _BLK0 :1;
\r
5071 IO_LWORD _DTCF :1;
\r
5072 IO_LWORD _DTCE :1;
\r
5073 IO_LWORD _DTCD :1;
\r
5074 IO_LWORD _DTCC :1;
\r
5075 IO_LWORD _DTCB :1;
\r
5076 IO_LWORD _DTCA :1;
\r
5077 IO_LWORD _DTC9 :1;
\r
5078 IO_LWORD _DTC8 :1;
\r
5079 IO_LWORD _DTC7 :1;
\r
5080 IO_LWORD _DTC6 :1;
\r
5081 IO_LWORD _DTC5 :1;
\r
5082 IO_LWORD _DTC4 :1;
\r
5083 IO_LWORD _DTC3 :1;
\r
5084 IO_LWORD _DTC2 :1;
\r
5085 IO_LWORD _DTC1 :1;
\r
5086 IO_LWORD _DTC0 :1;
\r
5095 IO_LWORD _DTC :16;
\r
5101 IO_LWORD _TYPE1 :1;
\r
5102 IO_LWORD _TYPE0 :1;
\r
5103 IO_LWORD _MOD1 :1;
\r
5104 IO_LWORD _MOD0 :1;
\r
5107 IO_LWORD _SADM :1;
\r
5108 IO_LWORD _DADM :1;
\r
5109 IO_LWORD _DTCR :1;
\r
5110 IO_LWORD _SADR :1;
\r
5111 IO_LWORD _DADR :1;
\r
5112 IO_LWORD _ERIE :1;
\r
5113 IO_LWORD _EDIE :1;
\r
5114 IO_LWORD _DSS2 :1;
\r
5115 IO_LWORD _DSS1 :1;
\r
5116 IO_LWORD _DSS0 :1;
\r
5117 IO_LWORD _SASZ7 :1;
\r
5118 IO_LWORD _SASZ6 :1;
\r
5119 IO_LWORD _SASZ5 :1;
\r
5120 IO_LWORD _SASZ4 :1;
\r
5121 IO_LWORD _SASZ3 :1;
\r
5122 IO_LWORD _SASZ2 :1;
\r
5123 IO_LWORD _SASZ1 :1;
\r
5124 IO_LWORD _SASZ0 :1;
\r
5125 IO_LWORD _DASZ7 :1;
\r
5126 IO_LWORD _DASZ6 :1;
\r
5127 IO_LWORD _DASZ5 :1;
\r
5128 IO_LWORD _DASZ4 :1;
\r
5129 IO_LWORD _DASZ3 :1;
\r
5130 IO_LWORD _DASZ2 :1;
\r
5131 IO_LWORD _DASZ1 :1;
\r
5132 IO_LWORD _DASZ0 :1;
\r
5135 IO_LWORD _TYPE :2;
\r
5146 IO_LWORD _SASZ :8;
\r
5147 IO_LWORD _DASZ :8;
\r
5153 IO_LWORD _DENB :1;
\r
5154 IO_LWORD _PAUS :1;
\r
5155 IO_LWORD _STRG :1;
\r
5161 IO_LWORD _EIS3 :1;
\r
5162 IO_LWORD _EIS2 :1;
\r
5163 IO_LWORD _EIS1 :1;
\r
5164 IO_LWORD _EIS0 :1;
\r
5165 IO_LWORD _BLK3 :1;
\r
5166 IO_LWORD _BLK2 :1;
\r
5167 IO_LWORD _BLK1 :1;
\r
5168 IO_LWORD _BLK0 :1;
\r
5169 IO_LWORD _DTCF :1;
\r
5170 IO_LWORD _DTCE :1;
\r
5171 IO_LWORD _DTCD :1;
\r
5172 IO_LWORD _DTCC :1;
\r
5173 IO_LWORD _DTCB :1;
\r
5174 IO_LWORD _DTCA :1;
\r
5175 IO_LWORD _DTC9 :1;
\r
5176 IO_LWORD _DTC8 :1;
\r
5177 IO_LWORD _DTC7 :1;
\r
5178 IO_LWORD _DTC6 :1;
\r
5179 IO_LWORD _DTC5 :1;
\r
5180 IO_LWORD _DTC4 :1;
\r
5181 IO_LWORD _DTC3 :1;
\r
5182 IO_LWORD _DTC2 :1;
\r
5183 IO_LWORD _DTC1 :1;
\r
5184 IO_LWORD _DTC0 :1;
\r
5193 IO_LWORD _DTC :16;
\r
5199 IO_LWORD _TYPE1 :1;
\r
5200 IO_LWORD _TYPE0 :1;
\r
5201 IO_LWORD _MOD1 :1;
\r
5202 IO_LWORD _MOD0 :1;
\r
5205 IO_LWORD _SADM :1;
\r
5206 IO_LWORD _DADM :1;
\r
5207 IO_LWORD _DTCR :1;
\r
5208 IO_LWORD _SADR :1;
\r
5209 IO_LWORD _DADR :1;
\r
5210 IO_LWORD _ERIE :1;
\r
5211 IO_LWORD _EDIE :1;
\r
5212 IO_LWORD _DSS2 :1;
\r
5213 IO_LWORD _DSS1 :1;
\r
5214 IO_LWORD _DSS0 :1;
\r
5215 IO_LWORD _SASZ7 :1;
\r
5216 IO_LWORD _SASZ6 :1;
\r
5217 IO_LWORD _SASZ5 :1;
\r
5218 IO_LWORD _SASZ4 :1;
\r
5219 IO_LWORD _SASZ3 :1;
\r
5220 IO_LWORD _SASZ2 :1;
\r
5221 IO_LWORD _SASZ1 :1;
\r
5222 IO_LWORD _SASZ0 :1;
\r
5223 IO_LWORD _DASZ7 :1;
\r
5224 IO_LWORD _DASZ6 :1;
\r
5225 IO_LWORD _DASZ5 :1;
\r
5226 IO_LWORD _DASZ4 :1;
\r
5227 IO_LWORD _DASZ3 :1;
\r
5228 IO_LWORD _DASZ2 :1;
\r
5229 IO_LWORD _DASZ1 :1;
\r
5230 IO_LWORD _DASZ0 :1;
\r
5233 IO_LWORD _TYPE :2;
\r
5244 IO_LWORD _SASZ :8;
\r
5245 IO_LWORD _DASZ :8;
\r
5255 IO_BYTE _DMAH3 :1;
\r
5256 IO_BYTE _DMAH2 :1;
\r
5257 IO_BYTE _DMAH1 :1;
\r
5258 IO_BYTE _DMAH0 :1;
\r
5268 typedef union{ /* Input Capture 4-7 */
\r
5394 typedef union{ /* Output Compare 4-7 */
\r
5520 typedef union{ /* Free Running Timer4 */
\r
5563 typedef union{ /* Free Running Timer5 */
\r
5606 typedef union{ /* Free Running Timer6 */
\r
5649 typedef union{ /* Free Running Timer7 */
\r
5692 typedef union{ /* ROM Select Register */
\r
5713 typedef union{ /* Interrupt Control Unit */
\r
6545 typedef union{ /* Clock Control Unit */
\r
6553 IO_BYTE _LINIT :1;
\r
6571 IO_BYTE _SLEEP :1;
\r
6576 IO_BYTE _OSCD2 :1;
\r
6577 IO_BYTE _OSCD1 :1;
\r
6597 IO_BYTE _SYNCR :1;
\r
6598 IO_BYTE _SYNCS :1;
\r
6626 IO_BYTE _SCKEN :1;
\r
6627 IO_BYTE _PLL1EN :1;
\r
6628 IO_BYTE _CLKS1 :1;
\r
6629 IO_BYTE _CLKS0 :1;
\r
6687 typedef union{ /* PLL - Clock Gear Unit: */
\r
6774 typedef union{ /* Main/Sub Oscillator Control */
\r
6783 IO_BYTE _RFBEN :1;
\r
6790 IO_BYTE _OSCS7 :1;
\r
6791 IO_BYTE _OSCS6 :1;
\r
6792 IO_BYTE _OSCS5 :1;
\r
6793 IO_BYTE _OSCS4 :1;
\r
6794 IO_BYTE _OSCS3 :1;
\r
6795 IO_BYTE _OSCS2 :1;
\r
6796 IO_BYTE _OSCS1 :1;
\r
6797 IO_BYTE _OSCS0 :1;
\r
6809 IO_BYTE _RFBEN :1;
\r
6816 IO_BYTE _OSCS7 :1;
\r
6817 IO_BYTE _OSCS6 :1;
\r
6818 IO_BYTE _OSCS5 :1;
\r
6819 IO_BYTE _OSCS4 :1;
\r
6820 IO_BYTE _OSCS3 :1;
\r
6821 IO_BYTE _OSCS2 :1;
\r
6822 IO_BYTE _OSCS1 :1;
\r
6823 IO_BYTE _OSCS0 :1;
\r
6826 typedef union{ /* Port Input Enable Control */
\r
6835 IO_BYTE _CPORTEN :1;
\r
6836 IO_BYTE _GPORTEN :1;
\r
6839 typedef union{ /* Real Time Clock (Watch Timer) */
\r
6848 IO_BYTE _INTE4 :1;
\r
6855 IO_WORD _INTE3 :1;
\r
6857 IO_WORD _INTE2 :1;
\r
6859 IO_WORD _INTE1 :1;
\r
6861 IO_WORD _INTE0 :1;
\r
6965 IO_BYTE _EDSUEN :1;
\r
6966 IO_BYTE _PLLLOCK :1;
\r
6967 IO_BYTE _RCSEL :1;
\r
6968 IO_BYTE _MONCKI :1;
\r
6982 IO_BYTE _CMPRE3 :1;
\r
6983 IO_BYTE _CMPRE2 :1;
\r
6984 IO_BYTE _CMPRE1 :1;
\r
6985 IO_BYTE _CMPRE0 :1;
\r
6986 IO_BYTE _CMSEL3 :1;
\r
6987 IO_BYTE _CMSEL2 :1;
\r
6988 IO_BYTE _CMSEL1 :1;
\r
6989 IO_BYTE _CMSEL0 :1;
\r
6992 IO_BYTE _CMPRE :4;
\r
6993 IO_BYTE _CMSEL :4;
\r
6996 typedef union{ /* Calibration Unit of Sub Oszillation */
\r
7014 IO_WORD _INTEN :1;
\r
7020 IO_WORD _TDD15 :1;
\r
7021 IO_WORD _TDD14 :1;
\r
7022 IO_WORD _TDD13 :1;
\r
7023 IO_WORD _TDD12 :1;
\r
7024 IO_WORD _TDD11 :1;
\r
7025 IO_WORD _TDD10 :1;
\r
7049 IO_WORD _TDR23 :1;
\r
7050 IO_WORD _TDR22 :1;
\r
7051 IO_WORD _TDR21 :1;
\r
7052 IO_WORD _TDR20 :1;
\r
7053 IO_WORD _TDR19 :1;
\r
7054 IO_WORD _TDR18 :1;
\r
7055 IO_WORD _TDR17 :1;
\r
7056 IO_WORD _TDR16 :1;
\r
7062 IO_WORD _TDR15 :1;
\r
7063 IO_WORD _TDR14 :1;
\r
7064 IO_WORD _TDR13 :1;
\r
7065 IO_WORD _TDR12 :1;
\r
7066 IO_WORD _TDR11 :1;
\r
7067 IO_WORD _TDR10 :1;
\r
7080 typedef union{ /* Clock Modulator */
\r
7108 IO_BYTE _FMODRUN :1;
\r
7114 typedef union{ /* CAN clock control */
\r
7119 IO_BYTE _CPCKS1 :1;
\r
7120 IO_BYTE _CPCKS0 :1;
\r
7128 IO_BYTE _CPCKS :2;
\r
7137 IO_BYTE _CANCKD5 :1;
\r
7138 IO_BYTE _CANCKD4 :1;
\r
7139 IO_BYTE _CANCKD3 :1;
\r
7140 IO_BYTE _CANCKD2 :1;
\r
7141 IO_BYTE _CANCKD1 :1;
\r
7142 IO_BYTE _CANCKD0 :1;
\r
7145 typedef union{ /* LV Detection / Hardware-Watchdog */
\r
7148 IO_BYTE _LVESEL3 :1;
\r
7149 IO_BYTE _LVESEL2 :1;
\r
7150 IO_BYTE _LVESEL1 :1;
\r
7151 IO_BYTE _LVESEL0 :1;
\r
7152 IO_BYTE _LVISEL3 :1;
\r
7153 IO_BYTE _LVISEL2 :1;
\r
7154 IO_BYTE _LVISEL1 :1;
\r
7155 IO_BYTE _LVISEL0 :1;
\r
7158 IO_BYTE _LVESEL :4;
\r
7159 IO_BYTE _LVISEL :4;
\r
7166 IO_BYTE _LVSEL :1;
\r
7167 IO_BYTE _LVEPD :1;
\r
7168 IO_BYTE _LVIPD :1;
\r
7169 IO_BYTE _LVREN :1;
\r
7171 IO_BYTE _LVIEN :1;
\r
7172 IO_BYTE _LVIRQ :1;
\r
7210 typedef union{ /* Main-/Sub-Oscillatio Stabilization Timer */
\r
7252 typedef union{ /* Main-/Sub-Oscillatio Standby Control */
\r
7262 IO_BYTE _OSCDS1 :1;
\r
7270 IO_BYTE _FLASHSEL :1;
\r
7271 IO_BYTE _MAINSEL :1;
\r
7272 IO_BYTE _SUBSEL3 :1;
\r
7273 IO_BYTE _SUBSEL2 :1;
\r
7274 IO_BYTE _SUBSEL1 :1;
\r
7275 IO_BYTE _SUBSEL0 :1;
\r
7279 IO_BYTE _SUBSEL :4;
\r
7288 IO_BYTE _MSTBO :1;
\r
7291 IO_BYTE _MAINKPEN :1;
\r
7292 IO_BYTE _MAINDSBL :1;
\r
7295 typedef union{ /* Mode Register */
\r
7317 typedef union{ /* R-bus Port Data Direct Read Register */
\r
7499 typedef union{ /* R-bus Port Direction Register */
\r
7681 typedef union{ /* R-bus Port Function Register */
\r
7863 typedef union{ /* R-bus Port Extra Function Register */
\r
7980 typedef union{ /* R-bus Port Output Drive Select Register */
\r
8162 typedef union{ /* R-bus Port Input Level Select Register */
\r
8344 typedef union{ /* R-bus Port Extra Input Level Select Register */
\r
8526 typedef union{ /* R-bus Port Pull-Up/Down Enable Register */
\r
8708 typedef union{ /* R-bus Port Pull-Up/Down Control Register */
\r
8890 typedef union{ /* Flash Memory/I-Cache Control Register */
\r
8893 IO_BYTE _ASYNC :1;
\r
8896 IO_BYTE _RDYEG :1;
\r
8911 IO_BYTE _PHASE :1;
\r
8927 IO_WORD _FLUSH :1;
\r
8933 IO_WORD _SIZE1 :1;
\r
8934 IO_WORD _SIZE0 :1;
\r
8959 IO_WORD _WEXH1 :1;
\r
8960 IO_WORD _WEXH0 :1;
\r
8987 IO_BYTE _ALEH2 :1;
\r
8988 IO_BYTE _ALEH1 :1;
\r
8989 IO_BYTE _ALEH0 :1;
\r
9021 typedef union{ /* Flash Security Control Register */
\r
9024 IO_LWORD _CRC31 :1;
\r
9025 IO_LWORD _CRC30 :1;
\r
9026 IO_LWORD _CRC29 :1;
\r
9027 IO_LWORD _CRC28 :1;
\r
9028 IO_LWORD _CRC27 :1;
\r
9029 IO_LWORD _CRC26 :1;
\r
9030 IO_LWORD _CRC25 :1;
\r
9031 IO_LWORD _CRC24 :1;
\r
9032 IO_LWORD _CRC23 :1;
\r
9033 IO_LWORD _CRC22 :1;
\r
9034 IO_LWORD _CRC21 :1;
\r
9035 IO_LWORD _CRC20 :1;
\r
9036 IO_LWORD _CRC19 :1;
\r
9037 IO_LWORD _CRC18 :1;
\r
9038 IO_LWORD _CRC17 :1;
\r
9039 IO_LWORD _CRC16 :1;
\r
9040 IO_LWORD _CRC15 :1;
\r
9041 IO_LWORD _CRC14 :1;
\r
9042 IO_LWORD _CRC13 :1;
\r
9043 IO_LWORD _CRC12 :1;
\r
9044 IO_LWORD _CRC11 :1;
\r
9045 IO_LWORD _CRC10 :1;
\r
9046 IO_LWORD _CRC9 :1;
\r
9047 IO_LWORD _CRC8 :1;
\r
9048 IO_LWORD _CRC7 :1;
\r
9049 IO_LWORD _CRC6 :1;
\r
9050 IO_LWORD _CRC5 :1;
\r
9051 IO_LWORD _CRC4 :1;
\r
9052 IO_LWORD _CRC3 :1;
\r
9053 IO_LWORD _CRC2 :1;
\r
9054 IO_LWORD _CRC1 :1;
\r
9055 IO_LWORD _CRC0 :1;
\r
9073 IO_LWORD _CSZ3 :1;
\r
9074 IO_LWORD _CSZ2 :1;
\r
9075 IO_LWORD _CSZ1 :1;
\r
9076 IO_LWORD _CSZ0 :1;
\r
9077 IO_LWORD _CSA15 :1;
\r
9078 IO_LWORD _CSA14 :1;
\r
9079 IO_LWORD _CSA13 :1;
\r
9080 IO_LWORD _CSA12 :1;
\r
9081 IO_LWORD _CSA11 :1;
\r
9082 IO_LWORD _CSA10 :1;
\r
9083 IO_LWORD _CSA9 :1;
\r
9084 IO_LWORD _CSA8 :1;
\r
9085 IO_LWORD _CSA7 :1;
\r
9086 IO_LWORD _CSA6 :1;
\r
9087 IO_LWORD _CSA5 :1;
\r
9088 IO_LWORD _CSA4 :1;
\r
9089 IO_LWORD _CSA3 :1;
\r
9090 IO_LWORD _CSA2 :1;
\r
9091 IO_LWORD _CSA1 :1;
\r
9092 IO_LWORD _CSA0 :1;
\r
9110 typedef union{ /* CAN 4 Control Register */
\r
9143 IO_WORD _EWarn :1;
\r
9144 IO_WORD _EPass :1;
\r
9198 IO_WORD _Tseg22 :1;
\r
9199 IO_WORD _Tseg21 :1;
\r
9200 IO_WORD _Tseg20 :1;
\r
9201 IO_WORD _Tseg13 :1;
\r
9202 IO_WORD _Tseg12 :1;
\r
9203 IO_WORD _Tseg11 :1;
\r
9204 IO_WORD _Tseg10 :1;
\r
9216 IO_WORD _Tseg2 :3;
\r
9217 IO_WORD _Tseg1 :4;
\r
9236 IO_WORD _LBack :1;
\r
9237 IO_WORD _Silent :1;
\r
9238 IO_WORD _Basic :1;
\r
9270 IO_WORD _BRPE3 :1;
\r
9271 IO_WORD _BRPE2 :1;
\r
9272 IO_WORD _BRPE1 :1;
\r
9273 IO_WORD _BRPE0 :1;
\r
9312 typedef union{ /* CAN 4 IF 1 */
\r
9360 IO_WORD _Control :1;
\r
9362 IO_WORD _TxReq :1;
\r
9363 IO_WORD _DataA :1;
\r
9364 IO_WORD _DataB :1;
\r
9391 IO_WORD _MsgVal :1;
\r
9412 IO_WORD _NewDat :1;
\r
9413 IO_WORD _MsgLst :1;
\r
9414 IO_WORD _IntPnd :1;
\r
9415 IO_WORD _UMask :1;
\r
9418 IO_WORD _RmtEn :1;
\r
9419 IO_WORD _TxRqst :1;
\r
9445 typedef union{ /* CAN 4 IF 2 */
\r
9493 IO_WORD _Control :1;
\r
9495 IO_WORD _TxReq :1;
\r
9496 IO_WORD _DataA :1;
\r
9497 IO_WORD _DataB :1;
\r
9524 IO_WORD _MsgVal :1;
\r
9545 IO_WORD _NewDat :1;
\r
9546 IO_WORD _MsgLst :1;
\r
9547 IO_WORD _IntPnd :1;
\r
9548 IO_WORD _UMask :1;
\r
9551 IO_WORD _RmtEn :1;
\r
9552 IO_WORD _TxRqst :1;
\r
9578 typedef union{ /* EDSU/MPU Registers */
\r
9603 IO_LWORD _FCPU :1;
\r
9604 IO_LWORD _FDMA :1;
\r
9605 IO_LWORD _EEMM :1;
\r
9607 IO_LWORD _SINT1 :1;
\r
9608 IO_LWORD _SINT0 :1;
\r
9609 IO_LWORD _EINT1 :1;
\r
9610 IO_LWORD _EINT0 :1;
\r
9611 IO_LWORD _EINTT :1;
\r
9612 IO_LWORD _EINTR :1;
\r
9641 IO_LWORD _SINT :2;
\r
9642 IO_LWORD _EINT :2;
\r
9664 IO_LWORD _IDX4 :1;
\r
9665 IO_LWORD _IDX3 :1;
\r
9666 IO_LWORD _IDX2 :1;
\r
9667 IO_LWORD _IDX1 :1;
\r
9668 IO_LWORD _IDX0 :1;
\r
9669 IO_LWORD _CDMA :1;
\r
9670 IO_LWORD _CSZ1 :1;
\r
9671 IO_LWORD _CSZ0 :1;
\r
9672 IO_LWORD _CRW1 :1;
\r
9673 IO_LWORD _CRW0 :1;
\r
9676 IO_LWORD _INT1 :1;
\r
9677 IO_LWORD _INT0 :1;
\r
9678 IO_LWORD _INTT :1;
\r
9679 IO_LWORD _INTR :1;
\r
9710 IO_LWORD _BD31 :1;
\r
9711 IO_LWORD _BD30 :1;
\r
9712 IO_LWORD _BD29 :1;
\r
9713 IO_LWORD _BD28 :1;
\r
9714 IO_LWORD _BD27 :1;
\r
9715 IO_LWORD _BD26 :1;
\r
9716 IO_LWORD _BD25 :1;
\r
9717 IO_LWORD _BD24 :1;
\r
9718 IO_LWORD _BD23 :1;
\r
9719 IO_LWORD _BD22 :1;
\r
9720 IO_LWORD _BD21 :1;
\r
9721 IO_LWORD _BD20 :1;
\r
9722 IO_LWORD _BD19 :1;
\r
9723 IO_LWORD _BD18 :1;
\r
9724 IO_LWORD _BD17 :1;
\r
9725 IO_LWORD _BD16 :1;
\r
9726 IO_LWORD _BD15 :1;
\r
9727 IO_LWORD _BD14 :1;
\r
9728 IO_LWORD _BD13 :1;
\r
9729 IO_LWORD _BD12 :1;
\r
9730 IO_LWORD _BD11 :1;
\r
9731 IO_LWORD _BD10 :1;
\r
9755 IO_LWORD _SRX1 :1;
\r
9757 IO_LWORD _SRX0 :1;
\r
9759 IO_LWORD _URX1 :1;
\r
9761 IO_LWORD _URX0 :1;
\r
9764 IO_LWORD _COMB :1;
\r
9765 IO_LWORD _CTC1 :1;
\r
9766 IO_LWORD _CTC0 :1;
\r
9767 IO_LWORD _OBS1 :1;
\r
9768 IO_LWORD _OBS0 :1;
\r
9769 IO_LWORD _OBT1 :1;
\r
9770 IO_LWORD _OBT0 :1;
\r
9818 IO_LWORD _SRX1 :1;
\r
9820 IO_LWORD _SRX0 :1;
\r
9822 IO_LWORD _URX1 :1;
\r
9824 IO_LWORD _URX0 :1;
\r
9827 IO_LWORD _COMB :1;
\r
9828 IO_LWORD _CTC1 :1;
\r
9829 IO_LWORD _CTC0 :1;
\r
9830 IO_LWORD _OBS1 :1;
\r
9831 IO_LWORD _OBS0 :1;
\r
9832 IO_LWORD _OBT1 :1;
\r
9833 IO_LWORD _OBT0 :1;
\r
9871 /* C-DECLARATIONS */
\r
9873 __IO_EXTERN __io PDR14STR pdr14; /* Port Data Register */
\r
9874 #define PDR14 pdr14.byte
\r
9875 #define PDR14_D7 pdr14.bit._D7
\r
9876 #define PDR14_D6 pdr14.bit._D6
\r
9877 #define PDR14_D5 pdr14.bit._D5
\r
9878 #define PDR14_D4 pdr14.bit._D4
\r
9879 #define PDR14_D3 pdr14.bit._D3
\r
9880 #define PDR14_D2 pdr14.bit._D2
\r
9881 #define PDR14_D1 pdr14.bit._D1
\r
9882 #define PDR14_D0 pdr14.bit._D0
\r
9883 __IO_EXTERN __io PDR15STR pdr15;
\r
9884 #define PDR15 pdr15.byte
\r
9885 #define PDR15_D7 pdr15.bit._D7
\r
9886 #define PDR15_D6 pdr15.bit._D6
\r
9887 #define PDR15_D5 pdr15.bit._D5
\r
9888 #define PDR15_D4 pdr15.bit._D4
\r
9889 #define PDR15_D3 pdr15.bit._D3
\r
9890 #define PDR15_D2 pdr15.bit._D2
\r
9891 #define PDR15_D1 pdr15.bit._D1
\r
9892 #define PDR15_D0 pdr15.bit._D0
\r
9893 __IO_EXTERN __io PDR16STR pdr16;
\r
9894 #define PDR16 pdr16.byte
\r
9895 #define PDR16_D7 pdr16.bit._D7
\r
9896 #define PDR16_D6 pdr16.bit._D6
\r
9897 #define PDR16_D5 pdr16.bit._D5
\r
9898 #define PDR16_D4 pdr16.bit._D4
\r
9899 #define PDR16_D3 pdr16.bit._D3
\r
9900 #define PDR16_D2 pdr16.bit._D2
\r
9901 #define PDR16_D1 pdr16.bit._D1
\r
9902 #define PDR16_D0 pdr16.bit._D0
\r
9903 __IO_EXTERN __io PDR17STR pdr17;
\r
9904 #define PDR17 pdr17.byte
\r
9905 #define PDR17_D7 pdr17.bit._D7
\r
9906 #define PDR17_D6 pdr17.bit._D6
\r
9907 #define PDR17_D5 pdr17.bit._D5
\r
9908 #define PDR17_D4 pdr17.bit._D4
\r
9909 #define PDR17_D3 pdr17.bit._D3
\r
9910 #define PDR17_D2 pdr17.bit._D2
\r
9911 #define PDR17_D1 pdr17.bit._D1
\r
9912 #define PDR17_D0 pdr17.bit._D0
\r
9913 __IO_EXTERN __io PDR18STR pdr18;
\r
9914 #define PDR18 pdr18.byte
\r
9915 #define PDR18_D6 pdr18.bit._D6
\r
9916 #define PDR18_D2 pdr18.bit._D2
\r
9917 __IO_EXTERN __io PDR19STR pdr19;
\r
9918 #define PDR19 pdr19.byte
\r
9919 #define PDR19_D6 pdr19.bit._D6
\r
9920 #define PDR19_D2 pdr19.bit._D2
\r
9921 #define PDR19_D1 pdr19.bit._D1
\r
9922 #define PDR19_D0 pdr19.bit._D0
\r
9923 __IO_EXTERN __io PDR20STR pdr20;
\r
9924 #define PDR20 pdr20.byte
\r
9925 #define PDR20_D7 pdr20.bit._D7
\r
9926 #define PDR20_D6 pdr20.bit._D6
\r
9927 #define PDR20_D5 pdr20.bit._D5
\r
9928 #define PDR20_D4 pdr20.bit._D4
\r
9929 #define PDR20_D3 pdr20.bit._D3
\r
9930 #define PDR20_D2 pdr20.bit._D2
\r
9931 #define PDR20_D1 pdr20.bit._D1
\r
9932 #define PDR20_D0 pdr20.bit._D0
\r
9933 __IO_EXTERN __io PDR21STR pdr21;
\r
9934 #define PDR21 pdr21.byte
\r
9935 #define PDR21_D7 pdr21.bit._D7
\r
9936 #define PDR21_D6 pdr21.bit._D6
\r
9937 #define PDR21_D5 pdr21.bit._D5
\r
9938 #define PDR21_D4 pdr21.bit._D4
\r
9939 #define PDR21_D3 pdr21.bit._D3
\r
9940 #define PDR21_D2 pdr21.bit._D2
\r
9941 #define PDR21_D1 pdr21.bit._D1
\r
9942 #define PDR21_D0 pdr21.bit._D0
\r
9943 __IO_EXTERN __io PDR22STR pdr22;
\r
9944 #define PDR22 pdr22.byte
\r
9945 #define PDR22_D5 pdr22.bit._D5
\r
9946 #define PDR22_D4 pdr22.bit._D4
\r
9947 #define PDR22_D1 pdr22.bit._D1
\r
9948 #define PDR22_D0 pdr22.bit._D0
\r
9949 __IO_EXTERN __io PDR24STR pdr24;
\r
9950 #define PDR24 pdr24.byte
\r
9951 #define PDR24_D7 pdr24.bit._D7
\r
9952 #define PDR24_D6 pdr24.bit._D6
\r
9953 #define PDR24_D5 pdr24.bit._D5
\r
9954 #define PDR24_D4 pdr24.bit._D4
\r
9955 #define PDR24_D3 pdr24.bit._D3
\r
9956 #define PDR24_D2 pdr24.bit._D2
\r
9957 #define PDR24_D1 pdr24.bit._D1
\r
9958 #define PDR24_D0 pdr24.bit._D0
\r
9959 __IO_EXTERN __io PDR26STR pdr26;
\r
9960 #define PDR26 pdr26.byte
\r
9961 #define PDR26_D1 pdr26.bit._D1
\r
9962 #define PDR26_D0 pdr26.bit._D0
\r
9963 __IO_EXTERN __io PDR27STR pdr27;
\r
9964 #define PDR27 pdr27.byte
\r
9965 #define PDR27_D7 pdr27.bit._D7
\r
9966 #define PDR27_D6 pdr27.bit._D6
\r
9967 #define PDR27_D5 pdr27.bit._D5
\r
9968 #define PDR27_D4 pdr27.bit._D4
\r
9969 #define PDR27_D3 pdr27.bit._D3
\r
9970 #define PDR27_D2 pdr27.bit._D2
\r
9971 #define PDR27_D1 pdr27.bit._D1
\r
9972 #define PDR27_D0 pdr27.bit._D0
\r
9973 __IO_EXTERN __io PDR28STR pdr28;
\r
9974 #define PDR28 pdr28.byte
\r
9975 #define PDR28_D7 pdr28.bit._D7
\r
9976 #define PDR28_D6 pdr28.bit._D6
\r
9977 #define PDR28_D5 pdr28.bit._D5
\r
9978 #define PDR28_D4 pdr28.bit._D4
\r
9979 #define PDR28_D3 pdr28.bit._D3
\r
9980 #define PDR28_D2 pdr28.bit._D2
\r
9981 #define PDR28_D1 pdr28.bit._D1
\r
9982 #define PDR28_D0 pdr28.bit._D0
\r
9983 __IO_EXTERN __io PDR29STR pdr29;
\r
9984 #define PDR29 pdr29.byte
\r
9985 #define PDR29_D7 pdr29.bit._D7
\r
9986 #define PDR29_D6 pdr29.bit._D6
\r
9987 #define PDR29_D5 pdr29.bit._D5
\r
9988 #define PDR29_D4 pdr29.bit._D4
\r
9989 #define PDR29_D3 pdr29.bit._D3
\r
9990 #define PDR29_D2 pdr29.bit._D2
\r
9991 #define PDR29_D1 pdr29.bit._D1
\r
9992 #define PDR29_D0 pdr29.bit._D0
\r
9993 __IO_EXTERN __io EIRR0STR eirr0; /* External Interrupt 0-7 */
\r
9994 #define EIRR0 eirr0.byte
\r
9995 #define EIRR0_ER7 eirr0.bit._ER7
\r
9996 #define EIRR0_ER6 eirr0.bit._ER6
\r
9997 #define EIRR0_ER5 eirr0.bit._ER5
\r
9998 #define EIRR0_ER4 eirr0.bit._ER4
\r
9999 #define EIRR0_ER3 eirr0.bit._ER3
\r
10000 #define EIRR0_ER2 eirr0.bit._ER2
\r
10001 #define EIRR0_ER1 eirr0.bit._ER1
\r
10002 #define EIRR0_ER0 eirr0.bit._ER0
\r
10003 __IO_EXTERN __io ENIR0STR enir0;
\r
10004 #define ENIR0 enir0.byte
\r
10005 #define ENIR0_EN7 enir0.bit._EN7
\r
10006 #define ENIR0_EN6 enir0.bit._EN6
\r
10007 #define ENIR0_EN5 enir0.bit._EN5
\r
10008 #define ENIR0_EN4 enir0.bit._EN4
\r
10009 #define ENIR0_EN3 enir0.bit._EN3
\r
10010 #define ENIR0_EN2 enir0.bit._EN2
\r
10011 #define ENIR0_EN1 enir0.bit._EN1
\r
10012 #define ENIR0_EN0 enir0.bit._EN0
\r
10013 __IO_EXTERN __io ELVR0STR elvr0;
\r
10014 #define ELVR0 elvr0.word
\r
10015 #define ELVR0_LB7 elvr0.bit._LB7
\r
10016 #define ELVR0_LA7 elvr0.bit._LA7
\r
10017 #define ELVR0_LB6 elvr0.bit._LB6
\r
10018 #define ELVR0_LA6 elvr0.bit._LA6
\r
10019 #define ELVR0_LB5 elvr0.bit._LB5
\r
10020 #define ELVR0_LA5 elvr0.bit._LA5
\r
10021 #define ELVR0_LB4 elvr0.bit._LB4
\r
10022 #define ELVR0_LA4 elvr0.bit._LA4
\r
10023 #define ELVR0_LB3 elvr0.bit._LB3
\r
10024 #define ELVR0_LA3 elvr0.bit._LA3
\r
10025 #define ELVR0_LB2 elvr0.bit._LB2
\r
10026 #define ELVR0_LA2 elvr0.bit._LA2
\r
10027 #define ELVR0_LB1 elvr0.bit._LB1
\r
10028 #define ELVR0_LA1 elvr0.bit._LA1
\r
10029 #define ELVR0_LB0 elvr0.bit._LB0
\r
10030 #define ELVR0_LA0 elvr0.bit._LA0
\r
10031 __IO_EXTERN __io EIRR1STR eirr1; /* External Interrupt 8-15 */
\r
10032 #define EIRR1 eirr1.byte
\r
10033 #define EIRR1_ER15 eirr1.bit._ER15
\r
10034 #define EIRR1_ER14 eirr1.bit._ER14
\r
10035 #define EIRR1_ER13 eirr1.bit._ER13
\r
10036 #define EIRR1_ER12 eirr1.bit._ER12
\r
10037 #define EIRR1_ER11 eirr1.bit._ER11
\r
10038 #define EIRR1_ER10 eirr1.bit._ER10
\r
10039 #define EIRR1_ER9 eirr1.bit._ER9
\r
10040 #define EIRR1_ER8 eirr1.bit._ER8
\r
10041 __IO_EXTERN __io ENIR1STR enir1;
\r
10042 #define ENIR1 enir1.byte
\r
10043 #define ENIR1_EN15 enir1.bit._EN15
\r
10044 #define ENIR1_EN14 enir1.bit._EN14
\r
10045 #define ENIR1_EN13 enir1.bit._EN13
\r
10046 #define ENIR1_EN12 enir1.bit._EN12
\r
10047 #define ENIR1_EN11 enir1.bit._EN11
\r
10048 #define ENIR1_EN10 enir1.bit._EN10
\r
10049 #define ENIR1_EN9 enir1.bit._EN9
\r
10050 #define ENIR1_EN8 enir1.bit._EN8
\r
10051 __IO_EXTERN __io ELVR1STR elvr1;
\r
10052 #define ELVR1 elvr1.word
\r
10053 #define ELVR1_LB15 elvr1.bit._LB15
\r
10054 #define ELVR1_LA15 elvr1.bit._LA15
\r
10055 #define ELVR1_LB14 elvr1.bit._LB14
\r
10056 #define ELVR1_LA14 elvr1.bit._LA14
\r
10057 #define ELVR1_LB13 elvr1.bit._LB13
\r
10058 #define ELVR1_LA13 elvr1.bit._LA13
\r
10059 #define ELVR1_LB12 elvr1.bit._LB12
\r
10060 #define ELVR1_LA12 elvr1.bit._LA12
\r
10061 #define ELVR1_LB11 elvr1.bit._LB11
\r
10062 #define ELVR1_LA11 elvr1.bit._LA11
\r
10063 #define ELVR1_LB10 elvr1.bit._LB10
\r
10064 #define ELVR1_LA10 elvr1.bit._LA10
\r
10065 #define ELVR1_LB9 elvr1.bit._LB9
\r
10066 #define ELVR1_LA9 elvr1.bit._LA9
\r
10067 #define ELVR1_LB8 elvr1.bit._LB8
\r
10068 #define ELVR1_LA8 elvr1.bit._LA8
\r
10069 __IO_EXTERN __io DICRSTR dicr; /* DLYI/I-unit */
\r
10070 #define DICR dicr.byte
\r
10071 #define DICR_DLYI dicr.bit._DLYI
\r
10072 __IO_EXTERN __io HRCLSTR hrcl;
\r
10073 #define HRCL hrcl.byte
\r
10074 #define HRCL_MHALTI hrcl.bit._MHALTI
\r
10075 #define HRCL_LVL4 hrcl.bit._LVL4
\r
10076 #define HRCL_LVL3 hrcl.bit._LVL3
\r
10077 #define HRCL_LVL2 hrcl.bit._LVL2
\r
10078 #define HRCL_LVL1 hrcl.bit._LVL1
\r
10079 #define HRCL_LVL0 hrcl.bit._LVL0
\r
10080 #define HRCL_LVL hrcl.bitc._LVL
\r
10081 __IO_EXTERN __io IO_WORD rbsync; /* R-Bus Sync */
\r
10082 #define RBSYNC rbsync
\r
10083 __IO_EXTERN __io SCR00STR scr00; /* USART (LIN) 0 */
\r
10084 #define SCR00 scr00.byte
\r
10085 #define SCR00_PEN scr00.bit._PEN
\r
10086 #define SCR00_P scr00.bit._P
\r
10087 #define SCR00_SBL scr00.bit._SBL
\r
10088 #define SCR00_CL scr00.bit._CL
\r
10089 #define SCR00_AD scr00.bit._AD
\r
10090 #define SCR00_CRE scr00.bit._CRE
\r
10091 #define SCR00_RXE scr00.bit._RXE
\r
10092 #define SCR00_TXE scr00.bit._TXE
\r
10093 __IO_EXTERN __io SMR00STR smr00;
\r
10094 #define SMR00 smr00.byte
\r
10095 #define SMR00_MD1 smr00.bit._MD1
\r
10096 #define SMR00_MD0 smr00.bit._MD0
\r
10097 #define SMR00_OTO smr00.bit._OTO
\r
10098 #define SMR00_EXT smr00.bit._EXT
\r
10099 #define SMR00_REST smr00.bit._REST
\r
10100 #define SMR00_UPCL smr00.bit._UPCL
\r
10101 #define SMR00_SCKE smr00.bit._SCKE
\r
10102 #define SMR00_SOE smr00.bit._SOE
\r
10103 #define SMR00_MD smr00.bitc._MD
\r
10104 __IO_EXTERN __io SSR00STR ssr00;
\r
10105 #define SSR00 ssr00.byte
\r
10106 #define SSR00_PE ssr00.bit._PE
\r
10107 #define SSR00_ORE ssr00.bit._ORE
\r
10108 #define SSR00_FRE ssr00.bit._FRE
\r
10109 #define SSR00_RDRF ssr00.bit._RDRF
\r
10110 #define SSR00_TDRE ssr00.bit._TDRE
\r
10111 #define SSR00_BDS ssr00.bit._BDS
\r
10112 #define SSR00_RIE ssr00.bit._RIE
\r
10113 #define SSR00_TIE ssr00.bit._TIE
\r
10114 __IO_EXTERN __io IO_BYTE rdr00;
\r
10115 #define RDR00 rdr00
\r
10116 __IO_EXTERN __io IO_BYTE tdr00;
\r
10117 #define TDR00 tdr00
\r
10118 __IO_EXTERN __io ESCR00STR escr00;
\r
10119 #define ESCR00 escr00.byte
\r
10120 #define ESCR00_LBIE escr00.bit._LBIE
\r
10121 #define ESCR00_LBD escr00.bit._LBD
\r
10122 #define ESCR00_LBL1 escr00.bit._LBL1
\r
10123 #define ESCR00_LBL0 escr00.bit._LBL0
\r
10124 #define ESCR00_SOPE escr00.bit._SOPE
\r
10125 #define ESCR00_SIOP escr00.bit._SIOP
\r
10126 #define ESCR00_CCO escr00.bit._CCO
\r
10127 #define ESCR00_SCES escr00.bit._SCES
\r
10128 #define ESCR00_LBL escr00.bitc._LBL
\r
10129 __IO_EXTERN __io ECCR00STR eccr00;
\r
10130 #define ECCR00 eccr00.byte
\r
10131 #define ECCR00_INV eccr00.bit._INV
\r
10132 #define ECCR00_LBR eccr00.bit._LBR
\r
10133 #define ECCR00_MS eccr00.bit._MS
\r
10134 #define ECCR00_SCDE eccr00.bit._SCDE
\r
10135 #define ECCR00_SSM eccr00.bit._SSM
\r
10136 #define ECCR00_BIE eccr00.bit._BIE
\r
10137 #define ECCR00_RBI eccr00.bit._RBI
\r
10138 #define ECCR00_TBI eccr00.bit._TBI
\r
10139 __IO_EXTERN __io SCR01STR scr01; /* USART (LIN) 1 */
\r
10140 #define SCR01 scr01.byte
\r
10141 #define SCR01_PEN scr01.bit._PEN
\r
10142 #define SCR01_P scr01.bit._P
\r
10143 #define SCR01_SBL scr01.bit._SBL
\r
10144 #define SCR01_CL scr01.bit._CL
\r
10145 #define SCR01_AD scr01.bit._AD
\r
10146 #define SCR01_CRE scr01.bit._CRE
\r
10147 #define SCR01_RXE scr01.bit._RXE
\r
10148 #define SCR01_TXE scr01.bit._TXE
\r
10149 __IO_EXTERN __io SMR01STR smr01;
\r
10150 #define SMR01 smr01.byte
\r
10151 #define SMR01_MD1 smr01.bit._MD1
\r
10152 #define SMR01_MD0 smr01.bit._MD0
\r
10153 #define SMR01_OTO smr01.bit._OTO
\r
10154 #define SMR01_EXT smr01.bit._EXT
\r
10155 #define SMR01_REST smr01.bit._REST
\r
10156 #define SMR01_UPCL smr01.bit._UPCL
\r
10157 #define SMR01_SCKE smr01.bit._SCKE
\r
10158 #define SMR01_SOE smr01.bit._SOE
\r
10159 #define SMR01_MD smr01.bitc._MD
\r
10160 __IO_EXTERN __io SSR01STR ssr01;
\r
10161 #define SSR01 ssr01.byte
\r
10162 #define SSR01_PE ssr01.bit._PE
\r
10163 #define SSR01_ORE ssr01.bit._ORE
\r
10164 #define SSR01_FRE ssr01.bit._FRE
\r
10165 #define SSR01_RDRF ssr01.bit._RDRF
\r
10166 #define SSR01_TDRE ssr01.bit._TDRE
\r
10167 #define SSR01_BDS ssr01.bit._BDS
\r
10168 #define SSR01_RIE ssr01.bit._RIE
\r
10169 #define SSR01_TIE ssr01.bit._TIE
\r
10170 __IO_EXTERN __io IO_BYTE rdr01;
\r
10171 #define RDR01 rdr01
\r
10172 __IO_EXTERN __io IO_BYTE tdr01;
\r
10173 #define TDR01 tdr01
\r
10174 __IO_EXTERN __io ESCR01STR escr01;
\r
10175 #define ESCR01 escr01.byte
\r
10176 #define ESCR01_LBIE escr01.bit._LBIE
\r
10177 #define ESCR01_LBD escr01.bit._LBD
\r
10178 #define ESCR01_LBL1 escr01.bit._LBL1
\r
10179 #define ESCR01_LBL0 escr01.bit._LBL0
\r
10180 #define ESCR01_SOPE escr01.bit._SOPE
\r
10181 #define ESCR01_SIOP escr01.bit._SIOP
\r
10182 #define ESCR01_CCO escr01.bit._CCO
\r
10183 #define ESCR01_SCES escr01.bit._SCES
\r
10184 #define ESCR01_LBL escr01.bitc._LBL
\r
10185 __IO_EXTERN __io ECCR01STR eccr01;
\r
10186 #define ECCR01 eccr01.byte
\r
10187 #define ECCR01_INV eccr01.bit._INV
\r
10188 #define ECCR01_LBR eccr01.bit._LBR
\r
10189 #define ECCR01_MS eccr01.bit._MS
\r
10190 #define ECCR01_SCDE eccr01.bit._SCDE
\r
10191 #define ECCR01_SSM eccr01.bit._SSM
\r
10192 #define ECCR01_BIE eccr01.bit._BIE
\r
10193 #define ECCR01_RBI eccr01.bit._RBI
\r
10194 #define ECCR01_TBI eccr01.bit._TBI
\r
10195 __IO_EXTERN __io SCR02STR scr02; /* USART (LIN) 2 */
\r
10196 #define SCR02 scr02.byte
\r
10197 #define SCR02_PEN scr02.bit._PEN
\r
10198 #define SCR02_P scr02.bit._P
\r
10199 #define SCR02_SBL scr02.bit._SBL
\r
10200 #define SCR02_CL scr02.bit._CL
\r
10201 #define SCR02_AD scr02.bit._AD
\r
10202 #define SCR02_CRE scr02.bit._CRE
\r
10203 #define SCR02_RXE scr02.bit._RXE
\r
10204 #define SCR02_TXE scr02.bit._TXE
\r
10205 __IO_EXTERN __io SMR02STR smr02;
\r
10206 #define SMR02 smr02.byte
\r
10207 #define SMR02_MD1 smr02.bit._MD1
\r
10208 #define SMR02_MD0 smr02.bit._MD0
\r
10209 #define SMR02_OTO smr02.bit._OTO
\r
10210 #define SMR02_EXT smr02.bit._EXT
\r
10211 #define SMR02_REST smr02.bit._REST
\r
10212 #define SMR02_UPCL smr02.bit._UPCL
\r
10213 #define SMR02_SCKE smr02.bit._SCKE
\r
10214 #define SMR02_SOE smr02.bit._SOE
\r
10215 #define SMR02_MD smr02.bitc._MD
\r
10216 __IO_EXTERN __io SSR02STR ssr02;
\r
10217 #define SSR02 ssr02.byte
\r
10218 #define SSR02_PE ssr02.bit._PE
\r
10219 #define SSR02_ORE ssr02.bit._ORE
\r
10220 #define SSR02_FRE ssr02.bit._FRE
\r
10221 #define SSR02_RDRF ssr02.bit._RDRF
\r
10222 #define SSR02_TDRE ssr02.bit._TDRE
\r
10223 #define SSR02_BDS ssr02.bit._BDS
\r
10224 #define SSR02_RIE ssr02.bit._RIE
\r
10225 #define SSR02_TIE ssr02.bit._TIE
\r
10226 __IO_EXTERN __io IO_BYTE rdr02;
\r
10227 #define RDR02 rdr02
\r
10228 __IO_EXTERN __io IO_BYTE tdr02;
\r
10229 #define TDR02 tdr02
\r
10230 __IO_EXTERN __io ESCR02STR escr02;
\r
10231 #define ESCR02 escr02.byte
\r
10232 #define ESCR02_LBIE escr02.bit._LBIE
\r
10233 #define ESCR02_LBD escr02.bit._LBD
\r
10234 #define ESCR02_LBL1 escr02.bit._LBL1
\r
10235 #define ESCR02_LBL0 escr02.bit._LBL0
\r
10236 #define ESCR02_SOPE escr02.bit._SOPE
\r
10237 #define ESCR02_SIOP escr02.bit._SIOP
\r
10238 #define ESCR02_CCO escr02.bit._CCO
\r
10239 #define ESCR02_SCES escr02.bit._SCES
\r
10240 #define ESCR02_LBL escr02.bitc._LBL
\r
10241 __IO_EXTERN __io ECCR02STR eccr02;
\r
10242 #define ECCR02 eccr02.byte
\r
10243 #define ECCR02_INV eccr02.bit._INV
\r
10244 #define ECCR02_LBR eccr02.bit._LBR
\r
10245 #define ECCR02_MS eccr02.bit._MS
\r
10246 #define ECCR02_SCDE eccr02.bit._SCDE
\r
10247 #define ECCR02_SSM eccr02.bit._SSM
\r
10248 #define ECCR02_BIE eccr02.bit._BIE
\r
10249 #define ECCR02_RBI eccr02.bit._RBI
\r
10250 #define ECCR02_TBI eccr02.bit._TBI
\r
10251 __IO_EXTERN __io SCR03STR scr03; /* USART (LIN) 3 */
\r
10252 #define SCR03 scr03.byte
\r
10253 #define SCR03_PEN scr03.bit._PEN
\r
10254 #define SCR03_P scr03.bit._P
\r
10255 #define SCR03_SBL scr03.bit._SBL
\r
10256 #define SCR03_CL scr03.bit._CL
\r
10257 #define SCR03_AD scr03.bit._AD
\r
10258 #define SCR03_CRE scr03.bit._CRE
\r
10259 #define SCR03_RXE scr03.bit._RXE
\r
10260 #define SCR03_TXE scr03.bit._TXE
\r
10261 __IO_EXTERN __io SMR03STR smr03;
\r
10262 #define SMR03 smr03.byte
\r
10263 #define SMR03_MD1 smr03.bit._MD1
\r
10264 #define SMR03_MD0 smr03.bit._MD0
\r
10265 #define SMR03_OTO smr03.bit._OTO
\r
10266 #define SMR03_EXT smr03.bit._EXT
\r
10267 #define SMR03_REST smr03.bit._REST
\r
10268 #define SMR03_UPCL smr03.bit._UPCL
\r
10269 #define SMR03_SCKE smr03.bit._SCKE
\r
10270 #define SMR03_SOE smr03.bit._SOE
\r
10271 #define SMR03_MD smr03.bitc._MD
\r
10272 __IO_EXTERN __io SSR03STR ssr03;
\r
10273 #define SSR03 ssr03.byte
\r
10274 #define SSR03_PE ssr03.bit._PE
\r
10275 #define SSR03_ORE ssr03.bit._ORE
\r
10276 #define SSR03_FRE ssr03.bit._FRE
\r
10277 #define SSR03_RDRF ssr03.bit._RDRF
\r
10278 #define SSR03_TDRE ssr03.bit._TDRE
\r
10279 #define SSR03_BDS ssr03.bit._BDS
\r
10280 #define SSR03_RIE ssr03.bit._RIE
\r
10281 #define SSR03_TIE ssr03.bit._TIE
\r
10282 __IO_EXTERN __io IO_BYTE rdr03;
\r
10283 #define RDR03 rdr03
\r
10284 __IO_EXTERN __io IO_BYTE tdr03;
\r
10285 #define TDR03 tdr03
\r
10286 __IO_EXTERN __io ESCR03STR escr03;
\r
10287 #define ESCR03 escr03.byte
\r
10288 #define ESCR03_LBIE escr03.bit._LBIE
\r
10289 #define ESCR03_LBD escr03.bit._LBD
\r
10290 #define ESCR03_LBL1 escr03.bit._LBL1
\r
10291 #define ESCR03_LBL0 escr03.bit._LBL0
\r
10292 #define ESCR03_SOPE escr03.bit._SOPE
\r
10293 #define ESCR03_SIOP escr03.bit._SIOP
\r
10294 #define ESCR03_CCO escr03.bit._CCO
\r
10295 #define ESCR03_SCES escr03.bit._SCES
\r
10296 #define ESCR03_LBL escr03.bitc._LBL
\r
10297 __IO_EXTERN __io ECCR03STR eccr03;
\r
10298 #define ECCR03 eccr03.byte
\r
10299 #define ECCR03_INV eccr03.bit._INV
\r
10300 #define ECCR03_LBR eccr03.bit._LBR
\r
10301 #define ECCR03_MS eccr03.bit._MS
\r
10302 #define ECCR03_SCDE eccr03.bit._SCDE
\r
10303 #define ECCR03_SSM eccr03.bit._SSM
\r
10304 #define ECCR03_BIE eccr03.bit._BIE
\r
10305 #define ECCR03_RBI eccr03.bit._RBI
\r
10306 #define ECCR03_TBI eccr03.bit._TBI
\r
10307 __IO_EXTERN __io SCR04STR scr04; /* USART (LIN) 4 with FIFO */
\r
10308 #define SCR04 scr04.byte
\r
10309 #define SCR04_PEN scr04.bit._PEN
\r
10310 #define SCR04_P scr04.bit._P
\r
10311 #define SCR04_SBL scr04.bit._SBL
\r
10312 #define SCR04_CL scr04.bit._CL
\r
10313 #define SCR04_AD scr04.bit._AD
\r
10314 #define SCR04_CRE scr04.bit._CRE
\r
10315 #define SCR04_RXE scr04.bit._RXE
\r
10316 #define SCR04_TXE scr04.bit._TXE
\r
10317 __IO_EXTERN __io SMR04STR smr04;
\r
10318 #define SMR04 smr04.byte
\r
10319 #define SMR04_MD1 smr04.bit._MD1
\r
10320 #define SMR04_MD0 smr04.bit._MD0
\r
10321 #define SMR04_OTO smr04.bit._OTO
\r
10322 #define SMR04_EXT smr04.bit._EXT
\r
10323 #define SMR04_REST smr04.bit._REST
\r
10324 #define SMR04_UPCL smr04.bit._UPCL
\r
10325 #define SMR04_SCKE smr04.bit._SCKE
\r
10326 #define SMR04_SOE smr04.bit._SOE
\r
10327 #define SMR04_MD smr04.bitc._MD
\r
10328 __IO_EXTERN __io SSR04STR ssr04;
\r
10329 #define SSR04 ssr04.byte
\r
10330 #define SSR04_PE ssr04.bit._PE
\r
10331 #define SSR04_ORE ssr04.bit._ORE
\r
10332 #define SSR04_FRE ssr04.bit._FRE
\r
10333 #define SSR04_RDRF ssr04.bit._RDRF
\r
10334 #define SSR04_TDRE ssr04.bit._TDRE
\r
10335 #define SSR04_BDS ssr04.bit._BDS
\r
10336 #define SSR04_RIE ssr04.bit._RIE
\r
10337 #define SSR04_TIE ssr04.bit._TIE
\r
10338 __IO_EXTERN __io IO_BYTE rdr04;
\r
10339 #define RDR04 rdr04
\r
10340 __IO_EXTERN __io IO_BYTE tdr04;
\r
10341 #define TDR04 tdr04
\r
10342 __IO_EXTERN __io ESCR04STR escr04;
\r
10343 #define ESCR04 escr04.byte
\r
10344 #define ESCR04_LBIE escr04.bit._LBIE
\r
10345 #define ESCR04_LBD escr04.bit._LBD
\r
10346 #define ESCR04_LBL1 escr04.bit._LBL1
\r
10347 #define ESCR04_LBL0 escr04.bit._LBL0
\r
10348 #define ESCR04_SOPE escr04.bit._SOPE
\r
10349 #define ESCR04_SIOP escr04.bit._SIOP
\r
10350 #define ESCR04_CCO escr04.bit._CCO
\r
10351 #define ESCR04_SCES escr04.bit._SCES
\r
10352 #define ESCR04_LBL escr04.bitc._LBL
\r
10353 __IO_EXTERN __io ECCR04STR eccr04;
\r
10354 #define ECCR04 eccr04.byte
\r
10355 #define ECCR04_INV eccr04.bit._INV
\r
10356 #define ECCR04_LBR eccr04.bit._LBR
\r
10357 #define ECCR04_MS eccr04.bit._MS
\r
10358 #define ECCR04_SCDE eccr04.bit._SCDE
\r
10359 #define ECCR04_SSM eccr04.bit._SSM
\r
10360 #define ECCR04_BIE eccr04.bit._BIE
\r
10361 #define ECCR04_RBI eccr04.bit._RBI
\r
10362 #define ECCR04_TBI eccr04.bit._TBI
\r
10363 __IO_EXTERN __io IO_BYTE fsr04;
\r
10364 #define FSR04 fsr04
\r
10365 __IO_EXTERN __io FCR04STR fcr04;
\r
10366 #define FCR04 fcr04.byte
\r
10367 #define FCR04_RXL3 fcr04.bit._RXL3
\r
10368 #define FCR04_RXL2 fcr04.bit._RXL2
\r
10369 #define FCR04_RXL1 fcr04.bit._RXL1
\r
10370 #define FCR04_RXL0 fcr04.bit._RXL0
\r
10371 #define FCR04_ERX fcr04.bit._ERX
\r
10372 #define FCR04_ETX fcr04.bit._ETX
\r
10373 #define FCR04_SVD fcr04.bit._SVD
\r
10374 #define FCR04_RXL fcr04.bitc._RXL
\r
10375 __IO_EXTERN __io IO_WORD bgr00; /* Bauderate Generator USART (LIN) 0-7 */
\r
10376 #define BGR00 bgr00
\r
10377 __IO_EXTERN __io IO_BYTE bgr100;
\r
10378 #define BGR100 bgr100
\r
10379 __IO_EXTERN __io IO_BYTE bgr000;
\r
10380 #define BGR000 bgr000
\r
10381 __IO_EXTERN __io IO_WORD bgr01;
\r
10382 #define BGR01 bgr01
\r
10383 __IO_EXTERN __io IO_BYTE bgr101;
\r
10384 #define BGR101 bgr101
\r
10385 __IO_EXTERN __io IO_BYTE bgr001;
\r
10386 #define BGR001 bgr001
\r
10387 __IO_EXTERN __io IO_WORD bgr02;
\r
10388 #define BGR02 bgr02
\r
10389 __IO_EXTERN __io IO_BYTE bgr102;
\r
10390 #define BGR102 bgr102
\r
10391 __IO_EXTERN __io IO_BYTE bgr002;
\r
10392 #define BGR002 bgr002
\r
10393 __IO_EXTERN __io IO_WORD bgr03;
\r
10394 #define BGR03 bgr03
\r
10395 __IO_EXTERN __io IO_BYTE bgr103;
\r
10396 #define BGR103 bgr103
\r
10397 __IO_EXTERN __io IO_BYTE bgr003;
\r
10398 #define BGR003 bgr003
\r
10399 __IO_EXTERN __io IO_WORD bgr04;
\r
10400 #define BGR04 bgr04
\r
10401 __IO_EXTERN __io IO_BYTE bgr104;
\r
10402 #define BGR104 bgr104
\r
10403 __IO_EXTERN __io IO_BYTE bgr004;
\r
10404 #define BGR004 bgr004
\r
10405 __IO_EXTERN __io IBCR0STR ibcr0; /* I2C 0 */
\r
10406 #define IBCR0 ibcr0.byte
\r
10407 #define IBCR0_BER ibcr0.bit._BER
\r
10408 #define IBCR0_BEIE ibcr0.bit._BEIE
\r
10409 #define IBCR0_SCC ibcr0.bit._SCC
\r
10410 #define IBCR0_MSS ibcr0.bit._MSS
\r
10411 #define IBCR0_ACK ibcr0.bit._ACK
\r
10412 #define IBCR0_GCAA ibcr0.bit._GCAA
\r
10413 #define IBCR0_INTE ibcr0.bit._INTE
\r
10414 #define IBCR0_INT ibcr0.bit._INT
\r
10415 __IO_EXTERN __io IBSR0STR ibsr0;
\r
10416 #define IBSR0 ibsr0.byte
\r
10417 #define IBSR0_BB ibsr0.bit._BB
\r
10418 #define IBSR0_RSC ibsr0.bit._RSC
\r
10419 #define IBSR0_AL ibsr0.bit._AL
\r
10420 #define IBSR0_LRB ibsr0.bit._LRB
\r
10421 #define IBSR0_TRX ibsr0.bit._TRX
\r
10422 #define IBSR0_AAS ibsr0.bit._AAS
\r
10423 #define IBSR0_GCA ibsr0.bit._GCA
\r
10424 #define IBSR0_ADT ibsr0.bit._ADT
\r
10425 __IO_EXTERN __io ITBA0STR itba0;
\r
10426 #define ITBA0 itba0.word
\r
10427 #define ITBA0_TA9 itba0.bit._TA9
\r
10428 #define ITBA0_TA8 itba0.bit._TA8
\r
10429 #define ITBA0_TA7 itba0.bit._TA7
\r
10430 #define ITBA0_TA6 itba0.bit._TA6
\r
10431 #define ITBA0_TA5 itba0.bit._TA5
\r
10432 #define ITBA0_TA4 itba0.bit._TA4
\r
10433 #define ITBA0_TA3 itba0.bit._TA3
\r
10434 #define ITBA0_TA2 itba0.bit._TA2
\r
10435 #define ITBA0_TA1 itba0.bit._TA1
\r
10436 #define ITBA0_TA0 itba0.bit._TA0
\r
10437 __IO_EXTERN __io ITBAH0STR itbah0;
\r
10438 #define ITBAH0 itbah0.byte
\r
10439 #define ITBAH0_TA9 itbah0.bit._TA9
\r
10440 #define ITBAH0_TA8 itbah0.bit._TA8
\r
10441 __IO_EXTERN __io ITBAL0STR itbal0;
\r
10442 #define ITBAL0 itbal0.byte
\r
10443 #define ITBAL0_TA7 itbal0.bit._TA7
\r
10444 #define ITBAL0_TA6 itbal0.bit._TA6
\r
10445 #define ITBAL0_TA5 itbal0.bit._TA5
\r
10446 #define ITBAL0_TA4 itbal0.bit._TA4
\r
10447 #define ITBAL0_TA3 itbal0.bit._TA3
\r
10448 #define ITBAL0_TA2 itbal0.bit._TA2
\r
10449 #define ITBAL0_TA1 itbal0.bit._TA1
\r
10450 #define ITBAL0_TA0 itbal0.bit._TA0
\r
10451 __IO_EXTERN __io ITMK0STR itmk0;
\r
10452 #define ITMK0 itmk0.word
\r
10453 #define ITMK0_ENTB itmk0.bit._ENTB
\r
10454 #define ITMK0_RAL itmk0.bit._RAL
\r
10455 #define ITMK0_TM9 itmk0.bit._TM9
\r
10456 #define ITMK0_TM8 itmk0.bit._TM8
\r
10457 #define ITMK0_TM7 itmk0.bit._TM7
\r
10458 #define ITMK0_TM6 itmk0.bit._TM6
\r
10459 #define ITMK0_TM5 itmk0.bit._TM5
\r
10460 #define ITMK0_TM4 itmk0.bit._TM4
\r
10461 #define ITMK0_TM3 itmk0.bit._TM3
\r
10462 #define ITMK0_TM2 itmk0.bit._TM2
\r
10463 #define ITMK0_TM1 itmk0.bit._TM1
\r
10464 #define ITMK0_TM0 itmk0.bit._TM0
\r
10465 __IO_EXTERN __io ITMKH0STR itmkh0;
\r
10466 #define ITMKH0 itmkh0.byte
\r
10467 #define ITMKH0_ENTB itmkh0.bit._ENTB
\r
10468 #define ITMKH0_RAL itmkh0.bit._RAL
\r
10469 #define ITMKH0_TM9 itmkh0.bit._TM9
\r
10470 #define ITMKH0_TM8 itmkh0.bit._TM8
\r
10471 __IO_EXTERN __io ITMKL0STR itmkl0;
\r
10472 #define ITMKL0 itmkl0.byte
\r
10473 #define ITMKL0_TM7 itmkl0.bit._TM7
\r
10474 #define ITMKL0_TM6 itmkl0.bit._TM6
\r
10475 #define ITMKL0_TM5 itmkl0.bit._TM5
\r
10476 #define ITMKL0_TM4 itmkl0.bit._TM4
\r
10477 #define ITMKL0_TM3 itmkl0.bit._TM3
\r
10478 #define ITMKL0_TM2 itmkl0.bit._TM2
\r
10479 #define ITMKL0_TM1 itmkl0.bit._TM1
\r
10480 #define ITMKL0_TM0 itmkl0.bit._TM0
\r
10481 __IO_EXTERN __io ISMK0STR ismk0;
\r
10482 #define ISMK0 ismk0.byte
\r
10483 #define ISMK0_ENSB ismk0.bit._ENSB
\r
10484 #define ISMK0_SM6 ismk0.bit._SM6
\r
10485 #define ISMK0_SM5 ismk0.bit._SM5
\r
10486 #define ISMK0_SM4 ismk0.bit._SM4
\r
10487 #define ISMK0_SM3 ismk0.bit._SM3
\r
10488 #define ISMK0_SM2 ismk0.bit._SM2
\r
10489 #define ISMK0_SM1 ismk0.bit._SM1
\r
10490 #define ISMK0_SM0 ismk0.bit._SM0
\r
10491 __IO_EXTERN __io ISBA0STR isba0;
\r
10492 #define ISBA0 isba0.byte
\r
10493 #define ISBA0_SA6 isba0.bit._SA6
\r
10494 #define ISBA0_SA5 isba0.bit._SA5
\r
10495 #define ISBA0_SA4 isba0.bit._SA4
\r
10496 #define ISBA0_SA3 isba0.bit._SA3
\r
10497 #define ISBA0_SA2 isba0.bit._SA2
\r
10498 #define ISBA0_SA1 isba0.bit._SA1
\r
10499 #define ISBA0_SA0 isba0.bit._SA0
\r
10500 __IO_EXTERN __io IDAR0STR idar0;
\r
10501 #define IDAR0 idar0.byte
\r
10502 #define IDAR0_D7 idar0.bit._D7
\r
10503 #define IDAR0_D6 idar0.bit._D6
\r
10504 #define IDAR0_D5 idar0.bit._D5
\r
10505 #define IDAR0_D4 idar0.bit._D4
\r
10506 #define IDAR0_D3 idar0.bit._D3
\r
10507 #define IDAR0_D2 idar0.bit._D2
\r
10508 #define IDAR0_D1 idar0.bit._D1
\r
10509 #define IDAR0_D0 idar0.bit._D0
\r
10510 __IO_EXTERN __io ICCR0STR iccr0;
\r
10511 #define ICCR0 iccr0.byte
\r
10512 #define ICCR0_NSF iccr0.bit._NSF
\r
10513 #define ICCR0_EN iccr0.bit._EN
\r
10514 #define ICCR0_CS4 iccr0.bit._CS4
\r
10515 #define ICCR0_CS3 iccr0.bit._CS3
\r
10516 #define ICCR0_CS2 iccr0.bit._CS2
\r
10517 #define ICCR0_CS1 iccr0.bit._CS1
\r
10518 #define ICCR0_CS0 iccr0.bit._CS0
\r
10519 #define ICCR0_CS iccr0.bitc._CS
\r
10520 __IO_EXTERN GCN10STR gcn10; /* PPG Control 0-3 */
\r
10521 #define GCN10 gcn10.word
\r
10522 #define GCN10_TSEL33 gcn10.bit._TSEL33
\r
10523 #define GCN10_TSEL32 gcn10.bit._TSEL32
\r
10524 #define GCN10_TSEL31 gcn10.bit._TSEL31
\r
10525 #define GCN10_TSEL30 gcn10.bit._TSEL30
\r
10526 #define GCN10_TSEL23 gcn10.bit._TSEL23
\r
10527 #define GCN10_TSEL22 gcn10.bit._TSEL22
\r
10528 #define GCN10_TSEL21 gcn10.bit._TSEL21
\r
10529 #define GCN10_TSEL20 gcn10.bit._TSEL20
\r
10530 #define GCN10_TSEL13 gcn10.bit._TSEL13
\r
10531 #define GCN10_TSEL12 gcn10.bit._TSEL12
\r
10532 #define GCN10_TSEL11 gcn10.bit._TSEL11
\r
10533 #define GCN10_TSEL10 gcn10.bit._TSEL10
\r
10534 #define GCN10_TSEL03 gcn10.bit._TSEL03
\r
10535 #define GCN10_TSEL02 gcn10.bit._TSEL02
\r
10536 #define GCN10_TSEL01 gcn10.bit._TSEL01
\r
10537 #define GCN10_TSEL00 gcn10.bit._TSEL00
\r
10538 __IO_EXTERN GCN20STR gcn20;
\r
10539 #define GCN20 gcn20.byte
\r
10540 #define GCN20_EN3 gcn20.bit._EN3
\r
10541 #define GCN20_EN2 gcn20.bit._EN2
\r
10542 #define GCN20_EN1 gcn20.bit._EN1
\r
10543 #define GCN20_EN0 gcn20.bit._EN0
\r
10544 __IO_EXTERN GCN11STR gcn11; /* PPG Control 4-7 */
\r
10545 #define GCN11 gcn11.word
\r
10546 #define GCN11_TSEL33 gcn11.bit._TSEL33
\r
10547 #define GCN11_TSEL32 gcn11.bit._TSEL32
\r
10548 #define GCN11_TSEL31 gcn11.bit._TSEL31
\r
10549 #define GCN11_TSEL30 gcn11.bit._TSEL30
\r
10550 #define GCN11_TSEL23 gcn11.bit._TSEL23
\r
10551 #define GCN11_TSEL22 gcn11.bit._TSEL22
\r
10552 #define GCN11_TSEL21 gcn11.bit._TSEL21
\r
10553 #define GCN11_TSEL20 gcn11.bit._TSEL20
\r
10554 #define GCN11_TSEL13 gcn11.bit._TSEL13
\r
10555 #define GCN11_TSEL12 gcn11.bit._TSEL12
\r
10556 #define GCN11_TSEL11 gcn11.bit._TSEL11
\r
10557 #define GCN11_TSEL10 gcn11.bit._TSEL10
\r
10558 #define GCN11_TSEL03 gcn11.bit._TSEL03
\r
10559 #define GCN11_TSEL02 gcn11.bit._TSEL02
\r
10560 #define GCN11_TSEL01 gcn11.bit._TSEL01
\r
10561 #define GCN11_TSEL00 gcn11.bit._TSEL00
\r
10562 __IO_EXTERN GCN21STR gcn21;
\r
10563 #define GCN21 gcn21.byte
\r
10564 #define GCN21_EN3 gcn21.bit._EN3
\r
10565 #define GCN21_EN2 gcn21.bit._EN2
\r
10566 #define GCN21_EN1 gcn21.bit._EN1
\r
10567 #define GCN21_EN0 gcn21.bit._EN0
\r
10568 __IO_EXTERN GCN12STR gcn12; /* PPG Control 8-11 */
\r
10569 #define GCN12 gcn12.word
\r
10570 #define GCN12_TSEL33 gcn12.bit._TSEL33
\r
10571 #define GCN12_TSEL32 gcn12.bit._TSEL32
\r
10572 #define GCN12_TSEL31 gcn12.bit._TSEL31
\r
10573 #define GCN12_TSEL30 gcn12.bit._TSEL30
\r
10574 #define GCN12_TSEL23 gcn12.bit._TSEL23
\r
10575 #define GCN12_TSEL22 gcn12.bit._TSEL22
\r
10576 #define GCN12_TSEL21 gcn12.bit._TSEL21
\r
10577 #define GCN12_TSEL20 gcn12.bit._TSEL20
\r
10578 #define GCN12_TSEL13 gcn12.bit._TSEL13
\r
10579 #define GCN12_TSEL12 gcn12.bit._TSEL12
\r
10580 #define GCN12_TSEL11 gcn12.bit._TSEL11
\r
10581 #define GCN12_TSEL10 gcn12.bit._TSEL10
\r
10582 #define GCN12_TSEL03 gcn12.bit._TSEL03
\r
10583 #define GCN12_TSEL02 gcn12.bit._TSEL02
\r
10584 #define GCN12_TSEL01 gcn12.bit._TSEL01
\r
10585 #define GCN12_TSEL00 gcn12.bit._TSEL00
\r
10586 __IO_EXTERN GCN22STR gcn22;
\r
10587 #define GCN22 gcn22.byte
\r
10588 #define GCN22_EN3 gcn22.bit._EN3
\r
10589 #define GCN22_EN2 gcn22.bit._EN2
\r
10590 #define GCN22_EN1 gcn22.bit._EN1
\r
10591 #define GCN22_EN0 gcn22.bit._EN0
\r
10592 __IO_EXTERN IO_WORD ptmr00; /* PPG 0 */
\r
10593 #define PTMR00 ptmr00
\r
10594 __IO_EXTERN IO_WORD pcsr00;
\r
10595 #define PCSR00 pcsr00
\r
10596 __IO_EXTERN IO_WORD pdut00;
\r
10597 #define PDUT00 pdut00
\r
10598 __IO_EXTERN PCN00STR pcn00;
\r
10599 #define PCN00 pcn00.word
\r
10600 #define PCN00_CNTE pcn00.bit._CNTE
\r
10601 #define PCN00_STGR pcn00.bit._STGR
\r
10602 #define PCN00_MDSE pcn00.bit._MDSE
\r
10603 #define PCN00_RTRG pcn00.bit._RTRG
\r
10604 #define PCN00_CKS1 pcn00.bit._CKS1
\r
10605 #define PCN00_CKS0 pcn00.bit._CKS0
\r
10606 #define PCN00_PGMS pcn00.bit._PGMS
\r
10607 #define PCN00_EGS1 pcn00.bit._EGS1
\r
10608 #define PCN00_EGS0 pcn00.bit._EGS0
\r
10609 #define PCN00_IREN pcn00.bit._IREN
\r
10610 #define PCN00_IRQF pcn00.bit._IRQF
\r
10611 #define PCN00_IRS1 pcn00.bit._IRS1
\r
10612 #define PCN00_IRS0 pcn00.bit._IRS0
\r
10613 #define PCN00_OSEL pcn00.bit._OSEL
\r
10614 #define PCN00_CKS pcn00.bitc._CKS
\r
10615 #define PCN00_EGS pcn00.bitc._EGS
\r
10616 #define PCN00_IRS pcn00.bitc._IRS
\r
10617 __IO_EXTERN PCNH00STR pcnh00;
\r
10618 #define PCNH00 pcnh00.byte
\r
10619 #define PCNH00_CNTE pcnh00.bit._CNTE
\r
10620 #define PCNH00_STGR pcnh00.bit._STGR
\r
10621 #define PCNH00_MDSE pcnh00.bit._MDSE
\r
10622 #define PCNH00_RTRG pcnh00.bit._RTRG
\r
10623 #define PCNH00_CKS1 pcnh00.bit._CKS1
\r
10624 #define PCNH00_CKS0 pcnh00.bit._CKS0
\r
10625 #define PCNH00_PGMS pcnh00.bit._PGMS
\r
10626 #define PCNH00_CKS pcnh00.bitc._CKS
\r
10627 __IO_EXTERN PCNL00STR pcnl00;
\r
10628 #define PCNL00 pcnl00.byte
\r
10629 #define PCNL00_EGS1 pcnl00.bit._EGS1
\r
10630 #define PCNL00_EGS0 pcnl00.bit._EGS0
\r
10631 #define PCNL00_IREN pcnl00.bit._IREN
\r
10632 #define PCNL00_IRQF pcnl00.bit._IRQF
\r
10633 #define PCNL00_IRS1 pcnl00.bit._IRS1
\r
10634 #define PCNL00_IRS0 pcnl00.bit._IRS0
\r
10635 #define PCNL00_OSEL pcnl00.bit._OSEL
\r
10636 #define PCNL00_EGS pcnl00.bitc._EGS
\r
10637 #define PCNL00_IRS pcnl00.bitc._IRS
\r
10638 __IO_EXTERN IO_WORD ptmr01; /* PPG 1 */
\r
10639 #define PTMR01 ptmr01
\r
10640 __IO_EXTERN IO_WORD pcsr01;
\r
10641 #define PCSR01 pcsr01
\r
10642 __IO_EXTERN IO_WORD pdut01;
\r
10643 #define PDUT01 pdut01
\r
10644 __IO_EXTERN PCN01STR pcn01;
\r
10645 #define PCN01 pcn01.word
\r
10646 #define PCN01_CNTE pcn01.bit._CNTE
\r
10647 #define PCN01_STGR pcn01.bit._STGR
\r
10648 #define PCN01_MDSE pcn01.bit._MDSE
\r
10649 #define PCN01_RTRG pcn01.bit._RTRG
\r
10650 #define PCN01_CKS1 pcn01.bit._CKS1
\r
10651 #define PCN01_CKS0 pcn01.bit._CKS0
\r
10652 #define PCN01_PGMS pcn01.bit._PGMS
\r
10653 #define PCN01_EGS1 pcn01.bit._EGS1
\r
10654 #define PCN01_EGS0 pcn01.bit._EGS0
\r
10655 #define PCN01_IREN pcn01.bit._IREN
\r
10656 #define PCN01_IRQF pcn01.bit._IRQF
\r
10657 #define PCN01_IRS1 pcn01.bit._IRS1
\r
10658 #define PCN01_IRS0 pcn01.bit._IRS0
\r
10659 #define PCN01_OSEL pcn01.bit._OSEL
\r
10660 #define PCN01_CKS pcn01.bitc._CKS
\r
10661 #define PCN01_EGS pcn01.bitc._EGS
\r
10662 #define PCN01_IRS pcn01.bitc._IRS
\r
10663 __IO_EXTERN PCNH01STR pcnh01;
\r
10664 #define PCNH01 pcnh01.byte
\r
10665 #define PCNH01_CNTE pcnh01.bit._CNTE
\r
10666 #define PCNH01_STGR pcnh01.bit._STGR
\r
10667 #define PCNH01_MDSE pcnh01.bit._MDSE
\r
10668 #define PCNH01_RTRG pcnh01.bit._RTRG
\r
10669 #define PCNH01_CKS1 pcnh01.bit._CKS1
\r
10670 #define PCNH01_CKS0 pcnh01.bit._CKS0
\r
10671 #define PCNH01_PGMS pcnh01.bit._PGMS
\r
10672 #define PCNH01_CKS pcnh01.bitc._CKS
\r
10673 __IO_EXTERN PCNL01STR pcnl01;
\r
10674 #define PCNL01 pcnl01.byte
\r
10675 #define PCNL01_EGS1 pcnl01.bit._EGS1
\r
10676 #define PCNL01_EGS0 pcnl01.bit._EGS0
\r
10677 #define PCNL01_IREN pcnl01.bit._IREN
\r
10678 #define PCNL01_IRQF pcnl01.bit._IRQF
\r
10679 #define PCNL01_IRS1 pcnl01.bit._IRS1
\r
10680 #define PCNL01_IRS0 pcnl01.bit._IRS0
\r
10681 #define PCNL01_OSEL pcnl01.bit._OSEL
\r
10682 #define PCNL01_EGS pcnl01.bitc._EGS
\r
10683 #define PCNL01_IRS pcnl01.bitc._IRS
\r
10684 __IO_EXTERN IO_WORD ptmr02; /* PPG 2 */
\r
10685 #define PTMR02 ptmr02
\r
10686 __IO_EXTERN IO_WORD pcsr02;
\r
10687 #define PCSR02 pcsr02
\r
10688 __IO_EXTERN IO_WORD pdut02;
\r
10689 #define PDUT02 pdut02
\r
10690 __IO_EXTERN PCN02STR pcn02;
\r
10691 #define PCN02 pcn02.word
\r
10692 #define PCN02_CNTE pcn02.bit._CNTE
\r
10693 #define PCN02_STGR pcn02.bit._STGR
\r
10694 #define PCN02_MDSE pcn02.bit._MDSE
\r
10695 #define PCN02_RTRG pcn02.bit._RTRG
\r
10696 #define PCN02_CKS1 pcn02.bit._CKS1
\r
10697 #define PCN02_CKS0 pcn02.bit._CKS0
\r
10698 #define PCN02_PGMS pcn02.bit._PGMS
\r
10699 #define PCN02_EGS1 pcn02.bit._EGS1
\r
10700 #define PCN02_EGS0 pcn02.bit._EGS0
\r
10701 #define PCN02_IREN pcn02.bit._IREN
\r
10702 #define PCN02_IRQF pcn02.bit._IRQF
\r
10703 #define PCN02_IRS1 pcn02.bit._IRS1
\r
10704 #define PCN02_IRS0 pcn02.bit._IRS0
\r
10705 #define PCN02_OSEL pcn02.bit._OSEL
\r
10706 #define PCN02_CKS pcn02.bitc._CKS
\r
10707 #define PCN02_EGS pcn02.bitc._EGS
\r
10708 #define PCN02_IRS pcn02.bitc._IRS
\r
10709 __IO_EXTERN PCNH02STR pcnh02;
\r
10710 #define PCNH02 pcnh02.byte
\r
10711 #define PCNH02_CNTE pcnh02.bit._CNTE
\r
10712 #define PCNH02_STGR pcnh02.bit._STGR
\r
10713 #define PCNH02_MDSE pcnh02.bit._MDSE
\r
10714 #define PCNH02_RTRG pcnh02.bit._RTRG
\r
10715 #define PCNH02_CKS1 pcnh02.bit._CKS1
\r
10716 #define PCNH02_CKS0 pcnh02.bit._CKS0
\r
10717 #define PCNH02_PGMS pcnh02.bit._PGMS
\r
10718 #define PCNH02_CKS pcnh02.bitc._CKS
\r
10719 __IO_EXTERN PCNL02STR pcnl02;
\r
10720 #define PCNL02 pcnl02.byte
\r
10721 #define PCNL02_EGS1 pcnl02.bit._EGS1
\r
10722 #define PCNL02_EGS0 pcnl02.bit._EGS0
\r
10723 #define PCNL02_IREN pcnl02.bit._IREN
\r
10724 #define PCNL02_IRQF pcnl02.bit._IRQF
\r
10725 #define PCNL02_IRS1 pcnl02.bit._IRS1
\r
10726 #define PCNL02_IRS0 pcnl02.bit._IRS0
\r
10727 #define PCNL02_OSEL pcnl02.bit._OSEL
\r
10728 #define PCNL02_EGS pcnl02.bitc._EGS
\r
10729 #define PCNL02_IRS pcnl02.bitc._IRS
\r
10730 __IO_EXTERN IO_WORD ptmr03; /* PPG 3 */
\r
10731 #define PTMR03 ptmr03
\r
10732 __IO_EXTERN IO_WORD pcsr03;
\r
10733 #define PCSR03 pcsr03
\r
10734 __IO_EXTERN IO_WORD pdut03;
\r
10735 #define PDUT03 pdut03
\r
10736 __IO_EXTERN PCN03STR pcn03;
\r
10737 #define PCN03 pcn03.word
\r
10738 #define PCN03_CNTE pcn03.bit._CNTE
\r
10739 #define PCN03_STGR pcn03.bit._STGR
\r
10740 #define PCN03_MDSE pcn03.bit._MDSE
\r
10741 #define PCN03_RTRG pcn03.bit._RTRG
\r
10742 #define PCN03_CKS1 pcn03.bit._CKS1
\r
10743 #define PCN03_CKS0 pcn03.bit._CKS0
\r
10744 #define PCN03_PGMS pcn03.bit._PGMS
\r
10745 #define PCN03_EGS1 pcn03.bit._EGS1
\r
10746 #define PCN03_EGS0 pcn03.bit._EGS0
\r
10747 #define PCN03_IREN pcn03.bit._IREN
\r
10748 #define PCN03_IRQF pcn03.bit._IRQF
\r
10749 #define PCN03_IRS1 pcn03.bit._IRS1
\r
10750 #define PCN03_IRS0 pcn03.bit._IRS0
\r
10751 #define PCN03_OSEL pcn03.bit._OSEL
\r
10752 #define PCN03_CKS pcn03.bitc._CKS
\r
10753 #define PCN03_EGS pcn03.bitc._EGS
\r
10754 #define PCN03_IRS pcn03.bitc._IRS
\r
10755 __IO_EXTERN PCNH03STR pcnh03;
\r
10756 #define PCNH03 pcnh03.byte
\r
10757 #define PCNH03_CNTE pcnh03.bit._CNTE
\r
10758 #define PCNH03_STGR pcnh03.bit._STGR
\r
10759 #define PCNH03_MDSE pcnh03.bit._MDSE
\r
10760 #define PCNH03_RTRG pcnh03.bit._RTRG
\r
10761 #define PCNH03_CKS1 pcnh03.bit._CKS1
\r
10762 #define PCNH03_CKS0 pcnh03.bit._CKS0
\r
10763 #define PCNH03_PGMS pcnh03.bit._PGMS
\r
10764 #define PCNH03_CKS pcnh03.bitc._CKS
\r
10765 __IO_EXTERN PCNL03STR pcnl03;
\r
10766 #define PCNL03 pcnl03.byte
\r
10767 #define PCNL03_EGS1 pcnl03.bit._EGS1
\r
10768 #define PCNL03_EGS0 pcnl03.bit._EGS0
\r
10769 #define PCNL03_IREN pcnl03.bit._IREN
\r
10770 #define PCNL03_IRQF pcnl03.bit._IRQF
\r
10771 #define PCNL03_IRS1 pcnl03.bit._IRS1
\r
10772 #define PCNL03_IRS0 pcnl03.bit._IRS0
\r
10773 #define PCNL03_OSEL pcnl03.bit._OSEL
\r
10774 #define PCNL03_EGS pcnl03.bitc._EGS
\r
10775 #define PCNL03_IRS pcnl03.bitc._IRS
\r
10776 __IO_EXTERN IO_WORD ptmr04; /* PPG 4 */
\r
10777 #define PTMR04 ptmr04
\r
10778 __IO_EXTERN IO_WORD pcsr04;
\r
10779 #define PCSR04 pcsr04
\r
10780 __IO_EXTERN IO_WORD pdut04;
\r
10781 #define PDUT04 pdut04
\r
10782 __IO_EXTERN PCN04STR pcn04;
\r
10783 #define PCN04 pcn04.word
\r
10784 #define PCN04_CNTE pcn04.bit._CNTE
\r
10785 #define PCN04_STGR pcn04.bit._STGR
\r
10786 #define PCN04_MDSE pcn04.bit._MDSE
\r
10787 #define PCN04_RTRG pcn04.bit._RTRG
\r
10788 #define PCN04_CKS1 pcn04.bit._CKS1
\r
10789 #define PCN04_CKS0 pcn04.bit._CKS0
\r
10790 #define PCN04_PGMS pcn04.bit._PGMS
\r
10791 #define PCN04_EGS1 pcn04.bit._EGS1
\r
10792 #define PCN04_EGS0 pcn04.bit._EGS0
\r
10793 #define PCN04_IREN pcn04.bit._IREN
\r
10794 #define PCN04_IRQF pcn04.bit._IRQF
\r
10795 #define PCN04_IRS1 pcn04.bit._IRS1
\r
10796 #define PCN04_IRS0 pcn04.bit._IRS0
\r
10797 #define PCN04_OSEL pcn04.bit._OSEL
\r
10798 #define PCN04_CKS pcn04.bitc._CKS
\r
10799 #define PCN04_EGS pcn04.bitc._EGS
\r
10800 #define PCN04_IRS pcn04.bitc._IRS
\r
10801 __IO_EXTERN PCNH04STR pcnh04;
\r
10802 #define PCNH04 pcnh04.byte
\r
10803 #define PCNH04_CNTE pcnh04.bit._CNTE
\r
10804 #define PCNH04_STGR pcnh04.bit._STGR
\r
10805 #define PCNH04_MDSE pcnh04.bit._MDSE
\r
10806 #define PCNH04_RTRG pcnh04.bit._RTRG
\r
10807 #define PCNH04_CKS1 pcnh04.bit._CKS1
\r
10808 #define PCNH04_CKS0 pcnh04.bit._CKS0
\r
10809 #define PCNH04_PGMS pcnh04.bit._PGMS
\r
10810 #define PCNH04_CKS pcnh04.bitc._CKS
\r
10811 __IO_EXTERN PCNL04STR pcnl04;
\r
10812 #define PCNL04 pcnl04.byte
\r
10813 #define PCNL04_EGS1 pcnl04.bit._EGS1
\r
10814 #define PCNL04_EGS0 pcnl04.bit._EGS0
\r
10815 #define PCNL04_IREN pcnl04.bit._IREN
\r
10816 #define PCNL04_IRQF pcnl04.bit._IRQF
\r
10817 #define PCNL04_IRS1 pcnl04.bit._IRS1
\r
10818 #define PCNL04_IRS0 pcnl04.bit._IRS0
\r
10819 #define PCNL04_OSEL pcnl04.bit._OSEL
\r
10820 #define PCNL04_EGS pcnl04.bitc._EGS
\r
10821 #define PCNL04_IRS pcnl04.bitc._IRS
\r
10822 __IO_EXTERN IO_WORD ptmr05; /* PPG 5 */
\r
10823 #define PTMR05 ptmr05
\r
10824 __IO_EXTERN IO_WORD pcsr05;
\r
10825 #define PCSR05 pcsr05
\r
10826 __IO_EXTERN IO_WORD pdut05;
\r
10827 #define PDUT05 pdut05
\r
10828 __IO_EXTERN PCN05STR pcn05;
\r
10829 #define PCN05 pcn05.word
\r
10830 #define PCN05_CNTE pcn05.bit._CNTE
\r
10831 #define PCN05_STGR pcn05.bit._STGR
\r
10832 #define PCN05_MDSE pcn05.bit._MDSE
\r
10833 #define PCN05_RTRG pcn05.bit._RTRG
\r
10834 #define PCN05_CKS1 pcn05.bit._CKS1
\r
10835 #define PCN05_CKS0 pcn05.bit._CKS0
\r
10836 #define PCN05_PGMS pcn05.bit._PGMS
\r
10837 #define PCN05_EGS1 pcn05.bit._EGS1
\r
10838 #define PCN05_EGS0 pcn05.bit._EGS0
\r
10839 #define PCN05_IREN pcn05.bit._IREN
\r
10840 #define PCN05_IRQF pcn05.bit._IRQF
\r
10841 #define PCN05_IRS1 pcn05.bit._IRS1
\r
10842 #define PCN05_IRS0 pcn05.bit._IRS0
\r
10843 #define PCN05_OSEL pcn05.bit._OSEL
\r
10844 #define PCN05_CKS pcn05.bitc._CKS
\r
10845 #define PCN05_EGS pcn05.bitc._EGS
\r
10846 #define PCN05_IRS pcn05.bitc._IRS
\r
10847 __IO_EXTERN PCNH05STR pcnh05;
\r
10848 #define PCNH05 pcnh05.byte
\r
10849 #define PCNH05_CNTE pcnh05.bit._CNTE
\r
10850 #define PCNH05_STGR pcnh05.bit._STGR
\r
10851 #define PCNH05_MDSE pcnh05.bit._MDSE
\r
10852 #define PCNH05_RTRG pcnh05.bit._RTRG
\r
10853 #define PCNH05_CKS1 pcnh05.bit._CKS1
\r
10854 #define PCNH05_CKS0 pcnh05.bit._CKS0
\r
10855 #define PCNH05_PGMS pcnh05.bit._PGMS
\r
10856 #define PCNH05_CKS pcnh05.bitc._CKS
\r
10857 __IO_EXTERN PCNL05STR pcnl05;
\r
10858 #define PCNL05 pcnl05.byte
\r
10859 #define PCNL05_EGS1 pcnl05.bit._EGS1
\r
10860 #define PCNL05_EGS0 pcnl05.bit._EGS0
\r
10861 #define PCNL05_IREN pcnl05.bit._IREN
\r
10862 #define PCNL05_IRQF pcnl05.bit._IRQF
\r
10863 #define PCNL05_IRS1 pcnl05.bit._IRS1
\r
10864 #define PCNL05_IRS0 pcnl05.bit._IRS0
\r
10865 #define PCNL05_OSEL pcnl05.bit._OSEL
\r
10866 #define PCNL05_EGS pcnl05.bitc._EGS
\r
10867 #define PCNL05_IRS pcnl05.bitc._IRS
\r
10868 __IO_EXTERN IO_WORD ptmr06; /* PPG 6 */
\r
10869 #define PTMR06 ptmr06
\r
10870 __IO_EXTERN IO_WORD pcsr06;
\r
10871 #define PCSR06 pcsr06
\r
10872 __IO_EXTERN IO_WORD pdut06;
\r
10873 #define PDUT06 pdut06
\r
10874 __IO_EXTERN PCN06STR pcn06;
\r
10875 #define PCN06 pcn06.word
\r
10876 #define PCN06_CNTE pcn06.bit._CNTE
\r
10877 #define PCN06_STGR pcn06.bit._STGR
\r
10878 #define PCN06_MDSE pcn06.bit._MDSE
\r
10879 #define PCN06_RTRG pcn06.bit._RTRG
\r
10880 #define PCN06_CKS1 pcn06.bit._CKS1
\r
10881 #define PCN06_CKS0 pcn06.bit._CKS0
\r
10882 #define PCN06_PGMS pcn06.bit._PGMS
\r
10883 #define PCN06_EGS1 pcn06.bit._EGS1
\r
10884 #define PCN06_EGS0 pcn06.bit._EGS0
\r
10885 #define PCN06_IREN pcn06.bit._IREN
\r
10886 #define PCN06_IRQF pcn06.bit._IRQF
\r
10887 #define PCN06_IRS1 pcn06.bit._IRS1
\r
10888 #define PCN06_IRS0 pcn06.bit._IRS0
\r
10889 #define PCN06_OSEL pcn06.bit._OSEL
\r
10890 #define PCN06_CKS pcn06.bitc._CKS
\r
10891 #define PCN06_EGS pcn06.bitc._EGS
\r
10892 #define PCN06_IRS pcn06.bitc._IRS
\r
10893 __IO_EXTERN PCNH06STR pcnh06;
\r
10894 #define PCNH06 pcnh06.byte
\r
10895 #define PCNH06_CNTE pcnh06.bit._CNTE
\r
10896 #define PCNH06_STGR pcnh06.bit._STGR
\r
10897 #define PCNH06_MDSE pcnh06.bit._MDSE
\r
10898 #define PCNH06_RTRG pcnh06.bit._RTRG
\r
10899 #define PCNH06_CKS1 pcnh06.bit._CKS1
\r
10900 #define PCNH06_CKS0 pcnh06.bit._CKS0
\r
10901 #define PCNH06_PGMS pcnh06.bit._PGMS
\r
10902 #define PCNH06_CKS pcnh06.bitc._CKS
\r
10903 __IO_EXTERN PCNL06STR pcnl06;
\r
10904 #define PCNL06 pcnl06.byte
\r
10905 #define PCNL06_EGS1 pcnl06.bit._EGS1
\r
10906 #define PCNL06_EGS0 pcnl06.bit._EGS0
\r
10907 #define PCNL06_IREN pcnl06.bit._IREN
\r
10908 #define PCNL06_IRQF pcnl06.bit._IRQF
\r
10909 #define PCNL06_IRS1 pcnl06.bit._IRS1
\r
10910 #define PCNL06_IRS0 pcnl06.bit._IRS0
\r
10911 #define PCNL06_OSEL pcnl06.bit._OSEL
\r
10912 #define PCNL06_EGS pcnl06.bitc._EGS
\r
10913 #define PCNL06_IRS pcnl06.bitc._IRS
\r
10914 __IO_EXTERN IO_WORD ptmr07; /* PPG 7 */
\r
10915 #define PTMR07 ptmr07
\r
10916 __IO_EXTERN IO_WORD pcsr07;
\r
10917 #define PCSR07 pcsr07
\r
10918 __IO_EXTERN IO_WORD pdut07;
\r
10919 #define PDUT07 pdut07
\r
10920 __IO_EXTERN PCN07STR pcn07;
\r
10921 #define PCN07 pcn07.word
\r
10922 #define PCN07_CNTE pcn07.bit._CNTE
\r
10923 #define PCN07_STGR pcn07.bit._STGR
\r
10924 #define PCN07_MDSE pcn07.bit._MDSE
\r
10925 #define PCN07_RTRG pcn07.bit._RTRG
\r
10926 #define PCN07_CKS1 pcn07.bit._CKS1
\r
10927 #define PCN07_CKS0 pcn07.bit._CKS0
\r
10928 #define PCN07_PGMS pcn07.bit._PGMS
\r
10929 #define PCN07_EGS1 pcn07.bit._EGS1
\r
10930 #define PCN07_EGS0 pcn07.bit._EGS0
\r
10931 #define PCN07_IREN pcn07.bit._IREN
\r
10932 #define PCN07_IRQF pcn07.bit._IRQF
\r
10933 #define PCN07_IRS1 pcn07.bit._IRS1
\r
10934 #define PCN07_IRS0 pcn07.bit._IRS0
\r
10935 #define PCN07_OSEL pcn07.bit._OSEL
\r
10936 #define PCN07_CKS pcn07.bitc._CKS
\r
10937 #define PCN07_EGS pcn07.bitc._EGS
\r
10938 #define PCN07_IRS pcn07.bitc._IRS
\r
10939 __IO_EXTERN PCNH07STR pcnh07;
\r
10940 #define PCNH07 pcnh07.byte
\r
10941 #define PCNH07_CNTE pcnh07.bit._CNTE
\r
10942 #define PCNH07_STGR pcnh07.bit._STGR
\r
10943 #define PCNH07_MDSE pcnh07.bit._MDSE
\r
10944 #define PCNH07_RTRG pcnh07.bit._RTRG
\r
10945 #define PCNH07_CKS1 pcnh07.bit._CKS1
\r
10946 #define PCNH07_CKS0 pcnh07.bit._CKS0
\r
10947 #define PCNH07_PGMS pcnh07.bit._PGMS
\r
10948 #define PCNH07_CKS pcnh07.bitc._CKS
\r
10949 __IO_EXTERN PCNL07STR pcnl07;
\r
10950 #define PCNL07 pcnl07.byte
\r
10951 #define PCNL07_EGS1 pcnl07.bit._EGS1
\r
10952 #define PCNL07_EGS0 pcnl07.bit._EGS0
\r
10953 #define PCNL07_IREN pcnl07.bit._IREN
\r
10954 #define PCNL07_IRQF pcnl07.bit._IRQF
\r
10955 #define PCNL07_IRS1 pcnl07.bit._IRS1
\r
10956 #define PCNL07_IRS0 pcnl07.bit._IRS0
\r
10957 #define PCNL07_OSEL pcnl07.bit._OSEL
\r
10958 #define PCNL07_EGS pcnl07.bitc._EGS
\r
10959 #define PCNL07_IRS pcnl07.bitc._IRS
\r
10960 __IO_EXTERN IO_WORD ptmr08; /* PPG 8 */
\r
10961 #define PTMR08 ptmr08
\r
10962 __IO_EXTERN IO_WORD pcsr08;
\r
10963 #define PCSR08 pcsr08
\r
10964 __IO_EXTERN IO_WORD pdut08;
\r
10965 #define PDUT08 pdut08
\r
10966 __IO_EXTERN PCN08STR pcn08;
\r
10967 #define PCN08 pcn08.word
\r
10968 #define PCN08_CNTE pcn08.bit._CNTE
\r
10969 #define PCN08_STGR pcn08.bit._STGR
\r
10970 #define PCN08_MDSE pcn08.bit._MDSE
\r
10971 #define PCN08_RTRG pcn08.bit._RTRG
\r
10972 #define PCN08_CKS1 pcn08.bit._CKS1
\r
10973 #define PCN08_CKS0 pcn08.bit._CKS0
\r
10974 #define PCN08_PGMS pcn08.bit._PGMS
\r
10975 #define PCN08_EGS1 pcn08.bit._EGS1
\r
10976 #define PCN08_EGS0 pcn08.bit._EGS0
\r
10977 #define PCN08_IREN pcn08.bit._IREN
\r
10978 #define PCN08_IRQF pcn08.bit._IRQF
\r
10979 #define PCN08_IRS1 pcn08.bit._IRS1
\r
10980 #define PCN08_IRS0 pcn08.bit._IRS0
\r
10981 #define PCN08_OSEL pcn08.bit._OSEL
\r
10982 #define PCN08_CKS pcn08.bitc._CKS
\r
10983 #define PCN08_EGS pcn08.bitc._EGS
\r
10984 #define PCN08_IRS pcn08.bitc._IRS
\r
10985 __IO_EXTERN PCNH08STR pcnh08;
\r
10986 #define PCNH08 pcnh08.byte
\r
10987 #define PCNH08_CNTE pcnh08.bit._CNTE
\r
10988 #define PCNH08_STGR pcnh08.bit._STGR
\r
10989 #define PCNH08_MDSE pcnh08.bit._MDSE
\r
10990 #define PCNH08_RTRG pcnh08.bit._RTRG
\r
10991 #define PCNH08_CKS1 pcnh08.bit._CKS1
\r
10992 #define PCNH08_CKS0 pcnh08.bit._CKS0
\r
10993 #define PCNH08_PGMS pcnh08.bit._PGMS
\r
10994 #define PCNH08_CKS pcnh08.bitc._CKS
\r
10995 __IO_EXTERN PCNL08STR pcnl08;
\r
10996 #define PCNL08 pcnl08.byte
\r
10997 #define PCNL08_EGS1 pcnl08.bit._EGS1
\r
10998 #define PCNL08_EGS0 pcnl08.bit._EGS0
\r
10999 #define PCNL08_IREN pcnl08.bit._IREN
\r
11000 #define PCNL08_IRQF pcnl08.bit._IRQF
\r
11001 #define PCNL08_IRS1 pcnl08.bit._IRS1
\r
11002 #define PCNL08_IRS0 pcnl08.bit._IRS0
\r
11003 #define PCNL08_OSEL pcnl08.bit._OSEL
\r
11004 #define PCNL08_EGS pcnl08.bitc._EGS
\r
11005 #define PCNL08_IRS pcnl08.bitc._IRS
\r
11006 __IO_EXTERN IO_WORD ptmr09; /* PPG 9 */
\r
11007 #define PTMR09 ptmr09
\r
11008 __IO_EXTERN IO_WORD pcsr09;
\r
11009 #define PCSR09 pcsr09
\r
11010 __IO_EXTERN IO_WORD pdut09;
\r
11011 #define PDUT09 pdut09
\r
11012 __IO_EXTERN PCN09STR pcn09;
\r
11013 #define PCN09 pcn09.word
\r
11014 #define PCN09_CNTE pcn09.bit._CNTE
\r
11015 #define PCN09_STGR pcn09.bit._STGR
\r
11016 #define PCN09_MDSE pcn09.bit._MDSE
\r
11017 #define PCN09_RTRG pcn09.bit._RTRG
\r
11018 #define PCN09_CKS1 pcn09.bit._CKS1
\r
11019 #define PCN09_CKS0 pcn09.bit._CKS0
\r
11020 #define PCN09_PGMS pcn09.bit._PGMS
\r
11021 #define PCN09_EGS1 pcn09.bit._EGS1
\r
11022 #define PCN09_EGS0 pcn09.bit._EGS0
\r
11023 #define PCN09_IREN pcn09.bit._IREN
\r
11024 #define PCN09_IRQF pcn09.bit._IRQF
\r
11025 #define PCN09_IRS1 pcn09.bit._IRS1
\r
11026 #define PCN09_IRS0 pcn09.bit._IRS0
\r
11027 #define PCN09_OSEL pcn09.bit._OSEL
\r
11028 #define PCN09_CKS pcn09.bitc._CKS
\r
11029 #define PCN09_EGS pcn09.bitc._EGS
\r
11030 #define PCN09_IRS pcn09.bitc._IRS
\r
11031 __IO_EXTERN PCNH09STR pcnh09;
\r
11032 #define PCNH09 pcnh09.byte
\r
11033 #define PCNH09_CNTE pcnh09.bit._CNTE
\r
11034 #define PCNH09_STGR pcnh09.bit._STGR
\r
11035 #define PCNH09_MDSE pcnh09.bit._MDSE
\r
11036 #define PCNH09_RTRG pcnh09.bit._RTRG
\r
11037 #define PCNH09_CKS1 pcnh09.bit._CKS1
\r
11038 #define PCNH09_CKS0 pcnh09.bit._CKS0
\r
11039 #define PCNH09_PGMS pcnh09.bit._PGMS
\r
11040 #define PCNH09_CKS pcnh09.bitc._CKS
\r
11041 __IO_EXTERN PCNL09STR pcnl09;
\r
11042 #define PCNL09 pcnl09.byte
\r
11043 #define PCNL09_EGS1 pcnl09.bit._EGS1
\r
11044 #define PCNL09_EGS0 pcnl09.bit._EGS0
\r
11045 #define PCNL09_IREN pcnl09.bit._IREN
\r
11046 #define PCNL09_IRQF pcnl09.bit._IRQF
\r
11047 #define PCNL09_IRS1 pcnl09.bit._IRS1
\r
11048 #define PCNL09_IRS0 pcnl09.bit._IRS0
\r
11049 #define PCNL09_OSEL pcnl09.bit._OSEL
\r
11050 #define PCNL09_EGS pcnl09.bitc._EGS
\r
11051 #define PCNL09_IRS pcnl09.bitc._IRS
\r
11052 __IO_EXTERN IO_WORD ptmr10; /* PPG 10 */
\r
11053 #define PTMR10 ptmr10
\r
11054 __IO_EXTERN IO_WORD pcsr10;
\r
11055 #define PCSR10 pcsr10
\r
11056 __IO_EXTERN IO_WORD pdut10;
\r
11057 #define PDUT10 pdut10
\r
11058 __IO_EXTERN PCN10STR pcn10;
\r
11059 #define PCN10 pcn10.word
\r
11060 #define PCN10_CNTE pcn10.bit._CNTE
\r
11061 #define PCN10_STGR pcn10.bit._STGR
\r
11062 #define PCN10_MDSE pcn10.bit._MDSE
\r
11063 #define PCN10_RTRG pcn10.bit._RTRG
\r
11064 #define PCN10_CKS1 pcn10.bit._CKS1
\r
11065 #define PCN10_CKS0 pcn10.bit._CKS0
\r
11066 #define PCN10_PGMS pcn10.bit._PGMS
\r
11067 #define PCN10_EGS1 pcn10.bit._EGS1
\r
11068 #define PCN10_EGS0 pcn10.bit._EGS0
\r
11069 #define PCN10_IREN pcn10.bit._IREN
\r
11070 #define PCN10_IRQF pcn10.bit._IRQF
\r
11071 #define PCN10_IRS1 pcn10.bit._IRS1
\r
11072 #define PCN10_IRS0 pcn10.bit._IRS0
\r
11073 #define PCN10_OSEL pcn10.bit._OSEL
\r
11074 #define PCN10_CKS pcn10.bitc._CKS
\r
11075 #define PCN10_EGS pcn10.bitc._EGS
\r
11076 #define PCN10_IRS pcn10.bitc._IRS
\r
11077 __IO_EXTERN PCNH10STR pcnh10;
\r
11078 #define PCNH10 pcnh10.byte
\r
11079 #define PCNH10_CNTE pcnh10.bit._CNTE
\r
11080 #define PCNH10_STGR pcnh10.bit._STGR
\r
11081 #define PCNH10_MDSE pcnh10.bit._MDSE
\r
11082 #define PCNH10_RTRG pcnh10.bit._RTRG
\r
11083 #define PCNH10_CKS1 pcnh10.bit._CKS1
\r
11084 #define PCNH10_CKS0 pcnh10.bit._CKS0
\r
11085 #define PCNH10_PGMS pcnh10.bit._PGMS
\r
11086 #define PCNH10_CKS pcnh10.bitc._CKS
\r
11087 __IO_EXTERN PCNL10STR pcnl10;
\r
11088 #define PCNL10 pcnl10.byte
\r
11089 #define PCNL10_EGS1 pcnl10.bit._EGS1
\r
11090 #define PCNL10_EGS0 pcnl10.bit._EGS0
\r
11091 #define PCNL10_IREN pcnl10.bit._IREN
\r
11092 #define PCNL10_IRQF pcnl10.bit._IRQF
\r
11093 #define PCNL10_IRS1 pcnl10.bit._IRS1
\r
11094 #define PCNL10_IRS0 pcnl10.bit._IRS0
\r
11095 #define PCNL10_OSEL pcnl10.bit._OSEL
\r
11096 #define PCNL10_EGS pcnl10.bitc._EGS
\r
11097 #define PCNL10_IRS pcnl10.bitc._IRS
\r
11098 __IO_EXTERN IO_WORD ptmr11; /* PPG 11 */
\r
11099 #define PTMR11 ptmr11
\r
11100 __IO_EXTERN IO_WORD pcsr11;
\r
11101 #define PCSR11 pcsr11
\r
11102 __IO_EXTERN IO_WORD pdut11;
\r
11103 #define PDUT11 pdut11
\r
11104 __IO_EXTERN PCN11STR pcn11;
\r
11105 #define PCN11 pcn11.word
\r
11106 #define PCN11_CNTE pcn11.bit._CNTE
\r
11107 #define PCN11_STGR pcn11.bit._STGR
\r
11108 #define PCN11_MDSE pcn11.bit._MDSE
\r
11109 #define PCN11_RTRG pcn11.bit._RTRG
\r
11110 #define PCN11_CKS1 pcn11.bit._CKS1
\r
11111 #define PCN11_CKS0 pcn11.bit._CKS0
\r
11112 #define PCN11_PGMS pcn11.bit._PGMS
\r
11113 #define PCN11_EGS1 pcn11.bit._EGS1
\r
11114 #define PCN11_EGS0 pcn11.bit._EGS0
\r
11115 #define PCN11_IREN pcn11.bit._IREN
\r
11116 #define PCN11_IRQF pcn11.bit._IRQF
\r
11117 #define PCN11_IRS1 pcn11.bit._IRS1
\r
11118 #define PCN11_IRS0 pcn11.bit._IRS0
\r
11119 #define PCN11_OSEL pcn11.bit._OSEL
\r
11120 #define PCN11_CKS pcn11.bitc._CKS
\r
11121 #define PCN11_EGS pcn11.bitc._EGS
\r
11122 #define PCN11_IRS pcn11.bitc._IRS
\r
11123 __IO_EXTERN PCNH11STR pcnh11;
\r
11124 #define PCNH11 pcnh11.byte
\r
11125 #define PCNH11_CNTE pcnh11.bit._CNTE
\r
11126 #define PCNH11_STGR pcnh11.bit._STGR
\r
11127 #define PCNH11_MDSE pcnh11.bit._MDSE
\r
11128 #define PCNH11_RTRG pcnh11.bit._RTRG
\r
11129 #define PCNH11_CKS1 pcnh11.bit._CKS1
\r
11130 #define PCNH11_CKS0 pcnh11.bit._CKS0
\r
11131 #define PCNH11_PGMS pcnh11.bit._PGMS
\r
11132 #define PCNH11_CKS pcnh11.bitc._CKS
\r
11133 __IO_EXTERN PCNL11STR pcnl11;
\r
11134 #define PCNL11 pcnl11.byte
\r
11135 #define PCNL11_EGS1 pcnl11.bit._EGS1
\r
11136 #define PCNL11_EGS0 pcnl11.bit._EGS0
\r
11137 #define PCNL11_IREN pcnl11.bit._IREN
\r
11138 #define PCNL11_IRQF pcnl11.bit._IRQF
\r
11139 #define PCNL11_IRS1 pcnl11.bit._IRS1
\r
11140 #define PCNL11_IRS0 pcnl11.bit._IRS0
\r
11141 #define PCNL11_OSEL pcnl11.bit._OSEL
\r
11142 #define PCNL11_EGS pcnl11.bitc._EGS
\r
11143 #define PCNL11_IRS pcnl11.bitc._IRS
\r
11144 __IO_EXTERN ICS01STR ics01; /* Input Capture 0-3 */
\r
11145 #define ICS01 ics01.byte
\r
11146 #define ICS01_ICP1 ics01.bit._ICP1
\r
11147 #define ICS01_ICP0 ics01.bit._ICP0
\r
11148 #define ICS01_ICE1 ics01.bit._ICE1
\r
11149 #define ICS01_ICE0 ics01.bit._ICE0
\r
11150 #define ICS01_EG11 ics01.bit._EG11
\r
11151 #define ICS01_EG10 ics01.bit._EG10
\r
11152 #define ICS01_EG01 ics01.bit._EG01
\r
11153 #define ICS01_EG00 ics01.bit._EG00
\r
11154 #define ICS01_EG1 ics01.bitc._EG1
\r
11155 #define ICS01_EG0 ics01.bitc._EG0
\r
11156 __IO_EXTERN ICS23STR ics23;
\r
11157 #define ICS23 ics23.byte
\r
11158 #define ICS23_ICP3 ics23.bit._ICP3
\r
11159 #define ICS23_ICP2 ics23.bit._ICP2
\r
11160 #define ICS23_ICE3 ics23.bit._ICE3
\r
11161 #define ICS23_ICE2 ics23.bit._ICE2
\r
11162 #define ICS23_EG31 ics23.bit._EG31
\r
11163 #define ICS23_EG30 ics23.bit._EG30
\r
11164 #define ICS23_EG21 ics23.bit._EG21
\r
11165 #define ICS23_EG20 ics23.bit._EG20
\r
11166 #define ICS23_EG3 ics23.bitc._EG3
\r
11167 #define ICS23_EG2 ics23.bitc._EG2
\r
11168 __IO_EXTERN IPCP0STR ipcp0;
\r
11169 #define IPCP0 ipcp0.word
\r
11170 #define IPCP0_CP15 ipcp0.bit._CP15
\r
11171 #define IPCP0_CP14 ipcp0.bit._CP14
\r
11172 #define IPCP0_CP13 ipcp0.bit._CP13
\r
11173 #define IPCP0_CP12 ipcp0.bit._CP12
\r
11174 #define IPCP0_CP11 ipcp0.bit._CP11
\r
11175 #define IPCP0_CP10 ipcp0.bit._CP10
\r
11176 #define IPCP0_CP9 ipcp0.bit._CP9
\r
11177 #define IPCP0_CP8 ipcp0.bit._CP8
\r
11178 #define IPCP0_CP7 ipcp0.bit._CP7
\r
11179 #define IPCP0_CP6 ipcp0.bit._CP6
\r
11180 #define IPCP0_CP5 ipcp0.bit._CP5
\r
11181 #define IPCP0_CP4 ipcp0.bit._CP4
\r
11182 #define IPCP0_CP3 ipcp0.bit._CP3
\r
11183 #define IPCP0_CP2 ipcp0.bit._CP2
\r
11184 #define IPCP0_CP1 ipcp0.bit._CP1
\r
11185 #define IPCP0_CP0 ipcp0.bit._CP0
\r
11186 __IO_EXTERN IPCP1STR ipcp1;
\r
11187 #define IPCP1 ipcp1.word
\r
11188 #define IPCP1_CP15 ipcp1.bit._CP15
\r
11189 #define IPCP1_CP14 ipcp1.bit._CP14
\r
11190 #define IPCP1_CP13 ipcp1.bit._CP13
\r
11191 #define IPCP1_CP12 ipcp1.bit._CP12
\r
11192 #define IPCP1_CP11 ipcp1.bit._CP11
\r
11193 #define IPCP1_CP10 ipcp1.bit._CP10
\r
11194 #define IPCP1_CP9 ipcp1.bit._CP9
\r
11195 #define IPCP1_CP8 ipcp1.bit._CP8
\r
11196 #define IPCP1_CP7 ipcp1.bit._CP7
\r
11197 #define IPCP1_CP6 ipcp1.bit._CP6
\r
11198 #define IPCP1_CP5 ipcp1.bit._CP5
\r
11199 #define IPCP1_CP4 ipcp1.bit._CP4
\r
11200 #define IPCP1_CP3 ipcp1.bit._CP3
\r
11201 #define IPCP1_CP2 ipcp1.bit._CP2
\r
11202 #define IPCP1_CP1 ipcp1.bit._CP1
\r
11203 #define IPCP1_CP0 ipcp1.bit._CP0
\r
11204 __IO_EXTERN IPCP2STR ipcp2;
\r
11205 #define IPCP2 ipcp2.word
\r
11206 #define IPCP2_CP15 ipcp2.bit._CP15
\r
11207 #define IPCP2_CP14 ipcp2.bit._CP14
\r
11208 #define IPCP2_CP13 ipcp2.bit._CP13
\r
11209 #define IPCP2_CP12 ipcp2.bit._CP12
\r
11210 #define IPCP2_CP11 ipcp2.bit._CP11
\r
11211 #define IPCP2_CP10 ipcp2.bit._CP10
\r
11212 #define IPCP2_CP9 ipcp2.bit._CP9
\r
11213 #define IPCP2_CP8 ipcp2.bit._CP8
\r
11214 #define IPCP2_CP7 ipcp2.bit._CP7
\r
11215 #define IPCP2_CP6 ipcp2.bit._CP6
\r
11216 #define IPCP2_CP5 ipcp2.bit._CP5
\r
11217 #define IPCP2_CP4 ipcp2.bit._CP4
\r
11218 #define IPCP2_CP3 ipcp2.bit._CP3
\r
11219 #define IPCP2_CP2 ipcp2.bit._CP2
\r
11220 #define IPCP2_CP1 ipcp2.bit._CP1
\r
11221 #define IPCP2_CP0 ipcp2.bit._CP0
\r
11222 __IO_EXTERN IPCP3STR ipcp3;
\r
11223 #define IPCP3 ipcp3.word
\r
11224 #define IPCP3_CP15 ipcp3.bit._CP15
\r
11225 #define IPCP3_CP14 ipcp3.bit._CP14
\r
11226 #define IPCP3_CP13 ipcp3.bit._CP13
\r
11227 #define IPCP3_CP12 ipcp3.bit._CP12
\r
11228 #define IPCP3_CP11 ipcp3.bit._CP11
\r
11229 #define IPCP3_CP10 ipcp3.bit._CP10
\r
11230 #define IPCP3_CP9 ipcp3.bit._CP9
\r
11231 #define IPCP3_CP8 ipcp3.bit._CP8
\r
11232 #define IPCP3_CP7 ipcp3.bit._CP7
\r
11233 #define IPCP3_CP6 ipcp3.bit._CP6
\r
11234 #define IPCP3_CP5 ipcp3.bit._CP5
\r
11235 #define IPCP3_CP4 ipcp3.bit._CP4
\r
11236 #define IPCP3_CP3 ipcp3.bit._CP3
\r
11237 #define IPCP3_CP2 ipcp3.bit._CP2
\r
11238 #define IPCP3_CP1 ipcp3.bit._CP1
\r
11239 #define IPCP3_CP0 ipcp3.bit._CP0
\r
11240 __IO_EXTERN OCS01STR ocs01; /* Output Compare 0-3 */
\r
11241 #define OCS01 ocs01.word
\r
11242 #define OCS01_CMOD ocs01.bit._CMOD
\r
11243 #define OCS01_OTD1 ocs01.bit._OTD1
\r
11244 #define OCS01_OTD0 ocs01.bit._OTD0
\r
11245 #define OCS01_ICP1 ocs01.bit._ICP1
\r
11246 #define OCS01_ICP0 ocs01.bit._ICP0
\r
11247 #define OCS01_ICE1 ocs01.bit._ICE1
\r
11248 #define OCS01_ICE0 ocs01.bit._ICE0
\r
11249 #define OCS01_CST1 ocs01.bit._CST1
\r
11250 #define OCS01_CST0 ocs01.bit._CST0
\r
11251 __IO_EXTERN OCS23STR ocs23;
\r
11252 #define OCS23 ocs23.word
\r
11253 #define OCS23_CMOD ocs23.bit._CMOD
\r
11254 #define OCS23_OTD3 ocs23.bit._OTD3
\r
11255 #define OCS23_OTD2 ocs23.bit._OTD2
\r
11256 #define OCS23_ICP3 ocs23.bit._ICP3
\r
11257 #define OCS23_ICP2 ocs23.bit._ICP2
\r
11258 #define OCS23_ICE3 ocs23.bit._ICE3
\r
11259 #define OCS23_ICE2 ocs23.bit._ICE2
\r
11260 #define OCS23_CST3 ocs23.bit._CST3
\r
11261 #define OCS23_CST2 ocs23.bit._CST2
\r
11262 __IO_EXTERN OCCP0STR occp0;
\r
11263 #define OCCP0 occp0.word
\r
11264 #define OCCP0_C15 occp0.bit._C15
\r
11265 #define OCCP0_C14 occp0.bit._C14
\r
11266 #define OCCP0_C13 occp0.bit._C13
\r
11267 #define OCCP0_C12 occp0.bit._C12
\r
11268 #define OCCP0_C11 occp0.bit._C11
\r
11269 #define OCCP0_C10 occp0.bit._C10
\r
11270 #define OCCP0_C9 occp0.bit._C9
\r
11271 #define OCCP0_C8 occp0.bit._C8
\r
11272 #define OCCP0_C7 occp0.bit._C7
\r
11273 #define OCCP0_C6 occp0.bit._C6
\r
11274 #define OCCP0_C5 occp0.bit._C5
\r
11275 #define OCCP0_C4 occp0.bit._C4
\r
11276 #define OCCP0_C3 occp0.bit._C3
\r
11277 #define OCCP0_C2 occp0.bit._C2
\r
11278 #define OCCP0_C1 occp0.bit._C1
\r
11279 #define OCCP0_C0 occp0.bit._C0
\r
11280 __IO_EXTERN OCCP1STR occp1;
\r
11281 #define OCCP1 occp1.word
\r
11282 #define OCCP1_C15 occp1.bit._C15
\r
11283 #define OCCP1_C14 occp1.bit._C14
\r
11284 #define OCCP1_C13 occp1.bit._C13
\r
11285 #define OCCP1_C12 occp1.bit._C12
\r
11286 #define OCCP1_C11 occp1.bit._C11
\r
11287 #define OCCP1_C10 occp1.bit._C10
\r
11288 #define OCCP1_C9 occp1.bit._C9
\r
11289 #define OCCP1_C8 occp1.bit._C8
\r
11290 #define OCCP1_C7 occp1.bit._C7
\r
11291 #define OCCP1_C6 occp1.bit._C6
\r
11292 #define OCCP1_C5 occp1.bit._C5
\r
11293 #define OCCP1_C4 occp1.bit._C4
\r
11294 #define OCCP1_C3 occp1.bit._C3
\r
11295 #define OCCP1_C2 occp1.bit._C2
\r
11296 #define OCCP1_C1 occp1.bit._C1
\r
11297 #define OCCP1_C0 occp1.bit._C0
\r
11298 __IO_EXTERN OCCP2STR occp2;
\r
11299 #define OCCP2 occp2.word
\r
11300 #define OCCP2_C15 occp2.bit._C15
\r
11301 #define OCCP2_C14 occp2.bit._C14
\r
11302 #define OCCP2_C13 occp2.bit._C13
\r
11303 #define OCCP2_C12 occp2.bit._C12
\r
11304 #define OCCP2_C11 occp2.bit._C11
\r
11305 #define OCCP2_C10 occp2.bit._C10
\r
11306 #define OCCP2_C9 occp2.bit._C9
\r
11307 #define OCCP2_C8 occp2.bit._C8
\r
11308 #define OCCP2_C7 occp2.bit._C7
\r
11309 #define OCCP2_C6 occp2.bit._C6
\r
11310 #define OCCP2_C5 occp2.bit._C5
\r
11311 #define OCCP2_C4 occp2.bit._C4
\r
11312 #define OCCP2_C3 occp2.bit._C3
\r
11313 #define OCCP2_C2 occp2.bit._C2
\r
11314 #define OCCP2_C1 occp2.bit._C1
\r
11315 #define OCCP2_C0 occp2.bit._C0
\r
11316 __IO_EXTERN OCCP3STR occp3;
\r
11317 #define OCCP3 occp3.word
\r
11318 #define OCCP3_C15 occp3.bit._C15
\r
11319 #define OCCP3_C14 occp3.bit._C14
\r
11320 #define OCCP3_C13 occp3.bit._C13
\r
11321 #define OCCP3_C12 occp3.bit._C12
\r
11322 #define OCCP3_C11 occp3.bit._C11
\r
11323 #define OCCP3_C10 occp3.bit._C10
\r
11324 #define OCCP3_C9 occp3.bit._C9
\r
11325 #define OCCP3_C8 occp3.bit._C8
\r
11326 #define OCCP3_C7 occp3.bit._C7
\r
11327 #define OCCP3_C6 occp3.bit._C6
\r
11328 #define OCCP3_C5 occp3.bit._C5
\r
11329 #define OCCP3_C4 occp3.bit._C4
\r
11330 #define OCCP3_C3 occp3.bit._C3
\r
11331 #define OCCP3_C2 occp3.bit._C2
\r
11332 #define OCCP3_C1 occp3.bit._C1
\r
11333 #define OCCP3_C0 occp3.bit._C0
\r
11334 __IO_EXTERN ADERHSTR aderh; /* ADC */
\r
11335 #define ADERH aderh.word
\r
11336 #define ADERH_ADE31 aderh.bit._ADE31
\r
11337 #define ADERH_ADE30 aderh.bit._ADE30
\r
11338 #define ADERH_ADE29 aderh.bit._ADE29
\r
11339 #define ADERH_ADE28 aderh.bit._ADE28
\r
11340 #define ADERH_ADE27 aderh.bit._ADE27
\r
11341 #define ADERH_ADE26 aderh.bit._ADE26
\r
11342 #define ADERH_ADE25 aderh.bit._ADE25
\r
11343 #define ADERH_ADE24 aderh.bit._ADE24
\r
11344 #define ADERH_ADE23 aderh.bit._ADE23
\r
11345 #define ADERH_ADE22 aderh.bit._ADE22
\r
11346 #define ADERH_ADE21 aderh.bit._ADE21
\r
11347 #define ADERH_ADE20 aderh.bit._ADE20
\r
11348 #define ADERH_ADE19 aderh.bit._ADE19
\r
11349 #define ADERH_ADE18 aderh.bit._ADE18
\r
11350 #define ADERH_ADE17 aderh.bit._ADE17
\r
11351 #define ADERH_ADE16 aderh.bit._ADE16
\r
11352 __IO_EXTERN ADERLSTR aderl;
\r
11353 #define ADERL aderl.word
\r
11354 #define ADERL_ADE15 aderl.bit._ADE15
\r
11355 #define ADERL_ADE14 aderl.bit._ADE14
\r
11356 #define ADERL_ADE13 aderl.bit._ADE13
\r
11357 #define ADERL_ADE12 aderl.bit._ADE12
\r
11358 #define ADERL_ADE11 aderl.bit._ADE11
\r
11359 #define ADERL_ADE10 aderl.bit._ADE10
\r
11360 #define ADERL_ADE9 aderl.bit._ADE9
\r
11361 #define ADERL_ADE8 aderl.bit._ADE8
\r
11362 #define ADERL_ADE7 aderl.bit._ADE7
\r
11363 #define ADERL_ADE6 aderl.bit._ADE6
\r
11364 #define ADERL_ADE5 aderl.bit._ADE5
\r
11365 #define ADERL_ADE4 aderl.bit._ADE4
\r
11366 #define ADERL_ADE3 aderl.bit._ADE3
\r
11367 #define ADERL_ADE2 aderl.bit._ADE2
\r
11368 #define ADERL_ADE1 aderl.bit._ADE1
\r
11369 #define ADERL_ADE0 aderl.bit._ADE0
\r
11370 __IO_EXTERN IO_LWORD ader;
\r
11371 #define ADER ader
\r
11372 __IO_EXTERN ADCS1STR adcs1;
\r
11373 #define ADCS1 adcs1.byte
\r
11374 #define ADCS1_BUSY adcs1.bit._BUSY
\r
11375 #define ADCS1_INT adcs1.bit._INT
\r
11376 #define ADCS1_INTE adcs1.bit._INTE
\r
11377 #define ADCS1_PAUS adcs1.bit._PAUS
\r
11378 #define ADCS1_STS1 adcs1.bit._STS1
\r
11379 #define ADCS1_STS0 adcs1.bit._STS0
\r
11380 #define ADCS1_STRT adcs1.bit._STRT
\r
11381 #define ADCS1_STS adcs1.bitc._STS
\r
11382 __IO_EXTERN ADCS0STR adcs0;
\r
11383 #define ADCS0 adcs0.byte
\r
11384 #define ADCS0_MD1 adcs0.bit._MD1
\r
11385 #define ADCS0_MD0 adcs0.bit._MD0
\r
11386 #define ADCS0_S10 adcs0.bit._S10
\r
11387 #define ADCS0_ACH4 adcs0.bit._ACH4
\r
11388 #define ADCS0_ACH3 adcs0.bit._ACH3
\r
11389 #define ADCS0_ACH2 adcs0.bit._ACH2
\r
11390 #define ADCS0_ACH1 adcs0.bit._ACH1
\r
11391 #define ADCS0_ACH0 adcs0.bit._ACH0
\r
11392 #define ADCS0_MD adcs0.bitc._MD
\r
11393 #define ADCS0_ACH adcs0.bitc._ACH
\r
11394 __IO_EXTERN IO_WORD adcs;
\r
11395 #define ADCS adcs
\r
11396 __IO_EXTERN ADCR1STR adcr1;
\r
11397 #define ADCR1 adcr1.byte
\r
11398 #define ADCR1_D9 adcr1.bit._D9
\r
11399 #define ADCR1_D8 adcr1.bit._D8
\r
11400 __IO_EXTERN ADCR0STR adcr0;
\r
11401 #define ADCR0 adcr0.byte
\r
11402 #define ADCR0_D7 adcr0.bit._D7
\r
11403 #define ADCR0_D6 adcr0.bit._D6
\r
11404 #define ADCR0_D5 adcr0.bit._D5
\r
11405 #define ADCR0_D4 adcr0.bit._D4
\r
11406 #define ADCR0_D3 adcr0.bit._D3
\r
11407 #define ADCR0_D2 adcr0.bit._D2
\r
11408 #define ADCR0_D1 adcr0.bit._D1
\r
11409 #define ADCR0_D0 adcr0.bit._D0
\r
11410 __IO_EXTERN IO_WORD adcr;
\r
11411 #define ADCR adcr
\r
11412 __IO_EXTERN ADCT1STR adct1;
\r
11413 #define ADCT1 adct1.byte
\r
11414 #define ADCT1_CT5 adct1.bit._CT5
\r
11415 #define ADCT1_CT4 adct1.bit._CT4
\r
11416 #define ADCT1_CT3 adct1.bit._CT3
\r
11417 #define ADCT1_CT2 adct1.bit._CT2
\r
11418 #define ADCT1_CT1 adct1.bit._CT1
\r
11419 #define ADCT1_CT0 adct1.bit._CT0
\r
11420 #define ADCT1_ST9 adct1.bit._ST9
\r
11421 #define ADCT1_ST8 adct1.bit._ST8
\r
11422 __IO_EXTERN ADCT0STR adct0;
\r
11423 #define ADCT0 adct0.byte
\r
11424 #define ADCT0_ST7 adct0.bit._ST7
\r
11425 #define ADCT0_ST6 adct0.bit._ST6
\r
11426 #define ADCT0_ST5 adct0.bit._ST5
\r
11427 #define ADCT0_ST4 adct0.bit._ST4
\r
11428 #define ADCT0_ST3 adct0.bit._ST3
\r
11429 #define ADCT0_ST2 adct0.bit._ST2
\r
11430 #define ADCT0_ST1 adct0.bit._ST1
\r
11431 #define ADCT0_ST0 adct0.bit._ST0
\r
11432 __IO_EXTERN IO_WORD adct;
\r
11433 #define ADCT adct
\r
11434 __IO_EXTERN ADSCHSTR adsch;
\r
11435 #define ADSCH adsch.byte
\r
11436 #define ADSCH_ANS4 adsch.bit._ANS4
\r
11437 #define ADSCH_ANS3 adsch.bit._ANS3
\r
11438 #define ADSCH_ANS2 adsch.bit._ANS2
\r
11439 #define ADSCH_ANS1 adsch.bit._ANS1
\r
11440 #define ADSCH_ASN0 adsch.bit._ASN0
\r
11441 #define ADSCH_ANS adsch.bitc._ANS
\r
11442 __IO_EXTERN ADECHSTR adech;
\r
11443 #define ADECH adech.byte
\r
11444 #define ADECH_ANE4 adech.bit._ANE4
\r
11445 #define ADECH_ANE3 adech.bit._ANE3
\r
11446 #define ADECH_ANE2 adech.bit._ANE2
\r
11447 #define ADECH_ANE1 adech.bit._ANE1
\r
11448 #define ADECH_ANE0 adech.bit._ANE0
\r
11449 #define ADECH_ANE adech.bitc._ANE
\r
11450 __IO_EXTERN TMRLR0STR tmrlr0; /* Reload Timer 0 */
\r
11451 #define TMRLR0 tmrlr0.word
\r
11452 #define TMRLR0_D15 tmrlr0.bit._D15
\r
11453 #define TMRLR0_D14 tmrlr0.bit._D14
\r
11454 #define TMRLR0_D13 tmrlr0.bit._D13
\r
11455 #define TMRLR0_D12 tmrlr0.bit._D12
\r
11456 #define TMRLR0_D11 tmrlr0.bit._D11
\r
11457 #define TMRLR0_D10 tmrlr0.bit._D10
\r
11458 #define TMRLR0_D9 tmrlr0.bit._D9
\r
11459 #define TMRLR0_D8 tmrlr0.bit._D8
\r
11460 #define TMRLR0_D7 tmrlr0.bit._D7
\r
11461 #define TMRLR0_D6 tmrlr0.bit._D6
\r
11462 #define TMRLR0_D5 tmrlr0.bit._D5
\r
11463 #define TMRLR0_D4 tmrlr0.bit._D4
\r
11464 #define TMRLR0_D3 tmrlr0.bit._D3
\r
11465 #define TMRLR0_D2 tmrlr0.bit._D2
\r
11466 #define TMRLR0_D1 tmrlr0.bit._D1
\r
11467 #define TMRLR0_D0 tmrlr0.bit._D0
\r
11468 __IO_EXTERN TMR0STR tmr0;
\r
11469 #define TMR0 tmr0.word
\r
11470 #define TMR0_D15 tmr0.bit._D15
\r
11471 #define TMR0_D14 tmr0.bit._D14
\r
11472 #define TMR0_D13 tmr0.bit._D13
\r
11473 #define TMR0_D12 tmr0.bit._D12
\r
11474 #define TMR0_D11 tmr0.bit._D11
\r
11475 #define TMR0_D10 tmr0.bit._D10
\r
11476 #define TMR0_D9 tmr0.bit._D9
\r
11477 #define TMR0_D8 tmr0.bit._D8
\r
11478 #define TMR0_D7 tmr0.bit._D7
\r
11479 #define TMR0_D6 tmr0.bit._D6
\r
11480 #define TMR0_D5 tmr0.bit._D5
\r
11481 #define TMR0_D4 tmr0.bit._D4
\r
11482 #define TMR0_D3 tmr0.bit._D3
\r
11483 #define TMR0_D2 tmr0.bit._D2
\r
11484 #define TMR0_D1 tmr0.bit._D1
\r
11485 #define TMR0_D0 tmr0.bit._D0
\r
11486 __IO_EXTERN TMCSR0STR tmcsr0;
\r
11487 #define TMCSR0 tmcsr0.word
\r
11488 #define TMCSR0_CSL2 tmcsr0.bit._CSL2
\r
11489 #define TMCSR0_CSL1 tmcsr0.bit._CSL1
\r
11490 #define TMCSR0_CSL0 tmcsr0.bit._CSL0
\r
11491 #define TMCSR0_MOD2 tmcsr0.bit._MOD2
\r
11492 #define TMCSR0_MOD1 tmcsr0.bit._MOD1
\r
11493 #define TMCSR0_MOD0 tmcsr0.bit._MOD0
\r
11494 #define TMCSR0_OULT tmcsr0.bit._OULT
\r
11495 #define TMCSR0_RELD tmcsr0.bit._RELD
\r
11496 #define TMCSR0_INTE tmcsr0.bit._INTE
\r
11497 #define TMCSR0_UF tmcsr0.bit._UF
\r
11498 #define TMCSR0_CNTE tmcsr0.bit._CNTE
\r
11499 #define TMCSR0_TRG tmcsr0.bit._TRG
\r
11500 #define TMCSR0_CSL tmcsr0.bitc._CSL
\r
11501 #define TMCSR0_MOD tmcsr0.bitc._MOD
\r
11502 __IO_EXTERN TMCSRH0STR tmcsrh0;
\r
11503 #define TMCSRH0 tmcsrh0.byte
\r
11504 #define TMCSRH0_CSL2 tmcsrh0.bit._CSL2
\r
11505 #define TMCSRH0_CSL1 tmcsrh0.bit._CSL1
\r
11506 #define TMCSRH0_CSL0 tmcsrh0.bit._CSL0
\r
11507 #define TMCSRH0_MOD2 tmcsrh0.bit._MOD2
\r
11508 #define TMCSRH0_MOD1 tmcsrh0.bit._MOD1
\r
11509 #define TMCSRH0_CSL tmcsrh0.bitc._CSL
\r
11510 __IO_EXTERN TMCSRL0STR tmcsrl0;
\r
11511 #define TMCSRL0 tmcsrl0.byte
\r
11512 #define TMCSRL0_MOD0 tmcsrl0.bit._MOD0
\r
11513 #define TMCSRL0_OULT tmcsrl0.bit._OULT
\r
11514 #define TMCSRL0_RELD tmcsrl0.bit._RELD
\r
11515 #define TMCSRL0_INTE tmcsrl0.bit._INTE
\r
11516 #define TMCSRL0_UF tmcsrl0.bit._UF
\r
11517 #define TMCSRL0_CNTE tmcsrl0.bit._CNTE
\r
11518 #define TMCSRL0_TRG tmcsrl0.bit._TRG
\r
11519 __IO_EXTERN TMRLR1STR tmrlr1; /* Reload Timer 1 */
\r
11520 #define TMRLR1 tmrlr1.word
\r
11521 #define TMRLR1_D15 tmrlr1.bit._D15
\r
11522 #define TMRLR1_D14 tmrlr1.bit._D14
\r
11523 #define TMRLR1_D13 tmrlr1.bit._D13
\r
11524 #define TMRLR1_D12 tmrlr1.bit._D12
\r
11525 #define TMRLR1_D11 tmrlr1.bit._D11
\r
11526 #define TMRLR1_D10 tmrlr1.bit._D10
\r
11527 #define TMRLR1_D9 tmrlr1.bit._D9
\r
11528 #define TMRLR1_D8 tmrlr1.bit._D8
\r
11529 #define TMRLR1_D7 tmrlr1.bit._D7
\r
11530 #define TMRLR1_D6 tmrlr1.bit._D6
\r
11531 #define TMRLR1_D5 tmrlr1.bit._D5
\r
11532 #define TMRLR1_D4 tmrlr1.bit._D4
\r
11533 #define TMRLR1_D3 tmrlr1.bit._D3
\r
11534 #define TMRLR1_D2 tmrlr1.bit._D2
\r
11535 #define TMRLR1_D1 tmrlr1.bit._D1
\r
11536 #define TMRLR1_D0 tmrlr1.bit._D0
\r
11537 __IO_EXTERN TMR1STR tmr1;
\r
11538 #define TMR1 tmr1.word
\r
11539 #define TMR1_D15 tmr1.bit._D15
\r
11540 #define TMR1_D14 tmr1.bit._D14
\r
11541 #define TMR1_D13 tmr1.bit._D13
\r
11542 #define TMR1_D12 tmr1.bit._D12
\r
11543 #define TMR1_D11 tmr1.bit._D11
\r
11544 #define TMR1_D10 tmr1.bit._D10
\r
11545 #define TMR1_D9 tmr1.bit._D9
\r
11546 #define TMR1_D8 tmr1.bit._D8
\r
11547 #define TMR1_D7 tmr1.bit._D7
\r
11548 #define TMR1_D6 tmr1.bit._D6
\r
11549 #define TMR1_D5 tmr1.bit._D5
\r
11550 #define TMR1_D4 tmr1.bit._D4
\r
11551 #define TMR1_D3 tmr1.bit._D3
\r
11552 #define TMR1_D2 tmr1.bit._D2
\r
11553 #define TMR1_D1 tmr1.bit._D1
\r
11554 #define TMR1_D0 tmr1.bit._D0
\r
11555 __IO_EXTERN TMCSR1STR tmcsr1;
\r
11556 #define TMCSR1 tmcsr1.word
\r
11557 #define TMCSR1_CSL2 tmcsr1.bit._CSL2
\r
11558 #define TMCSR1_CSL1 tmcsr1.bit._CSL1
\r
11559 #define TMCSR1_CSL0 tmcsr1.bit._CSL0
\r
11560 #define TMCSR1_MOD2 tmcsr1.bit._MOD2
\r
11561 #define TMCSR1_MOD1 tmcsr1.bit._MOD1
\r
11562 #define TMCSR1_MOD0 tmcsr1.bit._MOD0
\r
11563 #define TMCSR1_OULT tmcsr1.bit._OULT
\r
11564 #define TMCSR1_RELD tmcsr1.bit._RELD
\r
11565 #define TMCSR1_INTE tmcsr1.bit._INTE
\r
11566 #define TMCSR1_UF tmcsr1.bit._UF
\r
11567 #define TMCSR1_CNTE tmcsr1.bit._CNTE
\r
11568 #define TMCSR1_TRG tmcsr1.bit._TRG
\r
11569 #define TMCSR1_CSL tmcsr1.bitc._CSL
\r
11570 #define TMCSR1_MOD tmcsr1.bitc._MOD
\r
11571 __IO_EXTERN TMCSRH1STR tmcsrh1;
\r
11572 #define TMCSRH1 tmcsrh1.byte
\r
11573 #define TMCSRH1_CSL2 tmcsrh1.bit._CSL2
\r
11574 #define TMCSRH1_CSL1 tmcsrh1.bit._CSL1
\r
11575 #define TMCSRH1_CSL0 tmcsrh1.bit._CSL0
\r
11576 #define TMCSRH1_MOD2 tmcsrh1.bit._MOD2
\r
11577 #define TMCSRH1_MOD1 tmcsrh1.bit._MOD1
\r
11578 #define TMCSRH1_CSL tmcsrh1.bitc._CSL
\r
11579 __IO_EXTERN TMCSRL1STR tmcsrl1;
\r
11580 #define TMCSRL1 tmcsrl1.byte
\r
11581 #define TMCSRL1_MOD0 tmcsrl1.bit._MOD0
\r
11582 #define TMCSRL1_OULT tmcsrl1.bit._OULT
\r
11583 #define TMCSRL1_RELD tmcsrl1.bit._RELD
\r
11584 #define TMCSRL1_INTE tmcsrl1.bit._INTE
\r
11585 #define TMCSRL1_UF tmcsrl1.bit._UF
\r
11586 #define TMCSRL1_CNTE tmcsrl1.bit._CNTE
\r
11587 #define TMCSRL1_TRG tmcsrl1.bit._TRG
\r
11588 __IO_EXTERN TMRLR2STR tmrlr2; /* Reload Timer 2 */
\r
11589 #define TMRLR2 tmrlr2.word
\r
11590 #define TMRLR2_D15 tmrlr2.bit._D15
\r
11591 #define TMRLR2_D14 tmrlr2.bit._D14
\r
11592 #define TMRLR2_D13 tmrlr2.bit._D13
\r
11593 #define TMRLR2_D12 tmrlr2.bit._D12
\r
11594 #define TMRLR2_D11 tmrlr2.bit._D11
\r
11595 #define TMRLR2_D10 tmrlr2.bit._D10
\r
11596 #define TMRLR2_D9 tmrlr2.bit._D9
\r
11597 #define TMRLR2_D8 tmrlr2.bit._D8
\r
11598 #define TMRLR2_D7 tmrlr2.bit._D7
\r
11599 #define TMRLR2_D6 tmrlr2.bit._D6
\r
11600 #define TMRLR2_D5 tmrlr2.bit._D5
\r
11601 #define TMRLR2_D4 tmrlr2.bit._D4
\r
11602 #define TMRLR2_D3 tmrlr2.bit._D3
\r
11603 #define TMRLR2_D2 tmrlr2.bit._D2
\r
11604 #define TMRLR2_D1 tmrlr2.bit._D1
\r
11605 #define TMRLR2_D0 tmrlr2.bit._D0
\r
11606 __IO_EXTERN TMR2STR tmr2;
\r
11607 #define TMR2 tmr2.word
\r
11608 #define TMR2_D15 tmr2.bit._D15
\r
11609 #define TMR2_D14 tmr2.bit._D14
\r
11610 #define TMR2_D13 tmr2.bit._D13
\r
11611 #define TMR2_D12 tmr2.bit._D12
\r
11612 #define TMR2_D11 tmr2.bit._D11
\r
11613 #define TMR2_D10 tmr2.bit._D10
\r
11614 #define TMR2_D9 tmr2.bit._D9
\r
11615 #define TMR2_D8 tmr2.bit._D8
\r
11616 #define TMR2_D7 tmr2.bit._D7
\r
11617 #define TMR2_D6 tmr2.bit._D6
\r
11618 #define TMR2_D5 tmr2.bit._D5
\r
11619 #define TMR2_D4 tmr2.bit._D4
\r
11620 #define TMR2_D3 tmr2.bit._D3
\r
11621 #define TMR2_D2 tmr2.bit._D2
\r
11622 #define TMR2_D1 tmr2.bit._D1
\r
11623 #define TMR2_D0 tmr2.bit._D0
\r
11624 __IO_EXTERN TMCSR2STR tmcsr2;
\r
11625 #define TMCSR2 tmcsr2.word
\r
11626 #define TMCSR2_CSL2 tmcsr2.bit._CSL2
\r
11627 #define TMCSR2_CSL1 tmcsr2.bit._CSL1
\r
11628 #define TMCSR2_CSL0 tmcsr2.bit._CSL0
\r
11629 #define TMCSR2_MOD2 tmcsr2.bit._MOD2
\r
11630 #define TMCSR2_MOD1 tmcsr2.bit._MOD1
\r
11631 #define TMCSR2_MOD0 tmcsr2.bit._MOD0
\r
11632 #define TMCSR2_OULT tmcsr2.bit._OULT
\r
11633 #define TMCSR2_RELD tmcsr2.bit._RELD
\r
11634 #define TMCSR2_INTE tmcsr2.bit._INTE
\r
11635 #define TMCSR2_UF tmcsr2.bit._UF
\r
11636 #define TMCSR2_CNTE tmcsr2.bit._CNTE
\r
11637 #define TMCSR2_TRG tmcsr2.bit._TRG
\r
11638 #define TMCSR2_CSL tmcsr2.bitc._CSL
\r
11639 #define TMCSR2_MOD tmcsr2.bitc._MOD
\r
11640 __IO_EXTERN TMCSRH2STR tmcsrh2;
\r
11641 #define TMCSRH2 tmcsrh2.byte
\r
11642 #define TMCSRH2_CSL2 tmcsrh2.bit._CSL2
\r
11643 #define TMCSRH2_CSL1 tmcsrh2.bit._CSL1
\r
11644 #define TMCSRH2_CSL0 tmcsrh2.bit._CSL0
\r
11645 #define TMCSRH2_MOD2 tmcsrh2.bit._MOD2
\r
11646 #define TMCSRH2_MOD1 tmcsrh2.bit._MOD1
\r
11647 #define TMCSRH2_CSL tmcsrh2.bitc._CSL
\r
11648 __IO_EXTERN TMCSRL2STR tmcsrl2;
\r
11649 #define TMCSRL2 tmcsrl2.byte
\r
11650 #define TMCSRL2_MOD0 tmcsrl2.bit._MOD0
\r
11651 #define TMCSRL2_OULT tmcsrl2.bit._OULT
\r
11652 #define TMCSRL2_RELD tmcsrl2.bit._RELD
\r
11653 #define TMCSRL2_INTE tmcsrl2.bit._INTE
\r
11654 #define TMCSRL2_UF tmcsrl2.bit._UF
\r
11655 #define TMCSRL2_CNTE tmcsrl2.bit._CNTE
\r
11656 #define TMCSRL2_TRG tmcsrl2.bit._TRG
\r
11657 __IO_EXTERN TMRLR3STR tmrlr3; /* Reload Timer 3 */
\r
11658 #define TMRLR3 tmrlr3.word
\r
11659 #define TMRLR3_D15 tmrlr3.bit._D15
\r
11660 #define TMRLR3_D14 tmrlr3.bit._D14
\r
11661 #define TMRLR3_D13 tmrlr3.bit._D13
\r
11662 #define TMRLR3_D12 tmrlr3.bit._D12
\r
11663 #define TMRLR3_D11 tmrlr3.bit._D11
\r
11664 #define TMRLR3_D10 tmrlr3.bit._D10
\r
11665 #define TMRLR3_D9 tmrlr3.bit._D9
\r
11666 #define TMRLR3_D8 tmrlr3.bit._D8
\r
11667 #define TMRLR3_D7 tmrlr3.bit._D7
\r
11668 #define TMRLR3_D6 tmrlr3.bit._D6
\r
11669 #define TMRLR3_D5 tmrlr3.bit._D5
\r
11670 #define TMRLR3_D4 tmrlr3.bit._D4
\r
11671 #define TMRLR3_D3 tmrlr3.bit._D3
\r
11672 #define TMRLR3_D2 tmrlr3.bit._D2
\r
11673 #define TMRLR3_D1 tmrlr3.bit._D1
\r
11674 #define TMRLR3_D0 tmrlr3.bit._D0
\r
11675 __IO_EXTERN TMR3STR tmr3;
\r
11676 #define TMR3 tmr3.word
\r
11677 #define TMR3_D15 tmr3.bit._D15
\r
11678 #define TMR3_D14 tmr3.bit._D14
\r
11679 #define TMR3_D13 tmr3.bit._D13
\r
11680 #define TMR3_D12 tmr3.bit._D12
\r
11681 #define TMR3_D11 tmr3.bit._D11
\r
11682 #define TMR3_D10 tmr3.bit._D10
\r
11683 #define TMR3_D9 tmr3.bit._D9
\r
11684 #define TMR3_D8 tmr3.bit._D8
\r
11685 #define TMR3_D7 tmr3.bit._D7
\r
11686 #define TMR3_D6 tmr3.bit._D6
\r
11687 #define TMR3_D5 tmr3.bit._D5
\r
11688 #define TMR3_D4 tmr3.bit._D4
\r
11689 #define TMR3_D3 tmr3.bit._D3
\r
11690 #define TMR3_D2 tmr3.bit._D2
\r
11691 #define TMR3_D1 tmr3.bit._D1
\r
11692 #define TMR3_D0 tmr3.bit._D0
\r
11693 __IO_EXTERN TMCSR3STR tmcsr3;
\r
11694 #define TMCSR3 tmcsr3.word
\r
11695 #define TMCSR3_CSL2 tmcsr3.bit._CSL2
\r
11696 #define TMCSR3_CSL1 tmcsr3.bit._CSL1
\r
11697 #define TMCSR3_CSL0 tmcsr3.bit._CSL0
\r
11698 #define TMCSR3_MOD2 tmcsr3.bit._MOD2
\r
11699 #define TMCSR3_MOD1 tmcsr3.bit._MOD1
\r
11700 #define TMCSR3_MOD0 tmcsr3.bit._MOD0
\r
11701 #define TMCSR3_OULT tmcsr3.bit._OULT
\r
11702 #define TMCSR3_RELD tmcsr3.bit._RELD
\r
11703 #define TMCSR3_INTE tmcsr3.bit._INTE
\r
11704 #define TMCSR3_UF tmcsr3.bit._UF
\r
11705 #define TMCSR3_CNTE tmcsr3.bit._CNTE
\r
11706 #define TMCSR3_TRG tmcsr3.bit._TRG
\r
11707 #define TMCSR3_CSL tmcsr3.bitc._CSL
\r
11708 #define TMCSR3_MOD tmcsr3.bitc._MOD
\r
11709 __IO_EXTERN TMCSRH3STR tmcsrh3;
\r
11710 #define TMCSRH3 tmcsrh3.byte
\r
11711 #define TMCSRH3_CSL2 tmcsrh3.bit._CSL2
\r
11712 #define TMCSRH3_CSL1 tmcsrh3.bit._CSL1
\r
11713 #define TMCSRH3_CSL0 tmcsrh3.bit._CSL0
\r
11714 #define TMCSRH3_MOD2 tmcsrh3.bit._MOD2
\r
11715 #define TMCSRH3_MOD1 tmcsrh3.bit._MOD1
\r
11716 #define TMCSRH3_CSL tmcsrh3.bitc._CSL
\r
11717 __IO_EXTERN TMCSRL3STR tmcsrl3;
\r
11718 #define TMCSRL3 tmcsrl3.byte
\r
11719 #define TMCSRL3_MOD0 tmcsrl3.bit._MOD0
\r
11720 #define TMCSRL3_OULT tmcsrl3.bit._OULT
\r
11721 #define TMCSRL3_RELD tmcsrl3.bit._RELD
\r
11722 #define TMCSRL3_INTE tmcsrl3.bit._INTE
\r
11723 #define TMCSRL3_UF tmcsrl3.bit._UF
\r
11724 #define TMCSRL3_CNTE tmcsrl3.bit._CNTE
\r
11725 #define TMCSRL3_TRG tmcsrl3.bit._TRG
\r
11726 __IO_EXTERN TMRLR4STR tmrlr4; /* Reload Timer 4 */
\r
11727 #define TMRLR4 tmrlr4.word
\r
11728 #define TMRLR4_D15 tmrlr4.bit._D15
\r
11729 #define TMRLR4_D14 tmrlr4.bit._D14
\r
11730 #define TMRLR4_D13 tmrlr4.bit._D13
\r
11731 #define TMRLR4_D12 tmrlr4.bit._D12
\r
11732 #define TMRLR4_D11 tmrlr4.bit._D11
\r
11733 #define TMRLR4_D10 tmrlr4.bit._D10
\r
11734 #define TMRLR4_D9 tmrlr4.bit._D9
\r
11735 #define TMRLR4_D8 tmrlr4.bit._D8
\r
11736 #define TMRLR4_D7 tmrlr4.bit._D7
\r
11737 #define TMRLR4_D6 tmrlr4.bit._D6
\r
11738 #define TMRLR4_D5 tmrlr4.bit._D5
\r
11739 #define TMRLR4_D4 tmrlr4.bit._D4
\r
11740 #define TMRLR4_D3 tmrlr4.bit._D3
\r
11741 #define TMRLR4_D2 tmrlr4.bit._D2
\r
11742 #define TMRLR4_D1 tmrlr4.bit._D1
\r
11743 #define TMRLR4_D0 tmrlr4.bit._D0
\r
11744 __IO_EXTERN TMR4STR tmr4;
\r
11745 #define TMR4 tmr4.word
\r
11746 #define TMR4_D15 tmr4.bit._D15
\r
11747 #define TMR4_D14 tmr4.bit._D14
\r
11748 #define TMR4_D13 tmr4.bit._D13
\r
11749 #define TMR4_D12 tmr4.bit._D12
\r
11750 #define TMR4_D11 tmr4.bit._D11
\r
11751 #define TMR4_D10 tmr4.bit._D10
\r
11752 #define TMR4_D9 tmr4.bit._D9
\r
11753 #define TMR4_D8 tmr4.bit._D8
\r
11754 #define TMR4_D7 tmr4.bit._D7
\r
11755 #define TMR4_D6 tmr4.bit._D6
\r
11756 #define TMR4_D5 tmr4.bit._D5
\r
11757 #define TMR4_D4 tmr4.bit._D4
\r
11758 #define TMR4_D3 tmr4.bit._D3
\r
11759 #define TMR4_D2 tmr4.bit._D2
\r
11760 #define TMR4_D1 tmr4.bit._D1
\r
11761 #define TMR4_D0 tmr4.bit._D0
\r
11762 __IO_EXTERN TMCSR4STR tmcsr4;
\r
11763 #define TMCSR4 tmcsr4.word
\r
11764 #define TMCSR4_CSL2 tmcsr4.bit._CSL2
\r
11765 #define TMCSR4_CSL1 tmcsr4.bit._CSL1
\r
11766 #define TMCSR4_CSL0 tmcsr4.bit._CSL0
\r
11767 #define TMCSR4_MOD2 tmcsr4.bit._MOD2
\r
11768 #define TMCSR4_MOD1 tmcsr4.bit._MOD1
\r
11769 #define TMCSR4_MOD0 tmcsr4.bit._MOD0
\r
11770 #define TMCSR4_OULT tmcsr4.bit._OULT
\r
11771 #define TMCSR4_RELD tmcsr4.bit._RELD
\r
11772 #define TMCSR4_INTE tmcsr4.bit._INTE
\r
11773 #define TMCSR4_UF tmcsr4.bit._UF
\r
11774 #define TMCSR4_CNTE tmcsr4.bit._CNTE
\r
11775 #define TMCSR4_TRG tmcsr4.bit._TRG
\r
11776 #define TMCSR4_CSL tmcsr4.bitc._CSL
\r
11777 #define TMCSR4_MOD tmcsr4.bitc._MOD
\r
11778 __IO_EXTERN TMCSRH4STR tmcsrh4;
\r
11779 #define TMCSRH4 tmcsrh4.byte
\r
11780 #define TMCSRH4_CSL2 tmcsrh4.bit._CSL2
\r
11781 #define TMCSRH4_CSL1 tmcsrh4.bit._CSL1
\r
11782 #define TMCSRH4_CSL0 tmcsrh4.bit._CSL0
\r
11783 #define TMCSRH4_MOD2 tmcsrh4.bit._MOD2
\r
11784 #define TMCSRH4_MOD1 tmcsrh4.bit._MOD1
\r
11785 #define TMCSRH4_CSL tmcsrh4.bitc._CSL
\r
11786 __IO_EXTERN TMCSRL4STR tmcsrl4;
\r
11787 #define TMCSRL4 tmcsrl4.byte
\r
11788 #define TMCSRL4_MOD0 tmcsrl4.bit._MOD0
\r
11789 #define TMCSRL4_OULT tmcsrl4.bit._OULT
\r
11790 #define TMCSRL4_RELD tmcsrl4.bit._RELD
\r
11791 #define TMCSRL4_INTE tmcsrl4.bit._INTE
\r
11792 #define TMCSRL4_UF tmcsrl4.bit._UF
\r
11793 #define TMCSRL4_CNTE tmcsrl4.bit._CNTE
\r
11794 #define TMCSRL4_TRG tmcsrl4.bit._TRG
\r
11795 __IO_EXTERN TMRLR5STR tmrlr5; /* Reload Timer 5 */
\r
11796 #define TMRLR5 tmrlr5.word
\r
11797 #define TMRLR5_D15 tmrlr5.bit._D15
\r
11798 #define TMRLR5_D14 tmrlr5.bit._D14
\r
11799 #define TMRLR5_D13 tmrlr5.bit._D13
\r
11800 #define TMRLR5_D12 tmrlr5.bit._D12
\r
11801 #define TMRLR5_D11 tmrlr5.bit._D11
\r
11802 #define TMRLR5_D10 tmrlr5.bit._D10
\r
11803 #define TMRLR5_D9 tmrlr5.bit._D9
\r
11804 #define TMRLR5_D8 tmrlr5.bit._D8
\r
11805 #define TMRLR5_D7 tmrlr5.bit._D7
\r
11806 #define TMRLR5_D6 tmrlr5.bit._D6
\r
11807 #define TMRLR5_D5 tmrlr5.bit._D5
\r
11808 #define TMRLR5_D4 tmrlr5.bit._D4
\r
11809 #define TMRLR5_D3 tmrlr5.bit._D3
\r
11810 #define TMRLR5_D2 tmrlr5.bit._D2
\r
11811 #define TMRLR5_D1 tmrlr5.bit._D1
\r
11812 #define TMRLR5_D0 tmrlr5.bit._D0
\r
11813 __IO_EXTERN TMR5STR tmr5;
\r
11814 #define TMR5 tmr5.word
\r
11815 #define TMR5_D15 tmr5.bit._D15
\r
11816 #define TMR5_D14 tmr5.bit._D14
\r
11817 #define TMR5_D13 tmr5.bit._D13
\r
11818 #define TMR5_D12 tmr5.bit._D12
\r
11819 #define TMR5_D11 tmr5.bit._D11
\r
11820 #define TMR5_D10 tmr5.bit._D10
\r
11821 #define TMR5_D9 tmr5.bit._D9
\r
11822 #define TMR5_D8 tmr5.bit._D8
\r
11823 #define TMR5_D7 tmr5.bit._D7
\r
11824 #define TMR5_D6 tmr5.bit._D6
\r
11825 #define TMR5_D5 tmr5.bit._D5
\r
11826 #define TMR5_D4 tmr5.bit._D4
\r
11827 #define TMR5_D3 tmr5.bit._D3
\r
11828 #define TMR5_D2 tmr5.bit._D2
\r
11829 #define TMR5_D1 tmr5.bit._D1
\r
11830 #define TMR5_D0 tmr5.bit._D0
\r
11831 __IO_EXTERN TMCSR5STR tmcsr5;
\r
11832 #define TMCSR5 tmcsr5.word
\r
11833 #define TMCSR5_CSL2 tmcsr5.bit._CSL2
\r
11834 #define TMCSR5_CSL1 tmcsr5.bit._CSL1
\r
11835 #define TMCSR5_CSL0 tmcsr5.bit._CSL0
\r
11836 #define TMCSR5_MOD2 tmcsr5.bit._MOD2
\r
11837 #define TMCSR5_MOD1 tmcsr5.bit._MOD1
\r
11838 #define TMCSR5_MOD0 tmcsr5.bit._MOD0
\r
11839 #define TMCSR5_OULT tmcsr5.bit._OULT
\r
11840 #define TMCSR5_RELD tmcsr5.bit._RELD
\r
11841 #define TMCSR5_INTE tmcsr5.bit._INTE
\r
11842 #define TMCSR5_UF tmcsr5.bit._UF
\r
11843 #define TMCSR5_CNTE tmcsr5.bit._CNTE
\r
11844 #define TMCSR5_TRG tmcsr5.bit._TRG
\r
11845 #define TMCSR5_CSL tmcsr5.bitc._CSL
\r
11846 #define TMCSR5_MOD tmcsr5.bitc._MOD
\r
11847 __IO_EXTERN TMCSRH5STR tmcsrh5;
\r
11848 #define TMCSRH5 tmcsrh5.byte
\r
11849 #define TMCSRH5_CSL2 tmcsrh5.bit._CSL2
\r
11850 #define TMCSRH5_CSL1 tmcsrh5.bit._CSL1
\r
11851 #define TMCSRH5_CSL0 tmcsrh5.bit._CSL0
\r
11852 #define TMCSRH5_MOD2 tmcsrh5.bit._MOD2
\r
11853 #define TMCSRH5_MOD1 tmcsrh5.bit._MOD1
\r
11854 #define TMCSRH5_CSL tmcsrh5.bitc._CSL
\r
11855 __IO_EXTERN TMCSRL5STR tmcsrl5;
\r
11856 #define TMCSRL5 tmcsrl5.byte
\r
11857 #define TMCSRL5_MOD0 tmcsrl5.bit._MOD0
\r
11858 #define TMCSRL5_OULT tmcsrl5.bit._OULT
\r
11859 #define TMCSRL5_RELD tmcsrl5.bit._RELD
\r
11860 #define TMCSRL5_INTE tmcsrl5.bit._INTE
\r
11861 #define TMCSRL5_UF tmcsrl5.bit._UF
\r
11862 #define TMCSRL5_CNTE tmcsrl5.bit._CNTE
\r
11863 #define TMCSRL5_TRG tmcsrl5.bit._TRG
\r
11864 __IO_EXTERN TMRLR6STR tmrlr6; /* Reload Timer 6 */
\r
11865 #define TMRLR6 tmrlr6.word
\r
11866 #define TMRLR6_D15 tmrlr6.bit._D15
\r
11867 #define TMRLR6_D14 tmrlr6.bit._D14
\r
11868 #define TMRLR6_D13 tmrlr6.bit._D13
\r
11869 #define TMRLR6_D12 tmrlr6.bit._D12
\r
11870 #define TMRLR6_D11 tmrlr6.bit._D11
\r
11871 #define TMRLR6_D10 tmrlr6.bit._D10
\r
11872 #define TMRLR6_D9 tmrlr6.bit._D9
\r
11873 #define TMRLR6_D8 tmrlr6.bit._D8
\r
11874 #define TMRLR6_D7 tmrlr6.bit._D7
\r
11875 #define TMRLR6_D6 tmrlr6.bit._D6
\r
11876 #define TMRLR6_D5 tmrlr6.bit._D5
\r
11877 #define TMRLR6_D4 tmrlr6.bit._D4
\r
11878 #define TMRLR6_D3 tmrlr6.bit._D3
\r
11879 #define TMRLR6_D2 tmrlr6.bit._D2
\r
11880 #define TMRLR6_D1 tmrlr6.bit._D1
\r
11881 #define TMRLR6_D0 tmrlr6.bit._D0
\r
11882 __IO_EXTERN TMR6STR tmr6;
\r
11883 #define TMR6 tmr6.word
\r
11884 #define TMR6_D15 tmr6.bit._D15
\r
11885 #define TMR6_D14 tmr6.bit._D14
\r
11886 #define TMR6_D13 tmr6.bit._D13
\r
11887 #define TMR6_D12 tmr6.bit._D12
\r
11888 #define TMR6_D11 tmr6.bit._D11
\r
11889 #define TMR6_D10 tmr6.bit._D10
\r
11890 #define TMR6_D9 tmr6.bit._D9
\r
11891 #define TMR6_D8 tmr6.bit._D8
\r
11892 #define TMR6_D7 tmr6.bit._D7
\r
11893 #define TMR6_D6 tmr6.bit._D6
\r
11894 #define TMR6_D5 tmr6.bit._D5
\r
11895 #define TMR6_D4 tmr6.bit._D4
\r
11896 #define TMR6_D3 tmr6.bit._D3
\r
11897 #define TMR6_D2 tmr6.bit._D2
\r
11898 #define TMR6_D1 tmr6.bit._D1
\r
11899 #define TMR6_D0 tmr6.bit._D0
\r
11900 __IO_EXTERN TMCSR6STR tmcsr6;
\r
11901 #define TMCSR6 tmcsr6.word
\r
11902 #define TMCSR6_CSL2 tmcsr6.bit._CSL2
\r
11903 #define TMCSR6_CSL1 tmcsr6.bit._CSL1
\r
11904 #define TMCSR6_CSL0 tmcsr6.bit._CSL0
\r
11905 #define TMCSR6_MOD2 tmcsr6.bit._MOD2
\r
11906 #define TMCSR6_MOD1 tmcsr6.bit._MOD1
\r
11907 #define TMCSR6_MOD0 tmcsr6.bit._MOD0
\r
11908 #define TMCSR6_OULT tmcsr6.bit._OULT
\r
11909 #define TMCSR6_RELD tmcsr6.bit._RELD
\r
11910 #define TMCSR6_INTE tmcsr6.bit._INTE
\r
11911 #define TMCSR6_UF tmcsr6.bit._UF
\r
11912 #define TMCSR6_CNTE tmcsr6.bit._CNTE
\r
11913 #define TMCSR6_TRG tmcsr6.bit._TRG
\r
11914 #define TMCSR6_CSL tmcsr6.bitc._CSL
\r
11915 #define TMCSR6_MOD tmcsr6.bitc._MOD
\r
11916 __IO_EXTERN TMCSRH6STR tmcsrh6;
\r
11917 #define TMCSRH6 tmcsrh6.byte
\r
11918 #define TMCSRH6_CSL2 tmcsrh6.bit._CSL2
\r
11919 #define TMCSRH6_CSL1 tmcsrh6.bit._CSL1
\r
11920 #define TMCSRH6_CSL0 tmcsrh6.bit._CSL0
\r
11921 #define TMCSRH6_MOD2 tmcsrh6.bit._MOD2
\r
11922 #define TMCSRH6_MOD1 tmcsrh6.bit._MOD1
\r
11923 #define TMCSRH6_CSL tmcsrh6.bitc._CSL
\r
11924 __IO_EXTERN TMCSRL6STR tmcsrl6;
\r
11925 #define TMCSRL6 tmcsrl6.byte
\r
11926 #define TMCSRL6_MOD0 tmcsrl6.bit._MOD0
\r
11927 #define TMCSRL6_OULT tmcsrl6.bit._OULT
\r
11928 #define TMCSRL6_RELD tmcsrl6.bit._RELD
\r
11929 #define TMCSRL6_INTE tmcsrl6.bit._INTE
\r
11930 #define TMCSRL6_UF tmcsrl6.bit._UF
\r
11931 #define TMCSRL6_CNTE tmcsrl6.bit._CNTE
\r
11932 #define TMCSRL6_TRG tmcsrl6.bit._TRG
\r
11933 __IO_EXTERN TMRLR7STR tmrlr7; /* Reload Timer 7 */
\r
11934 #define TMRLR7 tmrlr7.word
\r
11935 #define TMRLR7_D15 tmrlr7.bit._D15
\r
11936 #define TMRLR7_D14 tmrlr7.bit._D14
\r
11937 #define TMRLR7_D13 tmrlr7.bit._D13
\r
11938 #define TMRLR7_D12 tmrlr7.bit._D12
\r
11939 #define TMRLR7_D11 tmrlr7.bit._D11
\r
11940 #define TMRLR7_D10 tmrlr7.bit._D10
\r
11941 #define TMRLR7_D9 tmrlr7.bit._D9
\r
11942 #define TMRLR7_D8 tmrlr7.bit._D8
\r
11943 #define TMRLR7_D7 tmrlr7.bit._D7
\r
11944 #define TMRLR7_D6 tmrlr7.bit._D6
\r
11945 #define TMRLR7_D5 tmrlr7.bit._D5
\r
11946 #define TMRLR7_D4 tmrlr7.bit._D4
\r
11947 #define TMRLR7_D3 tmrlr7.bit._D3
\r
11948 #define TMRLR7_D2 tmrlr7.bit._D2
\r
11949 #define TMRLR7_D1 tmrlr7.bit._D1
\r
11950 #define TMRLR7_D0 tmrlr7.bit._D0
\r
11951 __IO_EXTERN TMR7STR tmr7;
\r
11952 #define TMR7 tmr7.word
\r
11953 #define TMR7_D15 tmr7.bit._D15
\r
11954 #define TMR7_D14 tmr7.bit._D14
\r
11955 #define TMR7_D13 tmr7.bit._D13
\r
11956 #define TMR7_D12 tmr7.bit._D12
\r
11957 #define TMR7_D11 tmr7.bit._D11
\r
11958 #define TMR7_D10 tmr7.bit._D10
\r
11959 #define TMR7_D9 tmr7.bit._D9
\r
11960 #define TMR7_D8 tmr7.bit._D8
\r
11961 #define TMR7_D7 tmr7.bit._D7
\r
11962 #define TMR7_D6 tmr7.bit._D6
\r
11963 #define TMR7_D5 tmr7.bit._D5
\r
11964 #define TMR7_D4 tmr7.bit._D4
\r
11965 #define TMR7_D3 tmr7.bit._D3
\r
11966 #define TMR7_D2 tmr7.bit._D2
\r
11967 #define TMR7_D1 tmr7.bit._D1
\r
11968 #define TMR7_D0 tmr7.bit._D0
\r
11969 __IO_EXTERN TMCSR7STR tmcsr7;
\r
11970 #define TMCSR7 tmcsr7.word
\r
11971 #define TMCSR7_CSL2 tmcsr7.bit._CSL2
\r
11972 #define TMCSR7_CSL1 tmcsr7.bit._CSL1
\r
11973 #define TMCSR7_CSL0 tmcsr7.bit._CSL0
\r
11974 #define TMCSR7_MOD2 tmcsr7.bit._MOD2
\r
11975 #define TMCSR7_MOD1 tmcsr7.bit._MOD1
\r
11976 #define TMCSR7_MOD0 tmcsr7.bit._MOD0
\r
11977 #define TMCSR7_OULT tmcsr7.bit._OULT
\r
11978 #define TMCSR7_RELD tmcsr7.bit._RELD
\r
11979 #define TMCSR7_INTE tmcsr7.bit._INTE
\r
11980 #define TMCSR7_UF tmcsr7.bit._UF
\r
11981 #define TMCSR7_CNTE tmcsr7.bit._CNTE
\r
11982 #define TMCSR7_TRG tmcsr7.bit._TRG
\r
11983 #define TMCSR7_CSL tmcsr7.bitc._CSL
\r
11984 #define TMCSR7_MOD tmcsr7.bitc._MOD
\r
11985 __IO_EXTERN TMCSRH7STR tmcsrh7;
\r
11986 #define TMCSRH7 tmcsrh7.byte
\r
11987 #define TMCSRH7_CSL2 tmcsrh7.bit._CSL2
\r
11988 #define TMCSRH7_CSL1 tmcsrh7.bit._CSL1
\r
11989 #define TMCSRH7_CSL0 tmcsrh7.bit._CSL0
\r
11990 #define TMCSRH7_MOD2 tmcsrh7.bit._MOD2
\r
11991 #define TMCSRH7_MOD1 tmcsrh7.bit._MOD1
\r
11992 #define TMCSRH7_CSL tmcsrh7.bitc._CSL
\r
11993 __IO_EXTERN TMCSRL7STR tmcsrl7;
\r
11994 #define TMCSRL7 tmcsrl7.byte
\r
11995 #define TMCSRL7_MOD0 tmcsrl7.bit._MOD0
\r
11996 #define TMCSRL7_OULT tmcsrl7.bit._OULT
\r
11997 #define TMCSRL7_RELD tmcsrl7.bit._RELD
\r
11998 #define TMCSRL7_INTE tmcsrl7.bit._INTE
\r
11999 #define TMCSRL7_UF tmcsrl7.bit._UF
\r
12000 #define TMCSRL7_CNTE tmcsrl7.bit._CNTE
\r
12001 #define TMCSRL7_TRG tmcsrl7.bit._TRG
\r
12002 __IO_EXTERN TCDT0STR tcdt0; /* Free Running Timer0 */
\r
12003 #define TCDT0 tcdt0.word
\r
12004 #define TCDT0_T15 tcdt0.bit._T15
\r
12005 #define TCDT0_T14 tcdt0.bit._T14
\r
12006 #define TCDT0_T13 tcdt0.bit._T13
\r
12007 #define TCDT0_T12 tcdt0.bit._T12
\r
12008 #define TCDT0_T11 tcdt0.bit._T11
\r
12009 #define TCDT0_T10 tcdt0.bit._T10
\r
12010 #define TCDT0_T9 tcdt0.bit._T9
\r
12011 #define TCDT0_T8 tcdt0.bit._T8
\r
12012 #define TCDT0_T7 tcdt0.bit._T7
\r
12013 #define TCDT0_T6 tcdt0.bit._T6
\r
12014 #define TCDT0_T5 tcdt0.bit._T5
\r
12015 #define TCDT0_T4 tcdt0.bit._T4
\r
12016 #define TCDT0_T3 tcdt0.bit._T3
\r
12017 #define TCDT0_T2 tcdt0.bit._T2
\r
12018 #define TCDT0_T1 tcdt0.bit._T1
\r
12019 #define TCDT0_T0 tcdt0.bit._T0
\r
12020 __IO_EXTERN TCCS0STR tccs0;
\r
12021 #define TCCS0 tccs0.byte
\r
12022 #define TCCS0_ECLK tccs0.bit._ECLK
\r
12023 #define TCCS0_IVF tccs0.bit._IVF
\r
12024 #define TCCS0_IVFE tccs0.bit._IVFE
\r
12025 #define TCCS0_STOP tccs0.bit._STOP
\r
12026 #define TCCS0_MODE tccs0.bit._MODE
\r
12027 #define TCCS0_CLR tccs0.bit._CLR
\r
12028 #define TCCS0_CLK1 tccs0.bit._CLK1
\r
12029 #define TCCS0_CLK0 tccs0.bit._CLK0
\r
12030 #define TCCS0_CLK tccs0.bitc._CLK
\r
12031 __IO_EXTERN TCDT1STR tcdt1; /* Free Running Timer1 */
\r
12032 #define TCDT1 tcdt1.word
\r
12033 #define TCDT1_T15 tcdt1.bit._T15
\r
12034 #define TCDT1_T14 tcdt1.bit._T14
\r
12035 #define TCDT1_T13 tcdt1.bit._T13
\r
12036 #define TCDT1_T12 tcdt1.bit._T12
\r
12037 #define TCDT1_T11 tcdt1.bit._T11
\r
12038 #define TCDT1_T10 tcdt1.bit._T10
\r
12039 #define TCDT1_T9 tcdt1.bit._T9
\r
12040 #define TCDT1_T8 tcdt1.bit._T8
\r
12041 #define TCDT1_T7 tcdt1.bit._T7
\r
12042 #define TCDT1_T6 tcdt1.bit._T6
\r
12043 #define TCDT1_T5 tcdt1.bit._T5
\r
12044 #define TCDT1_T4 tcdt1.bit._T4
\r
12045 #define TCDT1_T3 tcdt1.bit._T3
\r
12046 #define TCDT1_T2 tcdt1.bit._T2
\r
12047 #define TCDT1_T1 tcdt1.bit._T1
\r
12048 #define TCDT1_T0 tcdt1.bit._T0
\r
12049 __IO_EXTERN TCCS1STR tccs1;
\r
12050 #define TCCS1 tccs1.byte
\r
12051 #define TCCS1_ECLK tccs1.bit._ECLK
\r
12052 #define TCCS1_IVF tccs1.bit._IVF
\r
12053 #define TCCS1_IVFE tccs1.bit._IVFE
\r
12054 #define TCCS1_STOP tccs1.bit._STOP
\r
12055 #define TCCS1_MODE tccs1.bit._MODE
\r
12056 #define TCCS1_CLR tccs1.bit._CLR
\r
12057 #define TCCS1_CLK1 tccs1.bit._CLK1
\r
12058 #define TCCS1_CLK0 tccs1.bit._CLK0
\r
12059 #define TCCS1_CLK tccs1.bitc._CLK
\r
12060 __IO_EXTERN TCDT2STR tcdt2; /* Free Running Timer2 */
\r
12061 #define TCDT2 tcdt2.word
\r
12062 #define TCDT2_T15 tcdt2.bit._T15
\r
12063 #define TCDT2_T14 tcdt2.bit._T14
\r
12064 #define TCDT2_T13 tcdt2.bit._T13
\r
12065 #define TCDT2_T12 tcdt2.bit._T12
\r
12066 #define TCDT2_T11 tcdt2.bit._T11
\r
12067 #define TCDT2_T10 tcdt2.bit._T10
\r
12068 #define TCDT2_T9 tcdt2.bit._T9
\r
12069 #define TCDT2_T8 tcdt2.bit._T8
\r
12070 #define TCDT2_T7 tcdt2.bit._T7
\r
12071 #define TCDT2_T6 tcdt2.bit._T6
\r
12072 #define TCDT2_T5 tcdt2.bit._T5
\r
12073 #define TCDT2_T4 tcdt2.bit._T4
\r
12074 #define TCDT2_T3 tcdt2.bit._T3
\r
12075 #define TCDT2_T2 tcdt2.bit._T2
\r
12076 #define TCDT2_T1 tcdt2.bit._T1
\r
12077 #define TCDT2_T0 tcdt2.bit._T0
\r
12078 __IO_EXTERN TCCS2STR tccs2;
\r
12079 #define TCCS2 tccs2.byte
\r
12080 #define TCCS2_ECLK tccs2.bit._ECLK
\r
12081 #define TCCS2_IVF tccs2.bit._IVF
\r
12082 #define TCCS2_IVFE tccs2.bit._IVFE
\r
12083 #define TCCS2_STOP tccs2.bit._STOP
\r
12084 #define TCCS2_MODE tccs2.bit._MODE
\r
12085 #define TCCS2_CLR tccs2.bit._CLR
\r
12086 #define TCCS2_CLK1 tccs2.bit._CLK1
\r
12087 #define TCCS2_CLK0 tccs2.bit._CLK0
\r
12088 #define TCCS2_CLK tccs2.bitc._CLK
\r
12089 __IO_EXTERN TCDT3STR tcdt3; /* Free Running Timer3 */
\r
12090 #define TCDT3 tcdt3.word
\r
12091 #define TCDT3_T15 tcdt3.bit._T15
\r
12092 #define TCDT3_T14 tcdt3.bit._T14
\r
12093 #define TCDT3_T13 tcdt3.bit._T13
\r
12094 #define TCDT3_T12 tcdt3.bit._T12
\r
12095 #define TCDT3_T11 tcdt3.bit._T11
\r
12096 #define TCDT3_T10 tcdt3.bit._T10
\r
12097 #define TCDT3_T9 tcdt3.bit._T9
\r
12098 #define TCDT3_T8 tcdt3.bit._T8
\r
12099 #define TCDT3_T7 tcdt3.bit._T7
\r
12100 #define TCDT3_T6 tcdt3.bit._T6
\r
12101 #define TCDT3_T5 tcdt3.bit._T5
\r
12102 #define TCDT3_T4 tcdt3.bit._T4
\r
12103 #define TCDT3_T3 tcdt3.bit._T3
\r
12104 #define TCDT3_T2 tcdt3.bit._T2
\r
12105 #define TCDT3_T1 tcdt3.bit._T1
\r
12106 #define TCDT3_T0 tcdt3.bit._T0
\r
12107 __IO_EXTERN TCCS3STR tccs3;
\r
12108 #define TCCS3 tccs3.byte
\r
12109 #define TCCS3_ECLK tccs3.bit._ECLK
\r
12110 #define TCCS3_IVF tccs3.bit._IVF
\r
12111 #define TCCS3_IVFE tccs3.bit._IVFE
\r
12112 #define TCCS3_STOP tccs3.bit._STOP
\r
12113 #define TCCS3_MODE tccs3.bit._MODE
\r
12114 #define TCCS3_CLR tccs3.bit._CLR
\r
12115 #define TCCS3_CLK1 tccs3.bit._CLK1
\r
12116 #define TCCS3_CLK0 tccs3.bit._CLK0
\r
12117 #define TCCS3_CLK tccs3.bitc._CLK
\r
12118 __IO_EXTERN DMACA0STR dmaca0; /* DMAC */
\r
12119 #define DMACA0 dmaca0.lword
\r
12120 #define DMACA0_DENB dmaca0.bit._DENB
\r
12121 #define DMACA0_PAUS dmaca0.bit._PAUS
\r
12122 #define DMACA0_STRG dmaca0.bit._STRG
\r
12123 #define DMACA0_IS4 dmaca0.bit._IS4
\r
12124 #define DMACA0_IS3 dmaca0.bit._IS3
\r
12125 #define DMACA0_IS2 dmaca0.bit._IS2
\r
12126 #define DMACA0_IS1 dmaca0.bit._IS1
\r
12127 #define DMACA0_IS0 dmaca0.bit._IS0
\r
12128 #define DMACA0_EIS3 dmaca0.bit._EIS3
\r
12129 #define DMACA0_EIS2 dmaca0.bit._EIS2
\r
12130 #define DMACA0_EIS1 dmaca0.bit._EIS1
\r
12131 #define DMACA0_EIS0 dmaca0.bit._EIS0
\r
12132 #define DMACA0_BLK3 dmaca0.bit._BLK3
\r
12133 #define DMACA0_BLK2 dmaca0.bit._BLK2
\r
12134 #define DMACA0_BLK1 dmaca0.bit._BLK1
\r
12135 #define DMACA0_BLK0 dmaca0.bit._BLK0
\r
12136 #define DMACA0_DTCF dmaca0.bit._DTCF
\r
12137 #define DMACA0_DTCE dmaca0.bit._DTCE
\r
12138 #define DMACA0_DTCD dmaca0.bit._DTCD
\r
12139 #define DMACA0_DTCC dmaca0.bit._DTCC
\r
12140 #define DMACA0_DTCB dmaca0.bit._DTCB
\r
12141 #define DMACA0_DTCA dmaca0.bit._DTCA
\r
12142 #define DMACA0_DTC9 dmaca0.bit._DTC9
\r
12143 #define DMACA0_DTC8 dmaca0.bit._DTC8
\r
12144 #define DMACA0_DTC7 dmaca0.bit._DTC7
\r
12145 #define DMACA0_DTC6 dmaca0.bit._DTC6
\r
12146 #define DMACA0_DTC5 dmaca0.bit._DTC5
\r
12147 #define DMACA0_DTC4 dmaca0.bit._DTC4
\r
12148 #define DMACA0_DTC3 dmaca0.bit._DTC3
\r
12149 #define DMACA0_DTC2 dmaca0.bit._DTC2
\r
12150 #define DMACA0_DTC1 dmaca0.bit._DTC1
\r
12151 #define DMACA0_DTC0 dmaca0.bit._DTC0
\r
12152 #define DMACA0_IS dmaca0.bitc._IS
\r
12153 #define DMACA0_EIS dmaca0.bitc._EIS
\r
12154 #define DMACA0_BLK dmaca0.bitc._BLK
\r
12155 #define DMACA0_DTC dmaca0.bitc._DTC
\r
12156 __IO_EXTERN DMACB0STR dmacb0;
\r
12157 #define DMACB0 dmacb0.lword
\r
12158 #define DMACB0_TYPE1 dmacb0.bit._TYPE1
\r
12159 #define DMACB0_TYPE0 dmacb0.bit._TYPE0
\r
12160 #define DMACB0_MOD1 dmacb0.bit._MOD1
\r
12161 #define DMACB0_MOD0 dmacb0.bit._MOD0
\r
12162 #define DMACB0_WS1 dmacb0.bit._WS1
\r
12163 #define DMACB0_WS0 dmacb0.bit._WS0
\r
12164 #define DMACB0_SADM dmacb0.bit._SADM
\r
12165 #define DMACB0_DADM dmacb0.bit._DADM
\r
12166 #define DMACB0_DTCR dmacb0.bit._DTCR
\r
12167 #define DMACB0_SADR dmacb0.bit._SADR
\r
12168 #define DMACB0_DADR dmacb0.bit._DADR
\r
12169 #define DMACB0_ERIE dmacb0.bit._ERIE
\r
12170 #define DMACB0_EDIE dmacb0.bit._EDIE
\r
12171 #define DMACB0_DSS2 dmacb0.bit._DSS2
\r
12172 #define DMACB0_DSS1 dmacb0.bit._DSS1
\r
12173 #define DMACB0_DSS0 dmacb0.bit._DSS0
\r
12174 #define DMACB0_SASZ7 dmacb0.bit._SASZ7
\r
12175 #define DMACB0_SASZ6 dmacb0.bit._SASZ6
\r
12176 #define DMACB0_SASZ5 dmacb0.bit._SASZ5
\r
12177 #define DMACB0_SASZ4 dmacb0.bit._SASZ4
\r
12178 #define DMACB0_SASZ3 dmacb0.bit._SASZ3
\r
12179 #define DMACB0_SASZ2 dmacb0.bit._SASZ2
\r
12180 #define DMACB0_SASZ1 dmacb0.bit._SASZ1
\r
12181 #define DMACB0_SASZ0 dmacb0.bit._SASZ0
\r
12182 #define DMACB0_DASZ7 dmacb0.bit._DASZ7
\r
12183 #define DMACB0_DASZ6 dmacb0.bit._DASZ6
\r
12184 #define DMACB0_DASZ5 dmacb0.bit._DASZ5
\r
12185 #define DMACB0_DASZ4 dmacb0.bit._DASZ4
\r
12186 #define DMACB0_DASZ3 dmacb0.bit._DASZ3
\r
12187 #define DMACB0_DASZ2 dmacb0.bit._DASZ2
\r
12188 #define DMACB0_DASZ1 dmacb0.bit._DASZ1
\r
12189 #define DMACB0_DASZ0 dmacb0.bit._DASZ0
\r
12190 #define DMACB0_TYPE dmacb0.bitc._TYPE
\r
12191 #define DMACB0_MOD dmacb0.bitc._MOD
\r
12192 #define DMACB0_WS dmacb0.bitc._WS
\r
12193 #define DMACB0_DSS dmacb0.bitc._DSS
\r
12194 #define DMACB0_SASZ dmacb0.bitc._SASZ
\r
12195 #define DMACB0_DASZ dmacb0.bitc._DASZ
\r
12196 __IO_EXTERN DMACA1STR dmaca1;
\r
12197 #define DMACA1 dmaca1.lword
\r
12198 #define DMACA1_DENB dmaca1.bit._DENB
\r
12199 #define DMACA1_PAUS dmaca1.bit._PAUS
\r
12200 #define DMACA1_STRG dmaca1.bit._STRG
\r
12201 #define DMACA1_IS4 dmaca1.bit._IS4
\r
12202 #define DMACA1_IS3 dmaca1.bit._IS3
\r
12203 #define DMACA1_IS2 dmaca1.bit._IS2
\r
12204 #define DMACA1_IS1 dmaca1.bit._IS1
\r
12205 #define DMACA1_IS0 dmaca1.bit._IS0
\r
12206 #define DMACA1_EIS3 dmaca1.bit._EIS3
\r
12207 #define DMACA1_EIS2 dmaca1.bit._EIS2
\r
12208 #define DMACA1_EIS1 dmaca1.bit._EIS1
\r
12209 #define DMACA1_EIS0 dmaca1.bit._EIS0
\r
12210 #define DMACA1_BLK3 dmaca1.bit._BLK3
\r
12211 #define DMACA1_BLK2 dmaca1.bit._BLK2
\r
12212 #define DMACA1_BLK1 dmaca1.bit._BLK1
\r
12213 #define DMACA1_BLK0 dmaca1.bit._BLK0
\r
12214 #define DMACA1_DTCF dmaca1.bit._DTCF
\r
12215 #define DMACA1_DTCE dmaca1.bit._DTCE
\r
12216 #define DMACA1_DTCD dmaca1.bit._DTCD
\r
12217 #define DMACA1_DTCC dmaca1.bit._DTCC
\r
12218 #define DMACA1_DTCB dmaca1.bit._DTCB
\r
12219 #define DMACA1_DTCA dmaca1.bit._DTCA
\r
12220 #define DMACA1_DTC9 dmaca1.bit._DTC9
\r
12221 #define DMACA1_DTC8 dmaca1.bit._DTC8
\r
12222 #define DMACA1_DTC7 dmaca1.bit._DTC7
\r
12223 #define DMACA1_DTC6 dmaca1.bit._DTC6
\r
12224 #define DMACA1_DTC5 dmaca1.bit._DTC5
\r
12225 #define DMACA1_DTC4 dmaca1.bit._DTC4
\r
12226 #define DMACA1_DTC3 dmaca1.bit._DTC3
\r
12227 #define DMACA1_DTC2 dmaca1.bit._DTC2
\r
12228 #define DMACA1_DTC1 dmaca1.bit._DTC1
\r
12229 #define DMACA1_DTC0 dmaca1.bit._DTC0
\r
12230 #define DMACA1_IS dmaca1.bitc._IS
\r
12231 #define DMACA1_EIS dmaca1.bitc._EIS
\r
12232 #define DMACA1_BLK dmaca1.bitc._BLK
\r
12233 #define DMACA1_DTC dmaca1.bitc._DTC
\r
12234 __IO_EXTERN DMACB1STR dmacb1;
\r
12235 #define DMACB1 dmacb1.lword
\r
12236 #define DMACB1_TYPE1 dmacb1.bit._TYPE1
\r
12237 #define DMACB1_TYPE0 dmacb1.bit._TYPE0
\r
12238 #define DMACB1_MOD1 dmacb1.bit._MOD1
\r
12239 #define DMACB1_MOD0 dmacb1.bit._MOD0
\r
12240 #define DMACB1_WS1 dmacb1.bit._WS1
\r
12241 #define DMACB1_WS0 dmacb1.bit._WS0
\r
12242 #define DMACB1_SADM dmacb1.bit._SADM
\r
12243 #define DMACB1_DADM dmacb1.bit._DADM
\r
12244 #define DMACB1_DTCR dmacb1.bit._DTCR
\r
12245 #define DMACB1_SADR dmacb1.bit._SADR
\r
12246 #define DMACB1_DADR dmacb1.bit._DADR
\r
12247 #define DMACB1_ERIE dmacb1.bit._ERIE
\r
12248 #define DMACB1_EDIE dmacb1.bit._EDIE
\r
12249 #define DMACB1_DSS2 dmacb1.bit._DSS2
\r
12250 #define DMACB1_DSS1 dmacb1.bit._DSS1
\r
12251 #define DMACB1_DSS0 dmacb1.bit._DSS0
\r
12252 #define DMACB1_SASZ7 dmacb1.bit._SASZ7
\r
12253 #define DMACB1_SASZ6 dmacb1.bit._SASZ6
\r
12254 #define DMACB1_SASZ5 dmacb1.bit._SASZ5
\r
12255 #define DMACB1_SASZ4 dmacb1.bit._SASZ4
\r
12256 #define DMACB1_SASZ3 dmacb1.bit._SASZ3
\r
12257 #define DMACB1_SASZ2 dmacb1.bit._SASZ2
\r
12258 #define DMACB1_SASZ1 dmacb1.bit._SASZ1
\r
12259 #define DMACB1_SASZ0 dmacb1.bit._SASZ0
\r
12260 #define DMACB1_DASZ7 dmacb1.bit._DASZ7
\r
12261 #define DMACB1_DASZ6 dmacb1.bit._DASZ6
\r
12262 #define DMACB1_DASZ5 dmacb1.bit._DASZ5
\r
12263 #define DMACB1_DASZ4 dmacb1.bit._DASZ4
\r
12264 #define DMACB1_DASZ3 dmacb1.bit._DASZ3
\r
12265 #define DMACB1_DASZ2 dmacb1.bit._DASZ2
\r
12266 #define DMACB1_DASZ1 dmacb1.bit._DASZ1
\r
12267 #define DMACB1_DASZ0 dmacb1.bit._DASZ0
\r
12268 #define DMACB1_TYPE dmacb1.bitc._TYPE
\r
12269 #define DMACB1_MOD dmacb1.bitc._MOD
\r
12270 #define DMACB1_WS dmacb1.bitc._WS
\r
12271 #define DMACB1_DSS dmacb1.bitc._DSS
\r
12272 #define DMACB1_SASZ dmacb1.bitc._SASZ
\r
12273 #define DMACB1_DASZ dmacb1.bitc._DASZ
\r
12274 __IO_EXTERN DMACA2STR dmaca2;
\r
12275 #define DMACA2 dmaca2.lword
\r
12276 #define DMACA2_DENB dmaca2.bit._DENB
\r
12277 #define DMACA2_PAUS dmaca2.bit._PAUS
\r
12278 #define DMACA2_STRG dmaca2.bit._STRG
\r
12279 #define DMACA2_IS4 dmaca2.bit._IS4
\r
12280 #define DMACA2_IS3 dmaca2.bit._IS3
\r
12281 #define DMACA2_IS2 dmaca2.bit._IS2
\r
12282 #define DMACA2_IS1 dmaca2.bit._IS1
\r
12283 #define DMACA2_IS0 dmaca2.bit._IS0
\r
12284 #define DMACA2_EIS3 dmaca2.bit._EIS3
\r
12285 #define DMACA2_EIS2 dmaca2.bit._EIS2
\r
12286 #define DMACA2_EIS1 dmaca2.bit._EIS1
\r
12287 #define DMACA2_EIS0 dmaca2.bit._EIS0
\r
12288 #define DMACA2_BLK3 dmaca2.bit._BLK3
\r
12289 #define DMACA2_BLK2 dmaca2.bit._BLK2
\r
12290 #define DMACA2_BLK1 dmaca2.bit._BLK1
\r
12291 #define DMACA2_BLK0 dmaca2.bit._BLK0
\r
12292 #define DMACA2_DTCF dmaca2.bit._DTCF
\r
12293 #define DMACA2_DTCE dmaca2.bit._DTCE
\r
12294 #define DMACA2_DTCD dmaca2.bit._DTCD
\r
12295 #define DMACA2_DTCC dmaca2.bit._DTCC
\r
12296 #define DMACA2_DTCB dmaca2.bit._DTCB
\r
12297 #define DMACA2_DTCA dmaca2.bit._DTCA
\r
12298 #define DMACA2_DTC9 dmaca2.bit._DTC9
\r
12299 #define DMACA2_DTC8 dmaca2.bit._DTC8
\r
12300 #define DMACA2_DTC7 dmaca2.bit._DTC7
\r
12301 #define DMACA2_DTC6 dmaca2.bit._DTC6
\r
12302 #define DMACA2_DTC5 dmaca2.bit._DTC5
\r
12303 #define DMACA2_DTC4 dmaca2.bit._DTC4
\r
12304 #define DMACA2_DTC3 dmaca2.bit._DTC3
\r
12305 #define DMACA2_DTC2 dmaca2.bit._DTC2
\r
12306 #define DMACA2_DTC1 dmaca2.bit._DTC1
\r
12307 #define DMACA2_DTC0 dmaca2.bit._DTC0
\r
12308 #define DMACA2_IS dmaca2.bitc._IS
\r
12309 #define DMACA2_EIS dmaca2.bitc._EIS
\r
12310 #define DMACA2_BLK dmaca2.bitc._BLK
\r
12311 #define DMACA2_DTC dmaca2.bitc._DTC
\r
12312 __IO_EXTERN DMACB2STR dmacb2;
\r
12313 #define DMACB2 dmacb2.lword
\r
12314 #define DMACB2_TYPE1 dmacb2.bit._TYPE1
\r
12315 #define DMACB2_TYPE0 dmacb2.bit._TYPE0
\r
12316 #define DMACB2_MOD1 dmacb2.bit._MOD1
\r
12317 #define DMACB2_MOD0 dmacb2.bit._MOD0
\r
12318 #define DMACB2_WS1 dmacb2.bit._WS1
\r
12319 #define DMACB2_WS0 dmacb2.bit._WS0
\r
12320 #define DMACB2_SADM dmacb2.bit._SADM
\r
12321 #define DMACB2_DADM dmacb2.bit._DADM
\r
12322 #define DMACB2_DTCR dmacb2.bit._DTCR
\r
12323 #define DMACB2_SADR dmacb2.bit._SADR
\r
12324 #define DMACB2_DADR dmacb2.bit._DADR
\r
12325 #define DMACB2_ERIE dmacb2.bit._ERIE
\r
12326 #define DMACB2_EDIE dmacb2.bit._EDIE
\r
12327 #define DMACB2_DSS2 dmacb2.bit._DSS2
\r
12328 #define DMACB2_DSS1 dmacb2.bit._DSS1
\r
12329 #define DMACB2_DSS0 dmacb2.bit._DSS0
\r
12330 #define DMACB2_SASZ7 dmacb2.bit._SASZ7
\r
12331 #define DMACB2_SASZ6 dmacb2.bit._SASZ6
\r
12332 #define DMACB2_SASZ5 dmacb2.bit._SASZ5
\r
12333 #define DMACB2_SASZ4 dmacb2.bit._SASZ4
\r
12334 #define DMACB2_SASZ3 dmacb2.bit._SASZ3
\r
12335 #define DMACB2_SASZ2 dmacb2.bit._SASZ2
\r
12336 #define DMACB2_SASZ1 dmacb2.bit._SASZ1
\r
12337 #define DMACB2_SASZ0 dmacb2.bit._SASZ0
\r
12338 #define DMACB2_DASZ7 dmacb2.bit._DASZ7
\r
12339 #define DMACB2_DASZ6 dmacb2.bit._DASZ6
\r
12340 #define DMACB2_DASZ5 dmacb2.bit._DASZ5
\r
12341 #define DMACB2_DASZ4 dmacb2.bit._DASZ4
\r
12342 #define DMACB2_DASZ3 dmacb2.bit._DASZ3
\r
12343 #define DMACB2_DASZ2 dmacb2.bit._DASZ2
\r
12344 #define DMACB2_DASZ1 dmacb2.bit._DASZ1
\r
12345 #define DMACB2_DASZ0 dmacb2.bit._DASZ0
\r
12346 #define DMACB2_TYPE dmacb2.bitc._TYPE
\r
12347 #define DMACB2_MOD dmacb2.bitc._MOD
\r
12348 #define DMACB2_WS dmacb2.bitc._WS
\r
12349 #define DMACB2_DSS dmacb2.bitc._DSS
\r
12350 #define DMACB2_SASZ dmacb2.bitc._SASZ
\r
12351 #define DMACB2_DASZ dmacb2.bitc._DASZ
\r
12352 __IO_EXTERN DMACA3STR dmaca3;
\r
12353 #define DMACA3 dmaca3.lword
\r
12354 #define DMACA3_DENB dmaca3.bit._DENB
\r
12355 #define DMACA3_PAUS dmaca3.bit._PAUS
\r
12356 #define DMACA3_STRG dmaca3.bit._STRG
\r
12357 #define DMACA3_IS4 dmaca3.bit._IS4
\r
12358 #define DMACA3_IS3 dmaca3.bit._IS3
\r
12359 #define DMACA3_IS2 dmaca3.bit._IS2
\r
12360 #define DMACA3_IS1 dmaca3.bit._IS1
\r
12361 #define DMACA3_IS0 dmaca3.bit._IS0
\r
12362 #define DMACA3_EIS3 dmaca3.bit._EIS3
\r
12363 #define DMACA3_EIS2 dmaca3.bit._EIS2
\r
12364 #define DMACA3_EIS1 dmaca3.bit._EIS1
\r
12365 #define DMACA3_EIS0 dmaca3.bit._EIS0
\r
12366 #define DMACA3_BLK3 dmaca3.bit._BLK3
\r
12367 #define DMACA3_BLK2 dmaca3.bit._BLK2
\r
12368 #define DMACA3_BLK1 dmaca3.bit._BLK1
\r
12369 #define DMACA3_BLK0 dmaca3.bit._BLK0
\r
12370 #define DMACA3_DTCF dmaca3.bit._DTCF
\r
12371 #define DMACA3_DTCE dmaca3.bit._DTCE
\r
12372 #define DMACA3_DTCD dmaca3.bit._DTCD
\r
12373 #define DMACA3_DTCC dmaca3.bit._DTCC
\r
12374 #define DMACA3_DTCB dmaca3.bit._DTCB
\r
12375 #define DMACA3_DTCA dmaca3.bit._DTCA
\r
12376 #define DMACA3_DTC9 dmaca3.bit._DTC9
\r
12377 #define DMACA3_DTC8 dmaca3.bit._DTC8
\r
12378 #define DMACA3_DTC7 dmaca3.bit._DTC7
\r
12379 #define DMACA3_DTC6 dmaca3.bit._DTC6
\r
12380 #define DMACA3_DTC5 dmaca3.bit._DTC5
\r
12381 #define DMACA3_DTC4 dmaca3.bit._DTC4
\r
12382 #define DMACA3_DTC3 dmaca3.bit._DTC3
\r
12383 #define DMACA3_DTC2 dmaca3.bit._DTC2
\r
12384 #define DMACA3_DTC1 dmaca3.bit._DTC1
\r
12385 #define DMACA3_DTC0 dmaca3.bit._DTC0
\r
12386 #define DMACA3_IS dmaca3.bitc._IS
\r
12387 #define DMACA3_EIS dmaca3.bitc._EIS
\r
12388 #define DMACA3_BLK dmaca3.bitc._BLK
\r
12389 #define DMACA3_DTC dmaca3.bitc._DTC
\r
12390 __IO_EXTERN DMACB3STR dmacb3;
\r
12391 #define DMACB3 dmacb3.lword
\r
12392 #define DMACB3_TYPE1 dmacb3.bit._TYPE1
\r
12393 #define DMACB3_TYPE0 dmacb3.bit._TYPE0
\r
12394 #define DMACB3_MOD1 dmacb3.bit._MOD1
\r
12395 #define DMACB3_MOD0 dmacb3.bit._MOD0
\r
12396 #define DMACB3_WS1 dmacb3.bit._WS1
\r
12397 #define DMACB3_WS0 dmacb3.bit._WS0
\r
12398 #define DMACB3_SADM dmacb3.bit._SADM
\r
12399 #define DMACB3_DADM dmacb3.bit._DADM
\r
12400 #define DMACB3_DTCR dmacb3.bit._DTCR
\r
12401 #define DMACB3_SADR dmacb3.bit._SADR
\r
12402 #define DMACB3_DADR dmacb3.bit._DADR
\r
12403 #define DMACB3_ERIE dmacb3.bit._ERIE
\r
12404 #define DMACB3_EDIE dmacb3.bit._EDIE
\r
12405 #define DMACB3_DSS2 dmacb3.bit._DSS2
\r
12406 #define DMACB3_DSS1 dmacb3.bit._DSS1
\r
12407 #define DMACB3_DSS0 dmacb3.bit._DSS0
\r
12408 #define DMACB3_SASZ7 dmacb3.bit._SASZ7
\r
12409 #define DMACB3_SASZ6 dmacb3.bit._SASZ6
\r
12410 #define DMACB3_SASZ5 dmacb3.bit._SASZ5
\r
12411 #define DMACB3_SASZ4 dmacb3.bit._SASZ4
\r
12412 #define DMACB3_SASZ3 dmacb3.bit._SASZ3
\r
12413 #define DMACB3_SASZ2 dmacb3.bit._SASZ2
\r
12414 #define DMACB3_SASZ1 dmacb3.bit._SASZ1
\r
12415 #define DMACB3_SASZ0 dmacb3.bit._SASZ0
\r
12416 #define DMACB3_DASZ7 dmacb3.bit._DASZ7
\r
12417 #define DMACB3_DASZ6 dmacb3.bit._DASZ6
\r
12418 #define DMACB3_DASZ5 dmacb3.bit._DASZ5
\r
12419 #define DMACB3_DASZ4 dmacb3.bit._DASZ4
\r
12420 #define DMACB3_DASZ3 dmacb3.bit._DASZ3
\r
12421 #define DMACB3_DASZ2 dmacb3.bit._DASZ2
\r
12422 #define DMACB3_DASZ1 dmacb3.bit._DASZ1
\r
12423 #define DMACB3_DASZ0 dmacb3.bit._DASZ0
\r
12424 #define DMACB3_TYPE dmacb3.bitc._TYPE
\r
12425 #define DMACB3_MOD dmacb3.bitc._MOD
\r
12426 #define DMACB3_WS dmacb3.bitc._WS
\r
12427 #define DMACB3_DSS dmacb3.bitc._DSS
\r
12428 #define DMACB3_SASZ dmacb3.bitc._SASZ
\r
12429 #define DMACB3_DASZ dmacb3.bitc._DASZ
\r
12430 __IO_EXTERN DMACA4STR dmaca4;
\r
12431 #define DMACA4 dmaca4.lword
\r
12432 #define DMACA4_DENB dmaca4.bit._DENB
\r
12433 #define DMACA4_PAUS dmaca4.bit._PAUS
\r
12434 #define DMACA4_STRG dmaca4.bit._STRG
\r
12435 #define DMACA4_IS4 dmaca4.bit._IS4
\r
12436 #define DMACA4_IS3 dmaca4.bit._IS3
\r
12437 #define DMACA4_IS2 dmaca4.bit._IS2
\r
12438 #define DMACA4_IS1 dmaca4.bit._IS1
\r
12439 #define DMACA4_IS0 dmaca4.bit._IS0
\r
12440 #define DMACA4_EIS3 dmaca4.bit._EIS3
\r
12441 #define DMACA4_EIS2 dmaca4.bit._EIS2
\r
12442 #define DMACA4_EIS1 dmaca4.bit._EIS1
\r
12443 #define DMACA4_EIS0 dmaca4.bit._EIS0
\r
12444 #define DMACA4_BLK3 dmaca4.bit._BLK3
\r
12445 #define DMACA4_BLK2 dmaca4.bit._BLK2
\r
12446 #define DMACA4_BLK1 dmaca4.bit._BLK1
\r
12447 #define DMACA4_BLK0 dmaca4.bit._BLK0
\r
12448 #define DMACA4_DTCF dmaca4.bit._DTCF
\r
12449 #define DMACA4_DTCE dmaca4.bit._DTCE
\r
12450 #define DMACA4_DTCD dmaca4.bit._DTCD
\r
12451 #define DMACA4_DTCC dmaca4.bit._DTCC
\r
12452 #define DMACA4_DTCB dmaca4.bit._DTCB
\r
12453 #define DMACA4_DTCA dmaca4.bit._DTCA
\r
12454 #define DMACA4_DTC9 dmaca4.bit._DTC9
\r
12455 #define DMACA4_DTC8 dmaca4.bit._DTC8
\r
12456 #define DMACA4_DTC7 dmaca4.bit._DTC7
\r
12457 #define DMACA4_DTC6 dmaca4.bit._DTC6
\r
12458 #define DMACA4_DTC5 dmaca4.bit._DTC5
\r
12459 #define DMACA4_DTC4 dmaca4.bit._DTC4
\r
12460 #define DMACA4_DTC3 dmaca4.bit._DTC3
\r
12461 #define DMACA4_DTC2 dmaca4.bit._DTC2
\r
12462 #define DMACA4_DTC1 dmaca4.bit._DTC1
\r
12463 #define DMACA4_DTC0 dmaca4.bit._DTC0
\r
12464 #define DMACA4_IS dmaca4.bitc._IS
\r
12465 #define DMACA4_EIS dmaca4.bitc._EIS
\r
12466 #define DMACA4_BLK dmaca4.bitc._BLK
\r
12467 #define DMACA4_DTC dmaca4.bitc._DTC
\r
12468 __IO_EXTERN DMACB4STR dmacb4;
\r
12469 #define DMACB4 dmacb4.lword
\r
12470 #define DMACB4_TYPE1 dmacb4.bit._TYPE1
\r
12471 #define DMACB4_TYPE0 dmacb4.bit._TYPE0
\r
12472 #define DMACB4_MOD1 dmacb4.bit._MOD1
\r
12473 #define DMACB4_MOD0 dmacb4.bit._MOD0
\r
12474 #define DMACB4_WS1 dmacb4.bit._WS1
\r
12475 #define DMACB4_WS0 dmacb4.bit._WS0
\r
12476 #define DMACB4_SADM dmacb4.bit._SADM
\r
12477 #define DMACB4_DADM dmacb4.bit._DADM
\r
12478 #define DMACB4_DTCR dmacb4.bit._DTCR
\r
12479 #define DMACB4_SADR dmacb4.bit._SADR
\r
12480 #define DMACB4_DADR dmacb4.bit._DADR
\r
12481 #define DMACB4_ERIE dmacb4.bit._ERIE
\r
12482 #define DMACB4_EDIE dmacb4.bit._EDIE
\r
12483 #define DMACB4_DSS2 dmacb4.bit._DSS2
\r
12484 #define DMACB4_DSS1 dmacb4.bit._DSS1
\r
12485 #define DMACB4_DSS0 dmacb4.bit._DSS0
\r
12486 #define DMACB4_SASZ7 dmacb4.bit._SASZ7
\r
12487 #define DMACB4_SASZ6 dmacb4.bit._SASZ6
\r
12488 #define DMACB4_SASZ5 dmacb4.bit._SASZ5
\r
12489 #define DMACB4_SASZ4 dmacb4.bit._SASZ4
\r
12490 #define DMACB4_SASZ3 dmacb4.bit._SASZ3
\r
12491 #define DMACB4_SASZ2 dmacb4.bit._SASZ2
\r
12492 #define DMACB4_SASZ1 dmacb4.bit._SASZ1
\r
12493 #define DMACB4_SASZ0 dmacb4.bit._SASZ0
\r
12494 #define DMACB4_DASZ7 dmacb4.bit._DASZ7
\r
12495 #define DMACB4_DASZ6 dmacb4.bit._DASZ6
\r
12496 #define DMACB4_DASZ5 dmacb4.bit._DASZ5
\r
12497 #define DMACB4_DASZ4 dmacb4.bit._DASZ4
\r
12498 #define DMACB4_DASZ3 dmacb4.bit._DASZ3
\r
12499 #define DMACB4_DASZ2 dmacb4.bit._DASZ2
\r
12500 #define DMACB4_DASZ1 dmacb4.bit._DASZ1
\r
12501 #define DMACB4_DASZ0 dmacb4.bit._DASZ0
\r
12502 #define DMACB4_TYPE dmacb4.bitc._TYPE
\r
12503 #define DMACB4_MOD dmacb4.bitc._MOD
\r
12504 #define DMACB4_WS dmacb4.bitc._WS
\r
12505 #define DMACB4_DSS dmacb4.bitc._DSS
\r
12506 #define DMACB4_SASZ dmacb4.bitc._SASZ
\r
12507 #define DMACB4_DASZ dmacb4.bitc._DASZ
\r
12508 __IO_EXTERN DMACRSTR dmacr;
\r
12509 #define DMACR dmacr.byte
\r
12510 #define DMACR_DMAE dmacr.bit._DMAE
\r
12511 #define DMACR_PM01 dmacr.bit._PM01
\r
12512 #define DMACR_DMAH3 dmacr.bit._DMAH3
\r
12513 #define DMACR_DMAH2 dmacr.bit._DMAH2
\r
12514 #define DMACR_DMAH1 dmacr.bit._DMAH1
\r
12515 #define DMACR_DMAH0 dmacr.bit._DMAH0
\r
12516 #define DMACR_DMAH dmacr.bitc._DMAH
\r
12517 __IO_EXTERN ICS45STR ics45; /* Input Capture 4-7 */
\r
12518 #define ICS45 ics45.byte
\r
12519 #define ICS45_ICP5 ics45.bit._ICP5
\r
12520 #define ICS45_ICP4 ics45.bit._ICP4
\r
12521 #define ICS45_ICE5 ics45.bit._ICE5
\r
12522 #define ICS45_ICE4 ics45.bit._ICE4
\r
12523 #define ICS45_EG51 ics45.bit._EG51
\r
12524 #define ICS45_EG50 ics45.bit._EG50
\r
12525 #define ICS45_EG41 ics45.bit._EG41
\r
12526 #define ICS45_EG40 ics45.bit._EG40
\r
12527 #define ICS45_EG5 ics45.bitc._EG5
\r
12528 #define ICS45_EG4 ics45.bitc._EG4
\r
12529 __IO_EXTERN ICS67STR ics67;
\r
12530 #define ICS67 ics67.byte
\r
12531 #define ICS67_ICP7 ics67.bit._ICP7
\r
12532 #define ICS67_ICP6 ics67.bit._ICP6
\r
12533 #define ICS67_ICE7 ics67.bit._ICE7
\r
12534 #define ICS67_ICE6 ics67.bit._ICE6
\r
12535 #define ICS67_EG71 ics67.bit._EG71
\r
12536 #define ICS67_EG70 ics67.bit._EG70
\r
12537 #define ICS67_EG61 ics67.bit._EG61
\r
12538 #define ICS67_EG60 ics67.bit._EG60
\r
12539 #define ICS67_EG7 ics67.bitc._EG7
\r
12540 #define ICS67_EG6 ics67.bitc._EG6
\r
12541 __IO_EXTERN IPCP4STR ipcp4;
\r
12542 #define IPCP4 ipcp4.word
\r
12543 #define IPCP4_CP15 ipcp4.bit._CP15
\r
12544 #define IPCP4_CP14 ipcp4.bit._CP14
\r
12545 #define IPCP4_CP13 ipcp4.bit._CP13
\r
12546 #define IPCP4_CP12 ipcp4.bit._CP12
\r
12547 #define IPCP4_CP11 ipcp4.bit._CP11
\r
12548 #define IPCP4_CP10 ipcp4.bit._CP10
\r
12549 #define IPCP4_CP9 ipcp4.bit._CP9
\r
12550 #define IPCP4_CP8 ipcp4.bit._CP8
\r
12551 #define IPCP4_CP7 ipcp4.bit._CP7
\r
12552 #define IPCP4_CP6 ipcp4.bit._CP6
\r
12553 #define IPCP4_CP5 ipcp4.bit._CP5
\r
12554 #define IPCP4_CP4 ipcp4.bit._CP4
\r
12555 #define IPCP4_CP3 ipcp4.bit._CP3
\r
12556 #define IPCP4_CP2 ipcp4.bit._CP2
\r
12557 #define IPCP4_CP1 ipcp4.bit._CP1
\r
12558 #define IPCP4_CP0 ipcp4.bit._CP0
\r
12559 __IO_EXTERN IPCP5STR ipcp5;
\r
12560 #define IPCP5 ipcp5.word
\r
12561 #define IPCP5_CP15 ipcp5.bit._CP15
\r
12562 #define IPCP5_CP14 ipcp5.bit._CP14
\r
12563 #define IPCP5_CP13 ipcp5.bit._CP13
\r
12564 #define IPCP5_CP12 ipcp5.bit._CP12
\r
12565 #define IPCP5_CP11 ipcp5.bit._CP11
\r
12566 #define IPCP5_CP10 ipcp5.bit._CP10
\r
12567 #define IPCP5_CP9 ipcp5.bit._CP9
\r
12568 #define IPCP5_CP8 ipcp5.bit._CP8
\r
12569 #define IPCP5_CP7 ipcp5.bit._CP7
\r
12570 #define IPCP5_CP6 ipcp5.bit._CP6
\r
12571 #define IPCP5_CP5 ipcp5.bit._CP5
\r
12572 #define IPCP5_CP4 ipcp5.bit._CP4
\r
12573 #define IPCP5_CP3 ipcp5.bit._CP3
\r
12574 #define IPCP5_CP2 ipcp5.bit._CP2
\r
12575 #define IPCP5_CP1 ipcp5.bit._CP1
\r
12576 #define IPCP5_CP0 ipcp5.bit._CP0
\r
12577 __IO_EXTERN IPCP6STR ipcp6;
\r
12578 #define IPCP6 ipcp6.word
\r
12579 #define IPCP6_CP15 ipcp6.bit._CP15
\r
12580 #define IPCP6_CP14 ipcp6.bit._CP14
\r
12581 #define IPCP6_CP13 ipcp6.bit._CP13
\r
12582 #define IPCP6_CP12 ipcp6.bit._CP12
\r
12583 #define IPCP6_CP11 ipcp6.bit._CP11
\r
12584 #define IPCP6_CP10 ipcp6.bit._CP10
\r
12585 #define IPCP6_CP9 ipcp6.bit._CP9
\r
12586 #define IPCP6_CP8 ipcp6.bit._CP8
\r
12587 #define IPCP6_CP7 ipcp6.bit._CP7
\r
12588 #define IPCP6_CP6 ipcp6.bit._CP6
\r
12589 #define IPCP6_CP5 ipcp6.bit._CP5
\r
12590 #define IPCP6_CP4 ipcp6.bit._CP4
\r
12591 #define IPCP6_CP3 ipcp6.bit._CP3
\r
12592 #define IPCP6_CP2 ipcp6.bit._CP2
\r
12593 #define IPCP6_CP1 ipcp6.bit._CP1
\r
12594 #define IPCP6_CP0 ipcp6.bit._CP0
\r
12595 __IO_EXTERN IPCP7STR ipcp7;
\r
12596 #define IPCP7 ipcp7.word
\r
12597 #define IPCP7_CP15 ipcp7.bit._CP15
\r
12598 #define IPCP7_CP14 ipcp7.bit._CP14
\r
12599 #define IPCP7_CP13 ipcp7.bit._CP13
\r
12600 #define IPCP7_CP12 ipcp7.bit._CP12
\r
12601 #define IPCP7_CP11 ipcp7.bit._CP11
\r
12602 #define IPCP7_CP10 ipcp7.bit._CP10
\r
12603 #define IPCP7_CP9 ipcp7.bit._CP9
\r
12604 #define IPCP7_CP8 ipcp7.bit._CP8
\r
12605 #define IPCP7_CP7 ipcp7.bit._CP7
\r
12606 #define IPCP7_CP6 ipcp7.bit._CP6
\r
12607 #define IPCP7_CP5 ipcp7.bit._CP5
\r
12608 #define IPCP7_CP4 ipcp7.bit._CP4
\r
12609 #define IPCP7_CP3 ipcp7.bit._CP3
\r
12610 #define IPCP7_CP2 ipcp7.bit._CP2
\r
12611 #define IPCP7_CP1 ipcp7.bit._CP1
\r
12612 #define IPCP7_CP0 ipcp7.bit._CP0
\r
12613 __IO_EXTERN OCS45STR ocs45; /* Output Compare 4-7 */
\r
12614 #define OCS45 ocs45.word
\r
12615 #define OCS45_CMOD ocs45.bit._CMOD
\r
12616 #define OCS45_OTD5 ocs45.bit._OTD5
\r
12617 #define OCS45_OTD4 ocs45.bit._OTD4
\r
12618 #define OCS45_ICP5 ocs45.bit._ICP5
\r
12619 #define OCS45_ICP4 ocs45.bit._ICP4
\r
12620 #define OCS45_ICE5 ocs45.bit._ICE5
\r
12621 #define OCS45_ICE4 ocs45.bit._ICE4
\r
12622 #define OCS45_CST5 ocs45.bit._CST5
\r
12623 #define OCS45_CST4 ocs45.bit._CST4
\r
12624 __IO_EXTERN OCS67STR ocs67;
\r
12625 #define OCS67 ocs67.word
\r
12626 #define OCS67_CMOD ocs67.bit._CMOD
\r
12627 #define OCS67_OTD7 ocs67.bit._OTD7
\r
12628 #define OCS67_OTD6 ocs67.bit._OTD6
\r
12629 #define OCS67_ICP7 ocs67.bit._ICP7
\r
12630 #define OCS67_ICP6 ocs67.bit._ICP6
\r
12631 #define OCS67_ICE7 ocs67.bit._ICE7
\r
12632 #define OCS67_ICE6 ocs67.bit._ICE6
\r
12633 #define OCS67_CST7 ocs67.bit._CST7
\r
12634 #define OCS67_CST6 ocs67.bit._CST6
\r
12635 __IO_EXTERN OCCP4STR occp4;
\r
12636 #define OCCP4 occp4.word
\r
12637 #define OCCP4_C15 occp4.bit._C15
\r
12638 #define OCCP4_C14 occp4.bit._C14
\r
12639 #define OCCP4_C13 occp4.bit._C13
\r
12640 #define OCCP4_C12 occp4.bit._C12
\r
12641 #define OCCP4_C11 occp4.bit._C11
\r
12642 #define OCCP4_C10 occp4.bit._C10
\r
12643 #define OCCP4_C9 occp4.bit._C9
\r
12644 #define OCCP4_C8 occp4.bit._C8
\r
12645 #define OCCP4_C7 occp4.bit._C7
\r
12646 #define OCCP4_C6 occp4.bit._C6
\r
12647 #define OCCP4_C5 occp4.bit._C5
\r
12648 #define OCCP4_C4 occp4.bit._C4
\r
12649 #define OCCP4_C3 occp4.bit._C3
\r
12650 #define OCCP4_C2 occp4.bit._C2
\r
12651 #define OCCP4_C1 occp4.bit._C1
\r
12652 #define OCCP4_C0 occp4.bit._C0
\r
12653 __IO_EXTERN OCCP5STR occp5;
\r
12654 #define OCCP5 occp5.word
\r
12655 #define OCCP5_C15 occp5.bit._C15
\r
12656 #define OCCP5_C14 occp5.bit._C14
\r
12657 #define OCCP5_C13 occp5.bit._C13
\r
12658 #define OCCP5_C12 occp5.bit._C12
\r
12659 #define OCCP5_C11 occp5.bit._C11
\r
12660 #define OCCP5_C10 occp5.bit._C10
\r
12661 #define OCCP5_C9 occp5.bit._C9
\r
12662 #define OCCP5_C8 occp5.bit._C8
\r
12663 #define OCCP5_C7 occp5.bit._C7
\r
12664 #define OCCP5_C6 occp5.bit._C6
\r
12665 #define OCCP5_C5 occp5.bit._C5
\r
12666 #define OCCP5_C4 occp5.bit._C4
\r
12667 #define OCCP5_C3 occp5.bit._C3
\r
12668 #define OCCP5_C2 occp5.bit._C2
\r
12669 #define OCCP5_C1 occp5.bit._C1
\r
12670 #define OCCP5_C0 occp5.bit._C0
\r
12671 __IO_EXTERN OCCP6STR occp6;
\r
12672 #define OCCP6 occp6.word
\r
12673 #define OCCP6_C15 occp6.bit._C15
\r
12674 #define OCCP6_C14 occp6.bit._C14
\r
12675 #define OCCP6_C13 occp6.bit._C13
\r
12676 #define OCCP6_C12 occp6.bit._C12
\r
12677 #define OCCP6_C11 occp6.bit._C11
\r
12678 #define OCCP6_C10 occp6.bit._C10
\r
12679 #define OCCP6_C9 occp6.bit._C9
\r
12680 #define OCCP6_C8 occp6.bit._C8
\r
12681 #define OCCP6_C7 occp6.bit._C7
\r
12682 #define OCCP6_C6 occp6.bit._C6
\r
12683 #define OCCP6_C5 occp6.bit._C5
\r
12684 #define OCCP6_C4 occp6.bit._C4
\r
12685 #define OCCP6_C3 occp6.bit._C3
\r
12686 #define OCCP6_C2 occp6.bit._C2
\r
12687 #define OCCP6_C1 occp6.bit._C1
\r
12688 #define OCCP6_C0 occp6.bit._C0
\r
12689 __IO_EXTERN OCCP7STR occp7;
\r
12690 #define OCCP7 occp7.word
\r
12691 #define OCCP7_C15 occp7.bit._C15
\r
12692 #define OCCP7_C14 occp7.bit._C14
\r
12693 #define OCCP7_C13 occp7.bit._C13
\r
12694 #define OCCP7_C12 occp7.bit._C12
\r
12695 #define OCCP7_C11 occp7.bit._C11
\r
12696 #define OCCP7_C10 occp7.bit._C10
\r
12697 #define OCCP7_C9 occp7.bit._C9
\r
12698 #define OCCP7_C8 occp7.bit._C8
\r
12699 #define OCCP7_C7 occp7.bit._C7
\r
12700 #define OCCP7_C6 occp7.bit._C6
\r
12701 #define OCCP7_C5 occp7.bit._C5
\r
12702 #define OCCP7_C4 occp7.bit._C4
\r
12703 #define OCCP7_C3 occp7.bit._C3
\r
12704 #define OCCP7_C2 occp7.bit._C2
\r
12705 #define OCCP7_C1 occp7.bit._C1
\r
12706 #define OCCP7_C0 occp7.bit._C0
\r
12707 __IO_EXTERN TCDT4STR tcdt4; /* Free Running Timer4 */
\r
12708 #define TCDT4 tcdt4.word
\r
12709 #define TCDT4_T15 tcdt4.bit._T15
\r
12710 #define TCDT4_T14 tcdt4.bit._T14
\r
12711 #define TCDT4_T13 tcdt4.bit._T13
\r
12712 #define TCDT4_T12 tcdt4.bit._T12
\r
12713 #define TCDT4_T11 tcdt4.bit._T11
\r
12714 #define TCDT4_T10 tcdt4.bit._T10
\r
12715 #define TCDT4_T9 tcdt4.bit._T9
\r
12716 #define TCDT4_T8 tcdt4.bit._T8
\r
12717 #define TCDT4_T7 tcdt4.bit._T7
\r
12718 #define TCDT4_T6 tcdt4.bit._T6
\r
12719 #define TCDT4_T5 tcdt4.bit._T5
\r
12720 #define TCDT4_T4 tcdt4.bit._T4
\r
12721 #define TCDT4_T3 tcdt4.bit._T3
\r
12722 #define TCDT4_T2 tcdt4.bit._T2
\r
12723 #define TCDT4_T1 tcdt4.bit._T1
\r
12724 #define TCDT4_T0 tcdt4.bit._T0
\r
12725 __IO_EXTERN TCCS4STR tccs4;
\r
12726 #define TCCS4 tccs4.byte
\r
12727 #define TCCS4_ECLK tccs4.bit._ECLK
\r
12728 #define TCCS4_IVF tccs4.bit._IVF
\r
12729 #define TCCS4_IVFE tccs4.bit._IVFE
\r
12730 #define TCCS4_STOP tccs4.bit._STOP
\r
12731 #define TCCS4_MODE tccs4.bit._MODE
\r
12732 #define TCCS4_CLR tccs4.bit._CLR
\r
12733 #define TCCS4_CLK1 tccs4.bit._CLK1
\r
12734 #define TCCS4_CLK0 tccs4.bit._CLK0
\r
12735 #define TCCS4_CLK tccs4.bitc._CLK
\r
12736 __IO_EXTERN TCDT5STR tcdt5; /* Free Running Timer5 */
\r
12737 #define TCDT5 tcdt5.word
\r
12738 #define TCDT5_T15 tcdt5.bit._T15
\r
12739 #define TCDT5_T14 tcdt5.bit._T14
\r
12740 #define TCDT5_T13 tcdt5.bit._T13
\r
12741 #define TCDT5_T12 tcdt5.bit._T12
\r
12742 #define TCDT5_T11 tcdt5.bit._T11
\r
12743 #define TCDT5_T10 tcdt5.bit._T10
\r
12744 #define TCDT5_T9 tcdt5.bit._T9
\r
12745 #define TCDT5_T8 tcdt5.bit._T8
\r
12746 #define TCDT5_T7 tcdt5.bit._T7
\r
12747 #define TCDT5_T6 tcdt5.bit._T6
\r
12748 #define TCDT5_T5 tcdt5.bit._T5
\r
12749 #define TCDT5_T4 tcdt5.bit._T4
\r
12750 #define TCDT5_T3 tcdt5.bit._T3
\r
12751 #define TCDT5_T2 tcdt5.bit._T2
\r
12752 #define TCDT5_T1 tcdt5.bit._T1
\r
12753 #define TCDT5_T0 tcdt5.bit._T0
\r
12754 __IO_EXTERN TCCS5STR tccs5;
\r
12755 #define TCCS5 tccs5.byte
\r
12756 #define TCCS5_ECLK tccs5.bit._ECLK
\r
12757 #define TCCS5_IVF tccs5.bit._IVF
\r
12758 #define TCCS5_IVFE tccs5.bit._IVFE
\r
12759 #define TCCS5_STOP tccs5.bit._STOP
\r
12760 #define TCCS5_MODE tccs5.bit._MODE
\r
12761 #define TCCS5_CLR tccs5.bit._CLR
\r
12762 #define TCCS5_CLK1 tccs5.bit._CLK1
\r
12763 #define TCCS5_CLK0 tccs5.bit._CLK0
\r
12764 #define TCCS5_CLK tccs5.bitc._CLK
\r
12765 __IO_EXTERN TCDT6STR tcdt6; /* Free Running Timer6 */
\r
12766 #define TCDT6 tcdt6.word
\r
12767 #define TCDT6_T15 tcdt6.bit._T15
\r
12768 #define TCDT6_T14 tcdt6.bit._T14
\r
12769 #define TCDT6_T13 tcdt6.bit._T13
\r
12770 #define TCDT6_T12 tcdt6.bit._T12
\r
12771 #define TCDT6_T11 tcdt6.bit._T11
\r
12772 #define TCDT6_T10 tcdt6.bit._T10
\r
12773 #define TCDT6_T9 tcdt6.bit._T9
\r
12774 #define TCDT6_T8 tcdt6.bit._T8
\r
12775 #define TCDT6_T7 tcdt6.bit._T7
\r
12776 #define TCDT6_T6 tcdt6.bit._T6
\r
12777 #define TCDT6_T5 tcdt6.bit._T5
\r
12778 #define TCDT6_T4 tcdt6.bit._T4
\r
12779 #define TCDT6_T3 tcdt6.bit._T3
\r
12780 #define TCDT6_T2 tcdt6.bit._T2
\r
12781 #define TCDT6_T1 tcdt6.bit._T1
\r
12782 #define TCDT6_T0 tcdt6.bit._T0
\r
12783 __IO_EXTERN TCCS6STR tccs6;
\r
12784 #define TCCS6 tccs6.byte
\r
12785 #define TCCS6_ECLK tccs6.bit._ECLK
\r
12786 #define TCCS6_IVF tccs6.bit._IVF
\r
12787 #define TCCS6_IVFE tccs6.bit._IVFE
\r
12788 #define TCCS6_STOP tccs6.bit._STOP
\r
12789 #define TCCS6_MODE tccs6.bit._MODE
\r
12790 #define TCCS6_CLR tccs6.bit._CLR
\r
12791 #define TCCS6_CLK1 tccs6.bit._CLK1
\r
12792 #define TCCS6_CLK0 tccs6.bit._CLK0
\r
12793 #define TCCS6_CLK tccs6.bitc._CLK
\r
12794 __IO_EXTERN TCDT7STR tcdt7; /* Free Running Timer7 */
\r
12795 #define TCDT7 tcdt7.word
\r
12796 #define TCDT7_T15 tcdt7.bit._T15
\r
12797 #define TCDT7_T14 tcdt7.bit._T14
\r
12798 #define TCDT7_T13 tcdt7.bit._T13
\r
12799 #define TCDT7_T12 tcdt7.bit._T12
\r
12800 #define TCDT7_T11 tcdt7.bit._T11
\r
12801 #define TCDT7_T10 tcdt7.bit._T10
\r
12802 #define TCDT7_T9 tcdt7.bit._T9
\r
12803 #define TCDT7_T8 tcdt7.bit._T8
\r
12804 #define TCDT7_T7 tcdt7.bit._T7
\r
12805 #define TCDT7_T6 tcdt7.bit._T6
\r
12806 #define TCDT7_T5 tcdt7.bit._T5
\r
12807 #define TCDT7_T4 tcdt7.bit._T4
\r
12808 #define TCDT7_T3 tcdt7.bit._T3
\r
12809 #define TCDT7_T2 tcdt7.bit._T2
\r
12810 #define TCDT7_T1 tcdt7.bit._T1
\r
12811 #define TCDT7_T0 tcdt7.bit._T0
\r
12812 __IO_EXTERN TCCS7STR tccs7;
\r
12813 #define TCCS7 tccs7.byte
\r
12814 #define TCCS7_ECLK tccs7.bit._ECLK
\r
12815 #define TCCS7_IVF tccs7.bit._IVF
\r
12816 #define TCCS7_IVFE tccs7.bit._IVFE
\r
12817 #define TCCS7_STOP tccs7.bit._STOP
\r
12818 #define TCCS7_MODE tccs7.bit._MODE
\r
12819 #define TCCS7_CLR tccs7.bit._CLR
\r
12820 #define TCCS7_CLK1 tccs7.bit._CLK1
\r
12821 #define TCCS7_CLK0 tccs7.bit._CLK0
\r
12822 #define TCCS7_CLK tccs7.bitc._CLK
\r
12823 __IO_EXTERN ROMSSTR roms; /* ROM Select Register */
\r
12824 #define ROMS roms.word
\r
12825 #define ROMS_D15 roms.bit._D15
\r
12826 #define ROMS_D14 roms.bit._D14
\r
12827 #define ROMS_D13 roms.bit._D13
\r
12828 #define ROMS_D12 roms.bit._D12
\r
12829 #define ROMS_D11 roms.bit._D11
\r
12830 #define ROMS_D10 roms.bit._D10
\r
12831 #define ROMS_D9 roms.bit._D9
\r
12832 #define ROMS_D8 roms.bit._D8
\r
12833 #define ROMS_D7 roms.bit._D7
\r
12834 #define ROMS_D6 roms.bit._D6
\r
12835 #define ROMS_D5 roms.bit._D5
\r
12836 #define ROMS_D4 roms.bit._D4
\r
12837 #define ROMS_D3 roms.bit._D3
\r
12838 #define ROMS_D2 roms.bit._D2
\r
12839 #define ROMS_D1 roms.bit._D1
\r
12840 #define ROMS_D0 roms.bit._D0
\r
12841 __IO_EXTERN IO_LWORD bsd0; /* Bit Search Module */
\r
12842 #define BSD0 bsd0
\r
12843 __IO_EXTERN IO_LWORD bsd1;
\r
12844 #define BSD1 bsd1
\r
12845 __IO_EXTERN IO_LWORD bsdc;
\r
12846 #define BSDC bsdc
\r
12847 __IO_EXTERN IO_LWORD bsrr;
\r
12848 #define BSRR bsrr
\r
12849 __IO_EXTERN ICR00STR icr00; /* Interrupt Control Unit */
\r
12850 #define ICR00 icr00.byte
\r
12851 #define ICR00_ICR4 icr00.bit._ICR4
\r
12852 #define ICR00_ICR3 icr00.bit._ICR3
\r
12853 #define ICR00_ICR2 icr00.bit._ICR2
\r
12854 #define ICR00_ICR1 icr00.bit._ICR1
\r
12855 #define ICR00_ICR0 icr00.bit._ICR0
\r
12856 __IO_EXTERN ICR01STR icr01;
\r
12857 #define ICR01 icr01.byte
\r
12858 #define ICR01_ICR4 icr01.bit._ICR4
\r
12859 #define ICR01_ICR3 icr01.bit._ICR3
\r
12860 #define ICR01_ICR2 icr01.bit._ICR2
\r
12861 #define ICR01_ICR1 icr01.bit._ICR1
\r
12862 #define ICR01_ICR0 icr01.bit._ICR0
\r
12863 __IO_EXTERN ICR02STR icr02;
\r
12864 #define ICR02 icr02.byte
\r
12865 #define ICR02_ICR4 icr02.bit._ICR4
\r
12866 #define ICR02_ICR3 icr02.bit._ICR3
\r
12867 #define ICR02_ICR2 icr02.bit._ICR2
\r
12868 #define ICR02_ICR1 icr02.bit._ICR1
\r
12869 #define ICR02_ICR0 icr02.bit._ICR0
\r
12870 __IO_EXTERN ICR03STR icr03;
\r
12871 #define ICR03 icr03.byte
\r
12872 #define ICR03_ICR4 icr03.bit._ICR4
\r
12873 #define ICR03_ICR3 icr03.bit._ICR3
\r
12874 #define ICR03_ICR2 icr03.bit._ICR2
\r
12875 #define ICR03_ICR1 icr03.bit._ICR1
\r
12876 #define ICR03_ICR0 icr03.bit._ICR0
\r
12877 __IO_EXTERN ICR04STR icr04;
\r
12878 #define ICR04 icr04.byte
\r
12879 #define ICR04_ICR4 icr04.bit._ICR4
\r
12880 #define ICR04_ICR3 icr04.bit._ICR3
\r
12881 #define ICR04_ICR2 icr04.bit._ICR2
\r
12882 #define ICR04_ICR1 icr04.bit._ICR1
\r
12883 #define ICR04_ICR0 icr04.bit._ICR0
\r
12884 __IO_EXTERN ICR05STR icr05;
\r
12885 #define ICR05 icr05.byte
\r
12886 #define ICR05_ICR4 icr05.bit._ICR4
\r
12887 #define ICR05_ICR3 icr05.bit._ICR3
\r
12888 #define ICR05_ICR2 icr05.bit._ICR2
\r
12889 #define ICR05_ICR1 icr05.bit._ICR1
\r
12890 #define ICR05_ICR0 icr05.bit._ICR0
\r
12891 __IO_EXTERN ICR06STR icr06;
\r
12892 #define ICR06 icr06.byte
\r
12893 #define ICR06_ICR4 icr06.bit._ICR4
\r
12894 #define ICR06_ICR3 icr06.bit._ICR3
\r
12895 #define ICR06_ICR2 icr06.bit._ICR2
\r
12896 #define ICR06_ICR1 icr06.bit._ICR1
\r
12897 #define ICR06_ICR0 icr06.bit._ICR0
\r
12898 __IO_EXTERN ICR07STR icr07;
\r
12899 #define ICR07 icr07.byte
\r
12900 #define ICR07_ICR4 icr07.bit._ICR4
\r
12901 #define ICR07_ICR3 icr07.bit._ICR3
\r
12902 #define ICR07_ICR2 icr07.bit._ICR2
\r
12903 #define ICR07_ICR1 icr07.bit._ICR1
\r
12904 #define ICR07_ICR0 icr07.bit._ICR0
\r
12905 __IO_EXTERN ICR08STR icr08;
\r
12906 #define ICR08 icr08.byte
\r
12907 #define ICR08_ICR4 icr08.bit._ICR4
\r
12908 #define ICR08_ICR3 icr08.bit._ICR3
\r
12909 #define ICR08_ICR2 icr08.bit._ICR2
\r
12910 #define ICR08_ICR1 icr08.bit._ICR1
\r
12911 #define ICR08_ICR0 icr08.bit._ICR0
\r
12912 __IO_EXTERN ICR09STR icr09;
\r
12913 #define ICR09 icr09.byte
\r
12914 #define ICR09_ICR4 icr09.bit._ICR4
\r
12915 #define ICR09_ICR3 icr09.bit._ICR3
\r
12916 #define ICR09_ICR2 icr09.bit._ICR2
\r
12917 #define ICR09_ICR1 icr09.bit._ICR1
\r
12918 #define ICR09_ICR0 icr09.bit._ICR0
\r
12919 __IO_EXTERN ICR10STR icr10;
\r
12920 #define ICR10 icr10.byte
\r
12921 #define ICR10_ICR4 icr10.bit._ICR4
\r
12922 #define ICR10_ICR3 icr10.bit._ICR3
\r
12923 #define ICR10_ICR2 icr10.bit._ICR2
\r
12924 #define ICR10_ICR1 icr10.bit._ICR1
\r
12925 #define ICR10_ICR0 icr10.bit._ICR0
\r
12926 __IO_EXTERN ICR11STR icr11;
\r
12927 #define ICR11 icr11.byte
\r
12928 #define ICR11_ICR4 icr11.bit._ICR4
\r
12929 #define ICR11_ICR3 icr11.bit._ICR3
\r
12930 #define ICR11_ICR2 icr11.bit._ICR2
\r
12931 #define ICR11_ICR1 icr11.bit._ICR1
\r
12932 #define ICR11_ICR0 icr11.bit._ICR0
\r
12933 __IO_EXTERN ICR12STR icr12;
\r
12934 #define ICR12 icr12.byte
\r
12935 #define ICR12_ICR4 icr12.bit._ICR4
\r
12936 #define ICR12_ICR3 icr12.bit._ICR3
\r
12937 #define ICR12_ICR2 icr12.bit._ICR2
\r
12938 #define ICR12_ICR1 icr12.bit._ICR1
\r
12939 #define ICR12_ICR0 icr12.bit._ICR0
\r
12940 __IO_EXTERN ICR13STR icr13;
\r
12941 #define ICR13 icr13.byte
\r
12942 #define ICR13_ICR4 icr13.bit._ICR4
\r
12943 #define ICR13_ICR3 icr13.bit._ICR3
\r
12944 #define ICR13_ICR2 icr13.bit._ICR2
\r
12945 #define ICR13_ICR1 icr13.bit._ICR1
\r
12946 #define ICR13_ICR0 icr13.bit._ICR0
\r
12947 __IO_EXTERN ICR14STR icr14;
\r
12948 #define ICR14 icr14.byte
\r
12949 #define ICR14_ICR4 icr14.bit._ICR4
\r
12950 #define ICR14_ICR3 icr14.bit._ICR3
\r
12951 #define ICR14_ICR2 icr14.bit._ICR2
\r
12952 #define ICR14_ICR1 icr14.bit._ICR1
\r
12953 #define ICR14_ICR0 icr14.bit._ICR0
\r
12954 __IO_EXTERN ICR15STR icr15;
\r
12955 #define ICR15 icr15.byte
\r
12956 #define ICR15_ICR4 icr15.bit._ICR4
\r
12957 #define ICR15_ICR3 icr15.bit._ICR3
\r
12958 #define ICR15_ICR2 icr15.bit._ICR2
\r
12959 #define ICR15_ICR1 icr15.bit._ICR1
\r
12960 #define ICR15_ICR0 icr15.bit._ICR0
\r
12961 __IO_EXTERN ICR16STR icr16;
\r
12962 #define ICR16 icr16.byte
\r
12963 #define ICR16_ICR4 icr16.bit._ICR4
\r
12964 #define ICR16_ICR3 icr16.bit._ICR3
\r
12965 #define ICR16_ICR2 icr16.bit._ICR2
\r
12966 #define ICR16_ICR1 icr16.bit._ICR1
\r
12967 #define ICR16_ICR0 icr16.bit._ICR0
\r
12968 __IO_EXTERN ICR17STR icr17;
\r
12969 #define ICR17 icr17.byte
\r
12970 #define ICR17_ICR4 icr17.bit._ICR4
\r
12971 #define ICR17_ICR3 icr17.bit._ICR3
\r
12972 #define ICR17_ICR2 icr17.bit._ICR2
\r
12973 #define ICR17_ICR1 icr17.bit._ICR1
\r
12974 #define ICR17_ICR0 icr17.bit._ICR0
\r
12975 __IO_EXTERN ICR18STR icr18;
\r
12976 #define ICR18 icr18.byte
\r
12977 #define ICR18_ICR4 icr18.bit._ICR4
\r
12978 #define ICR18_ICR3 icr18.bit._ICR3
\r
12979 #define ICR18_ICR2 icr18.bit._ICR2
\r
12980 #define ICR18_ICR1 icr18.bit._ICR1
\r
12981 #define ICR18_ICR0 icr18.bit._ICR0
\r
12982 __IO_EXTERN ICR19STR icr19;
\r
12983 #define ICR19 icr19.byte
\r
12984 #define ICR19_ICR4 icr19.bit._ICR4
\r
12985 #define ICR19_ICR3 icr19.bit._ICR3
\r
12986 #define ICR19_ICR2 icr19.bit._ICR2
\r
12987 #define ICR19_ICR1 icr19.bit._ICR1
\r
12988 #define ICR19_ICR0 icr19.bit._ICR0
\r
12989 __IO_EXTERN ICR20STR icr20;
\r
12990 #define ICR20 icr20.byte
\r
12991 #define ICR20_ICR4 icr20.bit._ICR4
\r
12992 #define ICR20_ICR3 icr20.bit._ICR3
\r
12993 #define ICR20_ICR2 icr20.bit._ICR2
\r
12994 #define ICR20_ICR1 icr20.bit._ICR1
\r
12995 #define ICR20_ICR0 icr20.bit._ICR0
\r
12996 __IO_EXTERN ICR21STR icr21;
\r
12997 #define ICR21 icr21.byte
\r
12998 #define ICR21_ICR4 icr21.bit._ICR4
\r
12999 #define ICR21_ICR3 icr21.bit._ICR3
\r
13000 #define ICR21_ICR2 icr21.bit._ICR2
\r
13001 #define ICR21_ICR1 icr21.bit._ICR1
\r
13002 #define ICR21_ICR0 icr21.bit._ICR0
\r
13003 __IO_EXTERN ICR22STR icr22;
\r
13004 #define ICR22 icr22.byte
\r
13005 #define ICR22_ICR4 icr22.bit._ICR4
\r
13006 #define ICR22_ICR3 icr22.bit._ICR3
\r
13007 #define ICR22_ICR2 icr22.bit._ICR2
\r
13008 #define ICR22_ICR1 icr22.bit._ICR1
\r
13009 #define ICR22_ICR0 icr22.bit._ICR0
\r
13010 __IO_EXTERN ICR23STR icr23;
\r
13011 #define ICR23 icr23.byte
\r
13012 #define ICR23_ICR4 icr23.bit._ICR4
\r
13013 #define ICR23_ICR3 icr23.bit._ICR3
\r
13014 #define ICR23_ICR2 icr23.bit._ICR2
\r
13015 #define ICR23_ICR1 icr23.bit._ICR1
\r
13016 #define ICR23_ICR0 icr23.bit._ICR0
\r
13017 __IO_EXTERN ICR24STR icr24;
\r
13018 #define ICR24 icr24.byte
\r
13019 #define ICR24_ICR4 icr24.bit._ICR4
\r
13020 #define ICR24_ICR3 icr24.bit._ICR3
\r
13021 #define ICR24_ICR2 icr24.bit._ICR2
\r
13022 #define ICR24_ICR1 icr24.bit._ICR1
\r
13023 #define ICR24_ICR0 icr24.bit._ICR0
\r
13024 __IO_EXTERN ICR25STR icr25;
\r
13025 #define ICR25 icr25.byte
\r
13026 #define ICR25_ICR4 icr25.bit._ICR4
\r
13027 #define ICR25_ICR3 icr25.bit._ICR3
\r
13028 #define ICR25_ICR2 icr25.bit._ICR2
\r
13029 #define ICR25_ICR1 icr25.bit._ICR1
\r
13030 #define ICR25_ICR0 icr25.bit._ICR0
\r
13031 __IO_EXTERN ICR26STR icr26;
\r
13032 #define ICR26 icr26.byte
\r
13033 #define ICR26_ICR4 icr26.bit._ICR4
\r
13034 #define ICR26_ICR3 icr26.bit._ICR3
\r
13035 #define ICR26_ICR2 icr26.bit._ICR2
\r
13036 #define ICR26_ICR1 icr26.bit._ICR1
\r
13037 #define ICR26_ICR0 icr26.bit._ICR0
\r
13038 __IO_EXTERN ICR27STR icr27;
\r
13039 #define ICR27 icr27.byte
\r
13040 #define ICR27_ICR4 icr27.bit._ICR4
\r
13041 #define ICR27_ICR3 icr27.bit._ICR3
\r
13042 #define ICR27_ICR2 icr27.bit._ICR2
\r
13043 #define ICR27_ICR1 icr27.bit._ICR1
\r
13044 #define ICR27_ICR0 icr27.bit._ICR0
\r
13045 __IO_EXTERN ICR28STR icr28;
\r
13046 #define ICR28 icr28.byte
\r
13047 #define ICR28_ICR4 icr28.bit._ICR4
\r
13048 #define ICR28_ICR3 icr28.bit._ICR3
\r
13049 #define ICR28_ICR2 icr28.bit._ICR2
\r
13050 #define ICR28_ICR1 icr28.bit._ICR1
\r
13051 #define ICR28_ICR0 icr28.bit._ICR0
\r
13052 __IO_EXTERN ICR29STR icr29;
\r
13053 #define ICR29 icr29.byte
\r
13054 #define ICR29_ICR4 icr29.bit._ICR4
\r
13055 #define ICR29_ICR3 icr29.bit._ICR3
\r
13056 #define ICR29_ICR2 icr29.bit._ICR2
\r
13057 #define ICR29_ICR1 icr29.bit._ICR1
\r
13058 #define ICR29_ICR0 icr29.bit._ICR0
\r
13059 __IO_EXTERN ICR30STR icr30;
\r
13060 #define ICR30 icr30.byte
\r
13061 #define ICR30_ICR4 icr30.bit._ICR4
\r
13062 #define ICR30_ICR3 icr30.bit._ICR3
\r
13063 #define ICR30_ICR2 icr30.bit._ICR2
\r
13064 #define ICR30_ICR1 icr30.bit._ICR1
\r
13065 #define ICR30_ICR0 icr30.bit._ICR0
\r
13066 __IO_EXTERN ICR31STR icr31;
\r
13067 #define ICR31 icr31.byte
\r
13068 #define ICR31_ICR4 icr31.bit._ICR4
\r
13069 #define ICR31_ICR3 icr31.bit._ICR3
\r
13070 #define ICR31_ICR2 icr31.bit._ICR2
\r
13071 #define ICR31_ICR1 icr31.bit._ICR1
\r
13072 #define ICR31_ICR0 icr31.bit._ICR0
\r
13073 __IO_EXTERN ICR32STR icr32;
\r
13074 #define ICR32 icr32.byte
\r
13075 #define ICR32_ICR4 icr32.bit._ICR4
\r
13076 #define ICR32_ICR3 icr32.bit._ICR3
\r
13077 #define ICR32_ICR2 icr32.bit._ICR2
\r
13078 #define ICR32_ICR1 icr32.bit._ICR1
\r
13079 #define ICR32_ICR0 icr32.bit._ICR0
\r
13080 __IO_EXTERN ICR33STR icr33;
\r
13081 #define ICR33 icr33.byte
\r
13082 #define ICR33_ICR4 icr33.bit._ICR4
\r
13083 #define ICR33_ICR3 icr33.bit._ICR3
\r
13084 #define ICR33_ICR2 icr33.bit._ICR2
\r
13085 #define ICR33_ICR1 icr33.bit._ICR1
\r
13086 #define ICR33_ICR0 icr33.bit._ICR0
\r
13087 __IO_EXTERN ICR34STR icr34;
\r
13088 #define ICR34 icr34.byte
\r
13089 #define ICR34_ICR4 icr34.bit._ICR4
\r
13090 #define ICR34_ICR3 icr34.bit._ICR3
\r
13091 #define ICR34_ICR2 icr34.bit._ICR2
\r
13092 #define ICR34_ICR1 icr34.bit._ICR1
\r
13093 #define ICR34_ICR0 icr34.bit._ICR0
\r
13094 __IO_EXTERN ICR35STR icr35;
\r
13095 #define ICR35 icr35.byte
\r
13096 #define ICR35_ICR4 icr35.bit._ICR4
\r
13097 #define ICR35_ICR3 icr35.bit._ICR3
\r
13098 #define ICR35_ICR2 icr35.bit._ICR2
\r
13099 #define ICR35_ICR1 icr35.bit._ICR1
\r
13100 #define ICR35_ICR0 icr35.bit._ICR0
\r
13101 __IO_EXTERN ICR36STR icr36;
\r
13102 #define ICR36 icr36.byte
\r
13103 #define ICR36_ICR4 icr36.bit._ICR4
\r
13104 #define ICR36_ICR3 icr36.bit._ICR3
\r
13105 #define ICR36_ICR2 icr36.bit._ICR2
\r
13106 #define ICR36_ICR1 icr36.bit._ICR1
\r
13107 #define ICR36_ICR0 icr36.bit._ICR0
\r
13108 __IO_EXTERN ICR37STR icr37;
\r
13109 #define ICR37 icr37.byte
\r
13110 #define ICR37_ICR4 icr37.bit._ICR4
\r
13111 #define ICR37_ICR3 icr37.bit._ICR3
\r
13112 #define ICR37_ICR2 icr37.bit._ICR2
\r
13113 #define ICR37_ICR1 icr37.bit._ICR1
\r
13114 #define ICR37_ICR0 icr37.bit._ICR0
\r
13115 __IO_EXTERN ICR38STR icr38;
\r
13116 #define ICR38 icr38.byte
\r
13117 #define ICR38_ICR4 icr38.bit._ICR4
\r
13118 #define ICR38_ICR3 icr38.bit._ICR3
\r
13119 #define ICR38_ICR2 icr38.bit._ICR2
\r
13120 #define ICR38_ICR1 icr38.bit._ICR1
\r
13121 #define ICR38_ICR0 icr38.bit._ICR0
\r
13122 __IO_EXTERN ICR39STR icr39;
\r
13123 #define ICR39 icr39.byte
\r
13124 #define ICR39_ICR4 icr39.bit._ICR4
\r
13125 #define ICR39_ICR3 icr39.bit._ICR3
\r
13126 #define ICR39_ICR2 icr39.bit._ICR2
\r
13127 #define ICR39_ICR1 icr39.bit._ICR1
\r
13128 #define ICR39_ICR0 icr39.bit._ICR0
\r
13129 __IO_EXTERN ICR40STR icr40;
\r
13130 #define ICR40 icr40.byte
\r
13131 #define ICR40_ICR4 icr40.bit._ICR4
\r
13132 #define ICR40_ICR3 icr40.bit._ICR3
\r
13133 #define ICR40_ICR2 icr40.bit._ICR2
\r
13134 #define ICR40_ICR1 icr40.bit._ICR1
\r
13135 #define ICR40_ICR0 icr40.bit._ICR0
\r
13136 __IO_EXTERN ICR41STR icr41;
\r
13137 #define ICR41 icr41.byte
\r
13138 #define ICR41_ICR4 icr41.bit._ICR4
\r
13139 #define ICR41_ICR3 icr41.bit._ICR3
\r
13140 #define ICR41_ICR2 icr41.bit._ICR2
\r
13141 #define ICR41_ICR1 icr41.bit._ICR1
\r
13142 #define ICR41_ICR0 icr41.bit._ICR0
\r
13143 __IO_EXTERN ICR42STR icr42;
\r
13144 #define ICR42 icr42.byte
\r
13145 #define ICR42_ICR4 icr42.bit._ICR4
\r
13146 #define ICR42_ICR3 icr42.bit._ICR3
\r
13147 #define ICR42_ICR2 icr42.bit._ICR2
\r
13148 #define ICR42_ICR1 icr42.bit._ICR1
\r
13149 #define ICR42_ICR0 icr42.bit._ICR0
\r
13150 __IO_EXTERN ICR43STR icr43;
\r
13151 #define ICR43 icr43.byte
\r
13152 #define ICR43_ICR4 icr43.bit._ICR4
\r
13153 #define ICR43_ICR3 icr43.bit._ICR3
\r
13154 #define ICR43_ICR2 icr43.bit._ICR2
\r
13155 #define ICR43_ICR1 icr43.bit._ICR1
\r
13156 #define ICR43_ICR0 icr43.bit._ICR0
\r
13157 __IO_EXTERN ICR44STR icr44;
\r
13158 #define ICR44 icr44.byte
\r
13159 #define ICR44_ICR4 icr44.bit._ICR4
\r
13160 #define ICR44_ICR3 icr44.bit._ICR3
\r
13161 #define ICR44_ICR2 icr44.bit._ICR2
\r
13162 #define ICR44_ICR1 icr44.bit._ICR1
\r
13163 #define ICR44_ICR0 icr44.bit._ICR0
\r
13164 __IO_EXTERN ICR45STR icr45;
\r
13165 #define ICR45 icr45.byte
\r
13166 #define ICR45_ICR4 icr45.bit._ICR4
\r
13167 #define ICR45_ICR3 icr45.bit._ICR3
\r
13168 #define ICR45_ICR2 icr45.bit._ICR2
\r
13169 #define ICR45_ICR1 icr45.bit._ICR1
\r
13170 #define ICR45_ICR0 icr45.bit._ICR0
\r
13171 __IO_EXTERN ICR46STR icr46;
\r
13172 #define ICR46 icr46.byte
\r
13173 #define ICR46_ICR4 icr46.bit._ICR4
\r
13174 #define ICR46_ICR3 icr46.bit._ICR3
\r
13175 #define ICR46_ICR2 icr46.bit._ICR2
\r
13176 #define ICR46_ICR1 icr46.bit._ICR1
\r
13177 #define ICR46_ICR0 icr46.bit._ICR0
\r
13178 __IO_EXTERN ICR47STR icr47;
\r
13179 #define ICR47 icr47.byte
\r
13180 #define ICR47_ICR4 icr47.bit._ICR4
\r
13181 #define ICR47_ICR3 icr47.bit._ICR3
\r
13182 #define ICR47_ICR2 icr47.bit._ICR2
\r
13183 #define ICR47_ICR1 icr47.bit._ICR1
\r
13184 #define ICR47_ICR0 icr47.bit._ICR0
\r
13185 __IO_EXTERN ICR48STR icr48;
\r
13186 #define ICR48 icr48.byte
\r
13187 #define ICR48_ICR4 icr48.bit._ICR4
\r
13188 #define ICR48_ICR3 icr48.bit._ICR3
\r
13189 #define ICR48_ICR2 icr48.bit._ICR2
\r
13190 #define ICR48_ICR1 icr48.bit._ICR1
\r
13191 #define ICR48_ICR0 icr48.bit._ICR0
\r
13192 __IO_EXTERN ICR49STR icr49;
\r
13193 #define ICR49 icr49.byte
\r
13194 #define ICR49_ICR4 icr49.bit._ICR4
\r
13195 #define ICR49_ICR3 icr49.bit._ICR3
\r
13196 #define ICR49_ICR2 icr49.bit._ICR2
\r
13197 #define ICR49_ICR1 icr49.bit._ICR1
\r
13198 #define ICR49_ICR0 icr49.bit._ICR0
\r
13199 __IO_EXTERN ICR50STR icr50;
\r
13200 #define ICR50 icr50.byte
\r
13201 #define ICR50_ICR4 icr50.bit._ICR4
\r
13202 #define ICR50_ICR3 icr50.bit._ICR3
\r
13203 #define ICR50_ICR2 icr50.bit._ICR2
\r
13204 #define ICR50_ICR1 icr50.bit._ICR1
\r
13205 #define ICR50_ICR0 icr50.bit._ICR0
\r
13206 __IO_EXTERN ICR51STR icr51;
\r
13207 #define ICR51 icr51.byte
\r
13208 #define ICR51_ICR4 icr51.bit._ICR4
\r
13209 #define ICR51_ICR3 icr51.bit._ICR3
\r
13210 #define ICR51_ICR2 icr51.bit._ICR2
\r
13211 #define ICR51_ICR1 icr51.bit._ICR1
\r
13212 #define ICR51_ICR0 icr51.bit._ICR0
\r
13213 __IO_EXTERN ICR52STR icr52;
\r
13214 #define ICR52 icr52.byte
\r
13215 #define ICR52_ICR4 icr52.bit._ICR4
\r
13216 #define ICR52_ICR3 icr52.bit._ICR3
\r
13217 #define ICR52_ICR2 icr52.bit._ICR2
\r
13218 #define ICR52_ICR1 icr52.bit._ICR1
\r
13219 #define ICR52_ICR0 icr52.bit._ICR0
\r
13220 __IO_EXTERN ICR53STR icr53;
\r
13221 #define ICR53 icr53.byte
\r
13222 #define ICR53_ICR4 icr53.bit._ICR4
\r
13223 #define ICR53_ICR3 icr53.bit._ICR3
\r
13224 #define ICR53_ICR2 icr53.bit._ICR2
\r
13225 #define ICR53_ICR1 icr53.bit._ICR1
\r
13226 #define ICR53_ICR0 icr53.bit._ICR0
\r
13227 __IO_EXTERN ICR54STR icr54;
\r
13228 #define ICR54 icr54.byte
\r
13229 #define ICR54_ICR4 icr54.bit._ICR4
\r
13230 #define ICR54_ICR3 icr54.bit._ICR3
\r
13231 #define ICR54_ICR2 icr54.bit._ICR2
\r
13232 #define ICR54_ICR1 icr54.bit._ICR1
\r
13233 #define ICR54_ICR0 icr54.bit._ICR0
\r
13234 __IO_EXTERN ICR55STR icr55;
\r
13235 #define ICR55 icr55.byte
\r
13236 #define ICR55_ICR4 icr55.bit._ICR4
\r
13237 #define ICR55_ICR3 icr55.bit._ICR3
\r
13238 #define ICR55_ICR2 icr55.bit._ICR2
\r
13239 #define ICR55_ICR1 icr55.bit._ICR1
\r
13240 #define ICR55_ICR0 icr55.bit._ICR0
\r
13241 __IO_EXTERN ICR56STR icr56;
\r
13242 #define ICR56 icr56.byte
\r
13243 #define ICR56_ICR4 icr56.bit._ICR4
\r
13244 #define ICR56_ICR3 icr56.bit._ICR3
\r
13245 #define ICR56_ICR2 icr56.bit._ICR2
\r
13246 #define ICR56_ICR1 icr56.bit._ICR1
\r
13247 #define ICR56_ICR0 icr56.bit._ICR0
\r
13248 __IO_EXTERN ICR57STR icr57;
\r
13249 #define ICR57 icr57.byte
\r
13250 #define ICR57_ICR4 icr57.bit._ICR4
\r
13251 #define ICR57_ICR3 icr57.bit._ICR3
\r
13252 #define ICR57_ICR2 icr57.bit._ICR2
\r
13253 #define ICR57_ICR1 icr57.bit._ICR1
\r
13254 #define ICR57_ICR0 icr57.bit._ICR0
\r
13255 __IO_EXTERN ICR58STR icr58;
\r
13256 #define ICR58 icr58.byte
\r
13257 #define ICR58_ICR4 icr58.bit._ICR4
\r
13258 #define ICR58_ICR3 icr58.bit._ICR3
\r
13259 #define ICR58_ICR2 icr58.bit._ICR2
\r
13260 #define ICR58_ICR1 icr58.bit._ICR1
\r
13261 #define ICR58_ICR0 icr58.bit._ICR0
\r
13262 __IO_EXTERN ICR59STR icr59;
\r
13263 #define ICR59 icr59.byte
\r
13264 #define ICR59_ICR4 icr59.bit._ICR4
\r
13265 #define ICR59_ICR3 icr59.bit._ICR3
\r
13266 #define ICR59_ICR2 icr59.bit._ICR2
\r
13267 #define ICR59_ICR1 icr59.bit._ICR1
\r
13268 #define ICR59_ICR0 icr59.bit._ICR0
\r
13269 __IO_EXTERN ICR60STR icr60;
\r
13270 #define ICR60 icr60.byte
\r
13271 #define ICR60_ICR4 icr60.bit._ICR4
\r
13272 #define ICR60_ICR3 icr60.bit._ICR3
\r
13273 #define ICR60_ICR2 icr60.bit._ICR2
\r
13274 #define ICR60_ICR1 icr60.bit._ICR1
\r
13275 #define ICR60_ICR0 icr60.bit._ICR0
\r
13276 __IO_EXTERN ICR61STR icr61;
\r
13277 #define ICR61 icr61.byte
\r
13278 #define ICR61_ICR4 icr61.bit._ICR4
\r
13279 #define ICR61_ICR3 icr61.bit._ICR3
\r
13280 #define ICR61_ICR2 icr61.bit._ICR2
\r
13281 #define ICR61_ICR1 icr61.bit._ICR1
\r
13282 #define ICR61_ICR0 icr61.bit._ICR0
\r
13283 __IO_EXTERN ICR62STR icr62;
\r
13284 #define ICR62 icr62.byte
\r
13285 #define ICR62_ICR4 icr62.bit._ICR4
\r
13286 #define ICR62_ICR3 icr62.bit._ICR3
\r
13287 #define ICR62_ICR2 icr62.bit._ICR2
\r
13288 #define ICR62_ICR1 icr62.bit._ICR1
\r
13289 #define ICR62_ICR0 icr62.bit._ICR0
\r
13290 __IO_EXTERN ICR63STR icr63;
\r
13291 #define ICR63 icr63.byte
\r
13292 #define ICR63_ICR4 icr63.bit._ICR4
\r
13293 #define ICR63_ICR3 icr63.bit._ICR3
\r
13294 #define ICR63_ICR2 icr63.bit._ICR2
\r
13295 #define ICR63_ICR1 icr63.bit._ICR1
\r
13296 #define ICR63_ICR0 icr63.bit._ICR0
\r
13297 __IO_EXTERN RSRRSTR rsrr; /* Clock Control Unit */
\r
13298 #define RSRR rsrr.byte
\r
13299 #define RSRR_INIT rsrr.bit._INIT
\r
13300 #define RSRR_HSTB rsrr.bit._HSTB
\r
13301 #define RSRR_WDOG rsrr.bit._WDOG
\r
13302 #define RSRR_ERST rsrr.bit._ERST
\r
13303 #define RSRR_SRST rsrr.bit._SRST
\r
13304 #define RSRR_LINIT rsrr.bit._LINIT
\r
13305 #define RSRR_WT1 rsrr.bit._WT1
\r
13306 #define RSRR_WT0 rsrr.bit._WT0
\r
13307 #define RSRR_WT rsrr.bitc._WT
\r
13308 __IO_EXTERN STCRSTR stcr;
\r
13309 #define STCR stcr.byte
\r
13310 #define STCR_STOP stcr.bit._STOP
\r
13311 #define STCR_SLEEP stcr.bit._SLEEP
\r
13312 #define STCR_HIZ stcr.bit._HIZ
\r
13313 #define STCR_SRST stcr.bit._SRST
\r
13314 #define STCR_OS1 stcr.bit._OS1
\r
13315 #define STCR_OS0 stcr.bit._OS0
\r
13316 #define STCR_OSCD2 stcr.bit._OSCD2
\r
13317 #define STCR_OSCD1 stcr.bit._OSCD1
\r
13318 #define STCR_OS stcr.bitc._OS
\r
13319 #define STCR_OSCD stcr.bitc._OSCD
\r
13320 __IO_EXTERN TBCRSTR tbcr;
\r
13321 #define TBCR tbcr.byte
\r
13322 #define TBCR_TBIF tbcr.bit._TBIF
\r
13323 #define TBCR_TBIE tbcr.bit._TBIE
\r
13324 #define TBCR_TBC2 tbcr.bit._TBC2
\r
13325 #define TBCR_TBC1 tbcr.bit._TBC1
\r
13326 #define TBCR_TBC0 tbcr.bit._TBC0
\r
13327 #define TBCR_SYNCR tbcr.bit._SYNCR
\r
13328 #define TBCR_SYNCS tbcr.bit._SYNCS
\r
13329 #define TBCR_TBC tbcr.bitc._TBC
\r
13330 __IO_EXTERN CTBRSTR ctbr;
\r
13331 #define CTBR ctbr.byte
\r
13332 #define CTBR_D7 ctbr.bit._D7
\r
13333 #define CTBR_D6 ctbr.bit._D6
\r
13334 #define CTBR_D5 ctbr.bit._D5
\r
13335 #define CTBR_D4 ctbr.bit._D4
\r
13336 #define CTBR_D3 ctbr.bit._D3
\r
13337 #define CTBR_D2 ctbr.bit._D2
\r
13338 #define CTBR_D1 ctbr.bit._D1
\r
13339 #define CTBR_D0 ctbr.bit._D0
\r
13340 __IO_EXTERN CLKRSTR clkr;
\r
13341 #define CLKR clkr.byte
\r
13342 #define CLKR_SCKEN clkr.bit._SCKEN
\r
13343 #define CLKR_PLL1EN clkr.bit._PLL1EN
\r
13344 #define CLKR_CLKS1 clkr.bit._CLKS1
\r
13345 #define CLKR_CLKS0 clkr.bit._CLKS0
\r
13346 #define CLKR_CLKS clkr.bitc._CLKS
\r
13347 __IO_EXTERN WPRSTR wpr;
\r
13348 #define WPR wpr.byte
\r
13349 #define WPR_D7 wpr.bit._D7
\r
13350 #define WPR_D6 wpr.bit._D6
\r
13351 #define WPR_D5 wpr.bit._D5
\r
13352 #define WPR_D4 wpr.bit._D4
\r
13353 #define WPR_D3 wpr.bit._D3
\r
13354 #define WPR_D2 wpr.bit._D2
\r
13355 #define WPR_D1 wpr.bit._D1
\r
13356 #define WPR_D0 wpr.bit._D0
\r
13357 __IO_EXTERN DIVR0STR divr0;
\r
13358 #define DIVR0 divr0.byte
\r
13359 #define DIVR0_B3 divr0.bit._B3
\r
13360 #define DIVR0_B2 divr0.bit._B2
\r
13361 #define DIVR0_B1 divr0.bit._B1
\r
13362 #define DIVR0_B0 divr0.bit._B0
\r
13363 #define DIVR0_P3 divr0.bit._P3
\r
13364 #define DIVR0_P2 divr0.bit._P2
\r
13365 #define DIVR0_P1 divr0.bit._P1
\r
13366 #define DIVR0_P0 divr0.bit._P0
\r
13367 #define DIVR0_B divr0.bitc._B
\r
13368 #define DIVR0_P divr0.bitc._P
\r
13369 __IO_EXTERN DIVR1STR divr1;
\r
13370 #define DIVR1 divr1.byte
\r
13371 #define DIVR1_T3 divr1.bit._T3
\r
13372 #define DIVR1_T2 divr1.bit._T2
\r
13373 #define DIVR1_T1 divr1.bit._T1
\r
13374 #define DIVR1_T0 divr1.bit._T0
\r
13375 #define DIVR1_T divr1.bitc._T
\r
13376 __IO_EXTERN PLLDIVMSTR plldivm; /* PLL - Clock Gear Unit: */
\r
13377 #define PLLDIVM plldivm.byte
\r
13378 #define PLLDIVM_DVM3 plldivm.bit._DVM3
\r
13379 #define PLLDIVM_DVM2 plldivm.bit._DVM2
\r
13380 #define PLLDIVM_DVM1 plldivm.bit._DVM1
\r
13381 #define PLLDIVM_DVM0 plldivm.bit._DVM0
\r
13382 #define PLLDIVM_DVM plldivm.bitc._DVM
\r
13383 __IO_EXTERN PLLDIVNSTR plldivn;
\r
13384 #define PLLDIVN plldivn.byte
\r
13385 #define PLLDIVN_DVN5 plldivn.bit._DVN5
\r
13386 #define PLLDIVN_DVN4 plldivn.bit._DVN4
\r
13387 #define PLLDIVN_DVN3 plldivn.bit._DVN3
\r
13388 #define PLLDIVN_DVN2 plldivn.bit._DVN2
\r
13389 #define PLLDIVN_DVN1 plldivn.bit._DVN1
\r
13390 #define PLLDIVN_DVN0 plldivn.bit._DVN0
\r
13391 #define PLLDIVN_DVN plldivn.bitc._DVN
\r
13392 __IO_EXTERN PLLDIVGSTR plldivg;
\r
13393 #define PLLDIVG plldivg.byte
\r
13394 #define PLLDIVG_DVG3 plldivg.bit._DVG3
\r
13395 #define PLLDIVG_DVG2 plldivg.bit._DVG2
\r
13396 #define PLLDIVG_DVG1 plldivg.bit._DVG1
\r
13397 #define PLLDIVG_DVG0 plldivg.bit._DVG0
\r
13398 #define PLLDIVG_DVG plldivg.bitc._DVG
\r
13399 __IO_EXTERN PLLMULGSTR pllmulg;
\r
13400 #define PLLMULG pllmulg.byte
\r
13401 #define PLLMULG_MLG7 pllmulg.bit._MLG7
\r
13402 #define PLLMULG_MLG6 pllmulg.bit._MLG6
\r
13403 #define PLLMULG_MLG5 pllmulg.bit._MLG5
\r
13404 #define PLLMULG_MLG4 pllmulg.bit._MLG4
\r
13405 #define PLLMULG_MLG3 pllmulg.bit._MLG3
\r
13406 #define PLLMULG_MLG2 pllmulg.bit._MLG2
\r
13407 #define PLLMULG_MLG1 pllmulg.bit._MLG1
\r
13408 #define PLLMULG_MLG0 pllmulg.bit._MLG0
\r
13409 #define PLLMULG_MLG pllmulg.bitc._MLG
\r
13410 __IO_EXTERN PLLCTRLSTR pllctrl;
\r
13411 #define PLLCTRL pllctrl.byte
\r
13412 #define PLLCTRL_IEDN pllctrl.bit._IEDN
\r
13413 #define PLLCTRL_GRDN pllctrl.bit._GRDN
\r
13414 #define PLLCTRL_IEUP pllctrl.bit._IEUP
\r
13415 #define PLLCTRL_GRUP pllctrl.bit._GRUP
\r
13416 __IO_EXTERN OSCC1STR oscc1; /* Main/Sub Oscillator Control */
\r
13417 #define OSCC1 oscc1.byte
\r
13418 #define OSCC1_FCI oscc1.bit._FCI
\r
13419 #define OSCC1_RFBEN oscc1.bit._RFBEN
\r
13420 #define OSCC1_OSCR oscc1.bit._OSCR
\r
13421 __IO_EXTERN OSCS1STR oscs1;
\r
13422 #define OSCS1 oscs1.byte
\r
13423 #define OSCS1_OSCS7 oscs1.bit._OSCS7
\r
13424 #define OSCS1_OSCS6 oscs1.bit._OSCS6
\r
13425 #define OSCS1_OSCS5 oscs1.bit._OSCS5
\r
13426 #define OSCS1_OSCS4 oscs1.bit._OSCS4
\r
13427 #define OSCS1_OSCS3 oscs1.bit._OSCS3
\r
13428 #define OSCS1_OSCS2 oscs1.bit._OSCS2
\r
13429 #define OSCS1_OSCS1 oscs1.bit._OSCS1
\r
13430 #define OSCS1_OSCS0 oscs1.bit._OSCS0
\r
13431 __IO_EXTERN OSCC2STR oscc2;
\r
13432 #define OSCC2 oscc2.byte
\r
13433 #define OSCC2_FCI oscc2.bit._FCI
\r
13434 #define OSCC2_RFBEN oscc2.bit._RFBEN
\r
13435 #define OSCC2_OSCR oscc2.bit._OSCR
\r
13436 __IO_EXTERN OSCS2STR oscs2;
\r
13437 #define OSCS2 oscs2.byte
\r
13438 #define OSCS2_OSCS7 oscs2.bit._OSCS7
\r
13439 #define OSCS2_OSCS6 oscs2.bit._OSCS6
\r
13440 #define OSCS2_OSCS5 oscs2.bit._OSCS5
\r
13441 #define OSCS2_OSCS4 oscs2.bit._OSCS4
\r
13442 #define OSCS2_OSCS3 oscs2.bit._OSCS3
\r
13443 #define OSCS2_OSCS2 oscs2.bit._OSCS2
\r
13444 #define OSCS2_OSCS1 oscs2.bit._OSCS1
\r
13445 #define OSCS2_OSCS0 oscs2.bit._OSCS0
\r
13446 __IO_EXTERN PORTENSTR porten; /* Port Input Enable Control */
\r
13447 #define PORTEN porten.byte
\r
13448 #define PORTEN_CPORTEN porten.bit._CPORTEN
\r
13449 #define PORTEN_GPORTEN porten.bit._GPORTEN
\r
13450 __IO_EXTERN WTCERSTR wtcer; /* Real Time Clock (Watch Timer) */
\r
13451 #define WTCER wtcer.byte
\r
13452 #define WTCER_INTE4 wtcer.bit._INTE4
\r
13453 #define WTCER_INT4 wtcer.bit._INT4
\r
13454 __IO_EXTERN WTCRSTR wtcr;
\r
13455 #define WTCR wtcr.word
\r
13456 #define WTCR_INTE3 wtcr.bit._INTE3
\r
13457 #define WTCR_INT3 wtcr.bit._INT3
\r
13458 #define WTCR_INTE2 wtcr.bit._INTE2
\r
13459 #define WTCR_INT2 wtcr.bit._INT2
\r
13460 #define WTCR_INTE1 wtcr.bit._INTE1
\r
13461 #define WTCR_INT1 wtcr.bit._INT1
\r
13462 #define WTCR_INTE0 wtcr.bit._INTE0
\r
13463 #define WTCR_INT0 wtcr.bit._INT0
\r
13464 #define WTCR_RUN wtcr.bit._RUN
\r
13465 #define WTCR_UPDT wtcr.bit._UPDT
\r
13466 #define WTCR_ST wtcr.bit._ST
\r
13467 __IO_EXTERN WTBRSTR wtbr;
\r
13468 #define WTBR wtbr.lword
\r
13469 #define WTBR_D20 wtbr.bit._D20
\r
13470 #define WTBR_D19 wtbr.bit._D19
\r
13471 #define WTBR_D18 wtbr.bit._D18
\r
13472 #define WTBR_D17 wtbr.bit._D17
\r
13473 #define WTBR_D16 wtbr.bit._D16
\r
13474 #define WTBR_D15 wtbr.bit._D15
\r
13475 #define WTBR_D14 wtbr.bit._D14
\r
13476 #define WTBR_D13 wtbr.bit._D13
\r
13477 #define WTBR_D12 wtbr.bit._D12
\r
13478 #define WTBR_D11 wtbr.bit._D11
\r
13479 #define WTBR_D10 wtbr.bit._D10
\r
13480 #define WTBR_D9 wtbr.bit._D9
\r
13481 #define WTBR_D8 wtbr.bit._D8
\r
13482 #define WTBR_D7 wtbr.bit._D7
\r
13483 #define WTBR_D6 wtbr.bit._D6
\r
13484 #define WTBR_D5 wtbr.bit._D5
\r
13485 #define WTBR_D4 wtbr.bit._D4
\r
13486 #define WTBR_D3 wtbr.bit._D3
\r
13487 #define WTBR_D2 wtbr.bit._D2
\r
13488 #define WTBR_D1 wtbr.bit._D1
\r
13489 #define WTBR_D0 wtbr.bit._D0
\r
13490 __IO_EXTERN WTHRSTR wthr;
\r
13491 #define WTHR wthr.byte
\r
13492 #define WTHR_H4 wthr.bit._H4
\r
13493 #define WTHR_H3 wthr.bit._H3
\r
13494 #define WTHR_H2 wthr.bit._H2
\r
13495 #define WTHR_H1 wthr.bit._H1
\r
13496 #define WTHR_H0 wthr.bit._H0
\r
13497 __IO_EXTERN WTMRSTR wtmr;
\r
13498 #define WTMR wtmr.byte
\r
13499 #define WTMR_M5 wtmr.bit._M5
\r
13500 #define WTMR_M4 wtmr.bit._M4
\r
13501 #define WTMR_M3 wtmr.bit._M3
\r
13502 #define WTMR_M2 wtmr.bit._M2
\r
13503 #define WTMR_M1 wtmr.bit._M1
\r
13504 #define WTMR_M0 wtmr.bit._M0
\r
13505 __IO_EXTERN WTSRSTR wtsr;
\r
13506 #define WTSR wtsr.byte
\r
13507 #define WTSR_S5 wtsr.bit._S5
\r
13508 #define WTSR_S4 wtsr.bit._S4
\r
13509 #define WTSR_S3 wtsr.bit._S3
\r
13510 #define WTSR_S2 wtsr.bit._S2
\r
13511 #define WTSR_S1 wtsr.bit._S1
\r
13512 #define WTSR_S0 wtsr.bit._S0
\r
13513 __IO_EXTERN IO_BYTE csvtr; /* Clock-Supervisor / Selecor / Monitor */
\r
13514 #define CSVTR csvtr
\r
13515 __IO_EXTERN CSVCRSTR csvcr;
\r
13516 #define CSVCR csvcr.byte
\r
13517 #define CSVCR_SCKS csvcr.bit._SCKS
\r
13518 #define CSVCR_MM csvcr.bit._MM
\r
13519 #define CSVCR_SM csvcr.bit._SM
\r
13520 #define CSVCR_RCE csvcr.bit._RCE
\r
13521 #define CSVCR_MSVE csvcr.bit._MSVE
\r
13522 #define CSVCR_SSVE csvcr.bit._SSVE
\r
13523 #define CSVCR_SRST csvcr.bit._SRST
\r
13524 #define CSVCR_OUTE csvcr.bit._OUTE
\r
13525 __IO_EXTERN CSCFGSTR cscfg;
\r
13526 #define CSCFG cscfg.byte
\r
13527 #define CSCFG_EDSUEN cscfg.bit._EDSUEN
\r
13528 #define CSCFG_PLLLOCK cscfg.bit._PLLLOCK
\r
13529 #define CSCFG_RCSEL cscfg.bit._RCSEL
\r
13530 #define CSCFG_MONCKI cscfg.bit._MONCKI
\r
13531 #define CSCFG_CSC3 cscfg.bit._CSC3
\r
13532 #define CSCFG_CSC2 cscfg.bit._CSC2
\r
13533 #define CSCFG_CSC1 cscfg.bit._CSC1
\r
13534 #define CSCFG_CSC0 cscfg.bit._CSC0
\r
13535 #define CSCFG_CSC cscfg.bitc._CSC
\r
13536 __IO_EXTERN CMCFGSTR cmcfg;
\r
13537 #define CMCFG cmcfg.byte
\r
13538 #define CMCFG_CMPRE3 cmcfg.bit._CMPRE3
\r
13539 #define CMCFG_CMPRE2 cmcfg.bit._CMPRE2
\r
13540 #define CMCFG_CMPRE1 cmcfg.bit._CMPRE1
\r
13541 #define CMCFG_CMPRE0 cmcfg.bit._CMPRE0
\r
13542 #define CMCFG_CMSEL3 cmcfg.bit._CMSEL3
\r
13543 #define CMCFG_CMSEL2 cmcfg.bit._CMSEL2
\r
13544 #define CMCFG_CMSEL1 cmcfg.bit._CMSEL1
\r
13545 #define CMCFG_CMSEL0 cmcfg.bit._CMSEL0
\r
13546 #define CMCFG_CMPRE cmcfg.bitc._CMPRE
\r
13547 #define CMCFG_CMSEL cmcfg.bitc._CMSEL
\r
13548 __IO_EXTERN CUCRSTR cucr; /* Calibration Unit of Sub Oszillation */
\r
13549 #define CUCR cucr.word
\r
13550 #define CUCR_STRT cucr.bit._STRT
\r
13551 #define CUCR_INT cucr.bit._INT
\r
13552 #define CUCR_INTEN cucr.bit._INTEN
\r
13553 __IO_EXTERN CUTDSTR cutd;
\r
13554 #define CUTD cutd.word
\r
13555 #define CUTD_TDD15 cutd.bit._TDD15
\r
13556 #define CUTD_TDD14 cutd.bit._TDD14
\r
13557 #define CUTD_TDD13 cutd.bit._TDD13
\r
13558 #define CUTD_TDD12 cutd.bit._TDD12
\r
13559 #define CUTD_TDD11 cutd.bit._TDD11
\r
13560 #define CUTD_TDD10 cutd.bit._TDD10
\r
13561 #define CUTD_TDD9 cutd.bit._TDD9
\r
13562 #define CUTD_TDD8 cutd.bit._TDD8
\r
13563 #define CUTD_TDD7 cutd.bit._TDD7
\r
13564 #define CUTD_TDD6 cutd.bit._TDD6
\r
13565 #define CUTD_TDD5 cutd.bit._TDD5
\r
13566 #define CUTD_TDD4 cutd.bit._TDD4
\r
13567 #define CUTD_TDD3 cutd.bit._TDD3
\r
13568 #define CUTD_TDD2 cutd.bit._TDD2
\r
13569 #define CUTD_TDD1 cutd.bit._TDD1
\r
13570 #define CUTD_TDD0 cutd.bit._TDD0
\r
13571 __IO_EXTERN CUTR1STR cutr1;
\r
13572 #define CUTR1 cutr1.word
\r
13573 #define CUTR1_TDR23 cutr1.bit._TDR23
\r
13574 #define CUTR1_TDR22 cutr1.bit._TDR22
\r
13575 #define CUTR1_TDR21 cutr1.bit._TDR21
\r
13576 #define CUTR1_TDR20 cutr1.bit._TDR20
\r
13577 #define CUTR1_TDR19 cutr1.bit._TDR19
\r
13578 #define CUTR1_TDR18 cutr1.bit._TDR18
\r
13579 #define CUTR1_TDR17 cutr1.bit._TDR17
\r
13580 #define CUTR1_TDR16 cutr1.bit._TDR16
\r
13581 __IO_EXTERN CUTR2STR cutr2;
\r
13582 #define CUTR2 cutr2.word
\r
13583 #define CUTR2_TDR15 cutr2.bit._TDR15
\r
13584 #define CUTR2_TDR14 cutr2.bit._TDR14
\r
13585 #define CUTR2_TDR13 cutr2.bit._TDR13
\r
13586 #define CUTR2_TDR12 cutr2.bit._TDR12
\r
13587 #define CUTR2_TDR11 cutr2.bit._TDR11
\r
13588 #define CUTR2_TDR10 cutr2.bit._TDR10
\r
13589 #define CUTR2_TDR9 cutr2.bit._TDR9
\r
13590 #define CUTR2_TDR8 cutr2.bit._TDR8
\r
13591 #define CUTR2_TDR7 cutr2.bit._TDR7
\r
13592 #define CUTR2_TDR6 cutr2.bit._TDR6
\r
13593 #define CUTR2_TDR5 cutr2.bit._TDR5
\r
13594 #define CUTR2_TDR4 cutr2.bit._TDR4
\r
13595 #define CUTR2_TDR3 cutr2.bit._TDR3
\r
13596 #define CUTR2_TDR2 cutr2.bit._TDR2
\r
13597 #define CUTR2_TDR1 cutr2.bit._TDR1
\r
13598 #define CUTR2_TDR0 cutr2.bit._TDR0
\r
13599 __IO_EXTERN CMPRSTR cmpr; /* Clock Modulator */
\r
13600 #define CMPR cmpr.word
\r
13601 #define CMPR_MP13 cmpr.bit._MP13
\r
13602 #define CMPR_MP12 cmpr.bit._MP12
\r
13603 #define CMPR_MP11 cmpr.bit._MP11
\r
13604 #define CMPR_MP10 cmpr.bit._MP10
\r
13605 #define CMPR_MP9 cmpr.bit._MP9
\r
13606 #define CMPR_MP8 cmpr.bit._MP8
\r
13607 #define CMPR_MP7 cmpr.bit._MP7
\r
13608 #define CMPR_MP6 cmpr.bit._MP6
\r
13609 #define CMPR_MP5 cmpr.bit._MP5
\r
13610 #define CMPR_MP4 cmpr.bit._MP4
\r
13611 #define CMPR_MP3 cmpr.bit._MP3
\r
13612 #define CMPR_MP2 cmpr.bit._MP2
\r
13613 #define CMPR_MP1 cmpr.bit._MP1
\r
13614 #define CMPR_MP0 cmpr.bit._MP0
\r
13615 __IO_EXTERN CMCRSTR cmcr;
\r
13616 #define CMCR cmcr.byte
\r
13617 #define CMCR_FMODRUN cmcr.bit._FMODRUN
\r
13618 #define CMCR_FMOD cmcr.bit._FMOD
\r
13619 #define CMCR_PDX cmcr.bit._PDX
\r
13620 __IO_EXTERN IO_WORD cmt1;
\r
13621 #define CMT1 cmt1
\r
13622 __IO_EXTERN IO_WORD cmt2;
\r
13623 #define CMT2 cmt2
\r
13624 __IO_EXTERN CANPRESTR canpre; /* CAN clock control */
\r
13625 #define CANPRE canpre.byte
\r
13626 #define CANPRE_CPCKS1 canpre.bit._CPCKS1
\r
13627 #define CANPRE_CPCKS0 canpre.bit._CPCKS0
\r
13628 #define CANPRE_DVC3 canpre.bit._DVC3
\r
13629 #define CANPRE_DVC2 canpre.bit._DVC2
\r
13630 #define CANPRE_DVC1 canpre.bit._DVC1
\r
13631 #define CANPRE_DVC0 canpre.bit._DVC0
\r
13632 #define CANPRE_CPCKS canpre.bitc._CPCKS
\r
13633 #define CANPRE_DVC canpre.bitc._DVC
\r
13634 __IO_EXTERN CANCKDSTR canckd;
\r
13635 #define CANCKD canckd.byte
\r
13636 #define CANCKD_CANCKD5 canckd.bit._CANCKD5
\r
13637 #define CANCKD_CANCKD4 canckd.bit._CANCKD4
\r
13638 #define CANCKD_CANCKD3 canckd.bit._CANCKD3
\r
13639 #define CANCKD_CANCKD2 canckd.bit._CANCKD2
\r
13640 #define CANCKD_CANCKD1 canckd.bit._CANCKD1
\r
13641 #define CANCKD_CANCKD0 canckd.bit._CANCKD0
\r
13642 __IO_EXTERN LVSELSTR lvsel; /* LV Detection / Hardware-Watchdog */
\r
13643 #define LVSEL lvsel.byte
\r
13644 #define LVSEL_LVESEL3 lvsel.bit._LVESEL3
\r
13645 #define LVSEL_LVESEL2 lvsel.bit._LVESEL2
\r
13646 #define LVSEL_LVESEL1 lvsel.bit._LVESEL1
\r
13647 #define LVSEL_LVESEL0 lvsel.bit._LVESEL0
\r
13648 #define LVSEL_LVISEL3 lvsel.bit._LVISEL3
\r
13649 #define LVSEL_LVISEL2 lvsel.bit._LVISEL2
\r
13650 #define LVSEL_LVISEL1 lvsel.bit._LVISEL1
\r
13651 #define LVSEL_LVISEL0 lvsel.bit._LVISEL0
\r
13652 #define LVSEL_LVESEL lvsel.bitc._LVESEL
\r
13653 #define LVSEL_LVISEL lvsel.bitc._LVISEL
\r
13654 __IO_EXTERN LVDETSTR lvdet;
\r
13655 #define LVDET lvdet.byte
\r
13656 #define LVDET_LVSEL lvdet.bit._LVSEL
\r
13657 #define LVDET_LVEPD lvdet.bit._LVEPD
\r
13658 #define LVDET_LVIPD lvdet.bit._LVIPD
\r
13659 #define LVDET_LVREN lvdet.bit._LVREN
\r
13660 #define LVDET_LVIEN lvdet.bit._LVIEN
\r
13661 #define LVDET_LVIRQ lvdet.bit._LVIRQ
\r
13662 __IO_EXTERN HWWDESTR hwwde;
\r
13663 #define HWWDE hwwde.byte
\r
13664 #define HWWDE_ED1 hwwde.bit._ED1
\r
13665 #define HWWDE_ED0 hwwde.bit._ED0
\r
13666 #define HWWDE_ED hwwde.bitc._ED
\r
13667 __IO_EXTERN HWWDSTR hwwd;
\r
13668 #define HWWD hwwd.byte
\r
13669 #define HWWD_CL hwwd.bit._CL
\r
13670 #define HWWD_CPUF hwwd.bit._CPUF
\r
13671 __IO_EXTERN OSCRHSTR oscrh; /* Main-/Sub-Oscillatio Stabilization Timer */
\r
13672 #define OSCRH oscrh.byte
\r
13673 #define OSCRH_WIF oscrh.bit._WIF
\r
13674 #define OSCRH_WIE oscrh.bit._WIE
\r
13675 #define OSCRH_WEN oscrh.bit._WEN
\r
13676 #define OSCRH_WS1 oscrh.bit._WS1
\r
13677 #define OSCRH_WS0 oscrh.bit._WS0
\r
13678 #define OSCRH_WCL oscrh.bit._WCL
\r
13679 #define OSCRH_WS oscrh.bitc._WS
\r
13680 __IO_EXTERN IO_BYTE oscrl;
\r
13681 #define OSCRL oscrl
\r
13682 __IO_EXTERN WPCRHSTR wpcrh;
\r
13683 #define WPCRH wpcrh.byte
\r
13684 #define WPCRH_WIF wpcrh.bit._WIF
\r
13685 #define WPCRH_WIE wpcrh.bit._WIE
\r
13686 #define WPCRH_WEN wpcrh.bit._WEN
\r
13687 #define WPCRH_WS1 wpcrh.bit._WS1
\r
13688 #define WPCRH_WS0 wpcrh.bit._WS0
\r
13689 #define WPCRH_WCL wpcrh.bit._WCL
\r
13690 #define WPCRH_WS wpcrh.bitc._WS
\r
13691 __IO_EXTERN IO_BYTE wpcrl;
\r
13692 #define WPCRL wpcrl
\r
13693 __IO_EXTERN OSCCRSTR osccr; /* Main-/Sub-Oscillatio Standby Control */
\r
13694 #define OSCCR osccr.byte
\r
13695 #define OSCCR_OSCDS1 osccr.bit._OSCDS1
\r
13696 __IO_EXTERN REGSELSTR regsel;
\r
13697 #define REGSEL regsel.byte
\r
13698 #define REGSEL_FLASHSEL regsel.bit._FLASHSEL
\r
13699 #define REGSEL_MAINSEL regsel.bit._MAINSEL
\r
13700 #define REGSEL_SUBSEL3 regsel.bit._SUBSEL3
\r
13701 #define REGSEL_SUBSEL2 regsel.bit._SUBSEL2
\r
13702 #define REGSEL_SUBSEL1 regsel.bit._SUBSEL1
\r
13703 #define REGSEL_SUBSEL0 regsel.bit._SUBSEL0
\r
13704 #define REGSEL_SUBSEL regsel.bitc._SUBSEL
\r
13705 __IO_EXTERN REGCTRSTR regctr;
\r
13706 #define REGCTR regctr.byte
\r
13707 #define REGCTR_MSTBO regctr.bit._MSTBO
\r
13708 #define REGCTR_MAINKPEN regctr.bit._MAINKPEN
\r
13709 #define REGCTR_MAINDSBL regctr.bit._MAINDSBL
\r
13710 __IO_EXTERN MODRSTR modr; /* Mode Register */
\r
13711 #define MODR modr.byte
\r
13712 #define MODR_ROMA modr.bit._ROMA
\r
13713 #define MODR_WTH1 modr.bit._WTH1
\r
13714 #define MODR_WTH0 modr.bit._WTH0
\r
13715 #define MODR_WTH modr.bitc._WTH
\r
13716 __IO_EXTERN PDRD14STR pdrd14; /* R-bus Port Data Direct Read Register */
\r
13717 #define PDRD14 pdrd14.byte
\r
13718 #define PDRD14_D7 pdrd14.bit._D7
\r
13719 #define PDRD14_D6 pdrd14.bit._D6
\r
13720 #define PDRD14_D5 pdrd14.bit._D5
\r
13721 #define PDRD14_D4 pdrd14.bit._D4
\r
13722 #define PDRD14_D3 pdrd14.bit._D3
\r
13723 #define PDRD14_D2 pdrd14.bit._D2
\r
13724 #define PDRD14_D1 pdrd14.bit._D1
\r
13725 #define PDRD14_D0 pdrd14.bit._D0
\r
13726 __IO_EXTERN PDRD15STR pdrd15;
\r
13727 #define PDRD15 pdrd15.byte
\r
13728 #define PDRD15_D7 pdrd15.bit._D7
\r
13729 #define PDRD15_D6 pdrd15.bit._D6
\r
13730 #define PDRD15_D5 pdrd15.bit._D5
\r
13731 #define PDRD15_D4 pdrd15.bit._D4
\r
13732 #define PDRD15_D3 pdrd15.bit._D3
\r
13733 #define PDRD15_D2 pdrd15.bit._D2
\r
13734 #define PDRD15_D1 pdrd15.bit._D1
\r
13735 #define PDRD15_D0 pdrd15.bit._D0
\r
13736 __IO_EXTERN PDRD16STR pdrd16;
\r
13737 #define PDRD16 pdrd16.byte
\r
13738 #define PDRD16_D7 pdrd16.bit._D7
\r
13739 #define PDRD16_D6 pdrd16.bit._D6
\r
13740 #define PDRD16_D5 pdrd16.bit._D5
\r
13741 #define PDRD16_D4 pdrd16.bit._D4
\r
13742 #define PDRD16_D3 pdrd16.bit._D3
\r
13743 #define PDRD16_D2 pdrd16.bit._D2
\r
13744 #define PDRD16_D1 pdrd16.bit._D1
\r
13745 #define PDRD16_D0 pdrd16.bit._D0
\r
13746 __IO_EXTERN PDRD17STR pdrd17;
\r
13747 #define PDRD17 pdrd17.byte
\r
13748 #define PDRD17_D7 pdrd17.bit._D7
\r
13749 #define PDRD17_D6 pdrd17.bit._D6
\r
13750 #define PDRD17_D5 pdrd17.bit._D5
\r
13751 #define PDRD17_D4 pdrd17.bit._D4
\r
13752 #define PDRD17_D3 pdrd17.bit._D3
\r
13753 #define PDRD17_D2 pdrd17.bit._D2
\r
13754 #define PDRD17_D1 pdrd17.bit._D1
\r
13755 #define PDRD17_D0 pdrd17.bit._D0
\r
13756 __IO_EXTERN PDRD18STR pdrd18;
\r
13757 #define PDRD18 pdrd18.byte
\r
13758 #define PDRD18_D6 pdrd18.bit._D6
\r
13759 #define PDRD18_D2 pdrd18.bit._D2
\r
13760 __IO_EXTERN PDRD19STR pdrd19;
\r
13761 #define PDRD19 pdrd19.byte
\r
13762 #define PDRD19_D6 pdrd19.bit._D6
\r
13763 #define PDRD19_D2 pdrd19.bit._D2
\r
13764 #define PDRD19_D1 pdrd19.bit._D1
\r
13765 #define PDRD19_D0 pdrd19.bit._D0
\r
13766 __IO_EXTERN PDRD20STR pdrd20;
\r
13767 #define PDRD20 pdrd20.byte
\r
13768 #define PDRD20_D7 pdrd20.bit._D7
\r
13769 #define PDRD20_D6 pdrd20.bit._D6
\r
13770 #define PDRD20_D5 pdrd20.bit._D5
\r
13771 #define PDRD20_D4 pdrd20.bit._D4
\r
13772 #define PDRD20_D3 pdrd20.bit._D3
\r
13773 #define PDRD20_D2 pdrd20.bit._D2
\r
13774 #define PDRD20_D1 pdrd20.bit._D1
\r
13775 #define PDRD20_D0 pdrd20.bit._D0
\r
13776 __IO_EXTERN PDRD21STR pdrd21;
\r
13777 #define PDRD21 pdrd21.byte
\r
13778 #define PDRD21_D7 pdrd21.bit._D7
\r
13779 #define PDRD21_D6 pdrd21.bit._D6
\r
13780 #define PDRD21_D5 pdrd21.bit._D5
\r
13781 #define PDRD21_D4 pdrd21.bit._D4
\r
13782 #define PDRD21_D3 pdrd21.bit._D3
\r
13783 #define PDRD21_D2 pdrd21.bit._D2
\r
13784 #define PDRD21_D1 pdrd21.bit._D1
\r
13785 #define PDRD21_D0 pdrd21.bit._D0
\r
13786 __IO_EXTERN PDRD22STR pdrd22;
\r
13787 #define PDRD22 pdrd22.byte
\r
13788 #define PDRD22_D5 pdrd22.bit._D5
\r
13789 #define PDRD22_D4 pdrd22.bit._D4
\r
13790 #define PDRD22_D1 pdrd22.bit._D1
\r
13791 #define PDRD22_D0 pdrd22.bit._D0
\r
13792 __IO_EXTERN PDRD24STR pdrd24;
\r
13793 #define PDRD24 pdrd24.byte
\r
13794 #define PDRD24_D7 pdrd24.bit._D7
\r
13795 #define PDRD24_D6 pdrd24.bit._D6
\r
13796 #define PDRD24_D5 pdrd24.bit._D5
\r
13797 #define PDRD24_D4 pdrd24.bit._D4
\r
13798 #define PDRD24_D3 pdrd24.bit._D3
\r
13799 #define PDRD24_D2 pdrd24.bit._D2
\r
13800 #define PDRD24_D1 pdrd24.bit._D1
\r
13801 #define PDRD24_D0 pdrd24.bit._D0
\r
13802 __IO_EXTERN PDRD26STR pdrd26;
\r
13803 #define PDRD26 pdrd26.byte
\r
13804 #define PDRD26_D1 pdrd26.bit._D1
\r
13805 #define PDRD26_D0 pdrd26.bit._D0
\r
13806 __IO_EXTERN PDRD27STR pdrd27;
\r
13807 #define PDRD27 pdrd27.byte
\r
13808 #define PDRD27_D7 pdrd27.bit._D7
\r
13809 #define PDRD27_D6 pdrd27.bit._D6
\r
13810 #define PDRD27_D5 pdrd27.bit._D5
\r
13811 #define PDRD27_D4 pdrd27.bit._D4
\r
13812 #define PDRD27_D3 pdrd27.bit._D3
\r
13813 #define PDRD27_D2 pdrd27.bit._D2
\r
13814 #define PDRD27_D1 pdrd27.bit._D1
\r
13815 #define PDRD27_D0 pdrd27.bit._D0
\r
13816 __IO_EXTERN PDRD28STR pdrd28;
\r
13817 #define PDRD28 pdrd28.byte
\r
13818 #define PDRD28_D7 pdrd28.bit._D7
\r
13819 #define PDRD28_D6 pdrd28.bit._D6
\r
13820 #define PDRD28_D5 pdrd28.bit._D5
\r
13821 #define PDRD28_D4 pdrd28.bit._D4
\r
13822 #define PDRD28_D3 pdrd28.bit._D3
\r
13823 #define PDRD28_D2 pdrd28.bit._D2
\r
13824 #define PDRD28_D1 pdrd28.bit._D1
\r
13825 #define PDRD28_D0 pdrd28.bit._D0
\r
13826 __IO_EXTERN PDRD29STR pdrd29;
\r
13827 #define PDRD29 pdrd29.byte
\r
13828 #define PDRD29_D7 pdrd29.bit._D7
\r
13829 #define PDRD29_D6 pdrd29.bit._D6
\r
13830 #define PDRD29_D5 pdrd29.bit._D5
\r
13831 #define PDRD29_D4 pdrd29.bit._D4
\r
13832 #define PDRD29_D3 pdrd29.bit._D3
\r
13833 #define PDRD29_D2 pdrd29.bit._D2
\r
13834 #define PDRD29_D1 pdrd29.bit._D1
\r
13835 #define PDRD29_D0 pdrd29.bit._D0
\r
13836 __IO_EXTERN DDR14STR ddr14; /* R-bus Port Direction Register */
\r
13837 #define DDR14 ddr14.byte
\r
13838 #define DDR14_D7 ddr14.bit._D7
\r
13839 #define DDR14_D6 ddr14.bit._D6
\r
13840 #define DDR14_D5 ddr14.bit._D5
\r
13841 #define DDR14_D4 ddr14.bit._D4
\r
13842 #define DDR14_D3 ddr14.bit._D3
\r
13843 #define DDR14_D2 ddr14.bit._D2
\r
13844 #define DDR14_D1 ddr14.bit._D1
\r
13845 #define DDR14_D0 ddr14.bit._D0
\r
13846 __IO_EXTERN DDR15STR ddr15;
\r
13847 #define DDR15 ddr15.byte
\r
13848 #define DDR15_D7 ddr15.bit._D7
\r
13849 #define DDR15_D6 ddr15.bit._D6
\r
13850 #define DDR15_D5 ddr15.bit._D5
\r
13851 #define DDR15_D4 ddr15.bit._D4
\r
13852 #define DDR15_D3 ddr15.bit._D3
\r
13853 #define DDR15_D2 ddr15.bit._D2
\r
13854 #define DDR15_D1 ddr15.bit._D1
\r
13855 #define DDR15_D0 ddr15.bit._D0
\r
13856 __IO_EXTERN DDR16STR ddr16;
\r
13857 #define DDR16 ddr16.byte
\r
13858 #define DDR16_D7 ddr16.bit._D7
\r
13859 #define DDR16_D6 ddr16.bit._D6
\r
13860 #define DDR16_D5 ddr16.bit._D5
\r
13861 #define DDR16_D4 ddr16.bit._D4
\r
13862 #define DDR16_D3 ddr16.bit._D3
\r
13863 #define DDR16_D2 ddr16.bit._D2
\r
13864 #define DDR16_D1 ddr16.bit._D1
\r
13865 #define DDR16_D0 ddr16.bit._D0
\r
13866 __IO_EXTERN DDR17STR ddr17;
\r
13867 #define DDR17 ddr17.byte
\r
13868 #define DDR17_D7 ddr17.bit._D7
\r
13869 #define DDR17_D6 ddr17.bit._D6
\r
13870 #define DDR17_D5 ddr17.bit._D5
\r
13871 #define DDR17_D4 ddr17.bit._D4
\r
13872 #define DDR17_D3 ddr17.bit._D3
\r
13873 #define DDR17_D2 ddr17.bit._D2
\r
13874 #define DDR17_D1 ddr17.bit._D1
\r
13875 #define DDR17_D0 ddr17.bit._D0
\r
13876 __IO_EXTERN DDR18STR ddr18;
\r
13877 #define DDR18 ddr18.byte
\r
13878 #define DDR18_D6 ddr18.bit._D6
\r
13879 #define DDR18_D2 ddr18.bit._D2
\r
13880 __IO_EXTERN DDR19STR ddr19;
\r
13881 #define DDR19 ddr19.byte
\r
13882 #define DDR19_D6 ddr19.bit._D6
\r
13883 #define DDR19_D2 ddr19.bit._D2
\r
13884 #define DDR19_D1 ddr19.bit._D1
\r
13885 #define DDR19_D0 ddr19.bit._D0
\r
13886 __IO_EXTERN DDR20STR ddr20;
\r
13887 #define DDR20 ddr20.byte
\r
13888 #define DDR20_D7 ddr20.bit._D7
\r
13889 #define DDR20_D6 ddr20.bit._D6
\r
13890 #define DDR20_D5 ddr20.bit._D5
\r
13891 #define DDR20_D4 ddr20.bit._D4
\r
13892 #define DDR20_D3 ddr20.bit._D3
\r
13893 #define DDR20_D2 ddr20.bit._D2
\r
13894 #define DDR20_D1 ddr20.bit._D1
\r
13895 #define DDR20_D0 ddr20.bit._D0
\r
13896 __IO_EXTERN DDR21STR ddr21;
\r
13897 #define DDR21 ddr21.byte
\r
13898 #define DDR21_D7 ddr21.bit._D7
\r
13899 #define DDR21_D6 ddr21.bit._D6
\r
13900 #define DDR21_D5 ddr21.bit._D5
\r
13901 #define DDR21_D4 ddr21.bit._D4
\r
13902 #define DDR21_D3 ddr21.bit._D3
\r
13903 #define DDR21_D2 ddr21.bit._D2
\r
13904 #define DDR21_D1 ddr21.bit._D1
\r
13905 #define DDR21_D0 ddr21.bit._D0
\r
13906 __IO_EXTERN DDR22STR ddr22;
\r
13907 #define DDR22 ddr22.byte
\r
13908 #define DDR22_D5 ddr22.bit._D5
\r
13909 #define DDR22_D4 ddr22.bit._D4
\r
13910 #define DDR22_D1 ddr22.bit._D1
\r
13911 #define DDR22_D0 ddr22.bit._D0
\r
13912 __IO_EXTERN DDR24STR ddr24;
\r
13913 #define DDR24 ddr24.byte
\r
13914 #define DDR24_D7 ddr24.bit._D7
\r
13915 #define DDR24_D6 ddr24.bit._D6
\r
13916 #define DDR24_D5 ddr24.bit._D5
\r
13917 #define DDR24_D4 ddr24.bit._D4
\r
13918 #define DDR24_D3 ddr24.bit._D3
\r
13919 #define DDR24_D2 ddr24.bit._D2
\r
13920 #define DDR24_D1 ddr24.bit._D1
\r
13921 #define DDR24_D0 ddr24.bit._D0
\r
13922 __IO_EXTERN DDR26STR ddr26;
\r
13923 #define DDR26 ddr26.byte
\r
13924 #define DDR26_D1 ddr26.bit._D1
\r
13925 #define DDR26_D0 ddr26.bit._D0
\r
13926 __IO_EXTERN DDR27STR ddr27;
\r
13927 #define DDR27 ddr27.byte
\r
13928 #define DDR27_D7 ddr27.bit._D7
\r
13929 #define DDR27_D6 ddr27.bit._D6
\r
13930 #define DDR27_D5 ddr27.bit._D5
\r
13931 #define DDR27_D4 ddr27.bit._D4
\r
13932 #define DDR27_D3 ddr27.bit._D3
\r
13933 #define DDR27_D2 ddr27.bit._D2
\r
13934 #define DDR27_D1 ddr27.bit._D1
\r
13935 #define DDR27_D0 ddr27.bit._D0
\r
13936 __IO_EXTERN DDR28STR ddr28;
\r
13937 #define DDR28 ddr28.byte
\r
13938 #define DDR28_D7 ddr28.bit._D7
\r
13939 #define DDR28_D6 ddr28.bit._D6
\r
13940 #define DDR28_D5 ddr28.bit._D5
\r
13941 #define DDR28_D4 ddr28.bit._D4
\r
13942 #define DDR28_D3 ddr28.bit._D3
\r
13943 #define DDR28_D2 ddr28.bit._D2
\r
13944 #define DDR28_D1 ddr28.bit._D1
\r
13945 #define DDR28_D0 ddr28.bit._D0
\r
13946 __IO_EXTERN DDR29STR ddr29;
\r
13947 #define DDR29 ddr29.byte
\r
13948 #define DDR29_D7 ddr29.bit._D7
\r
13949 #define DDR29_D6 ddr29.bit._D6
\r
13950 #define DDR29_D5 ddr29.bit._D5
\r
13951 #define DDR29_D4 ddr29.bit._D4
\r
13952 #define DDR29_D3 ddr29.bit._D3
\r
13953 #define DDR29_D2 ddr29.bit._D2
\r
13954 #define DDR29_D1 ddr29.bit._D1
\r
13955 #define DDR29_D0 ddr29.bit._D0
\r
13956 __IO_EXTERN PFR14STR pfr14; /* R-bus Port Function Register */
\r
13957 #define PFR14 pfr14.byte
\r
13958 #define PFR14_D7 pfr14.bit._D7
\r
13959 #define PFR14_D6 pfr14.bit._D6
\r
13960 #define PFR14_D5 pfr14.bit._D5
\r
13961 #define PFR14_D4 pfr14.bit._D4
\r
13962 #define PFR14_D3 pfr14.bit._D3
\r
13963 #define PFR14_D2 pfr14.bit._D2
\r
13964 #define PFR14_D1 pfr14.bit._D1
\r
13965 #define PFR14_D0 pfr14.bit._D0
\r
13966 __IO_EXTERN PFR15STR pfr15;
\r
13967 #define PFR15 pfr15.byte
\r
13968 #define PFR15_D7 pfr15.bit._D7
\r
13969 #define PFR15_D6 pfr15.bit._D6
\r
13970 #define PFR15_D5 pfr15.bit._D5
\r
13971 #define PFR15_D4 pfr15.bit._D4
\r
13972 #define PFR15_D3 pfr15.bit._D3
\r
13973 #define PFR15_D2 pfr15.bit._D2
\r
13974 #define PFR15_D1 pfr15.bit._D1
\r
13975 #define PFR15_D0 pfr15.bit._D0
\r
13976 __IO_EXTERN PFR16STR pfr16;
\r
13977 #define PFR16 pfr16.byte
\r
13978 #define PFR16_D7 pfr16.bit._D7
\r
13979 #define PFR16_D6 pfr16.bit._D6
\r
13980 #define PFR16_D5 pfr16.bit._D5
\r
13981 #define PFR16_D4 pfr16.bit._D4
\r
13982 #define PFR16_D3 pfr16.bit._D3
\r
13983 #define PFR16_D2 pfr16.bit._D2
\r
13984 #define PFR16_D1 pfr16.bit._D1
\r
13985 #define PFR16_D0 pfr16.bit._D0
\r
13986 __IO_EXTERN PFR17STR pfr17;
\r
13987 #define PFR17 pfr17.byte
\r
13988 #define PFR17_D7 pfr17.bit._D7
\r
13989 #define PFR17_D6 pfr17.bit._D6
\r
13990 #define PFR17_D5 pfr17.bit._D5
\r
13991 #define PFR17_D4 pfr17.bit._D4
\r
13992 #define PFR17_D3 pfr17.bit._D3
\r
13993 #define PFR17_D2 pfr17.bit._D2
\r
13994 #define PFR17_D1 pfr17.bit._D1
\r
13995 #define PFR17_D0 pfr17.bit._D0
\r
13996 __IO_EXTERN PFR18STR pfr18;
\r
13997 #define PFR18 pfr18.byte
\r
13998 #define PFR18_D6 pfr18.bit._D6
\r
13999 #define PFR18_D2 pfr18.bit._D2
\r
14000 __IO_EXTERN PFR19STR pfr19;
\r
14001 #define PFR19 pfr19.byte
\r
14002 #define PFR19_D6 pfr19.bit._D6
\r
14003 #define PFR19_D2 pfr19.bit._D2
\r
14004 #define PFR19_D1 pfr19.bit._D1
\r
14005 #define PFR19_D0 pfr19.bit._D0
\r
14006 __IO_EXTERN PFR20STR pfr20;
\r
14007 #define PFR20 pfr20.byte
\r
14008 #define PFR20_D7 pfr20.bit._D7
\r
14009 #define PFR20_D6 pfr20.bit._D6
\r
14010 #define PFR20_D5 pfr20.bit._D5
\r
14011 #define PFR20_D4 pfr20.bit._D4
\r
14012 #define PFR20_D3 pfr20.bit._D3
\r
14013 #define PFR20_D2 pfr20.bit._D2
\r
14014 #define PFR20_D1 pfr20.bit._D1
\r
14015 #define PFR20_D0 pfr20.bit._D0
\r
14016 __IO_EXTERN PFR21STR pfr21;
\r
14017 #define PFR21 pfr21.byte
\r
14018 #define PFR21_D7 pfr21.bit._D7
\r
14019 #define PFR21_D6 pfr21.bit._D6
\r
14020 #define PFR21_D5 pfr21.bit._D5
\r
14021 #define PFR21_D4 pfr21.bit._D4
\r
14022 #define PFR21_D3 pfr21.bit._D3
\r
14023 #define PFR21_D2 pfr21.bit._D2
\r
14024 #define PFR21_D1 pfr21.bit._D1
\r
14025 #define PFR21_D0 pfr21.bit._D0
\r
14026 __IO_EXTERN PFR22STR pfr22;
\r
14027 #define PFR22 pfr22.byte
\r
14028 #define PFR22_D5 pfr22.bit._D5
\r
14029 #define PFR22_D4 pfr22.bit._D4
\r
14030 #define PFR22_D1 pfr22.bit._D1
\r
14031 #define PFR22_D0 pfr22.bit._D0
\r
14032 __IO_EXTERN PFR24STR pfr24;
\r
14033 #define PFR24 pfr24.byte
\r
14034 #define PFR24_D7 pfr24.bit._D7
\r
14035 #define PFR24_D6 pfr24.bit._D6
\r
14036 #define PFR24_D5 pfr24.bit._D5
\r
14037 #define PFR24_D4 pfr24.bit._D4
\r
14038 #define PFR24_D3 pfr24.bit._D3
\r
14039 #define PFR24_D2 pfr24.bit._D2
\r
14040 #define PFR24_D1 pfr24.bit._D1
\r
14041 #define PFR24_D0 pfr24.bit._D0
\r
14042 __IO_EXTERN PFR26STR pfr26;
\r
14043 #define PFR26 pfr26.byte
\r
14044 #define PFR26_D1 pfr26.bit._D1
\r
14045 #define PFR26_D0 pfr26.bit._D0
\r
14046 __IO_EXTERN PFR27STR pfr27;
\r
14047 #define PFR27 pfr27.byte
\r
14048 #define PFR27_D7 pfr27.bit._D7
\r
14049 #define PFR27_D6 pfr27.bit._D6
\r
14050 #define PFR27_D5 pfr27.bit._D5
\r
14051 #define PFR27_D4 pfr27.bit._D4
\r
14052 #define PFR27_D3 pfr27.bit._D3
\r
14053 #define PFR27_D2 pfr27.bit._D2
\r
14054 #define PFR27_D1 pfr27.bit._D1
\r
14055 #define PFR27_D0 pfr27.bit._D0
\r
14056 __IO_EXTERN PFR28STR pfr28;
\r
14057 #define PFR28 pfr28.byte
\r
14058 #define PFR28_D7 pfr28.bit._D7
\r
14059 #define PFR28_D6 pfr28.bit._D6
\r
14060 #define PFR28_D5 pfr28.bit._D5
\r
14061 #define PFR28_D4 pfr28.bit._D4
\r
14062 #define PFR28_D3 pfr28.bit._D3
\r
14063 #define PFR28_D2 pfr28.bit._D2
\r
14064 #define PFR28_D1 pfr28.bit._D1
\r
14065 #define PFR28_D0 pfr28.bit._D0
\r
14066 __IO_EXTERN PFR29STR pfr29;
\r
14067 #define PFR29 pfr29.byte
\r
14068 #define PFR29_D7 pfr29.bit._D7
\r
14069 #define PFR29_D6 pfr29.bit._D6
\r
14070 #define PFR29_D5 pfr29.bit._D5
\r
14071 #define PFR29_D4 pfr29.bit._D4
\r
14072 #define PFR29_D3 pfr29.bit._D3
\r
14073 #define PFR29_D2 pfr29.bit._D2
\r
14074 #define PFR29_D1 pfr29.bit._D1
\r
14075 #define PFR29_D0 pfr29.bit._D0
\r
14076 __IO_EXTERN EPFR14STR epfr14; /* R-bus Port Extra Function Register */
\r
14077 #define EPFR14 epfr14.byte
\r
14078 #define EPFR14_D7 epfr14.bit._D7
\r
14079 #define EPFR14_D6 epfr14.bit._D6
\r
14080 #define EPFR14_D5 epfr14.bit._D5
\r
14081 #define EPFR14_D4 epfr14.bit._D4
\r
14082 #define EPFR14_D3 epfr14.bit._D3
\r
14083 #define EPFR14_D2 epfr14.bit._D2
\r
14084 #define EPFR14_D1 epfr14.bit._D1
\r
14085 #define EPFR14_D0 epfr14.bit._D0
\r
14086 __IO_EXTERN EPFR15STR epfr15;
\r
14087 #define EPFR15 epfr15.byte
\r
14088 #define EPFR15_D7 epfr15.bit._D7
\r
14089 #define EPFR15_D6 epfr15.bit._D6
\r
14090 #define EPFR15_D5 epfr15.bit._D5
\r
14091 #define EPFR15_D4 epfr15.bit._D4
\r
14092 #define EPFR15_D3 epfr15.bit._D3
\r
14093 #define EPFR15_D2 epfr15.bit._D2
\r
14094 #define EPFR15_D1 epfr15.bit._D1
\r
14095 #define EPFR15_D0 epfr15.bit._D0
\r
14096 __IO_EXTERN EPFR16STR epfr16;
\r
14097 #define EPFR16 epfr16.byte
\r
14098 #define EPFR16_D7 epfr16.bit._D7
\r
14099 __IO_EXTERN IO_BYTE epfr17;
\r
14100 #define EPFR17 epfr17
\r
14101 __IO_EXTERN EPFR18STR epfr18;
\r
14102 #define EPFR18 epfr18.byte
\r
14103 #define EPFR18_D6 epfr18.bit._D6
\r
14104 #define EPFR18_D2 epfr18.bit._D2
\r
14105 __IO_EXTERN EPFR19STR epfr19;
\r
14106 #define EPFR19 epfr19.byte
\r
14107 #define EPFR19_D6 epfr19.bit._D6
\r
14108 #define EPFR19_D2 epfr19.bit._D2
\r
14109 __IO_EXTERN EPFR20STR epfr20;
\r
14110 #define EPFR20 epfr20.byte
\r
14111 #define EPFR20_D6 epfr20.bit._D6
\r
14112 #define EPFR20_D2 epfr20.bit._D2
\r
14113 __IO_EXTERN EPFR21STR epfr21;
\r
14114 #define EPFR21 epfr21.byte
\r
14115 #define EPFR21_D6 epfr21.bit._D6
\r
14116 #define EPFR21_D2 epfr21.bit._D2
\r
14117 __IO_EXTERN IO_BYTE epfr22;
\r
14118 #define EPFR22 epfr22
\r
14119 __IO_EXTERN IO_BYTE epfr24;
\r
14120 #define EPFR24 epfr24
\r
14121 __IO_EXTERN EPFR26STR epfr26;
\r
14122 #define EPFR26 epfr26.byte
\r
14123 #define EPFR26_D1 epfr26.bit._D1
\r
14124 #define EPFR26_D0 epfr26.bit._D0
\r
14125 __IO_EXTERN EPFR27STR epfr27;
\r
14126 #define EPFR27 epfr27.byte
\r
14127 #define EPFR27_D7 epfr27.bit._D7
\r
14128 #define EPFR27_D6 epfr27.bit._D6
\r
14129 #define EPFR27_D5 epfr27.bit._D5
\r
14130 #define EPFR27_D4 epfr27.bit._D4
\r
14131 #define EPFR27_D3 epfr27.bit._D3
\r
14132 #define EPFR27_D2 epfr27.bit._D2
\r
14133 #define EPFR27_D1 epfr27.bit._D1
\r
14134 #define EPFR27_D0 epfr27.bit._D0
\r
14135 __IO_EXTERN IO_BYTE epfr29;
\r
14136 #define EPFR29 epfr29
\r
14137 __IO_EXTERN PODR14STR podr14; /* R-bus Port Output Drive Select Register */
\r
14138 #define PODR14 podr14.byte
\r
14139 #define PODR14_D7 podr14.bit._D7
\r
14140 #define PODR14_D6 podr14.bit._D6
\r
14141 #define PODR14_D5 podr14.bit._D5
\r
14142 #define PODR14_D4 podr14.bit._D4
\r
14143 #define PODR14_D3 podr14.bit._D3
\r
14144 #define PODR14_D2 podr14.bit._D2
\r
14145 #define PODR14_D1 podr14.bit._D1
\r
14146 #define PODR14_D0 podr14.bit._D0
\r
14147 __IO_EXTERN PODR15STR podr15;
\r
14148 #define PODR15 podr15.byte
\r
14149 #define PODR15_D7 podr15.bit._D7
\r
14150 #define PODR15_D6 podr15.bit._D6
\r
14151 #define PODR15_D5 podr15.bit._D5
\r
14152 #define PODR15_D4 podr15.bit._D4
\r
14153 #define PODR15_D3 podr15.bit._D3
\r
14154 #define PODR15_D2 podr15.bit._D2
\r
14155 #define PODR15_D1 podr15.bit._D1
\r
14156 #define PODR15_D0 podr15.bit._D0
\r
14157 __IO_EXTERN PODR16STR podr16;
\r
14158 #define PODR16 podr16.byte
\r
14159 #define PODR16_D7 podr16.bit._D7
\r
14160 #define PODR16_D6 podr16.bit._D6
\r
14161 #define PODR16_D5 podr16.bit._D5
\r
14162 #define PODR16_D4 podr16.bit._D4
\r
14163 #define PODR16_D3 podr16.bit._D3
\r
14164 #define PODR16_D2 podr16.bit._D2
\r
14165 #define PODR16_D1 podr16.bit._D1
\r
14166 #define PODR16_D0 podr16.bit._D0
\r
14167 __IO_EXTERN PODR17STR podr17;
\r
14168 #define PODR17 podr17.byte
\r
14169 #define PODR17_D7 podr17.bit._D7
\r
14170 #define PODR17_D6 podr17.bit._D6
\r
14171 #define PODR17_D5 podr17.bit._D5
\r
14172 #define PODR17_D4 podr17.bit._D4
\r
14173 #define PODR17_D3 podr17.bit._D3
\r
14174 #define PODR17_D2 podr17.bit._D2
\r
14175 #define PODR17_D1 podr17.bit._D1
\r
14176 #define PODR17_D0 podr17.bit._D0
\r
14177 __IO_EXTERN PODR18STR podr18;
\r
14178 #define PODR18 podr18.byte
\r
14179 #define PODR18_D6 podr18.bit._D6
\r
14180 #define PODR18_D2 podr18.bit._D2
\r
14181 __IO_EXTERN PODR19STR podr19;
\r
14182 #define PODR19 podr19.byte
\r
14183 #define PODR19_D6 podr19.bit._D6
\r
14184 #define PODR19_D2 podr19.bit._D2
\r
14185 #define PODR19_D1 podr19.bit._D1
\r
14186 #define PODR19_D0 podr19.bit._D0
\r
14187 __IO_EXTERN PODR20STR podr20;
\r
14188 #define PODR20 podr20.byte
\r
14189 #define PODR20_D7 podr20.bit._D7
\r
14190 #define PODR20_D6 podr20.bit._D6
\r
14191 #define PODR20_D5 podr20.bit._D5
\r
14192 #define PODR20_D4 podr20.bit._D4
\r
14193 #define PODR20_D3 podr20.bit._D3
\r
14194 #define PODR20_D2 podr20.bit._D2
\r
14195 #define PODR20_D1 podr20.bit._D1
\r
14196 #define PODR20_D0 podr20.bit._D0
\r
14197 __IO_EXTERN PODR21STR podr21;
\r
14198 #define PODR21 podr21.byte
\r
14199 #define PODR21_D7 podr21.bit._D7
\r
14200 #define PODR21_D6 podr21.bit._D6
\r
14201 #define PODR21_D5 podr21.bit._D5
\r
14202 #define PODR21_D4 podr21.bit._D4
\r
14203 #define PODR21_D3 podr21.bit._D3
\r
14204 #define PODR21_D2 podr21.bit._D2
\r
14205 #define PODR21_D1 podr21.bit._D1
\r
14206 #define PODR21_D0 podr21.bit._D0
\r
14207 __IO_EXTERN PODR22STR podr22;
\r
14208 #define PODR22 podr22.byte
\r
14209 #define PODR22_D5 podr22.bit._D5
\r
14210 #define PODR22_D4 podr22.bit._D4
\r
14211 #define PODR22_D1 podr22.bit._D1
\r
14212 #define PODR22_D0 podr22.bit._D0
\r
14213 __IO_EXTERN PODR24STR podr24;
\r
14214 #define PODR24 podr24.byte
\r
14215 #define PODR24_D7 podr24.bit._D7
\r
14216 #define PODR24_D6 podr24.bit._D6
\r
14217 #define PODR24_D5 podr24.bit._D5
\r
14218 #define PODR24_D4 podr24.bit._D4
\r
14219 #define PODR24_D3 podr24.bit._D3
\r
14220 #define PODR24_D2 podr24.bit._D2
\r
14221 #define PODR24_D1 podr24.bit._D1
\r
14222 #define PODR24_D0 podr24.bit._D0
\r
14223 __IO_EXTERN PODR26STR podr26;
\r
14224 #define PODR26 podr26.byte
\r
14225 #define PODR26_D1 podr26.bit._D1
\r
14226 #define PODR26_D0 podr26.bit._D0
\r
14227 __IO_EXTERN PODR27STR podr27;
\r
14228 #define PODR27 podr27.byte
\r
14229 #define PODR27_D7 podr27.bit._D7
\r
14230 #define PODR27_D6 podr27.bit._D6
\r
14231 #define PODR27_D5 podr27.bit._D5
\r
14232 #define PODR27_D4 podr27.bit._D4
\r
14233 #define PODR27_D3 podr27.bit._D3
\r
14234 #define PODR27_D2 podr27.bit._D2
\r
14235 #define PODR27_D1 podr27.bit._D1
\r
14236 #define PODR27_D0 podr27.bit._D0
\r
14237 __IO_EXTERN PODR28STR podr28;
\r
14238 #define PODR28 podr28.byte
\r
14239 #define PODR28_D7 podr28.bit._D7
\r
14240 #define PODR28_D6 podr28.bit._D6
\r
14241 #define PODR28_D5 podr28.bit._D5
\r
14242 #define PODR28_D4 podr28.bit._D4
\r
14243 #define PODR28_D3 podr28.bit._D3
\r
14244 #define PODR28_D2 podr28.bit._D2
\r
14245 #define PODR28_D1 podr28.bit._D1
\r
14246 #define PODR28_D0 podr28.bit._D0
\r
14247 __IO_EXTERN PODR29STR podr29;
\r
14248 #define PODR29 podr29.byte
\r
14249 #define PODR29_D7 podr29.bit._D7
\r
14250 #define PODR29_D6 podr29.bit._D6
\r
14251 #define PODR29_D5 podr29.bit._D5
\r
14252 #define PODR29_D4 podr29.bit._D4
\r
14253 #define PODR29_D3 podr29.bit._D3
\r
14254 #define PODR29_D2 podr29.bit._D2
\r
14255 #define PODR29_D1 podr29.bit._D1
\r
14256 #define PODR29_D0 podr29.bit._D0
\r
14257 __IO_EXTERN PILR14STR pilr14; /* R-bus Port Input Level Select Register */
\r
14258 #define PILR14 pilr14.byte
\r
14259 #define PILR14_D7 pilr14.bit._D7
\r
14260 #define PILR14_D6 pilr14.bit._D6
\r
14261 #define PILR14_D5 pilr14.bit._D5
\r
14262 #define PILR14_D4 pilr14.bit._D4
\r
14263 #define PILR14_D3 pilr14.bit._D3
\r
14264 #define PILR14_D2 pilr14.bit._D2
\r
14265 #define PILR14_D1 pilr14.bit._D1
\r
14266 #define PILR14_D0 pilr14.bit._D0
\r
14267 __IO_EXTERN PILR15STR pilr15;
\r
14268 #define PILR15 pilr15.byte
\r
14269 #define PILR15_D7 pilr15.bit._D7
\r
14270 #define PILR15_D6 pilr15.bit._D6
\r
14271 #define PILR15_D5 pilr15.bit._D5
\r
14272 #define PILR15_D4 pilr15.bit._D4
\r
14273 #define PILR15_D3 pilr15.bit._D3
\r
14274 #define PILR15_D2 pilr15.bit._D2
\r
14275 #define PILR15_D1 pilr15.bit._D1
\r
14276 #define PILR15_D0 pilr15.bit._D0
\r
14277 __IO_EXTERN PILR16STR pilr16;
\r
14278 #define PILR16 pilr16.byte
\r
14279 #define PILR16_D7 pilr16.bit._D7
\r
14280 #define PILR16_D6 pilr16.bit._D6
\r
14281 #define PILR16_D5 pilr16.bit._D5
\r
14282 #define PILR16_D4 pilr16.bit._D4
\r
14283 #define PILR16_D3 pilr16.bit._D3
\r
14284 #define PILR16_D2 pilr16.bit._D2
\r
14285 #define PILR16_D1 pilr16.bit._D1
\r
14286 #define PILR16_D0 pilr16.bit._D0
\r
14287 __IO_EXTERN PILR17STR pilr17;
\r
14288 #define PILR17 pilr17.byte
\r
14289 #define PILR17_D7 pilr17.bit._D7
\r
14290 #define PILR17_D6 pilr17.bit._D6
\r
14291 #define PILR17_D5 pilr17.bit._D5
\r
14292 #define PILR17_D4 pilr17.bit._D4
\r
14293 #define PILR17_D3 pilr17.bit._D3
\r
14294 #define PILR17_D2 pilr17.bit._D2
\r
14295 #define PILR17_D1 pilr17.bit._D1
\r
14296 #define PILR17_D0 pilr17.bit._D0
\r
14297 __IO_EXTERN PILR18STR pilr18;
\r
14298 #define PILR18 pilr18.byte
\r
14299 #define PILR18_D6 pilr18.bit._D6
\r
14300 #define PILR18_D2 pilr18.bit._D2
\r
14301 __IO_EXTERN PILR19STR pilr19;
\r
14302 #define PILR19 pilr19.byte
\r
14303 #define PILR19_D6 pilr19.bit._D6
\r
14304 #define PILR19_D2 pilr19.bit._D2
\r
14305 #define PILR19_D1 pilr19.bit._D1
\r
14306 #define PILR19_D0 pilr19.bit._D0
\r
14307 __IO_EXTERN PILR20STR pilr20;
\r
14308 #define PILR20 pilr20.byte
\r
14309 #define PILR20_D7 pilr20.bit._D7
\r
14310 #define PILR20_D6 pilr20.bit._D6
\r
14311 #define PILR20_D5 pilr20.bit._D5
\r
14312 #define PILR20_D4 pilr20.bit._D4
\r
14313 #define PILR20_D3 pilr20.bit._D3
\r
14314 #define PILR20_D2 pilr20.bit._D2
\r
14315 #define PILR20_D1 pilr20.bit._D1
\r
14316 #define PILR20_D0 pilr20.bit._D0
\r
14317 __IO_EXTERN PILR21STR pilr21;
\r
14318 #define PILR21 pilr21.byte
\r
14319 #define PILR21_D7 pilr21.bit._D7
\r
14320 #define PILR21_D6 pilr21.bit._D6
\r
14321 #define PILR21_D5 pilr21.bit._D5
\r
14322 #define PILR21_D4 pilr21.bit._D4
\r
14323 #define PILR21_D3 pilr21.bit._D3
\r
14324 #define PILR21_D2 pilr21.bit._D2
\r
14325 #define PILR21_D1 pilr21.bit._D1
\r
14326 #define PILR21_D0 pilr21.bit._D0
\r
14327 __IO_EXTERN PILR22STR pilr22;
\r
14328 #define PILR22 pilr22.byte
\r
14329 #define PILR22_D5 pilr22.bit._D5
\r
14330 #define PILR22_D4 pilr22.bit._D4
\r
14331 #define PILR22_D1 pilr22.bit._D1
\r
14332 #define PILR22_D0 pilr22.bit._D0
\r
14333 __IO_EXTERN PILR24STR pilr24;
\r
14334 #define PILR24 pilr24.byte
\r
14335 #define PILR24_D7 pilr24.bit._D7
\r
14336 #define PILR24_D6 pilr24.bit._D6
\r
14337 #define PILR24_D5 pilr24.bit._D5
\r
14338 #define PILR24_D4 pilr24.bit._D4
\r
14339 #define PILR24_D3 pilr24.bit._D3
\r
14340 #define PILR24_D2 pilr24.bit._D2
\r
14341 #define PILR24_D1 pilr24.bit._D1
\r
14342 #define PILR24_D0 pilr24.bit._D0
\r
14343 __IO_EXTERN PILR26STR pilr26;
\r
14344 #define PILR26 pilr26.byte
\r
14345 #define PILR26_D1 pilr26.bit._D1
\r
14346 #define PILR26_D0 pilr26.bit._D0
\r
14347 __IO_EXTERN PILR27STR pilr27;
\r
14348 #define PILR27 pilr27.byte
\r
14349 #define PILR27_D7 pilr27.bit._D7
\r
14350 #define PILR27_D6 pilr27.bit._D6
\r
14351 #define PILR27_D5 pilr27.bit._D5
\r
14352 #define PILR27_D4 pilr27.bit._D4
\r
14353 #define PILR27_D3 pilr27.bit._D3
\r
14354 #define PILR27_D2 pilr27.bit._D2
\r
14355 #define PILR27_D1 pilr27.bit._D1
\r
14356 #define PILR27_D0 pilr27.bit._D0
\r
14357 __IO_EXTERN PILR28STR pilr28;
\r
14358 #define PILR28 pilr28.byte
\r
14359 #define PILR28_D7 pilr28.bit._D7
\r
14360 #define PILR28_D6 pilr28.bit._D6
\r
14361 #define PILR28_D5 pilr28.bit._D5
\r
14362 #define PILR28_D4 pilr28.bit._D4
\r
14363 #define PILR28_D3 pilr28.bit._D3
\r
14364 #define PILR28_D2 pilr28.bit._D2
\r
14365 #define PILR28_D1 pilr28.bit._D1
\r
14366 #define PILR28_D0 pilr28.bit._D0
\r
14367 __IO_EXTERN PILR29STR pilr29;
\r
14368 #define PILR29 pilr29.byte
\r
14369 #define PILR29_D7 pilr29.bit._D7
\r
14370 #define PILR29_D6 pilr29.bit._D6
\r
14371 #define PILR29_D5 pilr29.bit._D5
\r
14372 #define PILR29_D4 pilr29.bit._D4
\r
14373 #define PILR29_D3 pilr29.bit._D3
\r
14374 #define PILR29_D2 pilr29.bit._D2
\r
14375 #define PILR29_D1 pilr29.bit._D1
\r
14376 #define PILR29_D0 pilr29.bit._D0
\r
14377 __IO_EXTERN EPILR14STR epilr14; /* R-bus Port Extra Input Level Select Register */
\r
14378 #define EPILR14 epilr14.byte
\r
14379 #define EPILR14_D7 epilr14.bit._D7
\r
14380 #define EPILR14_D6 epilr14.bit._D6
\r
14381 #define EPILR14_D5 epilr14.bit._D5
\r
14382 #define EPILR14_D4 epilr14.bit._D4
\r
14383 #define EPILR14_D3 epilr14.bit._D3
\r
14384 #define EPILR14_D2 epilr14.bit._D2
\r
14385 #define EPILR14_D1 epilr14.bit._D1
\r
14386 #define EPILR14_D0 epilr14.bit._D0
\r
14387 __IO_EXTERN EPILR15STR epilr15;
\r
14388 #define EPILR15 epilr15.byte
\r
14389 #define EPILR15_D7 epilr15.bit._D7
\r
14390 #define EPILR15_D6 epilr15.bit._D6
\r
14391 #define EPILR15_D5 epilr15.bit._D5
\r
14392 #define EPILR15_D4 epilr15.bit._D4
\r
14393 #define EPILR15_D3 epilr15.bit._D3
\r
14394 #define EPILR15_D2 epilr15.bit._D2
\r
14395 #define EPILR15_D1 epilr15.bit._D1
\r
14396 #define EPILR15_D0 epilr15.bit._D0
\r
14397 __IO_EXTERN EPILR16STR epilr16;
\r
14398 #define EPILR16 epilr16.byte
\r
14399 #define EPILR16_D7 epilr16.bit._D7
\r
14400 #define EPILR16_D6 epilr16.bit._D6
\r
14401 #define EPILR16_D5 epilr16.bit._D5
\r
14402 #define EPILR16_D4 epilr16.bit._D4
\r
14403 #define EPILR16_D3 epilr16.bit._D3
\r
14404 #define EPILR16_D2 epilr16.bit._D2
\r
14405 #define EPILR16_D1 epilr16.bit._D1
\r
14406 #define EPILR16_D0 epilr16.bit._D0
\r
14407 __IO_EXTERN EPILR17STR epilr17;
\r
14408 #define EPILR17 epilr17.byte
\r
14409 #define EPILR17_D7 epilr17.bit._D7
\r
14410 #define EPILR17_D6 epilr17.bit._D6
\r
14411 #define EPILR17_D5 epilr17.bit._D5
\r
14412 #define EPILR17_D4 epilr17.bit._D4
\r
14413 #define EPILR17_D3 epilr17.bit._D3
\r
14414 #define EPILR17_D2 epilr17.bit._D2
\r
14415 #define EPILR17_D1 epilr17.bit._D1
\r
14416 #define EPILR17_D0 epilr17.bit._D0
\r
14417 __IO_EXTERN EPILR18STR epilr18;
\r
14418 #define EPILR18 epilr18.byte
\r
14419 #define EPILR18_D6 epilr18.bit._D6
\r
14420 #define EPILR18_D2 epilr18.bit._D2
\r
14421 __IO_EXTERN EPILR19STR epilr19;
\r
14422 #define EPILR19 epilr19.byte
\r
14423 #define EPILR19_D6 epilr19.bit._D6
\r
14424 #define EPILR19_D2 epilr19.bit._D2
\r
14425 #define EPILR19_D1 epilr19.bit._D1
\r
14426 #define EPILR19_D0 epilr19.bit._D0
\r
14427 __IO_EXTERN EPILR20STR epilr20;
\r
14428 #define EPILR20 epilr20.byte
\r
14429 #define EPILR20_D7 epilr20.bit._D7
\r
14430 #define EPILR20_D6 epilr20.bit._D6
\r
14431 #define EPILR20_D5 epilr20.bit._D5
\r
14432 #define EPILR20_D4 epilr20.bit._D4
\r
14433 #define EPILR20_D3 epilr20.bit._D3
\r
14434 #define EPILR20_D2 epilr20.bit._D2
\r
14435 #define EPILR20_D1 epilr20.bit._D1
\r
14436 #define EPILR20_D0 epilr20.bit._D0
\r
14437 __IO_EXTERN EPILR21STR epilr21;
\r
14438 #define EPILR21 epilr21.byte
\r
14439 #define EPILR21_D7 epilr21.bit._D7
\r
14440 #define EPILR21_D6 epilr21.bit._D6
\r
14441 #define EPILR21_D5 epilr21.bit._D5
\r
14442 #define EPILR21_D4 epilr21.bit._D4
\r
14443 #define EPILR21_D3 epilr21.bit._D3
\r
14444 #define EPILR21_D2 epilr21.bit._D2
\r
14445 #define EPILR21_D1 epilr21.bit._D1
\r
14446 #define EPILR21_D0 epilr21.bit._D0
\r
14447 __IO_EXTERN EPILR22STR epilr22;
\r
14448 #define EPILR22 epilr22.byte
\r
14449 #define EPILR22_D5 epilr22.bit._D5
\r
14450 #define EPILR22_D4 epilr22.bit._D4
\r
14451 #define EPILR22_D1 epilr22.bit._D1
\r
14452 #define EPILR22_D0 epilr22.bit._D0
\r
14453 __IO_EXTERN EPILR24STR epilr24;
\r
14454 #define EPILR24 epilr24.byte
\r
14455 #define EPILR24_D7 epilr24.bit._D7
\r
14456 #define EPILR24_D6 epilr24.bit._D6
\r
14457 #define EPILR24_D5 epilr24.bit._D5
\r
14458 #define EPILR24_D4 epilr24.bit._D4
\r
14459 #define EPILR24_D3 epilr24.bit._D3
\r
14460 #define EPILR24_D2 epilr24.bit._D2
\r
14461 #define EPILR24_D1 epilr24.bit._D1
\r
14462 #define EPILR24_D0 epilr24.bit._D0
\r
14463 __IO_EXTERN EPILR26STR epilr26;
\r
14464 #define EPILR26 epilr26.byte
\r
14465 #define EPILR26_D1 epilr26.bit._D1
\r
14466 #define EPILR26_D0 epilr26.bit._D0
\r
14467 __IO_EXTERN EPILR27STR epilr27;
\r
14468 #define EPILR27 epilr27.byte
\r
14469 #define EPILR27_D7 epilr27.bit._D7
\r
14470 #define EPILR27_D6 epilr27.bit._D6
\r
14471 #define EPILR27_D5 epilr27.bit._D5
\r
14472 #define EPILR27_D4 epilr27.bit._D4
\r
14473 #define EPILR27_D3 epilr27.bit._D3
\r
14474 #define EPILR27_D2 epilr27.bit._D2
\r
14475 #define EPILR27_D1 epilr27.bit._D1
\r
14476 #define EPILR27_D0 epilr27.bit._D0
\r
14477 __IO_EXTERN EPILR28STR epilr28;
\r
14478 #define EPILR28 epilr28.byte
\r
14479 #define EPILR28_D7 epilr28.bit._D7
\r
14480 #define EPILR28_D6 epilr28.bit._D6
\r
14481 #define EPILR28_D5 epilr28.bit._D5
\r
14482 #define EPILR28_D4 epilr28.bit._D4
\r
14483 #define EPILR28_D3 epilr28.bit._D3
\r
14484 #define EPILR28_D2 epilr28.bit._D2
\r
14485 #define EPILR28_D1 epilr28.bit._D1
\r
14486 #define EPILR28_D0 epilr28.bit._D0
\r
14487 __IO_EXTERN EPILR29STR epilr29;
\r
14488 #define EPILR29 epilr29.byte
\r
14489 #define EPILR29_D7 epilr29.bit._D7
\r
14490 #define EPILR29_D6 epilr29.bit._D6
\r
14491 #define EPILR29_D5 epilr29.bit._D5
\r
14492 #define EPILR29_D4 epilr29.bit._D4
\r
14493 #define EPILR29_D3 epilr29.bit._D3
\r
14494 #define EPILR29_D2 epilr29.bit._D2
\r
14495 #define EPILR29_D1 epilr29.bit._D1
\r
14496 #define EPILR29_D0 epilr29.bit._D0
\r
14497 __IO_EXTERN PPER14STR pper14; /* R-bus Port Pull-Up/Down Enable Register */
\r
14498 #define PPER14 pper14.byte
\r
14499 #define PPER14_D7 pper14.bit._D7
\r
14500 #define PPER14_D6 pper14.bit._D6
\r
14501 #define PPER14_D5 pper14.bit._D5
\r
14502 #define PPER14_D4 pper14.bit._D4
\r
14503 #define PPER14_D3 pper14.bit._D3
\r
14504 #define PPER14_D2 pper14.bit._D2
\r
14505 #define PPER14_D1 pper14.bit._D1
\r
14506 #define PPER14_D0 pper14.bit._D0
\r
14507 __IO_EXTERN PPER15STR pper15;
\r
14508 #define PPER15 pper15.byte
\r
14509 #define PPER15_D7 pper15.bit._D7
\r
14510 #define PPER15_D6 pper15.bit._D6
\r
14511 #define PPER15_D5 pper15.bit._D5
\r
14512 #define PPER15_D4 pper15.bit._D4
\r
14513 #define PPER15_D3 pper15.bit._D3
\r
14514 #define PPER15_D2 pper15.bit._D2
\r
14515 #define PPER15_D1 pper15.bit._D1
\r
14516 #define PPER15_D0 pper15.bit._D0
\r
14517 __IO_EXTERN PPER16STR pper16;
\r
14518 #define PPER16 pper16.byte
\r
14519 #define PPER16_D7 pper16.bit._D7
\r
14520 #define PPER16_D6 pper16.bit._D6
\r
14521 #define PPER16_D5 pper16.bit._D5
\r
14522 #define PPER16_D4 pper16.bit._D4
\r
14523 #define PPER16_D3 pper16.bit._D3
\r
14524 #define PPER16_D2 pper16.bit._D2
\r
14525 #define PPER16_D1 pper16.bit._D1
\r
14526 #define PPER16_D0 pper16.bit._D0
\r
14527 __IO_EXTERN PPER17STR pper17;
\r
14528 #define PPER17 pper17.byte
\r
14529 #define PPER17_D7 pper17.bit._D7
\r
14530 #define PPER17_D6 pper17.bit._D6
\r
14531 #define PPER17_D5 pper17.bit._D5
\r
14532 #define PPER17_D4 pper17.bit._D4
\r
14533 #define PPER17_D3 pper17.bit._D3
\r
14534 #define PPER17_D2 pper17.bit._D2
\r
14535 #define PPER17_D1 pper17.bit._D1
\r
14536 #define PPER17_D0 pper17.bit._D0
\r
14537 __IO_EXTERN PPER18STR pper18;
\r
14538 #define PPER18 pper18.byte
\r
14539 #define PPER18_D6 pper18.bit._D6
\r
14540 #define PPER18_D2 pper18.bit._D2
\r
14541 __IO_EXTERN PPER19STR pper19;
\r
14542 #define PPER19 pper19.byte
\r
14543 #define PPER19_D6 pper19.bit._D6
\r
14544 #define PPER19_D2 pper19.bit._D2
\r
14545 #define PPER19_D1 pper19.bit._D1
\r
14546 #define PPER19_D0 pper19.bit._D0
\r
14547 __IO_EXTERN PPER20STR pper20;
\r
14548 #define PPER20 pper20.byte
\r
14549 #define PPER20_D7 pper20.bit._D7
\r
14550 #define PPER20_D6 pper20.bit._D6
\r
14551 #define PPER20_D5 pper20.bit._D5
\r
14552 #define PPER20_D4 pper20.bit._D4
\r
14553 #define PPER20_D3 pper20.bit._D3
\r
14554 #define PPER20_D2 pper20.bit._D2
\r
14555 #define PPER20_D1 pper20.bit._D1
\r
14556 #define PPER20_D0 pper20.bit._D0
\r
14557 __IO_EXTERN PPER21STR pper21;
\r
14558 #define PPER21 pper21.byte
\r
14559 #define PPER21_D7 pper21.bit._D7
\r
14560 #define PPER21_D6 pper21.bit._D6
\r
14561 #define PPER21_D5 pper21.bit._D5
\r
14562 #define PPER21_D4 pper21.bit._D4
\r
14563 #define PPER21_D3 pper21.bit._D3
\r
14564 #define PPER21_D2 pper21.bit._D2
\r
14565 #define PPER21_D1 pper21.bit._D1
\r
14566 #define PPER21_D0 pper21.bit._D0
\r
14567 __IO_EXTERN PPER22STR pper22;
\r
14568 #define PPER22 pper22.byte
\r
14569 #define PPER22_D5 pper22.bit._D5
\r
14570 #define PPER22_D4 pper22.bit._D4
\r
14571 #define PPER22_D1 pper22.bit._D1
\r
14572 #define PPER22_D0 pper22.bit._D0
\r
14573 __IO_EXTERN PPER24STR pper24;
\r
14574 #define PPER24 pper24.byte
\r
14575 #define PPER24_D7 pper24.bit._D7
\r
14576 #define PPER24_D6 pper24.bit._D6
\r
14577 #define PPER24_D5 pper24.bit._D5
\r
14578 #define PPER24_D4 pper24.bit._D4
\r
14579 #define PPER24_D3 pper24.bit._D3
\r
14580 #define PPER24_D2 pper24.bit._D2
\r
14581 #define PPER24_D1 pper24.bit._D1
\r
14582 #define PPER24_D0 pper24.bit._D0
\r
14583 __IO_EXTERN PPER26STR pper26;
\r
14584 #define PPER26 pper26.byte
\r
14585 #define PPER26_D1 pper26.bit._D1
\r
14586 #define PPER26_D0 pper26.bit._D0
\r
14587 __IO_EXTERN PPER27STR pper27;
\r
14588 #define PPER27 pper27.byte
\r
14589 #define PPER27_D7 pper27.bit._D7
\r
14590 #define PPER27_D6 pper27.bit._D6
\r
14591 #define PPER27_D5 pper27.bit._D5
\r
14592 #define PPER27_D4 pper27.bit._D4
\r
14593 #define PPER27_D3 pper27.bit._D3
\r
14594 #define PPER27_D2 pper27.bit._D2
\r
14595 #define PPER27_D1 pper27.bit._D1
\r
14596 #define PPER27_D0 pper27.bit._D0
\r
14597 __IO_EXTERN PPER28STR pper28;
\r
14598 #define PPER28 pper28.byte
\r
14599 #define PPER28_D7 pper28.bit._D7
\r
14600 #define PPER28_D6 pper28.bit._D6
\r
14601 #define PPER28_D5 pper28.bit._D5
\r
14602 #define PPER28_D4 pper28.bit._D4
\r
14603 #define PPER28_D3 pper28.bit._D3
\r
14604 #define PPER28_D2 pper28.bit._D2
\r
14605 #define PPER28_D1 pper28.bit._D1
\r
14606 #define PPER28_D0 pper28.bit._D0
\r
14607 __IO_EXTERN PPER29STR pper29;
\r
14608 #define PPER29 pper29.byte
\r
14609 #define PPER29_D7 pper29.bit._D7
\r
14610 #define PPER29_D6 pper29.bit._D6
\r
14611 #define PPER29_D5 pper29.bit._D5
\r
14612 #define PPER29_D4 pper29.bit._D4
\r
14613 #define PPER29_D3 pper29.bit._D3
\r
14614 #define PPER29_D2 pper29.bit._D2
\r
14615 #define PPER29_D1 pper29.bit._D1
\r
14616 #define PPER29_D0 pper29.bit._D0
\r
14617 __IO_EXTERN PPCR14STR ppcr14; /* R-bus Port Pull-Up/Down Control Register */
\r
14618 #define PPCR14 ppcr14.byte
\r
14619 #define PPCR14_D7 ppcr14.bit._D7
\r
14620 #define PPCR14_D6 ppcr14.bit._D6
\r
14621 #define PPCR14_D5 ppcr14.bit._D5
\r
14622 #define PPCR14_D4 ppcr14.bit._D4
\r
14623 #define PPCR14_D3 ppcr14.bit._D3
\r
14624 #define PPCR14_D2 ppcr14.bit._D2
\r
14625 #define PPCR14_D1 ppcr14.bit._D1
\r
14626 #define PPCR14_D0 ppcr14.bit._D0
\r
14627 __IO_EXTERN PPCR15STR ppcr15;
\r
14628 #define PPCR15 ppcr15.byte
\r
14629 #define PPCR15_D7 ppcr15.bit._D7
\r
14630 #define PPCR15_D6 ppcr15.bit._D6
\r
14631 #define PPCR15_D5 ppcr15.bit._D5
\r
14632 #define PPCR15_D4 ppcr15.bit._D4
\r
14633 #define PPCR15_D3 ppcr15.bit._D3
\r
14634 #define PPCR15_D2 ppcr15.bit._D2
\r
14635 #define PPCR15_D1 ppcr15.bit._D1
\r
14636 #define PPCR15_D0 ppcr15.bit._D0
\r
14637 __IO_EXTERN PPCR16STR ppcr16;
\r
14638 #define PPCR16 ppcr16.byte
\r
14639 #define PPCR16_D7 ppcr16.bit._D7
\r
14640 #define PPCR16_D6 ppcr16.bit._D6
\r
14641 #define PPCR16_D5 ppcr16.bit._D5
\r
14642 #define PPCR16_D4 ppcr16.bit._D4
\r
14643 #define PPCR16_D3 ppcr16.bit._D3
\r
14644 #define PPCR16_D2 ppcr16.bit._D2
\r
14645 #define PPCR16_D1 ppcr16.bit._D1
\r
14646 #define PPCR16_D0 ppcr16.bit._D0
\r
14647 __IO_EXTERN PPCR17STR ppcr17;
\r
14648 #define PPCR17 ppcr17.byte
\r
14649 #define PPCR17_D7 ppcr17.bit._D7
\r
14650 #define PPCR17_D6 ppcr17.bit._D6
\r
14651 #define PPCR17_D5 ppcr17.bit._D5
\r
14652 #define PPCR17_D4 ppcr17.bit._D4
\r
14653 #define PPCR17_D3 ppcr17.bit._D3
\r
14654 #define PPCR17_D2 ppcr17.bit._D2
\r
14655 #define PPCR17_D1 ppcr17.bit._D1
\r
14656 #define PPCR17_D0 ppcr17.bit._D0
\r
14657 __IO_EXTERN PPCR18STR ppcr18;
\r
14658 #define PPCR18 ppcr18.byte
\r
14659 #define PPCR18_D6 ppcr18.bit._D6
\r
14660 #define PPCR18_D2 ppcr18.bit._D2
\r
14661 __IO_EXTERN PPCR19STR ppcr19;
\r
14662 #define PPCR19 ppcr19.byte
\r
14663 #define PPCR19_D6 ppcr19.bit._D6
\r
14664 #define PPCR19_D2 ppcr19.bit._D2
\r
14665 #define PPCR19_D1 ppcr19.bit._D1
\r
14666 #define PPCR19_D0 ppcr19.bit._D0
\r
14667 __IO_EXTERN PPCR20STR ppcr20;
\r
14668 #define PPCR20 ppcr20.byte
\r
14669 #define PPCR20_D7 ppcr20.bit._D7
\r
14670 #define PPCR20_D6 ppcr20.bit._D6
\r
14671 #define PPCR20_D5 ppcr20.bit._D5
\r
14672 #define PPCR20_D4 ppcr20.bit._D4
\r
14673 #define PPCR20_D3 ppcr20.bit._D3
\r
14674 #define PPCR20_D2 ppcr20.bit._D2
\r
14675 #define PPCR20_D1 ppcr20.bit._D1
\r
14676 #define PPCR20_D0 ppcr20.bit._D0
\r
14677 __IO_EXTERN PPCR21STR ppcr21;
\r
14678 #define PPCR21 ppcr21.byte
\r
14679 #define PPCR21_D7 ppcr21.bit._D7
\r
14680 #define PPCR21_D6 ppcr21.bit._D6
\r
14681 #define PPCR21_D5 ppcr21.bit._D5
\r
14682 #define PPCR21_D4 ppcr21.bit._D4
\r
14683 #define PPCR21_D3 ppcr21.bit._D3
\r
14684 #define PPCR21_D2 ppcr21.bit._D2
\r
14685 #define PPCR21_D1 ppcr21.bit._D1
\r
14686 #define PPCR21_D0 ppcr21.bit._D0
\r
14687 __IO_EXTERN PPCR22STR ppcr22;
\r
14688 #define PPCR22 ppcr22.byte
\r
14689 #define PPCR22_D5 ppcr22.bit._D5
\r
14690 #define PPCR22_D4 ppcr22.bit._D4
\r
14691 #define PPCR22_D1 ppcr22.bit._D1
\r
14692 #define PPCR22_D0 ppcr22.bit._D0
\r
14693 __IO_EXTERN PPCR24STR ppcr24;
\r
14694 #define PPCR24 ppcr24.byte
\r
14695 #define PPCR24_D7 ppcr24.bit._D7
\r
14696 #define PPCR24_D6 ppcr24.bit._D6
\r
14697 #define PPCR24_D5 ppcr24.bit._D5
\r
14698 #define PPCR24_D4 ppcr24.bit._D4
\r
14699 #define PPCR24_D3 ppcr24.bit._D3
\r
14700 #define PPCR24_D2 ppcr24.bit._D2
\r
14701 #define PPCR24_D1 ppcr24.bit._D1
\r
14702 #define PPCR24_D0 ppcr24.bit._D0
\r
14703 __IO_EXTERN PPCR26STR ppcr26;
\r
14704 #define PPCR26 ppcr26.byte
\r
14705 #define PPCR26_D1 ppcr26.bit._D1
\r
14706 #define PPCR26_D0 ppcr26.bit._D0
\r
14707 __IO_EXTERN PPCR27STR ppcr27;
\r
14708 #define PPCR27 ppcr27.byte
\r
14709 #define PPCR27_D7 ppcr27.bit._D7
\r
14710 #define PPCR27_D6 ppcr27.bit._D6
\r
14711 #define PPCR27_D5 ppcr27.bit._D5
\r
14712 #define PPCR27_D4 ppcr27.bit._D4
\r
14713 #define PPCR27_D3 ppcr27.bit._D3
\r
14714 #define PPCR27_D2 ppcr27.bit._D2
\r
14715 #define PPCR27_D1 ppcr27.bit._D1
\r
14716 #define PPCR27_D0 ppcr27.bit._D0
\r
14717 __IO_EXTERN PPCR28STR ppcr28;
\r
14718 #define PPCR28 ppcr28.byte
\r
14719 #define PPCR28_D7 ppcr28.bit._D7
\r
14720 #define PPCR28_D6 ppcr28.bit._D6
\r
14721 #define PPCR28_D5 ppcr28.bit._D5
\r
14722 #define PPCR28_D4 ppcr28.bit._D4
\r
14723 #define PPCR28_D3 ppcr28.bit._D3
\r
14724 #define PPCR28_D2 ppcr28.bit._D2
\r
14725 #define PPCR28_D1 ppcr28.bit._D1
\r
14726 #define PPCR28_D0 ppcr28.bit._D0
\r
14727 __IO_EXTERN PPCR29STR ppcr29;
\r
14728 #define PPCR29 ppcr29.byte
\r
14729 #define PPCR29_D7 ppcr29.bit._D7
\r
14730 #define PPCR29_D6 ppcr29.bit._D6
\r
14731 #define PPCR29_D5 ppcr29.bit._D5
\r
14732 #define PPCR29_D4 ppcr29.bit._D4
\r
14733 #define PPCR29_D3 ppcr29.bit._D3
\r
14734 #define PPCR29_D2 ppcr29.bit._D2
\r
14735 #define PPCR29_D1 ppcr29.bit._D1
\r
14736 #define PPCR29_D0 ppcr29.bit._D0
\r
14737 __IO_EXTERN IO_LWORD dmasa0; /* DMAC */
\r
14738 #define DMASA0 dmasa0
\r
14739 __IO_EXTERN IO_LWORD dmada0;
\r
14740 #define DMADA0 dmada0
\r
14741 __IO_EXTERN IO_LWORD dmasa1;
\r
14742 #define DMASA1 dmasa1
\r
14743 __IO_EXTERN IO_LWORD dmada1;
\r
14744 #define DMADA1 dmada1
\r
14745 __IO_EXTERN IO_LWORD dmasa2;
\r
14746 #define DMASA2 dmasa2
\r
14747 __IO_EXTERN IO_LWORD dmada2;
\r
14748 #define DMADA2 dmada2
\r
14749 __IO_EXTERN IO_LWORD dmasa3;
\r
14750 #define DMASA3 dmasa3
\r
14751 __IO_EXTERN IO_LWORD dmada3;
\r
14752 #define DMADA3 dmada3
\r
14753 __IO_EXTERN IO_LWORD dmasa4;
\r
14754 #define DMASA4 dmasa4
\r
14755 __IO_EXTERN IO_LWORD dmada4;
\r
14756 #define DMADA4 dmada4
\r
14757 __IO_EXTERN FMCSSTR fmcs; /* Flash Memory/I-Cache Control Register */
\r
14758 #define FMCS fmcs.byte
\r
14759 #define FMCS_ASYNC fmcs.bit._ASYNC
\r
14760 #define FMCS_FIXE fmcs.bit._FIXE
\r
14761 #define FMCS_BIRE fmcs.bit._BIRE
\r
14762 #define FMCS_RDYEG fmcs.bit._RDYEG
\r
14763 #define FMCS_RDY fmcs.bit._RDY
\r
14764 #define FMCS_RDYI fmcs.bit._RDYI
\r
14765 #define FMCS_RW16 fmcs.bit._RW16
\r
14766 #define FMCS_LPM fmcs.bit._LPM
\r
14767 __IO_EXTERN FMCRSTR fmcr;
\r
14768 #define FMCR fmcr.byte
\r
14769 #define FMCR_LOCK fmcr.bit._LOCK
\r
14770 #define FMCR_PHASE fmcr.bit._PHASE
\r
14771 #define FMCR_PF2I fmcr.bit._PF2I
\r
14772 #define FMCR_RD64 fmcr.bit._RD64
\r
14773 __IO_EXTERN FCHCRSTR fchcr;
\r
14774 #define FCHCR fchcr.word
\r
14775 #define FCHCR_REN fchcr.bit._REN
\r
14776 #define FCHCR_TAGE fchcr.bit._TAGE
\r
14777 #define FCHCR_FLUSH fchcr.bit._FLUSH
\r
14778 #define FCHCR_DBEN fchcr.bit._DBEN
\r
14779 #define FCHCR_PFEN fchcr.bit._PFEN
\r
14780 #define FCHCR_PFMC fchcr.bit._PFMC
\r
14781 #define FCHCR_LOCK fchcr.bit._LOCK
\r
14782 #define FCHCR_ENAB fchcr.bit._ENAB
\r
14783 #define FCHCR_SIZE1 fchcr.bit._SIZE1
\r
14784 #define FCHCR_SIZE0 fchcr.bit._SIZE0
\r
14785 #define FCHCR_SIZE fchcr.bitc._SIZE
\r
14786 __IO_EXTERN FMWTSTR fmwt;
\r
14787 #define FMWT fmwt.word
\r
14788 #define FMWT_WTP1 fmwt.bit._WTP1
\r
14789 #define FMWT_WTP0 fmwt.bit._WTP0
\r
14790 #define FMWT_WEXH1 fmwt.bit._WEXH1
\r
14791 #define FMWT_WEXH0 fmwt.bit._WEXH0
\r
14792 #define FMWT_WTC3 fmwt.bit._WTC3
\r
14793 #define FMWT_WTC2 fmwt.bit._WTC2
\r
14794 #define FMWT_WTC1 fmwt.bit._WTC1
\r
14795 #define FMWT_WTC0 fmwt.bit._WTC0
\r
14796 #define FMWT_FRAM fmwt.bit._FRAM
\r
14797 #define FMWT_ATD2 fmwt.bit._ATD2
\r
14798 #define FMWT_ATD1 fmwt.bit._ATD1
\r
14799 #define FMWT_ATD0 fmwt.bit._ATD0
\r
14800 #define FMWT_EQ3 fmwt.bit._EQ3
\r
14801 #define FMWT_EQ2 fmwt.bit._EQ2
\r
14802 #define FMWT_EQ1 fmwt.bit._EQ1
\r
14803 #define FMWT_EQ0 fmwt.bit._EQ0
\r
14804 #define FMWT_WTP fmwt.bitc._WTP
\r
14805 #define FMWT_WEXH fmwt.bitc._WEXH
\r
14806 #define FMWT_WTC fmwt.bitc._WTC
\r
14807 #define FMWT_ATD fmwt.bitc._ATD
\r
14808 #define FMWT_EQ fmwt.bitc._EQ
\r
14809 __IO_EXTERN FMWT2STR fmwt2;
\r
14810 #define FMWT2 fmwt2.byte
\r
14811 #define FMWT2_ALEH2 fmwt2.bit._ALEH2
\r
14812 #define FMWT2_ALEH1 fmwt2.bit._ALEH1
\r
14813 #define FMWT2_ALEH0 fmwt2.bit._ALEH0
\r
14814 #define FMWT2_ALEH fmwt2.bitc._ALEH
\r
14815 __IO_EXTERN FMPSSTR fmps;
\r
14816 #define FMPS fmps.byte
\r
14817 #define FMPS_PS2 fmps.bit._PS2
\r
14818 #define FMPS_PS1 fmps.bit._PS1
\r
14819 #define FMPS_PS0 fmps.bit._PS0
\r
14820 #define FMPS_PS fmps.bitc._PS
\r
14821 __IO_EXTERN IO_LWORD fmac;
\r
14822 #define FMAC fmac
\r
14823 __IO_EXTERN IO_LWORD fcha0; /* I_Cache Nonchachable area settings Register */
\r
14824 #define FCHA0 fcha0
\r
14825 __IO_EXTERN IO_LWORD fcha1;
\r
14826 #define FCHA1 fcha1
\r
14827 __IO_EXTERN FSCR0STR fscr0; /* Flash Security Control Register */
\r
14828 #define FSCR0 fscr0.lword
\r
14829 #define FSCR0_CRC31 fscr0.bit._CRC31
\r
14830 #define FSCR0_CRC30 fscr0.bit._CRC30
\r
14831 #define FSCR0_CRC29 fscr0.bit._CRC29
\r
14832 #define FSCR0_CRC28 fscr0.bit._CRC28
\r
14833 #define FSCR0_CRC27 fscr0.bit._CRC27
\r
14834 #define FSCR0_CRC26 fscr0.bit._CRC26
\r
14835 #define FSCR0_CRC25 fscr0.bit._CRC25
\r
14836 #define FSCR0_CRC24 fscr0.bit._CRC24
\r
14837 #define FSCR0_CRC23 fscr0.bit._CRC23
\r
14838 #define FSCR0_CRC22 fscr0.bit._CRC22
\r
14839 #define FSCR0_CRC21 fscr0.bit._CRC21
\r
14840 #define FSCR0_CRC20 fscr0.bit._CRC20
\r
14841 #define FSCR0_CRC19 fscr0.bit._CRC19
\r
14842 #define FSCR0_CRC18 fscr0.bit._CRC18
\r
14843 #define FSCR0_CRC17 fscr0.bit._CRC17
\r
14844 #define FSCR0_CRC16 fscr0.bit._CRC16
\r
14845 #define FSCR0_CRC15 fscr0.bit._CRC15
\r
14846 #define FSCR0_CRC14 fscr0.bit._CRC14
\r
14847 #define FSCR0_CRC13 fscr0.bit._CRC13
\r
14848 #define FSCR0_CRC12 fscr0.bit._CRC12
\r
14849 #define FSCR0_CRC11 fscr0.bit._CRC11
\r
14850 #define FSCR0_CRC10 fscr0.bit._CRC10
\r
14851 #define FSCR0_CRC9 fscr0.bit._CRC9
\r
14852 #define FSCR0_CRC8 fscr0.bit._CRC8
\r
14853 #define FSCR0_CRC7 fscr0.bit._CRC7
\r
14854 #define FSCR0_CRC6 fscr0.bit._CRC6
\r
14855 #define FSCR0_CRC5 fscr0.bit._CRC5
\r
14856 #define FSCR0_CRC4 fscr0.bit._CRC4
\r
14857 #define FSCR0_CRC3 fscr0.bit._CRC3
\r
14858 #define FSCR0_CRC2 fscr0.bit._CRC2
\r
14859 #define FSCR0_CRC1 fscr0.bit._CRC1
\r
14860 #define FSCR0_CRC0 fscr0.bit._CRC0
\r
14861 __IO_EXTERN FSCR1STR fscr1;
\r
14862 #define FSCR1 fscr1.lword
\r
14863 #define FSCR1_RDY fscr1.bit._RDY
\r
14864 #define FSCR1_CSZ3 fscr1.bit._CSZ3
\r
14865 #define FSCR1_CSZ2 fscr1.bit._CSZ2
\r
14866 #define FSCR1_CSZ1 fscr1.bit._CSZ1
\r
14867 #define FSCR1_CSZ0 fscr1.bit._CSZ0
\r
14868 #define FSCR1_CSA15 fscr1.bit._CSA15
\r
14869 #define FSCR1_CSA14 fscr1.bit._CSA14
\r
14870 #define FSCR1_CSA13 fscr1.bit._CSA13
\r
14871 #define FSCR1_CSA12 fscr1.bit._CSA12
\r
14872 #define FSCR1_CSA11 fscr1.bit._CSA11
\r
14873 #define FSCR1_CSA10 fscr1.bit._CSA10
\r
14874 #define FSCR1_CSA9 fscr1.bit._CSA9
\r
14875 #define FSCR1_CSA8 fscr1.bit._CSA8
\r
14876 #define FSCR1_CSA7 fscr1.bit._CSA7
\r
14877 #define FSCR1_CSA6 fscr1.bit._CSA6
\r
14878 #define FSCR1_CSA5 fscr1.bit._CSA5
\r
14879 #define FSCR1_CSA4 fscr1.bit._CSA4
\r
14880 #define FSCR1_CSA3 fscr1.bit._CSA3
\r
14881 #define FSCR1_CSA2 fscr1.bit._CSA2
\r
14882 #define FSCR1_CSA1 fscr1.bit._CSA1
\r
14883 #define FSCR1_CSA0 fscr1.bit._CSA0
\r
14884 #define FSCR1_CSZ fscr1.bitc._CSZ
\r
14885 __IO_EXTERN CTRLR4STR ctrlr4; /* CAN 4 Control Register */
\r
14886 #define CTRLR4 ctrlr4.word
\r
14887 #define CTRLR4_Test ctrlr4.bit._Test
\r
14888 #define CTRLR4_CCE ctrlr4.bit._CCE
\r
14889 #define CTRLR4_DAR ctrlr4.bit._DAR
\r
14890 #define CTRLR4_EIE ctrlr4.bit._EIE
\r
14891 #define CTRLR4_SIE ctrlr4.bit._SIE
\r
14892 #define CTRLR4_IE ctrlr4.bit._IE
\r
14893 #define CTRLR4_Init ctrlr4.bit._Init
\r
14894 __IO_EXTERN STATR4STR statr4;
\r
14895 #define STATR4 statr4.word
\r
14896 #define STATR4_BOff statr4.bit._BOff
\r
14897 #define STATR4_EWarn statr4.bit._EWarn
\r
14898 #define STATR4_EPass statr4.bit._EPass
\r
14899 #define STATR4_RxOK statr4.bit._RxOK
\r
14900 #define STATR4_TxOK statr4.bit._TxOK
\r
14901 #define STATR4_LEC2 statr4.bit._LEC2
\r
14902 #define STATR4_LEC1 statr4.bit._LEC1
\r
14903 #define STATR4_LEC0 statr4.bit._LEC0
\r
14904 #define STATR4_LEC statr4.bitc._LEC
\r
14905 __IO_EXTERN ERRCNT4STR errcnt4;
\r
14906 #define ERRCNT4 errcnt4.word
\r
14907 #define ERRCNT4_RP errcnt4.bit._RP
\r
14908 #define ERRCNT4_REC6 errcnt4.bit._REC6
\r
14909 #define ERRCNT4_REC5 errcnt4.bit._REC5
\r
14910 #define ERRCNT4_REC4 errcnt4.bit._REC4
\r
14911 #define ERRCNT4_REC3 errcnt4.bit._REC3
\r
14912 #define ERRCNT4_REC2 errcnt4.bit._REC2
\r
14913 #define ERRCNT4_REC1 errcnt4.bit._REC1
\r
14914 #define ERRCNT4_REC0 errcnt4.bit._REC0
\r
14915 #define ERRCNT4_TEC7 errcnt4.bit._TEC7
\r
14916 #define ERRCNT4_TEC6 errcnt4.bit._TEC6
\r
14917 #define ERRCNT4_TEC5 errcnt4.bit._TEC5
\r
14918 #define ERRCNT4_TEC4 errcnt4.bit._TEC4
\r
14919 #define ERRCNT4_TEC3 errcnt4.bit._TEC3
\r
14920 #define ERRCNT4_TEC2 errcnt4.bit._TEC2
\r
14921 #define ERRCNT4_TEC1 errcnt4.bit._TEC1
\r
14922 #define ERRCNT4_TEC0 errcnt4.bit._TEC0
\r
14923 #define ERRCNT4_REC errcnt4.bitc._REC
\r
14924 #define ERRCNT4_TEC errcnt4.bitc._TEC
\r
14925 __IO_EXTERN BTR4STR btr4;
\r
14926 #define BTR4 btr4.word
\r
14927 #define BTR4_Tseg22 btr4.bit._Tseg22
\r
14928 #define BTR4_Tseg21 btr4.bit._Tseg21
\r
14929 #define BTR4_Tseg20 btr4.bit._Tseg20
\r
14930 #define BTR4_Tseg13 btr4.bit._Tseg13
\r
14931 #define BTR4_Tseg12 btr4.bit._Tseg12
\r
14932 #define BTR4_Tseg11 btr4.bit._Tseg11
\r
14933 #define BTR4_Tseg10 btr4.bit._Tseg10
\r
14934 #define BTR4_SJW1 btr4.bit._SJW1
\r
14935 #define BTR4_SJW0 btr4.bit._SJW0
\r
14936 #define BTR4_BRP5 btr4.bit._BRP5
\r
14937 #define BTR4_BRP4 btr4.bit._BRP4
\r
14938 #define BTR4_BRP3 btr4.bit._BRP3
\r
14939 #define BTR4_BRP2 btr4.bit._BRP2
\r
14940 #define BTR4_BRP1 btr4.bit._BRP1
\r
14941 #define BTR4_BRP0 btr4.bit._BRP0
\r
14942 #define BTR4_Tseg2 btr4.bitc._Tseg2
\r
14943 #define BTR4_Tseg1 btr4.bitc._Tseg1
\r
14944 #define BTR4_SJW btr4.bitc._SJW
\r
14945 #define BTR4_BRP btr4.bitc._BRP
\r
14946 __IO_EXTERN IO_WORD intr4;
\r
14947 #define INTR4 intr4
\r
14948 __IO_EXTERN TESTR4STR testr4;
\r
14949 #define TESTR4 testr4.word
\r
14950 #define TESTR4_Rx testr4.bit._Rx
\r
14951 #define TESTR4_Tx1 testr4.bit._Tx1
\r
14952 #define TESTR4_Tx0 testr4.bit._Tx0
\r
14953 #define TESTR4_LBack testr4.bit._LBack
\r
14954 #define TESTR4_Silent testr4.bit._Silent
\r
14955 #define TESTR4_Basic testr4.bit._Basic
\r
14956 #define TESTR4_Tx testr4.bitc._Tx
\r
14957 __IO_EXTERN BRPER4STR brper4;
\r
14958 #define BRPER4 brper4.word
\r
14959 #define BRPER4_BRPE3 brper4.bit._BRPE3
\r
14960 #define BRPER4_BRPE2 brper4.bit._BRPE2
\r
14961 #define BRPER4_BRPE1 brper4.bit._BRPE1
\r
14962 #define BRPER4_BRPE0 brper4.bit._BRPE0
\r
14963 #define BRPER4_BRPE brper4.bitc._BRPE
\r
14964 __IO_EXTERN BRPE4STR brpe4;
\r
14965 #define BRPE4 brpe4.word
\r
14966 __IO_EXTERN IF1CREQ4STR if1creq4; /* CAN 4 IF 1 */
\r
14967 #define IF1CREQ4 if1creq4.word
\r
14968 #define IF1CREQ4_Busy if1creq4.bit._Busy
\r
14969 #define IF1CREQ4_MN5 if1creq4.bit._MN5
\r
14970 #define IF1CREQ4_MN4 if1creq4.bit._MN4
\r
14971 #define IF1CREQ4_MN3 if1creq4.bit._MN3
\r
14972 #define IF1CREQ4_MN2 if1creq4.bit._MN2
\r
14973 #define IF1CREQ4_MN1 if1creq4.bit._MN1
\r
14974 #define IF1CREQ4_MN0 if1creq4.bit._MN0
\r
14975 #define IF1CREQ4_MN if1creq4.bitc._MN
\r
14976 __IO_EXTERN IF1CMSK4STR if1cmsk4;
\r
14977 #define IF1CMSK4 if1cmsk4.word
\r
14978 #define IF1CMSK4_WR if1cmsk4.bit._WR
\r
14979 #define IF1CMSK4_Mask if1cmsk4.bit._Mask
\r
14980 #define IF1CMSK4_Arb if1cmsk4.bit._Arb
\r
14981 #define IF1CMSK4_Control if1cmsk4.bit._Control
\r
14982 #define IF1CMSK4_CIP if1cmsk4.bit._CIP
\r
14983 #define IF1CMSK4_TxReq if1cmsk4.bit._TxReq
\r
14984 #define IF1CMSK4_DataA if1cmsk4.bit._DataA
\r
14985 #define IF1CMSK4_DataB if1cmsk4.bit._DataB
\r
14986 __IO_EXTERN IO_LWORD if1msk124;
\r
14987 #define IF1MSK124 if1msk124
\r
14988 __IO_EXTERN IF1MSK24STR if1msk24;
\r
14989 #define IF1MSK24 if1msk24.word
\r
14990 #define IF1MSK24_MXtd if1msk24.bit._MXtd
\r
14991 #define IF1MSK24_MDir if1msk24.bit._MDir
\r
14992 __IO_EXTERN IO_WORD if1msk14;
\r
14993 #define IF1MSK14 if1msk14
\r
14994 __IO_EXTERN IO_LWORD if1arb124;
\r
14995 #define IF1ARB124 if1arb124
\r
14996 __IO_EXTERN IF1ARB24STR if1arb24;
\r
14997 #define IF1ARB24 if1arb24.word
\r
14998 #define IF1ARB24_MsgVal if1arb24.bit._MsgVal
\r
14999 #define IF1ARB24_Xtd if1arb24.bit._Xtd
\r
15000 #define IF1ARB24_DIR if1arb24.bit._DIR
\r
15001 __IO_EXTERN IO_WORD if1arb14;
\r
15002 #define IF1ARB14 if1arb14
\r
15003 __IO_EXTERN IF1MCTR4STR if1mctr4;
\r
15004 #define IF1MCTR4 if1mctr4.word
\r
15005 #define IF1MCTR4_NewDat if1mctr4.bit._NewDat
\r
15006 #define IF1MCTR4_MsgLst if1mctr4.bit._MsgLst
\r
15007 #define IF1MCTR4_IntPnd if1mctr4.bit._IntPnd
\r
15008 #define IF1MCTR4_UMask if1mctr4.bit._UMask
\r
15009 #define IF1MCTR4_TxIE if1mctr4.bit._TxIE
\r
15010 #define IF1MCTR4_RxIE if1mctr4.bit._RxIE
\r
15011 #define IF1MCTR4_RmtEn if1mctr4.bit._RmtEn
\r
15012 #define IF1MCTR4_TxRqst if1mctr4.bit._TxRqst
\r
15013 #define IF1MCTR4_EoB if1mctr4.bit._EoB
\r
15014 #define IF1MCTR4_DLC3 if1mctr4.bit._DLC3
\r
15015 #define IF1MCTR4_DLC2 if1mctr4.bit._DLC2
\r
15016 #define IF1MCTR4_DLC1 if1mctr4.bit._DLC1
\r
15017 #define IF1MCTR4_DLC0 if1mctr4.bit._DLC0
\r
15018 #define IF1MCTR4_DLC if1mctr4.bitc._DLC
\r
15019 __IO_EXTERN IO_LWORD if1dta124;
\r
15020 #define IF1DTA124 if1dta124
\r
15021 __IO_EXTERN IO_WORD if1dta14;
\r
15022 #define IF1DTA14 if1dta14
\r
15023 __IO_EXTERN IO_WORD if1dta24;
\r
15024 #define IF1DTA24 if1dta24
\r
15025 __IO_EXTERN IO_LWORD if1dtb124;
\r
15026 #define IF1DTB124 if1dtb124
\r
15027 __IO_EXTERN IO_WORD if1dtb14;
\r
15028 #define IF1DTB14 if1dtb14
\r
15029 __IO_EXTERN IO_WORD if1dtb24;
\r
15030 #define IF1DTB24 if1dtb24
\r
15031 __IO_EXTERN IO_LWORD if1dta_swp124;
\r
15032 #define IF1DTA_SWP124 if1dta_swp124
\r
15033 __IO_EXTERN IO_WORD if1dta_swp24;
\r
15034 #define IF1DTA_SWP24 if1dta_swp24
\r
15035 __IO_EXTERN IO_WORD if1dta_swp14;
\r
15036 #define IF1DTA_SWP14 if1dta_swp14
\r
15037 __IO_EXTERN IO_LWORD if1dtb_swp124;
\r
15038 #define IF1DTB_SWP124 if1dtb_swp124
\r
15039 __IO_EXTERN IO_WORD if1dtb_swp24;
\r
15040 #define IF1DTB_SWP24 if1dtb_swp24
\r
15041 __IO_EXTERN IO_WORD if1dtb_swp14;
\r
15042 #define IF1DTB_SWP14 if1dtb_swp14
\r
15043 __IO_EXTERN IF2CREQ4STR if2creq4; /* CAN 4 IF 2 */
\r
15044 #define IF2CREQ4 if2creq4.word
\r
15045 #define IF2CREQ4_Busy if2creq4.bit._Busy
\r
15046 #define IF2CREQ4_MN5 if2creq4.bit._MN5
\r
15047 #define IF2CREQ4_MN4 if2creq4.bit._MN4
\r
15048 #define IF2CREQ4_MN3 if2creq4.bit._MN3
\r
15049 #define IF2CREQ4_MN2 if2creq4.bit._MN2
\r
15050 #define IF2CREQ4_MN1 if2creq4.bit._MN1
\r
15051 #define IF2CREQ4_MN0 if2creq4.bit._MN0
\r
15052 #define IF2CREQ4_MN if2creq4.bitc._MN
\r
15053 __IO_EXTERN IF2CMSK4STR if2cmsk4;
\r
15054 #define IF2CMSK4 if2cmsk4.word
\r
15055 #define IF2CMSK4_WR if2cmsk4.bit._WR
\r
15056 #define IF2CMSK4_Mask if2cmsk4.bit._Mask
\r
15057 #define IF2CMSK4_Arb if2cmsk4.bit._Arb
\r
15058 #define IF2CMSK4_Control if2cmsk4.bit._Control
\r
15059 #define IF2CMSK4_CIP if2cmsk4.bit._CIP
\r
15060 #define IF2CMSK4_TxReq if2cmsk4.bit._TxReq
\r
15061 #define IF2CMSK4_DataA if2cmsk4.bit._DataA
\r
15062 #define IF2CMSK4_DataB if2cmsk4.bit._DataB
\r
15063 __IO_EXTERN IO_LWORD if2msk124;
\r
15064 #define IF2MSK124 if2msk124
\r
15065 __IO_EXTERN IF2MSK24STR if2msk24;
\r
15066 #define IF2MSK24 if2msk24.word
\r
15067 #define IF2MSK24_MXtd if2msk24.bit._MXtd
\r
15068 #define IF2MSK24_MDir if2msk24.bit._MDir
\r
15069 __IO_EXTERN IO_WORD if2msk14;
\r
15070 #define IF2MSK14 if2msk14
\r
15071 __IO_EXTERN IO_LWORD if2arb124;
\r
15072 #define IF2ARB124 if2arb124
\r
15073 __IO_EXTERN IF2ARB24STR if2arb24;
\r
15074 #define IF2ARB24 if2arb24.word
\r
15075 #define IF2ARB24_MsgVal if2arb24.bit._MsgVal
\r
15076 #define IF2ARB24_Xtd if2arb24.bit._Xtd
\r
15077 #define IF2ARB24_DIR if2arb24.bit._DIR
\r
15078 __IO_EXTERN IO_WORD if2arb14;
\r
15079 #define IF2ARB14 if2arb14
\r
15080 __IO_EXTERN IF2MCTR4STR if2mctr4;
\r
15081 #define IF2MCTR4 if2mctr4.word
\r
15082 #define IF2MCTR4_NewDat if2mctr4.bit._NewDat
\r
15083 #define IF2MCTR4_MsgLst if2mctr4.bit._MsgLst
\r
15084 #define IF2MCTR4_IntPnd if2mctr4.bit._IntPnd
\r
15085 #define IF2MCTR4_UMask if2mctr4.bit._UMask
\r
15086 #define IF2MCTR4_TxIE if2mctr4.bit._TxIE
\r
15087 #define IF2MCTR4_RxIE if2mctr4.bit._RxIE
\r
15088 #define IF2MCTR4_RmtEn if2mctr4.bit._RmtEn
\r
15089 #define IF2MCTR4_TxRqst if2mctr4.bit._TxRqst
\r
15090 #define IF2MCTR4_EoB if2mctr4.bit._EoB
\r
15091 #define IF2MCTR4_DLC3 if2mctr4.bit._DLC3
\r
15092 #define IF2MCTR4_DLC2 if2mctr4.bit._DLC2
\r
15093 #define IF2MCTR4_DLC1 if2mctr4.bit._DLC1
\r
15094 #define IF2MCTR4_DLC0 if2mctr4.bit._DLC0
\r
15095 #define IF2MCTR4_DLC if2mctr4.bitc._DLC
\r
15096 __IO_EXTERN IO_LWORD if2dta124;
\r
15097 #define IF2DTA124 if2dta124
\r
15098 __IO_EXTERN IO_WORD if2dta14;
\r
15099 #define IF2DTA14 if2dta14
\r
15100 __IO_EXTERN IO_WORD if2dta24;
\r
15101 #define IF2DTA24 if2dta24
\r
15102 __IO_EXTERN IO_LWORD if2dtb124;
\r
15103 #define IF2DTB124 if2dtb124
\r
15104 __IO_EXTERN IO_WORD if2dtb14;
\r
15105 #define IF2DTB14 if2dtb14
\r
15106 __IO_EXTERN IO_WORD if2dtb24;
\r
15107 #define IF2DTB24 if2dtb24
\r
15108 __IO_EXTERN IO_LWORD if2dta_swp124;
\r
15109 #define IF2DTA_SWP124 if2dta_swp124
\r
15110 __IO_EXTERN IO_WORD if2dta_swp24;
\r
15111 #define IF2DTA_SWP24 if2dta_swp24
\r
15112 __IO_EXTERN IO_WORD if2dta_swp14;
\r
15113 #define IF2DTA_SWP14 if2dta_swp14
\r
15114 __IO_EXTERN IO_LWORD if2dtb_swp124;
\r
15115 #define IF2DTB_SWP124 if2dtb_swp124
\r
15116 __IO_EXTERN IO_WORD if2dtb_swp24;
\r
15117 #define IF2DTB_SWP24 if2dtb_swp24
\r
15118 __IO_EXTERN IO_WORD if2dtb_swp14;
\r
15119 #define IF2DTB_SWP14 if2dtb_swp14
\r
15120 __IO_EXTERN IO_LWORD treqr124; /* CAN 4 Status Flags */
\r
15121 #define TREQR124 treqr124
\r
15122 __IO_EXTERN IO_WORD treqr24;
\r
15123 #define TREQR24 treqr24
\r
15124 __IO_EXTERN IO_WORD treqr14;
\r
15125 #define TREQR14 treqr14
\r
15126 __IO_EXTERN IO_LWORD treqr344;
\r
15127 #define TREQR344 treqr344
\r
15128 __IO_EXTERN IO_LWORD newdt124;
\r
15129 #define NEWDT124 newdt124
\r
15130 __IO_EXTERN IO_WORD newdt24;
\r
15131 #define NEWDT24 newdt24
\r
15132 __IO_EXTERN IO_WORD newdt14;
\r
15133 #define NEWDT14 newdt14
\r
15134 __IO_EXTERN IO_LWORD intpnd124;
\r
15135 #define INTPND124 intpnd124
\r
15136 __IO_EXTERN IO_WORD intpnd24;
\r
15137 #define INTPND24 intpnd24
\r
15138 __IO_EXTERN IO_WORD intpnd14;
\r
15139 #define INTPND14 intpnd14
\r
15140 __IO_EXTERN IO_LWORD msgval124;
\r
15141 #define MSGVAL124 msgval124
\r
15142 __IO_EXTERN IO_WORD msgval24;
\r
15143 #define MSGVAL24 msgval24
\r
15144 __IO_EXTERN IO_WORD msgval14;
\r
15145 #define MSGVAL14 msgval14
\r
15146 __IO_EXTERN BCTRLSTR bctrl; /* EDSU/MPU Registers */
\r
15147 #define BCTRL bctrl.lword
\r
15148 #define BCTRL_SR bctrl.bit._SR
\r
15149 #define BCTRL_SW bctrl.bit._SW
\r
15150 #define BCTRL_SX bctrl.bit._SX
\r
15151 #define BCTRL_UR bctrl.bit._UR
\r
15152 #define BCTRL_UW bctrl.bit._UW
\r
15153 #define BCTRL_UX bctrl.bit._UX
\r
15154 #define BCTRL_FCPU bctrl.bit._FCPU
\r
15155 #define BCTRL_FDMA bctrl.bit._FDMA
\r
15156 #define BCTRL_EEMM bctrl.bit._EEMM
\r
15157 #define BCTRL_PFD bctrl.bit._PFD
\r
15158 #define BCTRL_SINT1 bctrl.bit._SINT1
\r
15159 #define BCTRL_SINT0 bctrl.bit._SINT0
\r
15160 #define BCTRL_EINT1 bctrl.bit._EINT1
\r
15161 #define BCTRL_EINT0 bctrl.bit._EINT0
\r
15162 #define BCTRL_EINTT bctrl.bit._EINTT
\r
15163 #define BCTRL_EINTR bctrl.bit._EINTR
\r
15164 #define BCTRL_SINT bctrl.bitc._SINT
\r
15165 #define BCTRL_EINT bctrl.bitc._EINT
\r
15166 __IO_EXTERN BSTATSTR bstat;
\r
15167 #define BSTAT bstat.lword
\r
15168 #define BSTAT_IDX4 bstat.bit._IDX4
\r
15169 #define BSTAT_IDX3 bstat.bit._IDX3
\r
15170 #define BSTAT_IDX2 bstat.bit._IDX2
\r
15171 #define BSTAT_IDX1 bstat.bit._IDX1
\r
15172 #define BSTAT_IDX0 bstat.bit._IDX0
\r
15173 #define BSTAT_CDMA bstat.bit._CDMA
\r
15174 #define BSTAT_CSZ1 bstat.bit._CSZ1
\r
15175 #define BSTAT_CSZ0 bstat.bit._CSZ0
\r
15176 #define BSTAT_CRW1 bstat.bit._CRW1
\r
15177 #define BSTAT_CRW0 bstat.bit._CRW0
\r
15178 #define BSTAT_PV bstat.bit._PV
\r
15179 #define BSTAT_RST bstat.bit._RST
\r
15180 #define BSTAT_INT1 bstat.bit._INT1
\r
15181 #define BSTAT_INT0 bstat.bit._INT0
\r
15182 #define BSTAT_INTT bstat.bit._INTT
\r
15183 #define BSTAT_INTR bstat.bit._INTR
\r
15184 #define BSTAT_IDX bstat.bitc._IDX
\r
15185 #define BSTAT_CSZ bstat.bitc._CSZ
\r
15186 #define BSTAT_CRW bstat.bitc._CRW
\r
15187 #define BSTAT_INT bstat.bitc._INT
\r
15188 __IO_EXTERN IO_LWORD biac;
\r
15189 #define BIAC biac
\r
15190 __IO_EXTERN IO_LWORD boac;
\r
15191 #define BOAC boac
\r
15192 __IO_EXTERN BIRQSTR birq;
\r
15193 #define BIRQ birq.lword
\r
15194 #define BIRQ_BD31 birq.bit._BD31
\r
15195 #define BIRQ_BD30 birq.bit._BD30
\r
15196 #define BIRQ_BD29 birq.bit._BD29
\r
15197 #define BIRQ_BD28 birq.bit._BD28
\r
15198 #define BIRQ_BD27 birq.bit._BD27
\r
15199 #define BIRQ_BD26 birq.bit._BD26
\r
15200 #define BIRQ_BD25 birq.bit._BD25
\r
15201 #define BIRQ_BD24 birq.bit._BD24
\r
15202 #define BIRQ_BD23 birq.bit._BD23
\r
15203 #define BIRQ_BD22 birq.bit._BD22
\r
15204 #define BIRQ_BD21 birq.bit._BD21
\r
15205 #define BIRQ_BD20 birq.bit._BD20
\r
15206 #define BIRQ_BD19 birq.bit._BD19
\r
15207 #define BIRQ_BD18 birq.bit._BD18
\r
15208 #define BIRQ_BD17 birq.bit._BD17
\r
15209 #define BIRQ_BD16 birq.bit._BD16
\r
15210 #define BIRQ_BD15 birq.bit._BD15
\r
15211 #define BIRQ_BD14 birq.bit._BD14
\r
15212 #define BIRQ_BD13 birq.bit._BD13
\r
15213 #define BIRQ_BD12 birq.bit._BD12
\r
15214 #define BIRQ_BD11 birq.bit._BD11
\r
15215 #define BIRQ_BD10 birq.bit._BD10
\r
15216 #define BIRQ_BD9 birq.bit._BD9
\r
15217 #define BIRQ_BD8 birq.bit._BD8
\r
15218 #define BIRQ_BD7 birq.bit._BD7
\r
15219 #define BIRQ_BD6 birq.bit._BD6
\r
15220 #define BIRQ_BD5 birq.bit._BD5
\r
15221 #define BIRQ_BD4 birq.bit._BD4
\r
15222 #define BIRQ_BD3 birq.bit._BD3
\r
15223 #define BIRQ_BD2 birq.bit._BD2
\r
15224 #define BIRQ_BD1 birq.bit._BD1
\r
15225 #define BIRQ_BD0 birq.bit._BD0
\r
15226 __IO_EXTERN BCR0STR bcr0;
\r
15227 #define BCR0 bcr0.lword
\r
15228 #define BCR0_SRX1 bcr0.bit._SRX1
\r
15229 #define BCR0_SW1 bcr0.bit._SW1
\r
15230 #define BCR0_SRX0 bcr0.bit._SRX0
\r
15231 #define BCR0_SW0 bcr0.bit._SW0
\r
15232 #define BCR0_URX1 bcr0.bit._URX1
\r
15233 #define BCR0_UW1 bcr0.bit._UW1
\r
15234 #define BCR0_URX0 bcr0.bit._URX0
\r
15235 #define BCR0_UW0 bcr0.bit._UW0
\r
15236 #define BCR0_MPE bcr0.bit._MPE
\r
15237 #define BCR0_COMB bcr0.bit._COMB
\r
15238 #define BCR0_CTC1 bcr0.bit._CTC1
\r
15239 #define BCR0_CTC0 bcr0.bit._CTC0
\r
15240 #define BCR0_OBS1 bcr0.bit._OBS1
\r
15241 #define BCR0_OBS0 bcr0.bit._OBS0
\r
15242 #define BCR0_OBT1 bcr0.bit._OBT1
\r
15243 #define BCR0_OBT0 bcr0.bit._OBT0
\r
15244 #define BCR0_EP3 bcr0.bit._EP3
\r
15245 #define BCR0_EP2 bcr0.bit._EP2
\r
15246 #define BCR0_EP1 bcr0.bit._EP1
\r
15247 #define BCR0_EP0 bcr0.bit._EP0
\r
15248 #define BCR0_EM1 bcr0.bit._EM1
\r
15249 #define BCR0_EM0 bcr0.bit._EM0
\r
15250 #define BCR0_ER1 bcr0.bit._ER1
\r
15251 #define BCR0_ER0 bcr0.bit._ER0
\r
15252 #define BCR0_CTC bcr0.bitc._CTC
\r
15253 #define BCR0_OBS bcr0.bitc._OBS
\r
15254 #define BCR0_OBT bcr0.bitc._OBT
\r
15255 #define BCR0_EP bcr0.bitc._EP
\r
15256 #define BCR0_EM bcr0.bitc._EM
\r
15257 #define BCR0_ER bcr0.bitc._ER
\r
15258 __IO_EXTERN BCR1STR bcr1;
\r
15259 #define BCR1 bcr1.lword
\r
15260 #define BCR1_SRX1 bcr1.bit._SRX1
\r
15261 #define BCR1_SW1 bcr1.bit._SW1
\r
15262 #define BCR1_SRX0 bcr1.bit._SRX0
\r
15263 #define BCR1_SW0 bcr1.bit._SW0
\r
15264 #define BCR1_URX1 bcr1.bit._URX1
\r
15265 #define BCR1_UW1 bcr1.bit._UW1
\r
15266 #define BCR1_URX0 bcr1.bit._URX0
\r
15267 #define BCR1_UW0 bcr1.bit._UW0
\r
15268 #define BCR1_MPE bcr1.bit._MPE
\r
15269 #define BCR1_COMB bcr1.bit._COMB
\r
15270 #define BCR1_CTC1 bcr1.bit._CTC1
\r
15271 #define BCR1_CTC0 bcr1.bit._CTC0
\r
15272 #define BCR1_OBS1 bcr1.bit._OBS1
\r
15273 #define BCR1_OBS0 bcr1.bit._OBS0
\r
15274 #define BCR1_OBT1 bcr1.bit._OBT1
\r
15275 #define BCR1_OBT0 bcr1.bit._OBT0
\r
15276 #define BCR1_EP3 bcr1.bit._EP3
\r
15277 #define BCR1_EP2 bcr1.bit._EP2
\r
15278 #define BCR1_EP1 bcr1.bit._EP1
\r
15279 #define BCR1_EP0 bcr1.bit._EP0
\r
15280 #define BCR1_EM1 bcr1.bit._EM1
\r
15281 #define BCR1_EM0 bcr1.bit._EM0
\r
15282 #define BCR1_ER1 bcr1.bit._ER1
\r
15283 #define BCR1_ER0 bcr1.bit._ER0
\r
15284 #define BCR1_CTC bcr1.bitc._CTC
\r
15285 #define BCR1_OBS bcr1.bitc._OBS
\r
15286 #define BCR1_OBT bcr1.bitc._OBT
\r
15287 #define BCR1_EP bcr1.bitc._EP
\r
15288 #define BCR1_EM bcr1.bitc._EM
\r
15289 #define BCR1_ER bcr1.bitc._ER
\r
15290 __IO_EXTERN IO_LWORD bad0;
\r
15291 #define BAD0 bad0
\r
15292 __IO_EXTERN IO_LWORD bad1;
\r
15293 #define BAD1 bad1
\r
15294 __IO_EXTERN IO_LWORD bad2;
\r
15295 #define BAD2 bad2
\r
15296 __IO_EXTERN IO_LWORD bad3;
\r
15297 #define BAD3 bad3
\r
15298 __IO_EXTERN IO_LWORD bad4;
\r
15299 #define BAD4 bad4
\r
15300 __IO_EXTERN IO_LWORD bad5;
\r
15301 #define BAD5 bad5
\r
15302 __IO_EXTERN IO_LWORD bad6;
\r
15303 #define BAD6 bad6
\r
15304 __IO_EXTERN IO_LWORD bad7;
\r
15305 #define BAD7 bad7
\r
15306 __IO_EXTERN IO_LWORD fsv1; /* FSV & BSV Registers */
\r
15307 #define FSV1 fsv1
\r
15308 __IO_EXTERN IO_LWORD bsv1;
\r
15309 #define BSV1 bsv1
\r
15310 __IO_EXTERN IO_LWORD fsv2;
\r
15311 #define FSV2 fsv2
\r
15312 __IO_EXTERN IO_LWORD bsv2;
\r
15313 #define BSV2 bsv2
\r
15314 /* include : INC465k_BSYNC.INC */
\r
15315 /*-------------------------------------------------------------------*/
\r
15316 /* INC465k.BSYNC : Macros Bus Sync*/
\r
15318 #define RB_SYNC if(RBSYNC)
\r
15319 #define CB_SYNC4 if(CBSYNC4)
\r
15320 /*-------------------------------------------------------------------*/
\r
15321 #endif /* __FASM__ */
\r
15322 #endif /* __MB91XXX_H */
\r
15323 #endif /* __IO_DEFINE */
\r