3 Differences to the manual
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4 -------------------------
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8 - Bitnames in headerfiles are D7 to D0
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10 # ROM Select Register
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11 - ROMS, Bitnames in headerfile are D00 to D15
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13 # CAN IFx Data A and Data B Registers IFxDTA_SWPyz
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14 - IFx Data A and Data B Registers with Little endian order are named IFxDTA_SWPyz
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16 Hardware Manual: Address: 0x00C030H; Register Name: IF1DTA20
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17 Header File : Address: 0x00C030H; Register Name: IF1DTA_SWP20
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19 # ADC Status Register, Timing Register, Enable Register and Data Register:
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20 - Status Register: ADCS (16Bit access) in HWM only 2 8Bit types ADCS0 and ADCS1
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21 - Data Register: ADCR (16Bit access) in HWM only 2 8Bit types ADCR1 and ADCR0
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22 - Timing Register: ADCT (16Bit access) in HWM only 2 8Bit types ADCT1 and ADCT0
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23 - Enable Register: ADER (32Bit access) in HWM only 2 16Bit types ADERL and ADERH