struct general_td *td;
td = (struct general_td *)memalign(sizeof(struct general_td), 16);
td->flags = ACCESS_LE(0);
- td->nexttd = ACCESS_LE(virt_to_phys(td));
+ //td->nexttd = ACCESS_LE(virt_to_phys(td));
+ td->nexttd = ACCESS_LE(0);
if(bsize == 0) {
td->cbp = td->be = ACCESS_LE(0);
} else {
- //td->cbp = ACCESS_LE(virt_to_phys(memalign(bsize, 16))); //memailgn required here?
- td->cbp = ACCESS_LE(virt_to_phys(malloc(bsize))); //memailgn required here?
+ td->cbp = ACCESS_LE(virt_to_phys(memalign(bsize, 16))); //memailgn required here?
+ //td->cbp = ACCESS_LE(virt_to_phys(malloc(bsize)));
td->be = ACCESS_LE(ACCESS_LE(td->cbp) + bsize - 1);
}
return td;
static void control_quirk()
{
- static struct endpoint_descriptor *ed; /* empty ED */
- static struct general_td *td; /* dummy TD */
+ static struct endpoint_descriptor *ed = 0; /* empty ED */
+ static struct general_td *td = 0; /* dummy TD */
u32 head;
u32 current;
u32 status;
}
}
+static void dbg_td_flag(u32 flag)
+{
+ printf("**************** dbg_td_flag: 0x%08X ***************\n", flag);
+ printf("CC: %X\tshould be 0, see page 32 (ohci spec)\n", (flag>>28)&0xf);
+ printf("EC: %X\tsee page 20 (ohci spec)\n", (flag>>26)&3);
+ printf(" T: %X\n", (flag>>24)&3);
+ printf("DI: %X\n", (flag>>21)&7);
+ printf("DP: %X\n", (flag>>19)&3);
+ printf(" R: %X\n", (flag>>18)&1);
+ printf("********************************************************\n");
+}
+
+
/**
* Enqueue a transfer descriptor.
*/
-u8 first = 0;
u8 hcdi_enqueue(usb_transfer_descriptor *td) {
- control_quirk();
+ control_quirk(); //required?
printf( "===========================\n"
"===========================\n");
printf("tmptd hexdump (before) 0x%08X:\n", tmptd);
hexdump(tmptd, sizeof(struct general_td));
- printf("tmptd->cbp hexdump (before) 0x%08X:\n", tmptd->cbp);
+ printf("tmptd->cbp hexdump (before) 0x%08X:\n", phys_to_virt(ACCESS_LE(tmptd->cbp)));
hexdump((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
- sync_after_write((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
sync_after_write(tmptd, sizeof(struct general_td));
+ sync_after_write((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
struct endpoint_descriptor *dummyconfig = allocate_endpoint();
#define ED_MASK2 ~0 /*((u32)~0x0f) */
#define ED_MASK ((u32)~0x0f)
- dummyconfig->tailp = dummyconfig->headp = ACCESS_LE(virt_to_phys((void*) ((u32)tmptd & ED_MASK)));
+ /*dummyconfig->tailp =*/ dummyconfig->headp = ACCESS_LE(virt_to_phys((void*) ((u32)tmptd & ED_MASK)));
dummyconfig->flags |= ACCESS_LE(OHCI_ENDPOINT_LOW_SPEED |
OHCI_ENDPOINT_SET_DEVICE_ADDRESS(td->devaddress) |
u32 current = read32(OHCI0_HC_CTRL_CURRENT_ED);
printf("current: 0x%08X\n", current);
while(!current) {
- udelay(1000000);
+ udelay(2);
current = read32(OHCI0_HC_CTRL_CURRENT_ED);
- printf("OHCI_CTRL_CLE: 0x%08X || ", read32(OHCI0_HC_CONTROL)&OHCI_CTRL_CLE);
- printf("OHCI_CLF: 0x%08X\n", read32(OHCI0_HC_COMMAND_STATUS)&OHCI_CLF);
}
udelay(20000);
sync_before_read(tmptd, sizeof(struct general_td));
printf("tmptd hexdump (after) 0x%08X:\n", tmptd);
hexdump(tmptd, sizeof(struct general_td));
+ dbg_td_flag(ACCESS_LE(tmptd->flags));
sync_before_read((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
- printf("tmptd->cbp hexdump (after) 0x%08X:\n", tmptd->cbp);
+ printf("tmptd->cbp hexdump (after) 0x%08X:\n", phys_to_virt(ACCESS_LE(tmptd->cbp)));
hexdump((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
sync_before_read(dummyconfig, 16);
/* WritebackDoneHead */
if (flags & OHCI_INTR_WDH) {
printf("WritebackDoneHead\n");
- /* TODO: figure out what the linux kernel does here... */
+ /* basically the linux irq handler reverse TDs to their urbs
+ * and set done_head to null.
+ * since we are polling atm, just should do the latter task.
+ * however, this won't work for now (i don't know why...)
+ * TODO!
+ */
+#if 0
+ sync_before_read(&hcca_oh0, 256);
+ hcca_oh0.done_head = 0;
+ sync_after_write(&hcca_oh0, 256);
+#endif
}
/* TODO: handle any pending URB/ED unlinks... */