usb/host/ohci.c

   1 /*
   2        ppcskel - a Free Software replacement for the Nintendo/BroadOn bootloader.
   3        ohci hardware support
   4
   5 Copyright (C) 2009     Bernhard Urban <lewurm@gmx.net>
   6 Copyright (C) 2009     Sebastian Falbesoner <sebastian.falbesoner@gmail.com>
   7
   8 # This code is licensed to you under the terms of the GNU GPL, version 2;
   9 # see file COPYING or http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
  10 */
  11
  12 #include "../../bootmii_ppc.h"
  13 #include "../../hollywood.h"
  14 #include "../../irq.h"
  15 #include "../../string.h"
  16 #include "../../malloc.h"
  17 #include "ohci.h"
  18 #include "host.h"
  19 #include "../usbspec/usb11spec.h"
  20
  21 /* activate control_quirk */
  22 #define _USE_C_Q
  23
  24 /* macro for accessing u32 variables that need to be in little endian byte order;
  25  *
  26  * whenever you read or write from an u32 field that the ohci host controller
  27  * will read or write from too, use this macro for access!
  28  */
  29 #define LE(dword) (u32)( (((dword) & 0xFF000000) >> 24) | \
  30                            (((dword) & 0x00FF0000) >> 8)  | \
  31                            (((dword) & 0x0000FF00) << 8)  | \
  32                            (((dword) & 0x000000FF) << 24) )
  33
  34 static struct general_td *allocate_general_td();
  35 static void dbg_op_state(u32 reg);
  36 static void configure_ports(u8 from_init, u32 reg);
  37 static void setup_port(u32 ohci, u32 reg, u8 from_init);
  38 static void set_target_hcca(u32 reg);
  39
  40 static struct ohci_hcca hcca_oh0;
  41 static struct ohci_hcca hcca_oh1;
  42 struct ohci_hcca *hcca;
  43
  44 static struct general_td *allocate_general_td()
  45 {
  46         struct general_td *td;
  47         td = (struct general_td *)memalign(16, sizeof(struct general_td));
  48         memset(td, 0, sizeof(struct general_td));
  49         td->flags = LE(0);
  50         td->nexttd = LE(0);
  51         td->cbp = td->be = LE(0);
  52         return td;
  53 }
  54
  55
  56 static void dbg_op_state(u32 reg)
  57 {
  58         switch (read32(reg+OHCI_HC_CONTROL) & OHCI_CTRL_HCFS) {
  59                 case OHCI_USB_SUSPEND:
  60                         printf("ohci-- OHCI_USB_SUSPEND\n");
  61                         break;
  62                 case OHCI_USB_RESET:
  63                         printf("ohci-- OHCI_USB_RESET\n");
  64                         break;
  65                 case OHCI_USB_OPER:
  66                         printf("ohci-- OHCI_USB_OPER\n");
  67                         break;
  68                 case OHCI_USB_RESUME:
  69                         printf("ohci-- OHCI_USB_RESUME\n");
  70                         break;
  71         }
  72 }
  73
  74 #ifdef _DU_OHCI_F_HALT
  75 static void dbg_td_flag(u32 flag)
  76 {
  77         printf("**************** dbg_td_flag: 0x%08X ***************\n", flag);
  78         printf("CC: %X\tshould be 0, see page 32 (ohci spec)\n", (flag>>28)&0xf);
  79         printf("EC: %X\tsee page 20 (ohci spec)\n", (flag>>26)&3);
  80         printf(" T: %X\n", (flag>>24)&3);
  81         printf("DI: %X\n", (flag>>21)&7);
  82         printf("DP: %X\n", (flag>>19)&3);
  83         printf(" R: %X\n", (flag>>18)&1);
  84         printf("********************************************************\n");
  85 }
  86 #endif
  87
  88 static void general_td_fill(struct general_td *dest, const struct usb_transfer_descriptor *src)
  89 {
  90         if(src->actlen) {
  91                 dest->cbp = LE(virt_to_phys(src->buffer));
  92                 dest->be = LE(LE(dest->cbp) + src->actlen - 1);
  93                 /* save virtual address here */
  94                 dest->bufaddr = (u32) src->buffer;
  95         }
  96         else {
  97                 dest->cbp = dest->be = LE(0);
  98                 dest->bufaddr = 0;
  99         }
 100
 101         dest->buflen = src->actlen;
 102
 103         dest->flags &= LE(~OHCI_TD_DIRECTION_PID_MASK);
 104         switch(src->pid) {
 105                 case USB_PID_SETUP:
 106 #ifdef _DU_OHCI_Q
 107                         printf("pid_setup\n");
 108 #endif
 109                         dest->flags |= LE(OHCI_TD_DIRECTION_PID_SETUP);
 110                         dest->flags |= LE(OHCI_TD_TOGGLE_0);
 111                         dest->flags |= LE(OHCI_TD_BUFFER_ROUNDING);
 112                         break;
 113                 case USB_PID_OUT:
 114 #ifdef _DU_OHCI_Q
 115                         printf("pid_out\n");
 116 #endif
 117                         dest->flags |= LE(OHCI_TD_DIRECTION_PID_OUT);
 118                         dest->flags |= LE(OHCI_TD_BUFFER_ROUNDING);
 119
 120                         dest->flags |= src->togl ? LE(OHCI_TD_TOGGLE_1) : LE(OHCI_TD_TOGGLE_0);
 121                         break;
 122                 case USB_PID_IN:
 123 #ifdef _DU_OHCI_Q
 124                         printf("pid_in\n");
 125 #endif
 126                         dest->flags |= LE(OHCI_TD_DIRECTION_PID_IN);
 127                         if(src->maxp > src->actlen) {
 128                                 dest->flags |= LE(OHCI_TD_BUFFER_ROUNDING);
 129 #ifdef _DU_OHCI_Q
 130                                 printf("round buffer!\n");
 131 #endif
 132                         }
 133                         dest->flags |= src->togl ? LE(OHCI_TD_TOGGLE_1) : LE(OHCI_TD_TOGGLE_0);
 134                         break;
 135         }
 136         dest->flags |= LE(OHCI_TD_SET_DELAY_INTERRUPT(7));
 137 }
 138
 139 #ifdef _DU_OHCI_F_HALT
 140 static void dump_address(void *addr, u32 size, const char* str)
 141 {
 142         printf("%s hexdump (%d) @ 0x%08X:\n", str, size, addr);
 143         hexdump(addr, size);
 144 }
 145 #endif
 146
 147 static struct endpoint_descriptor _edhead;
 148 struct endpoint_descriptor *edhead = 0;
 149 void hcdi_fire(u32 reg)
 150 {
 151 #ifdef _DU_OHCI_F
 152         printf("<^>  <^>  <^> hcdi_fire(start)\n");
 153 #endif
 154
 155         if(edhead == 0)
 156                 return;
 157
 158         u8 itmp;
 159         switch(edhead->type) {
 160                 case USB_CTRL:
 161 #ifdef _USE_C_Q
 162                         /* quirk... 11ms seems to be a minimum :O */
 163                         udelay(11000);
 164 #endif
 165                         write32(reg+OHCI_HC_CTRL_HEAD_ED, virt_to_phys(edhead));
 166                 break;
 167
 168                 case USB_INTR:
 169                         //udelay(11000);
 170                         set_target_hcca(reg);
 171                         sync_before_read(hcca, sizeof(struct ohci_hcca));
 172                         for(itmp = 0; itmp < NUM_INITS; itmp++) {
 173                                 hcca->int_table[itmp] = LE(virt_to_phys(edhead));
 174                         }
 175                         sync_after_write(hcca, sizeof(struct ohci_hcca));
 176                 break;
 177
 178                 case USB_BULK:
 179                         write32(reg+OHCI_HC_BULK_HEAD_ED, virt_to_phys(edhead));
 180                 break;
 181
 182                 case USB_ISOC:
 183                 break;
 184         }
 185
 186         /* sync it all */
 187         sync_after_write(edhead, sizeof(struct endpoint_descriptor));
 188 #ifdef _DU_OHCI_F
 189         dump_address(edhead, sizeof(struct endpoint_descriptor), "edhead(before)");
 190 #endif
 191
 192         struct general_td *x = phys_to_virt(LE(edhead->headp) & OHCI_ENDPOINT_HEAD_MASK);
 193         while(virt_to_phys(x)) {
 194                 sync_after_write(x, sizeof(struct general_td));
 195 #ifdef _DU_OHCI_F
 196                 dump_address(x, sizeof(struct general_td), "x(before)");
 197 #endif
 198
 199                 if(x->buflen > 0) {
 200                         sync_after_write((void*) phys_to_virt(LE(x->cbp)), x->buflen);
 201 #ifdef _DU_OHCI_F
 202                         dump_address((void*) phys_to_virt(LE(x->cbp)), x->buflen, "x->cbp(before)");
 203 #endif
 204                 }
 205                 x = phys_to_virt(LE(x->nexttd));
 206         }
 207
 208         /* start transfer */
 209         switch(edhead->type) {
 210                 case USB_CTRL:
 211                         /* trigger control list */
 212                         set32(reg+OHCI_HC_CONTROL, OHCI_CTRL_CLE);
 213                         write32(reg+OHCI_HC_COMMAND_STATUS, OHCI_CLF);
 214                         break;
 215
 216                 case USB_INTR:
 217                         /* trigger periodic list */
 218                         set32(reg+OHCI_HC_CONTROL, OHCI_CTRL_PLE);
 219                         break;
 220
 221                 case USB_BULK:
 222                         /* trigger bulk list */
 223                         set32(reg+OHCI_HC_CONTROL, OHCI_CTRL_BLE);
 224                         write32(reg+OHCI_HC_COMMAND_STATUS, OHCI_BLF);
 225                         break;
 226
 227                 case USB_ISOC:
 228                         break;
 229         }
 230
 231         struct general_td *n=0, *prev = 0, *next = 0;
 232         /* poll until edhead->headp is null */
 233         do {
 234                 sync_before_read(edhead, sizeof(struct endpoint_descriptor));
 235 #ifdef _DU_OHCI_F
 236                 printf("edhead->headp: 0x%08X\n", LE(edhead->headp));
 237 #endif
 238
 239                 /* if halted, debug output plz. will break the transfer */
 240                 if((LE(edhead->headp) & OHCI_ENDPOINT_HALTED)) {
 241                         n = phys_to_virt(LE(edhead->headp)&~0xf);
 242                         prev = phys_to_virt((u32)prev);
 243 #ifdef _DU_OHCI_F_HALT
 244                         printf("halted!\n");
 245 #endif
 246
 247                         sync_before_read((void*) n, sizeof(struct general_td));
 248 #ifdef _DU_OHCI_F_HALT
 249                         printf("n: 0x%08X\n", n);
 250                         dump_address(n, sizeof(struct general_td), "n(after)");
 251 #endif
 252                         if(n->buflen > 0) {
 253                                 sync_before_read((void*) n->bufaddr, n->buflen);
 254 #ifdef _DU_OHCI_F_HALT
 255                                 dump_address((void*) n->bufaddr, n->buflen, "n->bufaddr(after)");
 256 #endif
 257                         }
 258 #ifdef _DU_OHCI_F_HALT
 259                         dbg_td_flag(LE(n->flags));
 260 #endif
 261
 262                         sync_before_read((void*) prev, sizeof(struct general_td));
 263 #ifdef _DU_OHCI_F_HALT
 264                         printf("prev: 0x%08X\n", prev);
 265                         dump_address(prev, sizeof(struct general_td), "prev(after)");
 266 #endif
 267                         if(prev->buflen >0) {
 268                                 sync_before_read((void*) prev->bufaddr, prev->buflen);
 269 #ifdef _DU_OHCI_F_HALT
 270                                 dump_address((void*) prev->bufaddr, prev->buflen, "prev->bufaddr(after)");
 271 #endif
 272                         }
 273 #ifdef _DU_OHCI_F_HALT
 274                         dbg_td_flag(LE(prev->flags));
 275                         printf("halted end!\n");
 276 #endif
 277                         goto out;
 278                 }
 279                 prev = (struct general_td*) (LE(edhead->headp)&~0xf);
 280         } while(LE(edhead->headp)&~0xf);
 281
 282         n = phys_to_virt(read32(reg+OHCI_HC_DONE_HEAD) & ~1);
 283 #ifdef _DU_OHCI_F
 284         printf("hc_done_head: 0x%08X\n", read32(reg+OHCI_HC_DONE_HEAD));
 285 #endif
 286
 287         prev = 0; next = 0;
 288         /* reverse done queue */
 289         while(virt_to_phys(n) && edhead->tdcount) {
 290                 sync_before_read((void*) n, sizeof(struct general_td));
 291 #ifdef _DU_OHCI_F
 292                 printf("n: 0x%08X\n", n);
 293                 printf("next: 0x%08X\n", next);
 294                 printf("prev: 0x%08X\n", prev);
 295 #endif
 296
 297                 next = n;
 298                 n = (struct general_td*) phys_to_virt(LE(n->nexttd));
 299                 next->nexttd = (u32) prev;
 300                 prev = next;
 301
 302                 edhead->tdcount--;
 303         }
 304
 305         n = next;
 306         prev = 0;
 307         while(virt_to_phys(n)) {
 308 #ifdef _DU_OHCI_F
 309                 dump_address(n, sizeof(struct general_td), "n(after)");
 310 #endif
 311                 if(n->buflen > 0) {
 312                         sync_before_read((void*) n->bufaddr, n->buflen);
 313 #ifdef _DU_OHCI_F
 314                         dump_address((void*) n->bufaddr, n->buflen, "n->bufaddr(after)");
 315 #endif
 316                 }
 317 #ifdef _DU_OHCI_F
 318                 dbg_td_flag(LE(n->flags));
 319 #endif
 320                 prev = n;
 321                 n = (struct general_td*) n->nexttd;
 322                 free(prev);
 323         }
 324
 325 out:
 326         set_target_hcca(reg);
 327         sync_before_read(hcca, sizeof(struct ohci_hcca));
 328
 329         u8 jtmp;
 330         switch(edhead->type) {
 331                 case USB_CTRL:
 332                         write32(reg+OHCI_HC_CONTROL, read32(reg+OHCI_HC_CONTROL)&~OHCI_CTRL_CLE);
 333                         break;
 334
 335                 case USB_INTR:
 336                         write32(reg+OHCI_HC_CONTROL, read32(reg+OHCI_HC_CONTROL)&~OHCI_CTRL_PLE);
 337                         for(jtmp = 0; jtmp < NUM_INITS; jtmp++) {
 338                                 hcca->int_table[jtmp] = 0;
 339                         }
 340                         break;
 341
 342                 case USB_BULK:
 343                         write32(reg+OHCI_HC_CONTROL, read32(reg+OHCI_HC_CONTROL)&~OHCI_CTRL_BLE);
 344                         break;
 345
 346                 case USB_ISOC:
 347                         break;
 348         }
 349
 350         hcca->done_head = 0;
 351         sync_after_write(hcca, sizeof(struct ohci_hcca));
 352
 353         edhead = 0;
 354
 355 #ifdef _DU_OHCI_F
 356         printf("<^>  <^>  <^> hcdi_fire(end)\n");
 357 #endif
 358 }
 359
 360 /**
 361  * Enqueue a transfer descriptor.
 362  */
 363 u8 hcdi_enqueue(const struct usb_transfer_descriptor *td, u32 reg) {
 364 #ifdef _DU_OHCI_Q
 365         printf("*()*()*()*()*()*()*() hcdi_enqueue(start)\n");
 366 #endif
 367         if(!edhead) {
 368                 edhead = &_edhead;
 369                 memset(edhead, 0, sizeof(struct endpoint_descriptor));
 370                 edhead->flags = LE(OHCI_ENDPOINT_GENERAL_FORMAT);
 371                 edhead->headp = edhead->tailp = edhead->nexted = LE(0);
 372                 if(td->fullspeed) {
 373                         edhead->flags |= LE(OHCI_ENDPOINT_FULL_SPEED);
 374                 } else {
 375                         edhead->flags |= LE(OHCI_ENDPOINT_LOW_SPEED);
 376                 }
 377                 edhead->flags |= LE(OHCI_ENDPOINT_SET_DEVICE_ADDRESS(td->devaddress) |
 378                                 OHCI_ENDPOINT_SET_ENDPOINT_NUMBER(td->endpoint) |
 379                                 OHCI_ENDPOINT_SET_MAX_PACKET_SIZE(td->maxp));
 380                 edhead->tdcount = 0;
 381                 edhead->type = td->type;
 382         }
 383
 384         struct general_td *tdhw = allocate_general_td();
 385         general_td_fill(tdhw, td);
 386         edhead->tdcount ++;
 387
 388         if(!edhead->headp) {
 389                 /* first transfer */
 390                 edhead->headp = LE(virt_to_phys((void*) ((u32)tdhw & OHCI_ENDPOINT_HEAD_MASK)));
 391         }
 392         else {
 393                 /* headp in endpoint already exists
 394                  * => go to list end
 395                  */
 396                 struct general_td *n = (struct general_td*) phys_to_virt(LE(edhead->headp) & OHCI_ENDPOINT_HEAD_MASK);
 397                 while(LE(n->nexttd)) {
 398                         n = phys_to_virt(LE(n->nexttd));
 399                 }
 400                 n->nexttd = LE(virt_to_phys((void*) ((u32)tdhw & OHCI_ENDPOINT_HEAD_MASK)));
 401 #ifdef _DU_OHCI_Q
 402                 printf("n: 0x%08X\n", n);
 403                 printf("n->nexttd: 0x%08X\n", phys_to_virt(LE(n->nexttd)));
 404 #endif
 405         }
 406
 407 #ifdef _DU_OHCI_Q
 408         printf("*()*()*()*()*()*()*() hcdi_enqueue(end)\n");
 409 #endif
 410         return 0;
 411 }
 412
 413
 414 /**
 415  * Remove an transfer descriptor from transfer queue.
 416  */
 417 u8 hcdi_dequeue(struct usb_transfer_descriptor *td, u32 reg) {
 418         return 0;
 419 }
 420
 421 void hcdi_init(u32 reg)
 422 {
 423         printf("ohci-- init\n");
 424         dbg_op_state(reg);
 425
 426         /* disable hc interrupts */
 427         set32(reg+OHCI_HC_INT_DISABLE, OHCI_INTR_MIE);
 428
 429         /* save fmInterval and calculate FSMPS */
 430 #define FSMP(fi) (0x7fff & ((6 * ((fi) - 210)) / 7))
 431 #define FI 0x2edf /* 12000 bits per frame (-1) */
 432         u32 fmint = read32(reg+OHCI_HC_FM_INTERVAL) & 0x3fff;
 433         if(fmint != FI)
 434                 printf("ohci-- fminterval delta: %d\n", fmint - FI);
 435         fmint |= FSMP (fmint) << 16;
 436
 437         /* enable interrupts of both usb host controllers */
 438         set32(EHCI_CTL, EHCI_CTL_OH0INTE | EHCI_CTL_OH1INTE | 0xe0000);
 439
 440         /* reset HC */
 441         write32(reg+OHCI_HC_COMMAND_STATUS, OHCI_HCR);
 442
 443         /* wait max. 30us */
 444         u32 ts = 30;
 445         while ((read32(reg+OHCI_HC_COMMAND_STATUS) & OHCI_HCR) != 0) {
 446                  if(--ts == 0) {
 447                         printf("ohci-- FAILED");
 448                         return;
 449                  }
 450                  udelay(1);
 451         }
 452
 453         /* disable interrupts; 2ms timelimit here!
 454            now we're in the SUSPEND state ... must go OPERATIONAL
 455            within 2msec else HC enters RESUME */
 456
 457         u32 cookie = irq_kill();
 458
 459         /* Tell the controller where the control and bulk lists are
 460          * The lists are empty now. */
 461         write32(reg+OHCI_HC_CTRL_HEAD_ED, 0);
 462         write32(reg+OHCI_HC_BULK_HEAD_ED, 0);
 463
 464         /* set hcca adress */
 465         set_target_hcca(reg);
 466         sync_after_write(hcca, 256);
 467         write32(reg+OHCI_HC_HCCA, virt_to_phys(hcca));
 468
 469         /* set periodicstart */
 470 #define FIT (1<<31)
 471         u32 fmInterval = read32(reg+OHCI_HC_FM_INTERVAL) &0x3fff;
 472         u32 fit = read32(reg+OHCI_HC_FM_INTERVAL) & FIT;
 473
 474         write32(reg+OHCI_HC_FM_INTERVAL, fmint | (fit ^ FIT));
 475         write32(reg+OHCI_HC_PERIODIC_START, ((9*fmInterval)/10)&0x3fff);
 476
 477         /* testing bla */
 478         if ((read32(reg+OHCI_HC_FM_INTERVAL) & 0x3fff0000) == 0 || !read32(reg+OHCI_HC_PERIODIC_START)) {
 479                 printf("ohci-- w00t, fail!! see ohci-hcd.c:669\n");
 480         }
 481
 482         /* start HC operations */
 483         write32(reg+OHCI_HC_CONTROL, OHCI_CONTROL_INIT | OHCI_USB_OPER);
 484
 485         /* wake on ConnectStatusChange, matching external hubs */
 486         write32(reg+OHCI_HC_RH_STATUS, /*RH_HS_DRWE |*/ RH_HS_LPSC);
 487
 488         /* Choose the interrupts we care about now, others later on demand */
 489         write32(reg+OHCI_HC_INT_STATUS, ~0);
 490         write32(reg+OHCI_HC_INT_ENABLE, OHCI_INTR_INIT);
 491
 492         //wtf?
 493         wait_ms ((read32(reg+OHCI_HC_RH_DESCRIPTOR_A) >> 23) & 0x1fe);
 494
 495         configure_ports((u8)1, reg);
 496         irq_restore(cookie);
 497
 498         dbg_op_state(reg);
 499 }
 500
 501 static void configure_ports(u8 from_init, u32 reg)
 502 {
 503 #ifdef _DU_OHCI_RH
 504         printf("=== Roothub @ %s ===\n", reg == OHCI0_REG_BASE ? "OHCI0" : "OHCI1");
 505         printf("OHCI_HC_RH_DESCRIPTOR_A:\t0x%08X\n", read32(reg+OHCI_HC_RH_DESCRIPTOR_A));
 506         printf("OHCI_HC_RH_DESCRIPTOR_B:\t0x%08X\n", read32(reg+OHCI_HC_RH_DESCRIPTOR_B));
 507         printf("OHCI_HC_RH_STATUS:\t\t0x%08X\n", read32(reg+OHCI_HC_RH_STATUS));
 508         printf("OHCI_HC_RH_PORT_STATUS_1:\t0x%08X\n", read32(reg+OHCI_HC_RH_PORT_STATUS_1));
 509         printf("OHCI_HC_RH_PORT_STATUS_2:\t0x%08X\n", read32(reg+OHCI_HC_RH_PORT_STATUS_2));
 510 #endif
 511
 512         setup_port(reg, reg+OHCI_HC_RH_PORT_STATUS_1, from_init);
 513         setup_port(reg, reg+OHCI_HC_RH_PORT_STATUS_2, from_init);
 514 #ifdef _DU_OHCI_RH
 515         printf("configure_ports done\n");
 516 #endif
 517 }
 518
 519 static void setup_port(u32 ohci, u32 reg, u8 from_init)
 520 {
 521         u32 port = read32(reg);
 522         if((port & RH_PS_CCS) && ((port & RH_PS_CSC) || from_init)) {
 523                 write32(reg, RH_PS_CSC);
 524
 525                 wait_ms(120);
 526
 527                 /* clear CSC flag, set PES and start port reset (PRS) */
 528                 write32(reg, RH_PS_PES);
 529                 while(!(read32(reg) & RH_PS_PES)) {
 530 #ifdef _DU_OHCI_RH
 531                         printf("fu\n");
 532 #endif
 533                         return;
 534                 }
 535
 536                 write32(reg, RH_PS_PRS);
 537
 538                 /* spin until port reset is complete */
 539                 while(!(read32(reg) & RH_PS_PRSC)); // hint: it may stuck here
 540 #ifdef _DU_OHCI_RH
 541                 printf("loop done\n");
 542 #endif
 543
 544                 /* returns usb_device struct */
 545                 (void) usb_add_device((read32(reg) & RH_PS_LSDA) >> 8, ohci);
 546         }
 547 }
 548
 549 void hcdi_irq(u32 reg)
 550 {
 551         /* read interrupt status */
 552         u32 flags = read32(reg+OHCI_HC_INT_STATUS);
 553
 554         /* when all bits are set to 1 some problem occured */
 555         if (flags == 0xffffffff) {
 556                 printf("ohci-- Houston, we have a serious problem! :(\n");
 557                 return;
 558         }
 559
 560         /* only care about interrupts that are enabled */
 561         flags &= read32(reg+OHCI_HC_INT_ENABLE);
 562
 563         /* nothing to do? */
 564         if (flags == 0) {
 565                 printf("OHCI Interrupt occured: but not for you! WTF?!\n");
 566                 return;
 567         }
 568
 569         printf("OHCI Interrupt occured: ");
 570         /* UnrecoverableError */
 571         if (flags & OHCI_INTR_UE) {
 572                 printf("UnrecoverableError\n");
 573                 /* TODO: well, I don't know... nothing,
 574                  *       because it won't happen anyway? ;-) */
 575         }
 576
 577         /* RootHubStatusChange */
 578         if (flags & OHCI_INTR_RHSC) {
 579                 printf("RootHubStatusChange\n");
 580                 /* TODO: set some next_statechange variable... */
 581                 configure_ports(0, reg);
 582                 write32(reg+OHCI_HC_INT_STATUS, OHCI_INTR_RD | OHCI_INTR_RHSC);
 583         }
 584         /* ResumeDetected */
 585         else if (flags & OHCI_INTR_RD) {
 586                 printf("ResumeDetected\n");
 587                 write32(reg+OHCI_HC_INT_STATUS, OHCI_INTR_RD);
 588                 /* TODO: figure out what the linux kernel does here... */
 589         }
 590
 591         /* WritebackDoneHead */
 592         if (flags & OHCI_INTR_WDH) {
 593                 printf("WritebackDoneHead\n");
 594                 /* basically the linux irq handler reverse TDs to their urbs
 595                  * and set done_head to null.
 596                  * since we are polling atm, just should do the latter task.
 597                  * however, this won't work for now (i don't know why...)
 598                  * TODO!
 599                  */
 600 #if 0
 601                 sync_before_read(&hcca_oh0, 256);
 602                 hcca_oh0.done_head = 0;
 603                 sync_after_write(&hcca_oh0, 256);
 604 #endif
 605         }
 606
 607         /* TODO: handle any pending URB/ED unlinks... */
 608
 609 #define HC_IS_RUNNING() 1 /* dirty, i know... just a temporary solution */
 610         if (HC_IS_RUNNING()) {
 611                 write32(reg+OHCI_HC_INT_STATUS, flags);
 612                 write32(reg+OHCI_HC_INT_ENABLE, OHCI_INTR_MIE);
 613         }
 614 }
 615
 616 /* Before you access the HCCA structure in any way, call this to set the pointer correctly! */
 617 static void set_target_hcca(u32 reg)
 618 {
 619         switch(reg) {
 620         case OHCI0_REG_BASE: hcca = &hcca_oh0; break;
 621         case OHCI1_REG_BASE: hcca = &hcca_oh1; break;
 622         }
 623 }
 624
 625 void show_frame_no(u32 reg)
 626 {
 627         set_target_hcca(reg);
 628         sync_before_read(hcca, 256);
 629         printf("***** frame_no: %d *****\n", LE(hcca->frame_no));
 630 }