WIP: irq handler
[ppcskel.git] / ohci.c
1 /*
2        mini - a Free Software replacement for the Nintendo/BroadOn IOS.
3        ohci hardware support
4
5 Copyright (C) 2009     Bernhard Urban <lewurm@gmx.net>
6 Copyright (C) 2009     Sebastian Falbesoner <sebastian.falbesoner@gmail.com>
7
8 # This code is licensed to you under the terms of the GNU GPL, version 2;
9 # see file COPYING or http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
10 */
11
12 #include "bootmii_ppc.h"
13 #include "ohci.h"
14 #include "irq.h"
15
16 #define gecko_printf printf
17 #define dma_addr(address) virt_to_phys(address)
18
19
20 static struct ohci_hcca hcca_oh0;
21
22 static void dbg_op_state() {
23        switch (read32(OHCI0_HC_CONTROL) & OHCI_CTRL_HCFS) {
24                case OHCI_USB_SUSPEND:
25                        gecko_printf("ohci-- OHCI_USB_SUSPEND\n");
26                        break;
27                case OHCI_USB_RESET:
28                        gecko_printf("ohci-- OHCI_USB_RESET\n");
29                        break;
30                case OHCI_USB_OPER:
31                        gecko_printf("ohci-- OHCI_USB_OPER\n");
32                        break;
33                case OHCI_USB_RESUME:
34                        gecko_printf("ohci-- OHCI_USB_RESUME\n");
35                        break;
36        }
37 }
38
39 void ohci_init() {
40        gecko_printf("ohci-- init\n");
41        dbg_op_state();
42        /*
43        u32 i = 0;
44        for(; i <= 0x200; i+=4) {
45                gecko_printf("0x0d050000 + %X: %X\n", i, read32(0x0d050000+i));
46                udelay(10000); //'cause usb gecko is lame
47        }
48        * see output in ohci.default
49        */
50
51        /* enable interrupts of both usb host controllers */
52        set32(EHCI_CTL, EHCI_CTL_OH0INTE | EHCI_CTL_OH1INTE | 0xe0000);
53
54        /* reset HC */
55        set32(OHCI0_HC_COMMAND_STATUS, OHCI_HCR);
56
57        /* wait max. 30us */
58        u32 ts = 30;
59        while ((read32(OHCI0_HC_COMMAND_STATUS) & OHCI_HCR) != 0) {
60                if(--ts == 0) {
61                        gecko_printf("ohci-- FAILED");
62                        return;
63                }
64                udelay(1);
65        }
66
67        /* disable interrupts; 2ms timelimit here! 
68           now we're in the SUSPEND state ... must go OPERATIONAL
69           within 2msec else HC enters RESUME */
70
71
72            u32 cookie = irq_kill();
73
74        /* Tell the controller where the control and bulk lists are
75         * The lists are empty now. */
76        write32(OHCI0_HC_CTRL_HEAD_ED, 0);
77        write32(OHCI0_HC_BULK_HEAD_ED, 0);
78
79        /* set hcca adress */
80        write32(OHCI0_HC_HCCA, dma_addr(&hcca_oh0));
81
82        /* set periodicstart */
83 #define FIT (1<<31)
84        u32 fmInterval = read32(OHCI0_HC_FM_INTERVAL) &0x3fff;
85        u32 fit = read32(OHCI0_HC_FM_INTERVAL) & FIT;
86
87        write32(OHCI0_HC_FM_INTERVAL, read32(OHCI0_HC_FM_INTERVAL) | (fit ^ FIT));
88        write32(OHCI0_HC_PERIODIC_START, ((9*fmInterval)/10)&0x3fff);
89
90        /* testing bla */
91        if ((read32(OHCI0_HC_FM_INTERVAL) & 0x3fff0000) == 0 || !read32(OHCI0_HC_PERIODIC_START)) {
92                gecko_printf("ohci-- w00t, fail!! see ohci-hcd.c:669\n");
93        }
94        
95        /* start HC operations */
96        set32(OHCI0_HC_CONTROL, OHCI_CONTROL_INIT | OHCI_USB_OPER);
97
98        /* wake on ConnectStatusChange, matching external hubs */
99        set32(OHCI0_HC_RH_STATUS, RH_HS_DRWE);
100
101        /* Choose the interrupts we care about now, others later on demand */
102        write32(OHCI0_HC_INT_STATUS, ~0);
103        write32(OHCI0_HC_INT_ENABLE, OHCI_INTR_INIT);
104
105
106        irq_restore(cookie);
107
108        dbg_op_state();
109 }
110