2 * sgen-archdep.h: Architecture dependent parts of SGen.
4 * Copyright 2001-2003 Ximian, Inc
5 * Copyright 2003-2010 Novell, Inc.
6 * Copyright (C) 2012 Xamarin Inc
8 * Licensed under the MIT license. See LICENSE file in the project root for full license information.
10 #ifndef __MONO_SGENARCHDEP_H__
11 #define __MONO_SGENARCHDEP_H__
13 #include <mono/utils/mono-context.h>
16 * Define either USE_MONO_CTX, or
17 * ARCH_SIGCTX_SP/ARCH_SIGCTX_IP/ARCH_STORE_REGS/ARCH_COPY_SIGCTX_REGS.
18 * Define ARCH_NUM_REGS to be the number of general registers in MonoContext, or the
19 * number of registers stored by ARCH_STORE_REGS.
22 #if defined(MONO_CROSS_COMPILE)
24 #define REDZONE_SIZE 0
26 #define ARCH_NUM_REGS 0
27 #define ARCH_STORE_REGS(ptr)
28 #define ARCH_SIGCTX_SP(ctx) NULL
29 #define ARCH_SIGCTX_IP(ctx) NULL
30 #define ARCH_COPY_SIGCTX_REGS(a,ctx)
32 #elif defined(TARGET_X86)
34 #define REDZONE_SIZE 0
36 #define ARCH_NUM_REGS 8
38 #ifndef MONO_ARCH_HAS_MONO_CONTEXT
44 #elif defined(TARGET_AMD64)
46 #define REDZONE_SIZE 128
48 #define ARCH_NUM_REGS 16
51 #elif defined(TARGET_POWERPC)
53 #define REDZONE_SIZE 224
55 #define ARCH_NUM_REGS 32
57 #define ARCH_STORE_REGS(ptr) \
58 __asm__ __volatile__( \
64 #define ARCH_STORE_REGS(ptr) \
65 __asm__ __volatile__( \
71 #define ARCH_SIGCTX_SP(ctx) (UCONTEXT_REG_Rn((ctx), 1))
72 #define ARCH_SIGCTX_IP(ctx) (UCONTEXT_REG_NIP((ctx)))
73 #define ARCH_COPY_SIGCTX_REGS(a,ctx) do { \
75 for (__i = 0; __i < 32; ++__i) \
76 ((a)[__i]) = (gpointer) UCONTEXT_REG_Rn((ctx), __i); \
79 /* MS_BLOCK_SIZE must be a multiple of the system pagesize, which for some
80 architectures is 64k. */
81 #if defined(TARGET_POWERPC64)
82 #define ARCH_MIN_MS_BLOCK_SIZE (64*1024)
83 #define ARCH_MIN_MS_BLOCK_SIZE_SHIFT 16
86 #elif defined(TARGET_ARM)
88 #define REDZONE_SIZE 0
91 /* We dont store ip, sp */
92 #define ARCH_NUM_REGS 14
94 #elif defined(TARGET_ARM64)
97 #define REDZONE_SIZE 0
98 #elif defined(__APPLE__)
99 #define REDZONE_SIZE 128
101 #error "Not implemented."
104 #define ARCH_NUM_REGS 31
106 #elif defined(__mips__)
108 #define REDZONE_SIZE 0
111 #define ARCH_NUM_REGS 32
113 #elif defined(__s390x__)
115 #define REDZONE_SIZE 0
118 #define ARCH_NUM_REGS 16
120 #elif defined(__sparc__)
122 #define REDZONE_SIZE 0
124 /* Don't bother with %g0 (%r0), it's always hard-coded to zero */
125 #define ARCH_NUM_REGS 15
127 #define ARCH_STORE_REGS(ptr) \
128 __asm__ __volatile__( \
130 "st %%g2,[%0+0x08]\n\t" \
131 "st %%g3,[%0+0x10]\n\t" \
132 "st %%g4,[%0+0x18]\n\t" \
133 "st %%g5,[%0+0x20]\n\t" \
134 "st %%g6,[%0+0x28]\n\t" \
135 "st %%g7,[%0+0x30]\n\t" \
136 "st %%o0,[%0+0x38]\n\t" \
137 "st %%o1,[%0+0x40]\n\t" \
138 "st %%o2,[%0+0x48]\n\t" \
139 "st %%o3,[%0+0x50]\n\t" \
140 "st %%o4,[%0+0x58]\n\t" \
141 "st %%o5,[%0+0x60]\n\t" \
142 "st %%o6,[%0+0x68]\n\t" \
143 "st %%o7,[%0+0x70]\n\t" \
149 #define ARCH_STORE_REGS(ptr) \
150 __asm__ __volatile__( \
152 "st %%g2,[%0+0x04]\n\t" \
153 "st %%g3,[%0+0x08]\n\t" \
154 "st %%g4,[%0+0x0c]\n\t" \
155 "st %%g5,[%0+0x10]\n\t" \
156 "st %%g6,[%0+0x14]\n\t" \
157 "st %%g7,[%0+0x18]\n\t" \
158 "st %%o0,[%0+0x1c]\n\t" \
159 "st %%o1,[%0+0x20]\n\t" \
160 "st %%o2,[%0+0x24]\n\t" \
161 "st %%o3,[%0+0x28]\n\t" \
162 "st %%o4,[%0+0x2c]\n\t" \
163 "st %%o5,[%0+0x30]\n\t" \
164 "st %%o6,[%0+0x34]\n\t" \
165 "st %%o7,[%0+0x38]\n\t" \
173 #define REG_SP REG_O6
176 #define ARCH_SIGCTX_SP(ctx) (((ucontext_t *)(ctx))->uc_mcontext.gregs [REG_SP])
177 #define ARCH_SIGCTX_IP(ctx) (((ucontext_t *)(ctx))->uc_mcontext.gregs [REG_PC])
178 #define ARCH_COPY_SIGCTX_REGS(a,ctx) do { \
179 (a)[0] = (gpointer) (((ucontext_t *)(ctx))->uc_mcontext.gregs [REG_G1]); \
180 (a)[1] = (gpointer) (((ucontext_t *)(ctx))->uc_mcontext.gregs [REG_G2]); \
181 (a)[2] = (gpointer) (((ucontext_t *)(ctx))->uc_mcontext.gregs [REG_G3]); \
182 (a)[3] = (gpointer) (((ucontext_t *)(ctx))->uc_mcontext.gregs [REG_G4]); \
183 (a)[4] = (gpointer) (((ucontext_t *)(ctx))->uc_mcontext.gregs [REG_G5]); \
184 (a)[5] = (gpointer) (((ucontext_t *)(ctx))->uc_mcontext.gregs [REG_G6]); \
185 (a)[6] = (gpointer) (((ucontext_t *)(ctx))->uc_mcontext.gregs [REG_G7]); \
186 (a)[7] = (gpointer) (((ucontext_t *)(ctx))->uc_mcontext.gregs [REG_O0]); \
187 (a)[8] = (gpointer) (((ucontext_t *)(ctx))->uc_mcontext.gregs [REG_O1]); \
188 (a)[9] = (gpointer) (((ucontext_t *)(ctx))->uc_mcontext.gregs [REG_O2]); \
189 (a)[10] = (gpointer) (((ucontext_t *)(ctx))->uc_mcontext.gregs [REG_O3]); \
190 (a)[11] = (gpointer) (((ucontext_t *)(ctx))->uc_mcontext.gregs [REG_O4]); \
191 (a)[12] = (gpointer) (((ucontext_t *)(ctx))->uc_mcontext.gregs [REG_O5]); \
192 (a)[13] = (gpointer) (((ucontext_t *)(ctx))->uc_mcontext.gregs [REG_O6]); \
193 (a)[14] = (gpointer) (((ucontext_t *)(ctx))->uc_mcontext.gregs [REG_O7]); \
198 #endif /* __MONO_SGENARCHDEP_H__ */