mono/mini/local-propagation.c

   1 /*
   2  * local-propagation.c: Local constant, copy and tree propagation.
   3  *
   4  * To make some sense of the tree mover, read mono/docs/tree-mover.txt
   5  *
   6  * Author:
   7  *   Paolo Molaro (lupus@ximian.com)
   8  *   Dietmar Maurer (dietmar@ximian.com)
   9  *   Massimiliano Mantione (massi@ximian.com)
  10  *
  11  * (C) 2006 Novell, Inc.  http://www.novell.com
  12  * Copyright 2011 Xamarin, Inc (http://www.xamarin.com)
  13  * Licensed under the MIT license. See LICENSE file in the project root for full license information.
  14  */
  15
  16 #include <config.h>
  17 #ifndef DISABLE_JIT
  18
  19 #include <string.h>
  20 #include <stdio.h>
  21 #ifdef HAVE_ALLOCA_H
  22 #include <alloca.h>
  23 #endif
  24
  25 #include <mono/metadata/debug-helpers.h>
  26 #include <mono/metadata/mempool.h>
  27 #include <mono/metadata/opcodes.h>
  28 #include "mini.h"
  29 #include "ir-emit.h"
  30
  31 #ifndef MONO_ARCH_IS_OP_MEMBASE
  32 #define MONO_ARCH_IS_OP_MEMBASE(opcode) FALSE
  33 #endif
  34
  35 static inline MonoBitSet*
  36 mono_bitset_mp_new_noinit (MonoMemPool *mp,  guint32 max_size)
  37 {
  38         int size = mono_bitset_alloc_size (max_size, 0);
  39         gpointer mem;
  40
  41         mem = mono_mempool_alloc (mp, size);
  42         return mono_bitset_mem_new (mem, max_size, MONO_BITSET_DONT_FREE);
  43 }
  44
  45 /*
  46  * Replaces ins with optimized opcodes.
  47  *
  48  * We can emit to cbb the equivalent instructions which will be used as
  49  * replacement for ins, or simply change the fields of ins. Spec needs to
  50  * be updated if we silently change the opcode of ins.
  51  *
  52  * Returns TRUE if additional vregs were allocated.
  53  */
  54 static gboolean
  55 mono_strength_reduction_ins (MonoCompile *cfg, MonoInst *ins, const char **spec)
  56 {
  57         gboolean allocated_vregs = FALSE;
  58
  59         /* FIXME: Add long/float */
  60         switch (ins->opcode) {
  61         case OP_MOVE:
  62         case OP_XMOVE:
  63                 if (ins->dreg == ins->sreg1) {
  64                         NULLIFY_INS (ins);
  65                 }
  66                 break;
  67         case OP_ADD_IMM:
  68         case OP_IADD_IMM:
  69         case OP_SUB_IMM:
  70         case OP_ISUB_IMM:
  71 #if SIZEOF_REGISTER == 8
  72         case OP_LADD_IMM:
  73         case OP_LSUB_IMM:
  74 #endif
  75                 if (ins->inst_imm == 0) {
  76                         ins->opcode = OP_MOVE;
  77                 }
  78                 break;
  79         case OP_MUL_IMM:
  80         case OP_IMUL_IMM:
  81 #if SIZEOF_REGISTER == 8
  82         case OP_LMUL_IMM:
  83 #endif
  84                 if (ins->inst_imm == 0) {
  85                         ins->opcode = (ins->opcode == OP_LMUL_IMM) ? OP_I8CONST : OP_ICONST;
  86                         ins->inst_c0 = 0;
  87                         ins->sreg1 = -1;
  88                 } else if (ins->inst_imm == 1) {
  89                         ins->opcode = OP_MOVE;
  90                 } else if ((ins->opcode == OP_IMUL_IMM) && (ins->inst_imm == -1)) {
  91                         ins->opcode = OP_INEG;
  92                 } else if ((ins->opcode == OP_LMUL_IMM) && (ins->inst_imm == -1)) {
  93                         ins->opcode = OP_LNEG;
  94                 } else {
  95                         int power2 = mono_is_power_of_two (ins->inst_imm);
  96                         if (power2 >= 0) {
  97                                 ins->opcode = (ins->opcode == OP_MUL_IMM) ? OP_SHL_IMM : ((ins->opcode == OP_LMUL_IMM) ? OP_LSHL_IMM : OP_ISHL_IMM);
  98                                 ins->inst_imm = power2;
  99                         }
 100                 }
 101                 break;
 102         case OP_IREM_UN_IMM:
 103         case OP_IDIV_UN_IMM: {
 104                 int c = ins->inst_imm;
 105                 int power2 = mono_is_power_of_two (c);
 106
 107                 if (power2 >= 0) {
 108                         if (ins->opcode == OP_IREM_UN_IMM) {
 109                                 ins->opcode = OP_IAND_IMM;
 110                                 ins->sreg2 = -1;
 111                                 ins->inst_imm = (1 << power2) - 1;
 112                         } else if (ins->opcode == OP_IDIV_UN_IMM) {
 113                                 ins->opcode = OP_ISHR_UN_IMM;
 114                                 ins->sreg2 = -1;
 115                                 ins->inst_imm = power2;
 116                         }
 117                 }
 118                 break;
 119         }
 120         case OP_IDIV_IMM: {
 121                 int c = ins->inst_imm;
 122                 int power2 = mono_is_power_of_two (c);
 123
 124                 if (power2 == 1) {
 125                         int r1 = mono_alloc_ireg (cfg);
 126
 127                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, r1, ins->sreg1, 31);
 128                         MONO_EMIT_NEW_BIALU (cfg, OP_IADD, r1, r1, ins->sreg1);
 129                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, ins->dreg, r1, 1);
 130
 131                         allocated_vregs = TRUE;
 132                 } else if (power2 > 0 && power2 < 31) {
 133                         int r1 = mono_alloc_ireg (cfg);
 134
 135                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, r1, ins->sreg1, 31);
 136                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, r1, r1, (32 - power2));
 137                         MONO_EMIT_NEW_BIALU (cfg, OP_IADD, r1, r1, ins->sreg1);
 138                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, ins->dreg, r1, power2);
 139
 140                         allocated_vregs = TRUE;
 141                 }
 142                 break;
 143         }
 144 #if SIZEOF_REGISTER == 8
 145         case OP_LREM_IMM:
 146 #endif
 147         case OP_IREM_IMM: {
 148                 int power = mono_is_power_of_two (ins->inst_imm);
 149                 if (ins->inst_imm == 1) {
 150                         ins->opcode = OP_ICONST;
 151                         MONO_INST_NULLIFY_SREGS (ins);
 152                         ins->inst_c0 = 0;
 153 #if __s390__
 154                 }
 155 #else
 156                 } else if ((ins->inst_imm > 0) && (ins->inst_imm < (1LL << 32)) && (power != -1)) {
 157                         gboolean is_long = ins->opcode == OP_LREM_IMM;
 158                         int compensator_reg = alloc_ireg (cfg);
 159                         int intermediate_reg;
 160
 161                         /* Based on gcc code */
 162
 163                         /* Add compensation for negative numerators */
 164
 165                         if (power > 1) {
 166                                 intermediate_reg = compensator_reg;
 167                                 MONO_EMIT_NEW_BIALU_IMM (cfg, is_long ? OP_LSHR_IMM : OP_ISHR_IMM, intermediate_reg, ins->sreg1, is_long ? 63 : 31);
 168                         } else {
 169                                 intermediate_reg = ins->sreg1;
 170                         }
 171
 172                         MONO_EMIT_NEW_BIALU_IMM (cfg, is_long ? OP_LSHR_UN_IMM : OP_ISHR_UN_IMM, compensator_reg, intermediate_reg, (is_long ? 64 : 32) - power);
 173                         MONO_EMIT_NEW_BIALU (cfg, is_long ? OP_LADD : OP_IADD, ins->dreg, ins->sreg1, compensator_reg);
 174                         /* Compute remainder */
 175                         MONO_EMIT_NEW_BIALU_IMM (cfg, is_long ? OP_LAND_IMM : OP_AND_IMM, ins->dreg, ins->dreg, (1 << power) - 1);
 176                         /* Remove compensation */
 177                         MONO_EMIT_NEW_BIALU (cfg, is_long ? OP_LSUB : OP_ISUB, ins->dreg, ins->dreg, compensator_reg);
 178
 179                         allocated_vregs = TRUE;
 180                 }
 181 #endif
 182                 break;
 183         }
 184 #if SIZEOF_REGISTER == 4
 185         case OP_LSHR_IMM: {
 186                 if (COMPILE_LLVM (cfg))
 187                         break;
 188                 if (ins->inst_c1 == 32) {
 189                         MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_LS (ins->dreg), MONO_LVREG_MS (ins->sreg1));
 190                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1), 31);
 191                 } else if (ins->inst_c1 == 0) {
 192                         MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->sreg1));
 193                         MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1));
 194                 } else if (ins->inst_c1 > 32) {
 195                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, MONO_LVREG_LS (ins->dreg), MONO_LVREG_MS (ins->sreg1), ins->inst_c1 - 32);
 196                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1), 31);
 197                 } else {
 198                         guint32 tmpreg = alloc_ireg (cfg);
 199                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHL_IMM, tmpreg, MONO_LVREG_MS (ins->sreg1), 32 - ins->inst_c1);
 200                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1), ins->inst_c1);
 201                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->sreg1), ins->inst_c1);
 202                         MONO_EMIT_NEW_BIALU (cfg, OP_IOR, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->dreg), tmpreg);
 203                         allocated_vregs = TRUE;
 204                 }
 205                 break;
 206         }
 207         case OP_LSHR_UN_IMM: {
 208                 if (COMPILE_LLVM (cfg))
 209                         break;
 210                 if (ins->inst_c1 == 32) {
 211                         MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_LS (ins->dreg), MONO_LVREG_MS (ins->sreg1));
 212                         MONO_EMIT_NEW_ICONST (cfg, MONO_LVREG_MS (ins->dreg), 0);
 213                 } else if (ins->inst_c1 == 0) {
 214                         MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->sreg1));
 215                         MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1));
 216                 } else if (ins->inst_c1 > 32) {
 217                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, MONO_LVREG_LS (ins->dreg), MONO_LVREG_MS (ins->sreg1), ins->inst_c1 - 32);
 218                         MONO_EMIT_NEW_ICONST (cfg, MONO_LVREG_MS (ins->dreg), 0);
 219                 } else {
 220                         guint32 tmpreg = alloc_ireg (cfg);
 221                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHL_IMM, tmpreg, MONO_LVREG_MS (ins->sreg1), 32 - ins->inst_c1);
 222                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1), ins->inst_c1);
 223                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->sreg1), ins->inst_c1);
 224                         MONO_EMIT_NEW_BIALU (cfg, OP_IOR, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->dreg), tmpreg);
 225                         allocated_vregs = TRUE;
 226                 }
 227                 break;
 228         }
 229         case OP_LSHL_IMM: {
 230                 if (COMPILE_LLVM (cfg))
 231                         break;
 232                 if (ins->inst_c1 == 32) {
 233                         /* just move the lower half to the upper and zero the lower word */
 234                         MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_MS (ins->dreg), MONO_LVREG_LS (ins->sreg1));
 235                         MONO_EMIT_NEW_ICONST (cfg, MONO_LVREG_LS (ins->dreg), 0);
 236                 } else if (ins->inst_c1 == 0) {
 237                         MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->sreg1));
 238                         MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1));
 239                 } else if (ins->inst_c1 > 32) {
 240                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHL_IMM, MONO_LVREG_MS (ins->dreg), MONO_LVREG_LS (ins->sreg1), ins->inst_c1 - 32);
 241                         MONO_EMIT_NEW_ICONST (cfg, MONO_LVREG_LS (ins->dreg), 0);
 242                 } else {
 243                         guint32 tmpreg = alloc_ireg (cfg);
 244                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, tmpreg, MONO_LVREG_LS (ins->sreg1), 32 - ins->inst_c1);
 245                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHL_IMM, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1), ins->inst_c1);
 246                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHL_IMM, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->sreg1), ins->inst_c1);
 247                         MONO_EMIT_NEW_BIALU (cfg, OP_IOR, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->dreg), tmpreg);
 248                         allocated_vregs = TRUE;
 249                 }
 250                 break;
 251         }
 252 #endif
 253
 254         default:
 255                 break;
 256         }
 257
 258         *spec = INS_INFO (ins->opcode);
 259         return allocated_vregs;
 260 }
 261
 262 /*
 263  * mono_local_cprop:
 264  *
 265  *  A combined local copy and constant propagation pass.
 266  */
 267 void
 268 mono_local_cprop (MonoCompile *cfg)
 269 {
 270         MonoBasicBlock *bb, *bb_opt;
 271         MonoInst **defs;
 272         gint32 *def_index;
 273         int max;
 274         int filter = FILTER_IL_SEQ_POINT;
 275         int initial_max_vregs = cfg->next_vreg;
 276
 277         max = cfg->next_vreg;
 278         defs = (MonoInst **)mono_mempool_alloc (cfg->mempool, sizeof (MonoInst*) * cfg->next_vreg);
 279         def_index = (gint32 *)mono_mempool_alloc (cfg->mempool, sizeof (guint32) * cfg->next_vreg);
 280         cfg->cbb = bb_opt = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoBasicBlock));
 281
 282         for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
 283                 MonoInst *ins;
 284                 int ins_index;
 285                 int last_call_index;
 286
 287                 /* Manually init the defs entries used by the bblock */
 288                 MONO_BB_FOR_EACH_INS (bb, ins) {
 289                         int sregs [MONO_MAX_SRC_REGS];
 290                         int num_sregs, i;
 291
 292                         if (ins->dreg != -1) {
 293 #if SIZEOF_REGISTER == 4
 294                                 const char *spec = INS_INFO (ins->opcode);
 295                                 if (spec [MONO_INST_DEST] == 'l') {
 296                                         defs [ins->dreg + 1] = NULL;
 297                                         defs [ins->dreg + 2] = NULL;
 298                                 }
 299 #endif
 300                                 defs [ins->dreg] = NULL;
 301                         }
 302
 303                         num_sregs = mono_inst_get_src_registers (ins, sregs);
 304                         for (i = 0; i < num_sregs; ++i) {
 305                                 int sreg = sregs [i];
 306 #if SIZEOF_REGISTER == 4
 307                                 const char *spec = INS_INFO (ins->opcode);
 308                                 if (spec [MONO_INST_SRC1 + i] == 'l') {
 309                                         defs [sreg + 1] = NULL;
 310                                         defs [sreg + 2] = NULL;
 311                                 }
 312 #endif
 313                                 defs [sreg] = NULL;
 314                         }
 315                 }
 316
 317                 ins_index = 0;
 318                 last_call_index = -1;
 319                 MONO_BB_FOR_EACH_INS (bb, ins) {
 320                         const char *spec = INS_INFO (ins->opcode);
 321                         int regtype, srcindex, sreg;
 322                         int num_sregs;
 323                         int sregs [MONO_MAX_SRC_REGS];
 324
 325                         if (ins->opcode == OP_NOP) {
 326                                 MONO_DELETE_INS (bb, ins);
 327                                 continue;
 328                         }
 329
 330                         g_assert (ins->opcode > MONO_CEE_LAST);
 331
 332                         /* FIXME: Optimize this */
 333                         if (ins->opcode == OP_LDADDR) {
 334                                 MonoInst *var = (MonoInst *)ins->inst_p0;
 335
 336                                 defs [var->dreg] = NULL;
 337                                 /*
 338                                 if (!MONO_TYPE_ISSTRUCT (var->inst_vtype))
 339                                         break;
 340                                 */
 341                         }
 342
 343                         if (MONO_IS_STORE_MEMBASE (ins)) {
 344                                 sreg = ins->dreg;
 345                                 regtype = 'i';
 346
 347                                 if ((regtype == 'i') && (sreg != -1) && defs [sreg]) {
 348                                         MonoInst *def = defs [sreg];
 349
 350                                         if ((def->opcode == OP_MOVE) && (!defs [def->sreg1] || (def_index [def->sreg1] < def_index [sreg])) && !vreg_is_volatile (cfg, def->sreg1)) {
 351                                                 int vreg = def->sreg1;
 352                                                 if (cfg->verbose_level > 2) printf ("CCOPY: R%d -> R%d\n", sreg, vreg);
 353                                                 ins->dreg = vreg;
 354                                         }
 355                                 }
 356                         }
 357
 358                         num_sregs = mono_inst_get_src_registers (ins, sregs);
 359                         for (srcindex = 0; srcindex < num_sregs; ++srcindex) {
 360                                 MonoInst *def;
 361
 362                                 mono_inst_get_src_registers (ins, sregs);
 363
 364                                 regtype = spec [MONO_INST_SRC1 + srcindex];
 365                                 sreg = sregs [srcindex];
 366
 367                                 if ((regtype == ' ') || (sreg == -1) || (!defs [sreg]))
 368                                         continue;
 369
 370                                 def = defs [sreg];
 371
 372                                 /* Copy propagation */
 373                                 /*
 374                                  * The first check makes sure the source of the copy did not change since
 375                                  * the copy was made.
 376                                  * The second check avoids volatile variables.
 377                                  * The third check avoids copy propagating local vregs through a call,
 378                                  * since the lvreg will be spilled
 379                                  * The fourth check avoids copy propagating a vreg in cases where
 380                                  * it would be eliminated anyway by reverse copy propagation later,
 381                                  * because propagating it would create another use for it, thus making
 382                                  * it impossible to use reverse copy propagation.
 383                                  */
 384                                 /* Enabling this for floats trips up the fp stack */
 385                                 /*
 386                                  * Enabling this for floats on amd64 seems to cause a failure in
 387                                  * basic-math.cs, most likely because it gets rid of some r8->r4
 388                                  * conversions.
 389                                  */
 390                                 if (MONO_IS_MOVE (def) &&
 391                                         (!defs [def->sreg1] || (def_index [def->sreg1] < def_index [sreg])) &&
 392                                         !vreg_is_volatile (cfg, def->sreg1) &&
 393                                         /* This avoids propagating local vregs across calls */
 394                                         ((get_vreg_to_inst (cfg, def->sreg1) || !defs [def->sreg1] || (def_index [def->sreg1] >= last_call_index) || (def->opcode == OP_VMOVE))) &&
 395                                         !(defs [def->sreg1] && mono_inst_next (defs [def->sreg1], filter) == def) &&
 396                                         (!MONO_ARCH_USE_FPSTACK || (def->opcode != OP_FMOVE)) &&
 397                                         (def->opcode != OP_FMOVE)) {
 398                                         int vreg = def->sreg1;
 399
 400                                         if (cfg->verbose_level > 2) printf ("CCOPY/2: R%d -> R%d\n", sreg, vreg);
 401                                         sregs [srcindex] = vreg;
 402                                         mono_inst_set_src_registers (ins, sregs);
 403
 404                                         /* Allow further iterations */
 405                                         srcindex = -1;
 406                                         continue;
 407                                 }
 408
 409                                 /* Constant propagation */
 410                                 /* FIXME: Make is_inst_imm a macro */
 411                                 /* FIXME: Make is_inst_imm take an opcode argument */
 412                                 /* is_inst_imm is only needed for binops */
 413                                 if ((((def->opcode == OP_ICONST) || ((sizeof (gpointer) == 8) && (def->opcode == OP_I8CONST))) &&
 414                                          (((srcindex == 0) && (ins->sreg2 == -1)) || mono_arch_is_inst_imm (def->inst_c0))) ||
 415                                         (!MONO_ARCH_USE_FPSTACK && (def->opcode == OP_R8CONST))) {
 416                                         guint32 opcode2;
 417
 418                                         /* srcindex == 1 -> binop, ins->sreg2 == -1 -> unop */
 419                                         if ((srcindex == 1) && (ins->sreg1 != -1) && defs [ins->sreg1] && (defs [ins->sreg1]->opcode == OP_ICONST) && defs [ins->sreg2]) {
 420                                                 /* Both arguments are constants, perform cfold */
 421                                                 mono_constant_fold_ins (cfg, ins, defs [ins->sreg1], defs [ins->sreg2], TRUE);
 422                                         } else if ((srcindex == 0) && (ins->sreg2 != -1) && defs [ins->sreg2]) {
 423                                                 /* Arg 1 is constant, swap arguments if possible */
 424                                                 int opcode = ins->opcode;
 425                                                 mono_constant_fold_ins (cfg, ins, defs [ins->sreg1], defs [ins->sreg2], TRUE);
 426                                                 if (ins->opcode != opcode) {
 427                                                         /* Allow further iterations */
 428                                                         srcindex = -1;
 429                                                         continue;
 430                                                 }
 431                                         } else if ((srcindex == 0) && (ins->sreg2 == -1)) {
 432                                                 /* Constant unop, perform cfold */
 433                                                 mono_constant_fold_ins (cfg, ins, defs [ins->sreg1], NULL, TRUE);
 434                                         }
 435
 436                                         opcode2 = mono_op_to_op_imm (ins->opcode);
 437                                         if ((opcode2 != -1) && mono_arch_is_inst_imm (def->inst_c0) && ((srcindex == 1) || (ins->sreg2 == -1))) {
 438                                                 ins->opcode = opcode2;
 439                                                 if ((def->opcode == OP_I8CONST) && (sizeof (gpointer) == 4)) {
 440                                                         ins->inst_ls_word = def->inst_ls_word;
 441                                                         ins->inst_ms_word = def->inst_ms_word;
 442                                                 } else {
 443                                                         ins->inst_imm = def->inst_c0;
 444                                                 }
 445                                                 sregs [srcindex] = -1;
 446                                                 mono_inst_set_src_registers (ins, sregs);
 447
 448                                                 if ((opcode2 == OP_VOIDCALL) || (opcode2 == OP_CALL) || (opcode2 == OP_LCALL) || (opcode2 == OP_FCALL))
 449                                                         ((MonoCallInst*)ins)->fptr = (gpointer)ins->inst_imm;
 450
 451                                                 /* Allow further iterations */
 452                                                 srcindex = -1;
 453                                                 continue;
 454                                         }
 455                                         else {
 456                                                 /* Special cases */
 457 #if defined(TARGET_X86) || defined(TARGET_AMD64)
 458                                                 if ((ins->opcode == OP_X86_LEA) && (srcindex == 1)) {
 459 #if SIZEOF_REGISTER == 8
 460                                                         /* FIXME: Use OP_PADD_IMM when the new JIT is done */
 461                                                         ins->opcode = OP_LADD_IMM;
 462 #else
 463                                                         ins->opcode = OP_ADD_IMM;
 464 #endif
 465                                                         ins->inst_imm += def->inst_c0 << ins->backend.shift_amount;
 466                                                         ins->sreg2 = -1;
 467                                                 }
 468 #endif
 469                                                 opcode2 = mono_load_membase_to_load_mem (ins->opcode);
 470                                                 if ((srcindex == 0) && (opcode2 != -1) && mono_arch_is_inst_imm (def->inst_c0)) {
 471                                                         ins->opcode = opcode2;
 472                                                         ins->inst_imm = def->inst_c0 + ins->inst_offset;
 473                                                         ins->sreg1 = -1;
 474                                                 }
 475                                         }
 476                                 }
 477                                 else if (((def->opcode == OP_ADD_IMM) || (def->opcode == OP_LADD_IMM)) && (MONO_IS_LOAD_MEMBASE (ins) || MONO_ARCH_IS_OP_MEMBASE (ins->opcode))) {
 478                                         /* ADD_IMM is created by spill_global_vars */
 479                                         /*
 480                                          * We have to guarantee that def->sreg1 haven't changed since def->dreg
 481                                          * was defined. cfg->frame_reg is assumed to remain constant.
 482                                          */
 483                                         if ((def->sreg1 == cfg->frame_reg) || ((mono_inst_next (def, filter) == ins) && (def->dreg != def->sreg1))) {
 484                                                 ins->inst_basereg = def->sreg1;
 485                                                 ins->inst_offset += def->inst_imm;
 486                                         }
 487                                 } else if ((ins->opcode == OP_ISUB_IMM) && (def->opcode == OP_IADD_IMM) && (mono_inst_next (def, filter) == ins) && (def->dreg != def->sreg1)) {
 488                                         ins->sreg1 = def->sreg1;
 489                                         ins->inst_imm -= def->inst_imm;
 490                                 } else if ((ins->opcode == OP_IADD_IMM) && (def->opcode == OP_ISUB_IMM) && (mono_inst_next (def, filter) == ins) && (def->dreg != def->sreg1)) {
 491                                         ins->sreg1 = def->sreg1;
 492                                         ins->inst_imm -= def->inst_imm;
 493                                 } else if (ins->opcode == OP_STOREI1_MEMBASE_REG &&
 494                                                    (def->opcode == OP_ICONV_TO_U1 || def->opcode == OP_ICONV_TO_I1 || def->opcode == OP_SEXT_I4 || (SIZEOF_REGISTER == 8 && def->opcode == OP_LCONV_TO_U1)) &&
 495                                                    (!defs [def->sreg1] || (def_index [def->sreg1] < def_index [sreg]))) {
 496                                         /* Avoid needless sign extension */
 497                                         ins->sreg1 = def->sreg1;
 498                                 } else if (ins->opcode == OP_STOREI2_MEMBASE_REG &&
 499                                                    (def->opcode == OP_ICONV_TO_U2 || def->opcode == OP_ICONV_TO_I2 || def->opcode == OP_SEXT_I4 || (SIZEOF_REGISTER == 8 && def->opcode == OP_LCONV_TO_I2)) &&
 500                                                    (!defs [def->sreg1] || (def_index [def->sreg1] < def_index [sreg]))) {
 501                                         /* Avoid needless sign extension */
 502                                         ins->sreg1 = def->sreg1;
 503                                 } else if (ins->opcode == OP_COMPARE_IMM && def->opcode == OP_LDADDR && ins->inst_imm == 0) {
 504                                         MonoInst dummy_arg1;
 505
 506                                         memset (&dummy_arg1, 0, sizeof (MonoInst));
 507                                         dummy_arg1.opcode = OP_ICONST;
 508                                         dummy_arg1.inst_c0 = 1;
 509
 510                                         mono_constant_fold_ins (cfg, ins, &dummy_arg1, NULL, TRUE);
 511                                 }
 512                         }
 513
 514                         g_assert (cfg->cbb == bb_opt);
 515                         g_assert (!bb_opt->code);
 516                         /* Do strength reduction here */
 517                         if (mono_strength_reduction_ins (cfg, ins, &spec) && max < cfg->next_vreg) {
 518                                 MonoInst **defs_prev = defs;
 519                                 gint32 *def_index_prev = def_index;
 520                                 guint32 prev_max = max;
 521                                 guint32 additional_vregs = cfg->next_vreg - initial_max_vregs;
 522
 523                                 /* We have more vregs so we need to reallocate defs and def_index arrays */
 524                                 max  = initial_max_vregs + additional_vregs * 2;
 525                                 defs = (MonoInst **)mono_mempool_alloc (cfg->mempool, sizeof (MonoInst*) * max);
 526                                 def_index = (gint32 *)mono_mempool_alloc (cfg->mempool, sizeof (guint32) * max);
 527
 528                                 /* Keep the entries for the previous vregs, zero the rest */
 529                                 memcpy (defs, defs_prev, sizeof (MonoInst*) * prev_max);
 530                                 memset (defs + prev_max, 0, sizeof (MonoInst*) * (max - prev_max));
 531                                 memcpy (def_index, def_index_prev, sizeof (guint32) * prev_max);
 532                                 memset (def_index + prev_max, 0, sizeof (guint32) * (max - prev_max));
 533                         }
 534
 535                         if (cfg->cbb->code || (cfg->cbb != bb_opt)) {
 536                                 MonoInst *saved_prev = ins->prev;
 537
 538                                 /* If we have code in cbb, we need to replace ins with the decomposition */
 539                                 mono_replace_ins (cfg, bb, ins, &ins->prev, bb_opt, cfg->cbb);
 540                                 bb_opt->code = bb_opt->last_ins = NULL;
 541                                 bb_opt->in_count = bb_opt->out_count = 0;
 542                                 cfg->cbb = bb_opt;
 543
 544                                 /* ins is hanging, continue scanning the emitted code */
 545                                 ins = saved_prev;
 546                                 continue;
 547                         }
 548
 549                         if (spec [MONO_INST_DEST] != ' ') {
 550                                 MonoInst *def = defs [ins->dreg];
 551
 552                                 if (def && (def->opcode == OP_ADD_IMM) && (def->sreg1 == cfg->frame_reg) && (MONO_IS_STORE_MEMBASE (ins))) {
 553                                         /* ADD_IMM is created by spill_global_vars */
 554                                         /* cfg->frame_reg is assumed to remain constant */
 555                                         ins->inst_destbasereg = def->sreg1;
 556                                         ins->inst_offset += def->inst_imm;
 557                                 }
 558
 559                                 if (!MONO_IS_STORE_MEMBASE (ins) && !vreg_is_volatile (cfg, ins->dreg)) {
 560                                         defs [ins->dreg] = ins;
 561                                         def_index [ins->dreg] = ins_index;
 562                                 }
 563                         }
 564
 565                         if (MONO_IS_CALL (ins))
 566                                 last_call_index = ins_index;
 567
 568                         ins_index ++;
 569                 }
 570         }
 571 }
 572
 573 static inline gboolean
 574 reg_is_softreg_no_fpstack (int reg, const char spec)
 575 {
 576         return (spec == 'i' && reg >= MONO_MAX_IREGS)
 577                 || ((spec == 'f' && reg >= MONO_MAX_FREGS) && !MONO_ARCH_USE_FPSTACK)
 578 #ifdef MONO_ARCH_SIMD_INTRINSICS
 579                 || (spec == 'x' && reg >= MONO_MAX_XREGS)
 580 #endif
 581                 || (spec == 'v');
 582 }
 583
 584 static inline gboolean
 585 reg_is_softreg (int reg, const char spec)
 586 {
 587         return (spec == 'i' && reg >= MONO_MAX_IREGS)
 588                 || (spec == 'f' && reg >= MONO_MAX_FREGS)
 589 #ifdef MONO_ARCH_SIMD_INTRINSICS
 590                 || (spec == 'x' && reg >= MONO_MAX_XREGS)
 591 #endif
 592                 || (spec == 'v');
 593 }
 594
 595 static inline gboolean
 596 mono_is_simd_accessor (MonoInst *ins)
 597 {
 598         switch (ins->opcode) {
 599 #ifdef MONO_ARCH_SIMD_INTRINSICS
 600         case OP_INSERT_I1:
 601         case OP_INSERT_I2:
 602         case OP_INSERT_I4:
 603         case OP_INSERT_I8:
 604         case OP_INSERT_R4:
 605         case OP_INSERT_R8:
 606
 607         case OP_INSERTX_U1_SLOW:
 608         case OP_INSERTX_I4_SLOW:
 609         case OP_INSERTX_R4_SLOW:
 610         case OP_INSERTX_R8_SLOW:
 611         case OP_INSERTX_I8_SLOW:
 612                 return TRUE;
 613 #endif
 614         default:
 615                 return FALSE;
 616         }
 617 }
 618
 619 /**
 620  * mono_local_deadce:
 621  *
 622  *   Get rid of the dead assignments to local vregs like the ones created by the
 623  * copyprop pass.
 624  */
 625 void
 626 mono_local_deadce (MonoCompile *cfg)
 627 {
 628         MonoBasicBlock *bb;
 629         MonoInst *ins, *prev;
 630         MonoBitSet *used, *defined;
 631
 632         //mono_print_code (cfg, "BEFORE LOCAL-DEADCE");
 633
 634         /*
 635          * Assignments to global vregs can't be eliminated so this pass must come
 636          * after the handle_global_vregs () pass.
 637          */
 638
 639         used = mono_bitset_mp_new_noinit (cfg->mempool, cfg->next_vreg + 1);
 640         defined = mono_bitset_mp_new_noinit (cfg->mempool, cfg->next_vreg + 1);
 641
 642         /* First pass: collect liveness info */
 643         for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
 644                 /* Manually init the defs entries used by the bblock */
 645                 MONO_BB_FOR_EACH_INS (bb, ins) {
 646                         const char *spec = INS_INFO (ins->opcode);
 647                         int sregs [MONO_MAX_SRC_REGS];
 648                         int num_sregs, i;
 649
 650                         if (spec [MONO_INST_DEST] != ' ') {
 651                                 mono_bitset_clear_fast (used, ins->dreg);
 652                                 mono_bitset_clear_fast (defined, ins->dreg);
 653 #if SIZEOF_REGISTER == 4
 654                                 /* Regpairs */
 655                                 mono_bitset_clear_fast (used, ins->dreg + 1);
 656                                 mono_bitset_clear_fast (defined, ins->dreg + 1);
 657 #endif
 658                         }
 659                         num_sregs = mono_inst_get_src_registers (ins, sregs);
 660                         for (i = 0; i < num_sregs; ++i) {
 661                                 mono_bitset_clear_fast (used, sregs [i]);
 662 #if SIZEOF_REGISTER == 4
 663                                 mono_bitset_clear_fast (used, sregs [i] + 1);
 664 #endif
 665                         }
 666                 }
 667
 668                 /*
 669                  * Make a reverse pass over the instruction list
 670                  */
 671                 MONO_BB_FOR_EACH_INS_REVERSE_SAFE (bb, prev, ins) {
 672                         const char *spec = INS_INFO (ins->opcode);
 673                         int sregs [MONO_MAX_SRC_REGS];
 674                         int num_sregs, i;
 675                         MonoInst *prev_f = mono_inst_prev (ins, FILTER_NOP | FILTER_IL_SEQ_POINT);
 676
 677                         if (ins->opcode == OP_NOP) {
 678                                 MONO_DELETE_INS (bb, ins);
 679                                 continue;
 680                         }
 681
 682                         g_assert (ins->opcode > MONO_CEE_LAST);
 683
 684                         if (MONO_IS_NON_FP_MOVE (ins) && prev_f) {
 685                                 MonoInst *def;
 686                                 const char *spec2;
 687
 688                                 def = prev_f;
 689                                 spec2 = INS_INFO (def->opcode);
 690
 691                                 /*
 692                                  * Perform a limited kind of reverse copy propagation, i.e.
 693                                  * transform B <- FOO; A <- B into A <- FOO
 694                                  * This isn't copyprop, not deadce, but it can only be performed
 695                                  * after handle_global_vregs () has run.
 696                                  */
 697                                 if (!get_vreg_to_inst (cfg, ins->sreg1) && (spec2 [MONO_INST_DEST] != ' ') && (def->dreg == ins->sreg1) && !mono_bitset_test_fast (used, ins->sreg1) && !MONO_IS_STORE_MEMBASE (def) && reg_is_softreg (ins->sreg1, spec [MONO_INST_DEST]) && !mono_is_simd_accessor (def)) {
 698                                         if (cfg->verbose_level > 2) {
 699                                                 printf ("\tReverse copyprop in BB%d on ", bb->block_num);
 700                                                 mono_print_ins (ins);
 701                                         }
 702
 703                                         def->dreg = ins->dreg;
 704                                         MONO_DELETE_INS (bb, ins);
 705                                         spec = INS_INFO (ins->opcode);
 706                                 }
 707                         }
 708
 709                         /* Enabling this on x86 could screw up the fp stack */
 710                         if (reg_is_softreg_no_fpstack (ins->dreg, spec [MONO_INST_DEST])) {
 711                                 /*
 712                                  * Assignments to global vregs can only be eliminated if there is another
 713                                  * assignment to the same vreg later in the same bblock.
 714                                  */
 715                                 if (!mono_bitset_test_fast (used, ins->dreg) &&
 716                                         (!get_vreg_to_inst (cfg, ins->dreg) || (!bb->extended && !vreg_is_volatile (cfg, ins->dreg) && mono_bitset_test_fast (defined, ins->dreg))) &&
 717                                         MONO_INS_HAS_NO_SIDE_EFFECT (ins)) {
 718                                         /* Happens with CMOV instructions */
 719                                         if (prev_f && prev_f->opcode == OP_ICOMPARE_IMM) {
 720                                                 MonoInst *prev = prev_f;
 721                                                 /*
 722                                                  * Can't use DELETE_INS since that would interfere with the
 723                                                  * FOR_EACH_INS loop.
 724                                                  */
 725                                                 NULLIFY_INS (prev);
 726                                         }
 727                                         //printf ("DEADCE: "); mono_print_ins (ins);
 728                                         MONO_DELETE_INS (bb, ins);
 729                                         spec = INS_INFO (ins->opcode);
 730                                 }
 731
 732                                 if (spec [MONO_INST_DEST] != ' ')
 733                                         mono_bitset_clear_fast (used, ins->dreg);
 734                         }
 735
 736                         if (spec [MONO_INST_DEST] != ' ')
 737                                 mono_bitset_set_fast (defined, ins->dreg);
 738                         num_sregs = mono_inst_get_src_registers (ins, sregs);
 739                         for (i = 0; i < num_sregs; ++i)
 740                                 mono_bitset_set_fast (used, sregs [i]);
 741                         if (MONO_IS_STORE_MEMBASE (ins))
 742                                 mono_bitset_set_fast (used, ins->dreg);
 743
 744                         if (MONO_IS_CALL (ins)) {
 745                                 MonoCallInst *call = (MonoCallInst*)ins;
 746                                 GSList *l;
 747
 748                                 if (call->out_ireg_args) {
 749                                         for (l = call->out_ireg_args; l; l = l->next) {
 750                                                 guint32 regpair, reg;
 751
 752                                                 regpair = (guint32)(gssize)(l->data);
 753                                                 reg = regpair & 0xffffff;
 754
 755                                                 mono_bitset_set_fast (used, reg);
 756                                         }
 757                                 }
 758
 759                                 if (call->out_freg_args) {
 760                                         for (l = call->out_freg_args; l; l = l->next) {
 761                                                 guint32 regpair, reg;
 762
 763                                                 regpair = (guint32)(gssize)(l->data);
 764                                                 reg = regpair & 0xffffff;
 765
 766                                                 mono_bitset_set_fast (used, reg);
 767                                         }
 768                                 }
 769                         }
 770                 }
 771         }
 772
 773         //mono_print_code (cfg, "AFTER LOCAL-DEADCE");
 774 }
 775
 776 #endif /* DISABLE_JIT */