- process(opcode, do_calc, state_int, op1, op2, dividend_msb_int,
- laengediv_int, quo_int, aktdiv_int, sign_int, op1_int, op2_int,
- op3_int, opM_int)
- -- http://www.velocityreviews.com/forums/showpost.php?p=137148&postcount=5
- function find_msb(a : std_logic_vector) return std_logic_vector is
- function bits_to_fit(n : positive) return natural is
- variable nn, bits : natural := 0;
- begin
- nn := n;
- while nn > 0 loop
- bits := bits + 1;
- nn := nn/2;
- end loop;
- return bits;
- end;
-
- function or_all(p : std_logic_vector) return std_logic is
- variable r : std_logic;
- begin
- r := '0';
- for i in p'range loop
- r := r or p(i);
- end loop;
- return r;
- end;
-
- constant wN : positive := bits_to_fit(a'length - 1);
- constant wP : positive := 2 ** wN;
- variable pv : std_logic_vector(wP-1 downto 0);
- variable n : std_logic_vector(wN downto 1);
- begin
- if a'length <= 2 then
- n(n'right) := a(a'left);
- else
- pv(a'length-1 downto 0) := a;
- if or_all(pv(wP-1 downto wP/2)) = '1' then
- n := '1' & find_msb((pv(wP-1 downto wP/2)));
- else
- n := '0' & find_msb((pv(wP/2-1 downto 0)));
- end if;
- end if;
- return n;
- end function find_msb;
- -- -- alternativ: eleganter, braucht aber mehr logic cells
- -- for i in (CBITS-1) downto 0 loop
- -- exit when a(i) = '1';
- -- r := r+1;
- -- end loop;
- -- return (CBITS - r);
-
+ process(opcode, do_calc, state_int, op1, op2, laengediv_int, quo_int,
+ sign_int, op1_int, op2_int, op3_int, opM_int)