scanner: akzeptiere auch keycodes die sinn machen die nicht vom numpad kommen

diff --git a/spec/speck.tex b/spec/speck.tex
index 90d5b3f9b08e86d7554b280362cff15951a638fa..1622304d6794eac66c37010a3dddc487545588cd 100644 (file)
--- a/spec/speck.tex
+++ b/spec/speck.tex
@@ -624,6 +624,9 @@ Rechnungsnummer angibt.
 \item Scanner: Fehler in der state-maschine: ein extriger uebergang von
 \emph{read} auf \emph{\"ubernehmen} ist n\"otig um leerzeichen \"ubernehmen zu
 k\"oennen.
+\item Scanner: \"Uberg\"ange der Statemaschine passen im Allgemeinen nicht
+wirklich $\Rightarrow$ Tonne
+\item Scanner: Akzeptiere auch 0-9 Tasten die nicht am Numpad liegen.
 \item History $\Rightarrow$ Display: ein zus\"atzliches Signal \emph{d\_new\_bs}.
 \item Display $\Rightarrow$ History: die Breite f\"ur \emph{d\_zeile} muss
 ebenfalls so breit wie \emph{p\_zeile} sein (zumindest vereinfacht das die

diff --git a/src/gen_pkg.vhd b/src/gen_pkg.vhd
index c990f1b2f5354aa2c4670a9bcfbf53d310eb41ae..4dfbf6d9a738a2f0ac0d4ba9554087356665acdd 100644 (file)
--- a/src/gen_pkg.vhd
+++ b/src/gen_pkg.vhd
@@ -42,11 +42,25 @@ package gen_pkg is
        constant SC_KP_8 : std_logic_vector(7 downto 0) := x"75";
        constant SC_KP_9 : std_logic_vector(7 downto 0) := x"7d";
 
+       constant SC_0 : std_logic_vector(7 downto 0) := x"45";
+       constant SC_1 : std_logic_vector(7 downto 0) := x"16";
+       constant SC_2 : std_logic_vector(7 downto 0) := x"1e";
+       constant SC_3 : std_logic_vector(7 downto 0) := x"26";
+       constant SC_4 : std_logic_vector(7 downto 0) := x"25";
+       constant SC_5 : std_logic_vector(7 downto 0) := x"2e";
+       constant SC_6 : std_logic_vector(7 downto 0) := x"36";
+       constant SC_7 : std_logic_vector(7 downto 0) := x"3d";
+       constant SC_8 : std_logic_vector(7 downto 0) := x"3e";
+       constant SC_9 : std_logic_vector(7 downto 0) := x"46";
+
        constant SC_KP_PLUS : std_logic_vector(7 downto 0) := x"79";
        constant SC_KP_MINUS : std_logic_vector(7 downto 0) := x"7b";
        constant SC_KP_MUL : std_logic_vector(7 downto 0) := x"7c";
        constant SC_KP_DIV : std_logic_vector(7 downto 0) := x"4a"; -- inkl. 0xe0!
 
+       -- fuer deutsches layout, alle anderen zeichen sind unguenstig belegt
+       constant SC_PLUS : std_logic_vector(7 downto 0) := x"5b";
+
        constant SC_ENTER : std_logic_vector(7 downto 0) := x"5a";
        constant SC_BKSP : std_logic_vector(7 downto 0) := x"66";
        constant SC_SPACE : std_logic_vector(7 downto 0) := x"29";

diff --git a/src/scanner.vhd b/src/scanner.vhd
index 78a89fa9f82012bdb82bfa33ddcb49250bb34586..1710dc437888bae405c9fe804fcf1827ae4f450d 100644 (file)
--- a/src/scanner.vhd
+++ b/src/scanner.vhd
@@ -73,9 +73,12 @@ begin
                                                        state_next <= SDEL;
                                                when SC_ENTER =>
                                                        state_next <= SENTER;
-                                               when SC_KP_0 | SC_KP_1 | SC_KP_2 | SC_KP_3 |
-                                                       SC_KP_4 | SC_KP_5 | SC_KP_6 | SC_KP_7 |
-                                                       SC_KP_8 | SC_KP_9 | SC_KP_PLUS |
+                                               when SC_KP_0 | SC_KP_1 | SC_KP_2 |
+                                                       SC_KP_3 | SC_KP_4 | SC_KP_5 | SC_KP_6 |
+                                                       SC_KP_7 | SC_KP_8 | SC_KP_9 |
+                                                       SC_0 | SC_1 | SC_2 | SC_3 | SC_4 |
+                                                       SC_5 | SC_6 | SC_7 | SC_8 | SC_9 |
+                                                       SC_PLUS | SC_KP_PLUS |
                                                        SC_KP_MINUS | SC_KP_MUL | SC_SPACE =>
                                                                state_next <= STAKE;
                                                when others => state_next <= SIDLE;
@@ -114,17 +117,17 @@ begin
                        variable y : hbyte;
                begin
                        case x is
-                               when SC_KP_0 => y := x"30";
-                               when SC_KP_1 => y := x"31";
-                               when SC_KP_2 => y := x"32";
-                               when SC_KP_3 => y := x"33";
-                               when SC_KP_4 => y := x"34";
-                               when SC_KP_5 => y := x"35";
-                               when SC_KP_6 => y := x"36";
-                               when SC_KP_7 => y := x"37";
-                               when SC_KP_8 => y := x"38";
-                               when SC_KP_9 => y := x"39";
-                               when SC_KP_PLUS => y := x"2b";
+                               when SC_KP_0 | SC_0 => y := x"30";
+                               when SC_KP_1 | SC_1 => y := x"31";
+                               when SC_KP_2 | SC_2 => y := x"32";
+                               when SC_KP_3 | SC_3 => y := x"33";
+                               when SC_KP_4 | SC_4 => y := x"34";
+                               when SC_KP_5 | SC_5 => y := x"35";
+                               when SC_KP_6 | SC_6 => y := x"36";
+                               when SC_KP_7 | SC_7 => y := x"37";
+                               when SC_KP_8 | SC_8 => y := x"38";
+                               when SC_KP_9 | SC_9 => y := x"39";
+                               when SC_KP_PLUS | SC_PLUS => y := x"2b";
                                when SC_KP_MINUS => y := x"2d";
                                when SC_KP_MUL => y := x"2a";
                                when SC_KP_DIV => y := x"2f";