alu: postsim geht jetzt zwar, trotzdem haufweise warnings...
[hwmod.git] / src / post_alu_tb.vhd
index 7563f2004723d474a4884ca03845b13a5cad91b6..7a960787ac4ac5a4af685898ada14ce7d43d551b 100644 (file)
@@ -91,11 +91,11 @@ begin
                op1 <= (others => '0');
                op2 <= (others => '0');
 
-               wait for 300 ns;
+               icwait(sys_clk, 30);
                sys_res_n <= '1';
 
                for i in testmatrix'range loop
-                       wait for 100 ns;
+                       icwait(sys_clk, 10);
                        op1 <= std_logic_vector(to_signed(testmatrix(i).o1,CBITS));
                        opcode <= testmatrix(i).o;
                        op2 <= std_logic_vector(to_signed(testmatrix(i).o2,CBITS));
@@ -105,7 +105,7 @@ begin
 
                        -- warten auf die alu einheit
                        wait on calc_done;
-                       wait for 80 ns;
+                       icwait(sys_clk, 1);
 
                        assert op3 = std_logic_vector(to_signed(testmatrix(i).expected,CBITS))
                                report "" & cinteger'image(testmatrix(i).o1) & 
@@ -114,7 +114,7 @@ begin
                                "/= " & integer'image(to_integer(signed(op3))) &
                                " -- erwartet: " & cinteger'image(testmatrix(i).expected);
 
-                       wait for 5 ns;
+                       icwait(sys_clk, 2);
                        -- ack it!
                        do_calc <= '0';
                end loop;