allgemein: konstanten verwenden

[hwmod.git] / src / pc_communication.vhd

diff --git a/src/pc_communication.vhd b/src/pc_communication.vhd
index 89dff252be4bc9cd13891311d76123ad7465a19a..b593b33a1a01f318a953bc33863fe0bc29c4f51b 100644 (file)
--- a/src/pc_communication.vhd
+++ b/src/pc_communication.vhd
@@ -31,8 +31,8 @@ entity pc_communication is
 end entity pc_communication;
 
 architecture beh of pc_communication is
-       signal spalte, spalte_next : integer range 1 to hspalte_max + 1;
-       signal zeile , zeile_next : integer range 1 to hzeile_max + 1;
+       signal spalte, spalte_next : integer range 1 to HSPALTE_MAX + 1;
+       signal zeile , zeile_next : integer range 1 to HZEILE_MAX + 1;
        signal get, get_next : std_logic;
        signal new_i, new_i_next : std_logic;
        signal tx_done_i, tx_done_i_next : std_logic;
@@ -87,16 +87,17 @@ begin
                        when FETCH =>
                                get_next <= '1';
                        when WAIT_HIST =>
-                       tx_data_i_next <= pc_char;
+                               tx_data_i_next <= pc_char;
                        when FORWARD =>
                                new_i_next <= '1';
                        when WAIT_UART =>
-                               null;
+                               new_i_next <= '1';
                        when UART_DONE =>
-                               if tx_data_i = x"00" or spalte = hspalte_max then
+                               if tx_data_i = x"00" or spalte = HSPALTE_MAX then
+                                       tx_data_i_next <= x"0a";
                                        zeile_next <= zeile + 1;
                                        spalte_next <= 1;
-                                       if zeile = hzeile_max then
+                                       if zeile = HZEILE_MAX then
                                                zeile_next <= 1;
                                        end if;
                                else
@@ -105,13 +106,14 @@ begin
                end case;
        end process output_pc;
 
-       next_state_pc : process (btn_a, pc_busy, pc_done, rx_new, rx_data, spalte, 
+       next_state_pc : process (btn_a, pc_busy, pc_done, rx_new, rx_data, spalte,
                state, tx_data_i ,tx_done_i, zeile)
        begin
                state_next <= state;
                case state is
                        when IDLE =>
-                               if (rx_new = '1' and rx_data = x"0a" ) or btn_a = '0' then
+--                             if (rx_new = '1' and rx_data = x"0a") or btn_a = '0' then
+                               if (rx_new = '1') or btn_a = '0' then
                                        state_next <= FETCH;
                                end if;
                        when FETCH =>
@@ -131,8 +133,8 @@ begin
                                        state_next <= UART_DONE;
                                end if;
                        when UART_DONE =>
-                               if (tx_data_i = x"00" or spalte = hspalte_max) and
-                                       zeile = hzeile_max then
+                               if (tx_data_i = x"00" or spalte = HSPALTE_MAX) and
+                                       zeile = HZEILE_MAX then
                                        state_next <= IDLE;
                                else
                                        state_next <= FETCH;