allgemein: konstanten verwenden

den punkt "- gen_pkg: unsigned fuer hspalte, hzeile" hab ich verworfen weil es zu
viel "breakt"

logic elements atm: 2947

diff --git a/src/TODO b/src/TODO
index 3ef40cf50b519e6cc1b399a87b88d5da4a2d529e..6afbd9f34db6e1ff631238c3fd753080a291a767 100644 (file)
--- a/src/TODO
+++ b/src/TODO
@@ -1,13 +1,8 @@
-
 - pc-kommunikation: ein wait state fehlt warum es momentan zu komischem
   verhalten in der state machine kommt.
 
 - rs232/pc-kommunikation: RAM dumpen
 
-
-- gen_pkg: unsigned fuer hspalte, hzeile
-
-
 == low prio ==
 - logic elements eliminieren
 

diff --git a/src/beh_parser_tb.vhd b/src/beh_parser_tb.vhd
index b0626cf8cfc763035ef26366ab3e6545aec3411f..eb452058d5ef5794cf4c630c63c56dd0c1b71d84 100644 (file)
--- a/src/beh_parser_tb.vhd
+++ b/src/beh_parser_tb.vhd
@@ -74,12 +74,12 @@ begin
 
                i := 1;
                f_loop : while not endfile(f) loop
-                       realresult := (72 => nul, others => ' ');
+                       realresult := (HSPALTE_MAX+1 => nul, others => ' ');
 
                        f1_loop : while not endfile(f) loop
                                readline (f, l);
                                input := (others => nul);
-                               if (l'length <= 72) then
+                               if (l'length <= HSPALTE_MAX+1) then
                                        input(1 to l'length) := l.all;
                                        if (input(1) = '#') then
                                                next f1_loop;
@@ -95,7 +95,7 @@ begin
                        f2_loop : while not endfile(f) loop
                                readline (f, l);
                                expectedresult := (others => nul);
-                               if (l'length <= 72) then
+                               if (l'length <= HSPALTE_MAX+1) then
                                        expectedresult(1 to l'length) := l.all;
                                        if (expectedresult(1) = '#') then
                                                next f2_loop;
@@ -111,10 +111,10 @@ begin
 
                        -- ergebnis string richtig formatieren
                        hstrtmp := expectedresult;
-                       expectedresult := (72 => nul, others => ' ');
-                       for x in 1 to 71 loop
+                       expectedresult := (HSPALTE_MAX+1 => nul, others => ' ');
+                       for x in 1 to HSPALTE_MAX loop
                                if hstrtmp(x) /= nul then
-                                       expectedresult((71-y) + x) := hstrtmp(x);
+                                       expectedresult((HSPALTE_MAX-y) + x) := hstrtmp(x);
                                end if;
                        end loop;
 
@@ -126,7 +126,7 @@ begin
                        icwait(sys_clk, 5);
                        do_it <= '1';
                        run_tc := true;
-                       j := 1; k := 71;
+                       j := 1; k := HSPALTE_MAX;
 
                        while run_tc loop
                                wait on p_rget, p_wtake, p_finished, finished;

diff --git a/src/beh_scanner_tb.vhd b/src/beh_scanner_tb.vhd
index d3cfe69fa864b9370bceaa1475906cfaf2b468be..795e4e86f38bffa0fafed35f36610d1a43ec68ec 100644 (file)
--- a/src/beh_scanner_tb.vhd
+++ b/src/beh_scanner_tb.vhd
@@ -81,7 +81,7 @@ begin
                        f1_loop : while not endfile(f) loop
                                readline (f, l);
                                input := (others => nul);
-                               if (l'length <= 72) then
+                               if (l'length <= HSPALTE_MAX+1) then
                                        input(1 to l'length) := l.all;
                                        if (input(1) = '#') then
                                                next f1_loop;
@@ -97,7 +97,7 @@ begin
                        f2_loop : while not endfile(f) loop
                                readline (f, l);
                                expectedresult := (others => nul);
-                               if (l'length <= 72) then
+                               if (l'length <= HSPALTE_MAX+1) then
                                        expectedresult(1 to l'length) := l.all;
                                        if (expectedresult(1) = '#') then
                                                next f2_loop;

diff --git a/src/display.vhd b/src/display.vhd
index d67a2e9e3e8c8755c56bfefb5ffbabbf02ae3102..95606a205be81bccd7b5f51aac07a0b11d7d045e 100644 (file)
--- a/src/display.vhd
+++ b/src/display.vhd
@@ -171,7 +171,7 @@ begin
                                istate_next <= IS_RESULT1_2_RESULT2;
                                state_next <= S_WAIT;
                        when S_READ_RESULT_2 =>
-                               if unsigned(d_spalte_int) /= 70 then
+                               if unsigned(d_spalte_int) /= HSPALTE_MAX-1 then
                                        state_next <= S_COUNTUP;
                                        istate_next <= IS_RESULT1_2_RESULT2;
                                else
@@ -293,7 +293,7 @@ begin
                                d_spalte_next <= (others => '0');
                                case d_zeile_int is
                                        when
-                                       std_logic_vector(to_unsigned((49*2)+1,d_zeile_int'length)) => d_zeile_next <= (others => '0');
+                                       std_logic_vector(to_unsigned(HZEILE_MAX-1,d_zeile_int'length)) => d_zeile_next <= (others => '0');
                                        when others => d_zeile_next <= std_logic_vector(unsigned(d_zeile_int) + 1);
                                end case;
 

diff --git a/src/gen_pkg.vhd b/src/gen_pkg.vhd
index 216d9f0e9962259e3f9cf7d578897a588a582069..dfe664c1fb05b077a27ef2e4ae84de0cf9bb117c 100644 (file)
--- a/src/gen_pkg.vhd
+++ b/src/gen_pkg.vhd
@@ -18,16 +18,20 @@ package gen_pkg is
        -- integer ist 32bit (31bit + sign)
        subtype cinteger is integer;
 
-       -- 50 zeilen * 71 zeichen * 2 (berechnung + ergebnis) = 7100 bytes
-       constant hspalte_max : integer := 71;
-       constant hzeile_max : integer := 100;
-       constant H_RAM_SIZE : integer := 7100;
-       constant H_RAM_WIDTH : integer := log2c(H_RAM_SIZE);
+
+       constant HSPALTE_MAX : integer := 71;
        subtype hspalte is std_logic_vector(6 downto 0);
+
+       constant HZEILE_MAX : integer := 100;
        subtype hzeile is std_logic_vector(6 downto 0);
+
+       -- 50 zeilen * 71 zeichen * 2 (berechnung + ergebnis) = 7100 bytes
+       constant H_RAM_SIZE : integer := HZEILE_MAX * HSPALTE_MAX;
+       constant H_RAM_WIDTH : integer := log2c(H_RAM_SIZE);
+
        subtype hbyte is std_logic_vector(7 downto 0);
-       subtype hstring is string(1 to 72);
-       subtype hstr_int is integer range 0 to 72;
+       subtype hstring is string(1 to HSPALTE_MAX+1);
+       subtype hstr_int is integer range 0 to HSPALTE_MAX+1;
 
        procedure icwait(signal clk_i : IN std_logic; cycles: natural);
 

diff --git a/src/history.vhd b/src/history.vhd
index ddd26f62b11fbc4233c8700c442cac2419d78c79..775620475a6e2ba1f28dbe94016c22fe2c8da3bb 100644 (file)
--- a/src/history.vhd
+++ b/src/history.vhd
@@ -99,7 +99,7 @@ begin
                        p_wdone_int <= '0';
                        p_read_int <= (others => '0');
                        p_sp_read_int <= (others => '0');
-                       p_sp_write_int <= std_logic_vector(to_unsigned(71,p_sp_write_int'length));
+                       p_sp_write_int <= std_logic_vector(to_unsigned(HSPALTE_MAX,p_sp_write_int'length));
 
                        pc_char_int  <= (others => '0');
                        pc_done_int  <= '0';
@@ -182,11 +182,11 @@ begin
                        when S_S_FIN_POSUP =>
                                state_next <= S_S_CLEAR_NEXT0;
                        when S_S_CLEAR_NEXT0 =>
-                               if s_cnt_int = hspalte(to_unsigned(71,hspalte'length)) then
+                               if s_cnt_int = hspalte(to_unsigned(HSPALTE_MAX,hspalte'length)) then
                                        state_next <= S_S_CLEAR_NEXT1;
                                end if;
                        when S_S_CLEAR_NEXT1 =>
-                               if s_cnt_int = hspalte(to_unsigned(71,hspalte'length)) then
+                               if s_cnt_int = hspalte(to_unsigned(HSPALTE_MAX,hspalte'length)) then
                                        state_next <= SIDLE;
                                end if;
                        when S_S_DONE =>
@@ -270,9 +270,9 @@ begin
                        when S_S_INIT =>
                                null;
                        when S_S_WRITE =>
-                               -- nur bei < 71 weiter machen
+                               -- nur bei < HSPALTE_MAX weiter machen
                                -- Hint: '/=' billiger als '<'
-                               if unsigned(s_cnt_int) /= 71 then
+                               if unsigned(s_cnt_int) /= HSPALTE_MAX then
                                        wr_next <= '1';
                                        address_next <= std_logic_vector(unsigned(pos_int) + unsigned(s_cnt_int));
                                        data_in_next <= s_char;
@@ -300,7 +300,7 @@ begin
                                d_new_result_next <= '1';
                                -- resetten der parser counter
                                p_sp_read_next <= (others => '0');
-                               p_sp_write_next <= std_logic_vector(to_unsigned(71,p_sp_write_next'length));
+                               p_sp_write_next <= std_logic_vector(to_unsigned(HSPALTE_MAX,p_sp_write_next'length));
                        when S_S_FIN_POSUP =>
                                -- overflowcheck nach 50 berechnungen => wieder von vorne anfangen
                                if pos_int = std_logic_vector(to_unsigned(H_RAM_SIZE-142,H_RAM_WIDTH)) then
@@ -313,7 +313,7 @@ begin
                                wr_next <= '1';
                                address_next <= std_logic_vector(unsigned(pos_int) + unsigned(s_cnt_int));
                                data_in_next <= (others => '0');
-                               if s_cnt_int = hspalte(to_unsigned(71,hspalte'length)) then
+                               if s_cnt_int = hspalte(to_unsigned(HSPALTE_MAX,hspalte'length)) then
                                        s_cnt_next <= (0 => '1', others => '0');
                                else
                                        s_cnt_next <= std_logic_vector(unsigned(s_cnt_int) + 1);
@@ -321,9 +321,9 @@ begin
                        when S_S_CLEAR_NEXT1 =>
                                -- die naechsten 142 bytes im speicher resetten
                                wr_next <= '1';
-                               address_next <= std_logic_vector(unsigned(pos_int) + to_unsigned(71,H_RAM_WIDTH) + unsigned(s_cnt_int));
+                               address_next <= std_logic_vector(unsigned(pos_int) + to_unsigned(HSPALTE_MAX,H_RAM_WIDTH) + unsigned(s_cnt_int));
                                data_in_next <= (others => '0');
-                               if s_cnt_int = hspalte(to_unsigned(71,hspalte'length)) then
+                               if s_cnt_int = hspalte(to_unsigned(HSPALTE_MAX,hspalte'length)) then
                                        s_cnt_next <= (0 => '1', others => '0');
                                else
                                        s_cnt_next <= std_logic_vector(unsigned(s_cnt_int) + 1);
@@ -340,7 +340,8 @@ begin
                        when S_D_INIT =>
                                addr_tmp := (others => '0');
                                addr_tmp(hzeile'length - 1 downto 0) := d_zeile;
-                               mul_tmp := std_logic_vector(unsigned(addr_tmp) * to_unsigned(71,H_RAM_WIDTH));
+                               mul_tmp := std_logic_vector(unsigned(addr_tmp) *
+                               to_unsigned(HSPALTE_MAX,H_RAM_WIDTH));
                                addr_tmp := mul_tmp((addr_tmp'length - 1) downto 0);
                                addr_tmp := std_logic_vector(unsigned(addr_tmp) + unsigned(d_spalte));
                                address_next <= addr_tmp;
@@ -353,7 +354,7 @@ begin
                        when S_PC_INIT =>
                                addr_tmp := (others => '0');
                                addr_tmp(hzeile'length - 1 downto 0) := pc_zeile;
-                               mul_tmp := std_logic_vector(unsigned(addr_tmp) * to_unsigned(71,H_RAM_WIDTH));
+                               mul_tmp := std_logic_vector(unsigned(addr_tmp) * to_unsigned(HSPALTE_MAX,H_RAM_WIDTH));
                                addr_tmp := mul_tmp((addr_tmp'length - 1) downto 0);
                                addr_tmp := std_logic_vector(unsigned(addr_tmp) + unsigned(pc_spalte));
                                address_next <= addr_tmp;
@@ -377,7 +378,7 @@ begin
                                data_in_next <= p_write;
                                spalte_tmp := std_logic_vector(unsigned(p_sp_write_int) - 1);
                                p_sp_write_next <= spalte_tmp;
-                               address_next <= std_logic_vector(unsigned(pos_int) + to_unsigned(71,H_RAM_WIDTH) + unsigned(spalte_tmp));
+                               address_next <= std_logic_vector(unsigned(pos_int) + to_unsigned(HSPALTE_MAX,H_RAM_WIDTH) + unsigned(spalte_tmp));
                        when S_P_WRITE_DONE =>
                                p_wdone_next <= '1';
                        when S_P_DONE =>

diff --git a/src/parser.vhd b/src/parser.vhd
index 39b9a96adac28ca3d9fde605046113962e677361..5736bf5be96661a7ffa25b678a1f83c121bf86ea 100644 (file)
--- a/src/parser.vhd
+++ b/src/parser.vhd
@@ -96,7 +96,7 @@ begin
                        aktop_int <= ALU_NOP;
                        opp_int <= ALU_NOP;
                        err_int <= 0;
-                       errc_int <= 71;
+                       errc_int <= HSPALTE_MAX;
                        errc_tmp_int <= 0;
                        firstz_int <= true;
                        -- out ports
@@ -508,7 +508,7 @@ begin
 
                        when SDONE =>
                                err_next <= 0;
-                               errc_next <= 71;
+                               errc_next <= HSPALTE_MAX;
                                p_finished_next <= '1';
                                finished_next <= '1';
 

diff --git a/src/pc_communication.vhd b/src/pc_communication.vhd
index e2e38222892fee51653aff09db2c820d6bca88c6..b593b33a1a01f318a953bc33863fe0bc29c4f51b 100644 (file)
--- a/src/pc_communication.vhd
+++ b/src/pc_communication.vhd
@@ -31,8 +31,8 @@ entity pc_communication is
 end entity pc_communication;
 
 architecture beh of pc_communication is
-       signal spalte, spalte_next : integer range 1 to hspalte_max + 1;
-       signal zeile , zeile_next : integer range 1 to hzeile_max + 1;
+       signal spalte, spalte_next : integer range 1 to HSPALTE_MAX + 1;
+       signal zeile , zeile_next : integer range 1 to HZEILE_MAX + 1;
        signal get, get_next : std_logic;
        signal new_i, new_i_next : std_logic;
        signal tx_done_i, tx_done_i_next : std_logic;
@@ -93,11 +93,11 @@ begin
                        when WAIT_UART =>
                                new_i_next <= '1';
                        when UART_DONE =>
-                               if tx_data_i = x"00" or spalte = hspalte_max then
+                               if tx_data_i = x"00" or spalte = HSPALTE_MAX then
                                        tx_data_i_next <= x"0a";
                                        zeile_next <= zeile + 1;
                                        spalte_next <= 1;
-                                       if zeile = hzeile_max then
+                                       if zeile = HZEILE_MAX then
                                                zeile_next <= 1;
                                        end if;
                                else
@@ -133,8 +133,8 @@ begin
                                        state_next <= UART_DONE;
                                end if;
                        when UART_DONE =>
-                               if (tx_data_i = x"00" or spalte = hspalte_max) and
-                                       zeile = hzeile_max then
+                               if (tx_data_i = x"00" or spalte = HSPALTE_MAX) and
+                                       zeile = HZEILE_MAX then
                                        state_next <= IDLE;
                                else
                                        state_next <= FETCH;

diff --git a/src/post_parser_tb.vhd b/src/post_parser_tb.vhd
index 8ba3dd5fbd6ea8d3c806bc94f945ce02afe2175d..e80193c63a643c30104066001889736933cb77f4 100644 (file)
--- a/src/post_parser_tb.vhd
+++ b/src/post_parser_tb.vhd
@@ -91,12 +91,12 @@ begin
 
                i := 1;
                f_loop : while not endfile(f) loop
-                       realresult := (72 => nul, others => ' ');
+                       realresult := (HSPALTE_MAX+1 => nul, others => ' ');
 
                        f1_loop : while not endfile(f) loop
                                readline (f, l);
                                input := (others => nul);
-                               if (l'length <= 72) then
+                               if (l'length <= HSPALTE_MAX+1) then
                                        input(1 to l'length) := l.all;
                                        if (input(1) = '#') then
                                                next f1_loop;
@@ -112,7 +112,7 @@ begin
                        f2_loop : while not endfile(f) loop
                                readline (f, l);
                                expectedresult := (others => nul);
-                               if (l'length <= 72) then
+                               if (l'length <= HSPALTE_MAX+1) then
                                        expectedresult(1 to l'length) := l.all;
                                        if (expectedresult(1) = '#') then
                                                next f2_loop;
@@ -128,10 +128,10 @@ begin
 
                        -- ergebnis string richtig formatieren
                        hstrtmp := expectedresult;
-                       expectedresult := (72 => nul, others => ' ');
-                       for x in 1 to 71 loop
+                       expectedresult := (HSPALTE_MAX+1 => nul, others => ' ');
+                       for x in 1 to HSPALTE_MAX loop
                                if hstrtmp(x) /= nul then
-                                       expectedresult((71-y) + x) := hstrtmp(x);
+                                       expectedresult((HSPALTE_MAX-y) + x) := hstrtmp(x);
                                end if;
                        end loop;
 
@@ -143,7 +143,7 @@ begin
                        icwait(sys_clk, 5);
                        do_it <= '1';
                        run_tc := true;
-                       j := 1; k := 71;
+                       j := 1; k := HSPALTE_MAX;
 
                        while run_tc loop
                                wait on p_rget, p_wtake, p_finished, finished;

diff --git a/src/post_scanner_tb.vhd b/src/post_scanner_tb.vhd
index 0a1ff8386b90167b9badd5362184a1c37dba2a54..6d5956edebe36a2f13e8dd208b76ba7e4cce10e7 100644 (file)
--- a/src/post_scanner_tb.vhd
+++ b/src/post_scanner_tb.vhd
@@ -140,7 +140,7 @@ begin
                        f1_loop : while not endfile(f) loop
                                readline (f, l);
                                input := (others => nul);
-                               if (l'length <= 72) then
+                               if (l'length <= HSPALTE_MAX+1) then
                                        input(1 to l'length) := l.all;
                                        if (input(1) = '#') then
                                                next f1_loop;
@@ -156,7 +156,7 @@ begin
                        f2_loop : while not endfile(f) loop
                                readline (f, l);
                                expectedresult := (others => nul);
-                               if (l'length <= 72) then
+                               if (l'length <= HSPALTE_MAX+1) then
                                        expectedresult(1 to l'length) := l.all;
                                        if (expectedresult(1) = '#') then
                                                next f2_loop;