uart_rx: ein prozessmodell. spart weitere 3 logic elements :P

[hwmod.git] / src / beh_scanner_tb.vhd

diff --git a/src/beh_scanner_tb.vhd b/src/beh_scanner_tb.vhd
index 71007f1d56aafd21de78bc429d64404295c1a854..d9b7bb4610d4942cf4ee31cca788896c29e9cdf3 100644 (file)
--- a/src/beh_scanner_tb.vhd
+++ b/src/beh_scanner_tb.vhd
@@ -21,9 +21,8 @@ architecture sim of beh_scanner_tb is
 
        signal stop : boolean := false;
 begin
-       inst : entity work.scanner(beh)
-       port map
-       (
+       inst : scanner
+       port map (
                sys_clk => sys_clk,
                sys_res_n => sys_res_n,
                -- ps/2
@@ -51,30 +50,6 @@ begin
        end process;
 
        process
-               function valid_char (x : std_logic_vector(7 downto 0); last : std_logic_vector(7 downto 0)) return boolean is
-                               variable y : boolean;
-               begin
-                       case x is
-                               -- nur gueltig wenn davor ein numpad-mod byte gekommen ist
-                               -- 0 - 4
-                               when x"30" | x"31" | x"32" | x"33" | x"34" => y := last = x"e0";
-                               -- 5 - 9
-                               when x"35" | x"36" | x"37" | x"38" | x"39" => y := last = x"e0";
-                               -- *, +, -, /
-                               when x"2a" | x"2b" | x"2d" | x"2f" => y := last = x"e0";
-
-                               -- immer gueltig
-                               when x"20" => y := true; -- ' '
-                               when x"1c" => y := true; -- enter
-                               when x"0e" => y := true; -- backspace
-
-                               -- alle anderen zeichen sind immer ungueltig
-                               when others => y := false;
-                       end case;
-                       -- assert(false) report "x: " & integer'image(to_integer(unsigned(x))) & ", last: " & integer'image(to_integer(unsigned(last))) & ", result: " & boolean'image(y);
-                       return y;
-               end function;
-
                -- textio stuff
                use std.textio.all;
                file f : text open read_mode is "../../src/scanner.test";
@@ -87,7 +62,6 @@ begin
                variable checkall : boolean := true;
                variable run_tc, run_inner : boolean := true;
                variable i, j, k, y : natural;
-               variable last : std_logic_vector(7 downto 0);
        begin
                -- init & reset
                sys_res_n <= '0';
@@ -107,7 +81,7 @@ begin
                        f1_loop : while not endfile(f) loop
                                readline (f, l);
                                input := (others => nul);
-                               if (l'length <= 71) then
+                               if (l'length <= HSPALTE_MAX+1) then
                                        input(1 to l'length) := l.all;
                                        if (input(1) = '#') then
                                                next f1_loop;
@@ -123,7 +97,7 @@ begin
                        f2_loop : while not endfile(f) loop
                                readline (f, l);
                                expectedresult := (others => nul);
-                               if (l'length <= 71) then
+                               if (l'length <= HSPALTE_MAX+1) then
                                        expectedresult(1 to l'length) := l.all;
                                        if (expectedresult(1) = '#') then
                                                next f2_loop;
@@ -148,23 +122,34 @@ begin
                        j := 0; k := 1;
 
                        mainl : while run_tc loop
-                               last := data;
                                icwait(sys_clk, 1);
                                j := j + 1;
 
+                               if j = 73 then
+                                       run_tc := false;
+                                       assert(false) report "wtf @ schleife";
+                                       next mainl;
+                               end if;
+
                                new_data <= '1';
+
                                case input(j) is
-                                       when '$' => data <= x"1c"; -- $ (enter)
-                                       when '!' => data <= x"0e"; -- ! (backspace)
-                                       when '.' => data <= x"e0"; -- . (modifier fuer Numpad)
-                                       when others => data <= std_logic_vector(to_unsigned(character'pos(input(j)),8));
+                                       when nul => data <= ascii2sc(x"1c"); -- $ (enter)
+                                       when '!' => data <= ascii2sc(x"0e"); -- ! (backspace)
+                                       when '/' =>
+                                               data <= x"e0";
+                                               icwait(sys_clk, 1);
+                                               new_data <= '0';
+                                               icwait(sys_clk, 1);
+                                               new_data <= '1';
+                                               data <= SC_KP_DIV;
+                                       when others => data <= ascii2sc(std_logic_vector(to_unsigned(character'pos(input(j)),8)));
                                end case;
                                icwait(sys_clk, 1);
                                new_data <= '0';
 
-                               -- ack'en skippen, falls es ein "spezielles" zeichen ist (steht
-                               -- in abhaengigkeit zum vorherigen zeichen)
-                               if(not valid_char(data, last)) then
+                               -- ack'en skippen, falls es ein "spezielles" zeichen ist
+                               if(not valid_char(data)) then
                                        next mainl;
                                end if;