history/display: backspace logic

[hwmod.git] / src / beh_history_tb.vhd

diff --git a/src/beh_history_tb.vhd b/src/beh_history_tb.vhd
index c1e9a7dc5d5c81cd2469de5862ceccea858fa4cd..bf1eb89433df20c9e0fec8a1a6cfeb0fd2b85d54 100644 (file)
--- a/src/beh_history_tb.vhd
+++ b/src/beh_history_tb.vhd
@@ -13,7 +13,7 @@ architecture sim of beh_history_tb is
        -- system
        signal sys_clk, sys_res_n : std_logic;
        -- history/display
-       signal d_new_eingabe, d_new_result : std_logic;
+       signal d_new_eingabe, d_new_result, d_new_bs : std_logic;
        signal d_zeile : hzeile;
        signal d_spalte : hspalte;
        signal d_get, d_done : std_logic;
@@ -47,6 +47,7 @@ begin
                -- display
                d_new_eingabe => d_new_eingabe,
                d_new_result => d_new_result,
+               d_new_bs => d_new_bs,
                d_zeile => d_zeile,
                d_spalte => d_spalte,
                d_get => d_get,
@@ -65,6 +66,7 @@ begin
                -- history
                d_new_eingabe => d_new_eingabe,
                d_new_result => d_new_result,
+               d_new_bs => d_new_bs,
                d_zeile => d_zeile,
                d_spalte => d_spalte,
                d_get => d_get,
@@ -109,9 +111,9 @@ begin
        process
        begin
                free <= '0';
-               icwait(sys_clk, 2);
+               wait for 15 ns;
                free <= '1';
-               icwait(sys_clk, 2);
+               wait for 30 ns;
                if stop = true then
                        wait;
                end if;
@@ -144,7 +146,7 @@ begin
                        return y;
                end function;
 
-               function valid_char (x : std_logic_vector(7 downto 0); last : std_logic_vector(7 downto 0)) return boolean is
+               function valid_char (x : std_logic_vector(7 downto 0)) return boolean is
                                variable y : boolean;
                begin
                        case x is
@@ -169,7 +171,6 @@ begin
 
                variable run_tc, run_inner : boolean := true;
                variable i, j, y : natural;
-               variable last : std_logic_vector(7 downto 0);
        begin
                -- init & reset
                sys_res_n <= '0';
@@ -178,7 +179,7 @@ begin
                s_done <= '0';
                finished <= '0';
 
-               icwait(sys_clk, 5);
+               icwait(sys_clk, 20);
                sys_res_n <= '1';
 
                i := 1;
@@ -209,8 +210,7 @@ begin
                        j := 0;
 
                        mainl : while run_tc loop
-                               last := data;
-                               icwait(sys_clk, 1);
+                               icwait(sys_clk, 10);
                                j := j + 1;
 
                                if j = 73 then
@@ -237,7 +237,7 @@ begin
 
                                -- ack'en skippen, falls es ein "spezielles" zeichen ist (steht
                                -- in abhaengigkeit zum vorherigen zeichen)
-                               if(not valid_char(data, last)) then
+                               if(not valid_char(data)) then
                                        next mainl;
                                end if;