uart_rx: ein prozessmodell. spart weitere 3 logic elements :P

[hwmod.git] / src / beh_display_tb.vhd

diff --git a/src/beh_display_tb.vhd b/src/beh_display_tb.vhd
index 166510a7f2f7f6afbdd94272ecd0ecb6e9078be0..f1db735c297b08ee4f8d0f859259ba9d7b87b794 100644 (file)
--- a/src/beh_display_tb.vhd
+++ b/src/beh_display_tb.vhd
@@ -17,7 +17,7 @@ architecture sim of beh_display_tb is
        signal command : std_logic_vector(COMMAND_SIZE - 1 downto 0);
        signal command_data : std_logic_vector(3 * COLOR_SIZE + CHAR_SIZE -1 downto 0);
        -- history/display
-       signal d_new_eingabe, d_new_result : std_logic;
+       signal d_new_eingabe, d_new_result, d_new_bs : std_logic;
        signal d_zeile : hzeile;
        signal d_spalte : hspalte;
        signal d_get, d_done : std_logic;
@@ -29,13 +29,14 @@ architecture sim of beh_display_tb is
        signal stop : boolean := false;
 begin
        -- display
-       inst : entity work.display(beh)
+       inst : display
        port map (
                sys_clk => sys_clk,
                sys_res_n => sys_res_n,
                -- history
                d_new_eingabe => d_new_eingabe,
                d_new_result => d_new_result,
+               d_new_bs => d_new_bs,
                d_zeile => d_zeile,
                d_spalte => d_spalte,
                d_get => d_get,
@@ -58,6 +59,17 @@ begin
                end if;
        end process;
 
+       process
+       begin
+               free <= '0';
+               wait for 15 ns;
+               free <= '1';
+               wait for 30 ns;
+               if stop = true then
+                       wait;
+               end if;
+       end process;
+
        process
                variable input : hstring := "123513                                                                  ";
                variable ctmp : character;
@@ -69,9 +81,9 @@ begin
                sys_res_n <= '0';
                d_new_eingabe <= '0';
                d_new_result <= '0';
+               d_new_bs <= '0';
                d_done <= '0';
                d_char <= x"00";
-               free <= '1';
 
                icwait(sys_clk, 5);
                sys_res_n <= '1';
@@ -91,20 +103,13 @@ begin
                        icwait(sys_clk, 1);
                        d_done <= '0';
 
-                       free <= '0';
-                       icwait(sys_clk, 1);
-                       free <= '1';
-                       icwait(sys_clk, 1);
-
-                       -- fuer NOP
-                       free <= '0';
-                       icwait(sys_clk, 1);
-                       free <= '1';
-                       icwait(sys_clk, 1);
-
                        i := i + 1;
                end loop;
 
+               icwait(sys_clk, 2);
+               d_new_result <= '1';
+               icwait(sys_clk, 2);
+               d_new_result <= '0';
 
                if checkall then
                        report "alle testfaelle des Displays waren erfolgreich!";