makefile: coverage aktivieren wenn @ tilab

[hwmod.git] / src / Makefile

diff --git a/src/Makefile b/src/Makefile
index 10cc19e7c1f15138e5248027868b0f18a2d153bb..f8694b97bb678c31ad57d9ecfdb42d7f4f5d11b7 100644 (file)
--- a/src/Makefile
+++ b/src/Makefile
@@ -1,4 +1,5 @@
 SHELL := bash
+VPATH := .:ps2:textmode_vga:textmode_vga/mjl_stratix
 
 MPWD := $(shell pwd)
 D_BEHSIM := $(MPWD)/../sim/beh
@@ -9,6 +10,15 @@ POST_SDO_INST := inst
 QUARTUS := $(MPWD)/../quartus/calc
 QUOPT := --read_settings_files=on --write_settings_files=off calc -c calc
 
+ifeq ($(findstring $(HN), $(TILABHOSTS)),$(HN))
+# die option 's' geht nicht... :(
+COVERVCOM := -cover bcet
+COVERVSIM := -coverage
+else
+COVERVCOM :=
+COVERVSIM :=
+endif
+
 HN := $(shell hostname)
 TILABHOSTS := $(shell echo ti{1..9}) apps1
 
@@ -23,11 +33,15 @@ WORK := work
 # o source files der module
 # o reihenfolge ist wichtig
 # o keine testbechnes hier angeben
-SRCFILES := alu
+SRCFILES := alu parser scanner display sp_ram history uart_tx uart_rx
 
 # o files der packages
 # o keine testbechnes hier angeben
-PKGFILES := gen_pkg
+PKGFILES = math_pkg gen_pkg
+PKGFILES += textmode_vga/textmode_vga_platform_dependent_pkg
+PKGFILES += textmode_vga/textmode_vga_pkg
+PKGFILES += textmode_vga/font_pkg
+PKGFILES += textmode_vga/textmode_vga_component_pkg
 
 BEH_IFILES = $(PKGFILES) $(SRCFILES)
 BEH_IFILES := $(strip $(BEH_IFILES))
@@ -39,10 +53,10 @@ POST_SRC = $(SRCFILES)
 
 
 #virtuelle targets fuer behsim: weil wir sowas wie ein objectfile von vcom nicht bekommen. bessere ideen sind willkommen
-BEH_VTARGETS := $(foreach n, $(BEH_IFILES), $(D_BEHSIM)/$(WORK)/$(n)/_primary.dat)
+BEH_VTARGETS := $(foreach n, $(notdir $(BEH_IFILES)), $(D_BEHSIM)/$(WORK)/$(n)/_primary.dat)
 
 #virtuelle targets fuer packagefiles der postsim
-POST_VTARGETS := $(foreach n, $(POST_IFILES), $(D_POSTSIM)/$(WORK)/$(n)/_primary.dat)
+POST_VTARGETS := $(foreach n, $(notdir $(POST_IFILES)), $(D_POSTSIM)/$(WORK)/$(n)/_primary.dat)
 
 #virtuelle targets fuer sourcefiles der postsim
 POST_SRC_VTARGETS := $(foreach n, $(POST_SRC), $(n).vhd)
@@ -63,12 +77,12 @@ $(D_BEHSIM)/modelsim.ini:
 
 $(D_BEHSIM)/$(WORK)/%/_primary.dat: %.vhd $(D_BEHSIM)/modelsim.ini
        @echo " CC    $<"
-       @cd $(D_BEHSIM); \
-       vcom -work $(WORK) $(MPWD)/$<
+       cd $(D_BEHSIM); \
+       vcom $(COVERVCOM) -work $(WORK) $(MPWD)/$<
 
 beh_%: $(D_BEHSIM)/$(WORK)/beh_%_tb/_primary.dat beh_%_tb.do behsim
        cd $(D_BEHSIM); \
-       vsim "work.$@_tb(sim)" -f /dev/null -do $(MPWD)/$@_tb.do
+       vsim $(COVERVSIM) "work.$@_tb(sim)" -f /dev/null -do $(MPWD)/$@_tb.do
 
 #postsim
 postsim: $(POST_VHO) $(POST_SDO)