2 use ieee.std_logic_1164.all;
3 use ieee.numeric_std.all;
8 CLK_FREQ : integer := 33000000;
9 BAUDRATE : integer := 115200
12 sys_clk : in std_logic;
13 sys_res_n : in std_logic;
15 rx_data : out std_logic_vector(7 downto 0);
16 rx_new : out std_logic
20 architecture beh of uart_rx is
21 constant BAUD : integer := CLK_FREQ/BAUDRATE;
23 type STATE_UART_RX is (IDLE, STARTBIT, DBITS, STOPBIT);
24 signal state : STATE_UART_RX;
26 signal startbitdetection : std_logic_vector(1 downto 0);
27 signal bitcnt : integer range 0 to 7;
28 signal baudcnt : integer range 0 to BAUD + 2;
29 signal rx_data_int : std_logic_vector(7 downto 0);
31 rx_data <= rx_data_int;
32 process(sys_clk, sys_res_n)
34 if (sys_res_n = '0') then
36 rx_data_int <= (others => '0');
40 startbitdetection <= b"11";
41 elsif rising_edge(sys_clk) then
42 startbitdetection <= startbitdetection(0) & rxd;
44 baudcnt <= baudcnt + 1;
48 -- bei fallender flanke koennte starbit folgen
49 if startbitdetection = b"10" then
53 rx_data_int <= (others => '0');
55 -- halbe BAUDTIME warten, um immer in der mitte abzutasten
56 -- vgl. http://upload.wikimedia.org/wikipedia/de/d/de/RS-232_timing.png
57 if baudcnt = BAUD/2 then
60 -- starbit (= '0')? dann kommen daten
65 -- sonst war das nix...
70 if baudcnt = BAUD then
73 rx_data_int <= rxd & rx_data_int(7 downto 1);
82 if baudcnt = BAUD then