src/textmode_vga/video_memory_beh.vhd

   1 -------------------------------------------------------------------------\r
   2 --\r
   3 -- Filename: video_memory_beh.vhd\r
   4 -- =========\r
   5 --\r
   6 -- Short Description:\r
   7 -- ==================\r
   8 --   Behavioral implementation of the video memory. The access time\r
   9 --   is exactly one clock cycle.\r
  10 --\r
  11 -------------------------------------------------------------------------\r
  12 \r
  13 library ieee;
  14 use ieee.std_logic_1164.all;
  15 use ieee.numeric_std.all;
  16 use work.textmode_vga_pkg.all;
  17 use work.font_pkg.all;
  18
  19 architecture beh of video_memory is
  20   subtype RAM_ENTRY is std_logic_vector(DATA_WIDTH - 1 downto 0);
  21   type RAM_TYPE is array(0 to (2 ** (ROW_ADDR_WIDTH + COL_ADDR_WIDTH)) - 1) of RAM_ENTRY;
  22   signal ram : RAM_TYPE :=
  23   (
  24     others => (others => '0')
  25   );
  26 begin
  27   process(vga_clk)
  28     variable vga_row_address_int, sm_row_address_int : integer range 0 to 2 * LINE_COUNT - 2;
  29     variable vga_row_address_vector, sm_row_address_vector : std_logic_vector(ROW_ADDR_WIDTH - 1 downto 0);
  30     variable vga_address, sm_address : std_logic_vector(COL_ADDR_WIDTH + ROW_ADDR_WIDTH - 1 downto 0);
  31   begin
  32     if rising_edge(vga_clk) then
  33       vga_row_address_int := to_integer(unsigned(vga_row_address)) + to_integer(unsigned(sm_scroll_address));
  34       if vga_row_address_int > LINE_COUNT - 1 then
  35         vga_row_address_int := vga_row_address_int - LINE_COUNT;
  36       end if;
  37       vga_row_address_vector := std_logic_vector(to_unsigned(vga_row_address_int, ROW_ADDR_WIDTH));
  38       vga_address := vga_row_address_vector & vga_col_address;
  39       vga_data <= ram(to_integer(unsigned(vga_address)));
  40
  41       if sm_wr = '1' then
  42         sm_row_address_int := to_integer(unsigned(sm_row_address)) + to_integer(unsigned(sm_scroll_address));
  43         if sm_row_address_int > LINE_COUNT - 1 then
  44           sm_row_address_int := sm_row_address_int - LINE_COUNT;
  45         end if;
  46         sm_row_address_vector := std_logic_vector(to_unsigned(sm_row_address_int, ROW_ADDR_WIDTH));
  47         sm_address := sm_row_address_vector & sm_col_address;
  48         ram(to_integer(unsigned(sm_address))) <= sm_data;
  49       end if;
  50     end if;
  51   end process;
  52 end architecture beh;