2 use ieee.std_logic_1164.all;
3 use ieee.numeric_std.all;
6 entity pc_communication is
8 sys_clk : in std_logic;
9 sys_res_n : in std_logic;
15 tx_data : out std_logic_vector(7 downto 0);
16 tx_new : out std_logic;
17 tx_done : in std_logic;
20 rx_data : in std_logic_vector(7 downto 0);
21 rx_new : in std_logic;
25 d_spalte : out hspalte;
26 d_get : out std_logic;
27 d_done : in std_logic;
30 end entity pc_communication;
32 architecture beh of pc_communication is
33 signal push_history, push_history_next : std_logic;
35 signal spalte, spalte_next : integer range 1 to hspalte_max + 1;
36 signal zeile , zeile_next : integer range 1 to hzeile_max + 1;
37 signal spalte_up, spalte_up_next : std_logic;
38 signal get, get_next : std_logic;
39 signal new_i, new_i_next : std_logic;
40 signal tx_done_i, tx_done_i_next : std_logic;
41 signal tx_data_i, tx_data_i_next : std_logic_vector (7 downto 0);
42 signal d_done_i : std_logic;
43 signal s_done, s_done_next : std_logic;
45 signal char, char_next : hbyte;
46 signal char_en : std_logic;
47 type STATE_PC is (IDLE, FETCH, FORWARD, DONE);
48 signal state, state_next : STATE_PC ;
53 d_zeile <= hzeile(std_logic_vector(to_unsigned(zeile,7)));
54 d_spalte <= hspalte(std_logic_vector(to_unsigned(spalte,7)));
59 tx_done_i_next <= tx_done;
62 sync: process (sys_clk, sys_res_n)
64 if sys_res_n = '0' then
71 tx_data_i <= "00000000";
75 elsif rising_edge(sys_clk) then
76 push_history <= push_history_next;
77 spalte <= spalte_next;
82 tx_done_i <= tx_done_i_next;
83 tx_data_i <= tx_data_i_next;
84 spalte_up <= spalte_up_next;
85 s_done <= s_done_next;
86 if (char_en = '1') then
92 async_push_history : process (rx_new, rx_data, btn_a)
95 if rx_data = X"41" then
96 push_history_next <= '1';
98 push_history_next <= '0';
100 elsif btn_a = '1' then
101 push_history_next <= '1';
103 push_history_next <= '0';
105 end process async_push_history;
107 output_pc : process (state, zeile, spalte, char, tx_done_i, spalte_up)
112 spalte_up_next <= '0';
114 spalte_next <= spalte;
116 tx_data_i_next <= tx_data_i;
118 if spalte_up = '1' then
119 if spalte = hspalte_max then
120 if zeile = hzeile_max then
126 zeile_next <= zeile + 1;
129 spalte_next <= spalte + 1; --overflow here!
142 tx_data_i_next <= char;
144 if (tx_done_i = '1') then
145 spalte_up_next <= '1';
151 end process output_pc;
153 next_state_pc : process (rx_new, btn_a, d_done, tx_done_i, s_done)
157 if rx_new = '1' or btn_a = '1' then
161 if (d_done = '1') then
162 state_next <= FORWARD;
163 elsif (s_done = '1') then
167 if (tx_done_i = '1') then
173 end process next_state_pc;
175 end architecture beh;