2 use ieee.std_logic_1164.all;
3 use ieee.numeric_std.all;
7 subtype alu_ops is std_logic_vector(2 downto 0);
8 constant ALU_NOP : alu_ops := "000";
9 constant ALU_SUB : alu_ops := "001";
10 constant ALU_ADD : alu_ops := "010";
11 constant ALU_MUL : alu_ops := "011";
12 constant ALU_DIV : alu_ops := "100";
13 constant ALU_DONE : alu_ops := "101";
15 constant CBITS : integer := 32;
16 subtype csigned is signed((CBITS-1) downto 0);
17 subtype divinteger is unsigned(4 downto 0);
18 -- integer ist 32bit (31bit + sign)
19 subtype cinteger is integer;
21 -- 50 zeilen * 71 zeichen * 2 (berechnung + ergebnis) = 7100 bytes
22 constant H_RAM_SIZE : integer := 7100;
23 constant H_RAM_WIDTH : integer := log2c(H_RAM_SIZE);
24 subtype hspalte is std_logic_vector(6 downto 0);
25 subtype hzeile is std_logic_vector(6 downto 0);
26 subtype hbyte is std_logic_vector(7 downto 0);
27 subtype hstring is string(1 to 72);
28 subtype hstr_int is integer range 0 to 72;
30 procedure icwait(signal clk_i : IN std_logic; cycles: natural);
32 -- http://www.marjorie.de/ps2/scancode-set2.htm
33 constant SC_KP_0 : std_logic_vector(7 downto 0) := x"70";
34 constant SC_KP_1 : std_logic_vector(7 downto 0) := x"69";
35 constant SC_KP_2 : std_logic_vector(7 downto 0) := x"72";
36 constant SC_KP_3 : std_logic_vector(7 downto 0) := x"7a";
37 constant SC_KP_4 : std_logic_vector(7 downto 0) := x"6b";
38 constant SC_KP_5 : std_logic_vector(7 downto 0) := x"73";
39 constant SC_KP_6 : std_logic_vector(7 downto 0) := x"74";
40 constant SC_KP_7 : std_logic_vector(7 downto 0) := x"6c";
41 constant SC_KP_8 : std_logic_vector(7 downto 0) := x"75";
42 constant SC_KP_9 : std_logic_vector(7 downto 0) := x"7d";
44 constant SC_0 : std_logic_vector(7 downto 0) := x"45";
45 constant SC_1 : std_logic_vector(7 downto 0) := x"16";
46 constant SC_2 : std_logic_vector(7 downto 0) := x"1e";
47 constant SC_3 : std_logic_vector(7 downto 0) := x"26";
48 constant SC_4 : std_logic_vector(7 downto 0) := x"25";
49 constant SC_5 : std_logic_vector(7 downto 0) := x"2e";
50 constant SC_6 : std_logic_vector(7 downto 0) := x"36";
51 constant SC_7 : std_logic_vector(7 downto 0) := x"3d";
52 constant SC_8 : std_logic_vector(7 downto 0) := x"3e";
53 constant SC_9 : std_logic_vector(7 downto 0) := x"46";
55 constant SC_KP_PLUS : std_logic_vector(7 downto 0) := x"79";
56 constant SC_KP_MINUS : std_logic_vector(7 downto 0) := x"7b";
57 constant SC_KP_MUL : std_logic_vector(7 downto 0) := x"7c";
58 constant SC_KP_DIV : std_logic_vector(7 downto 0) := x"4a"; -- inkl. 0xe0!
60 -- fuer deutsches layout, alle anderen zeichen sind unguenstig belegt
61 constant SC_PLUS : std_logic_vector(7 downto 0) := x"5b";
63 constant SC_ENTER : std_logic_vector(7 downto 0) := x"5a";
64 constant SC_BKSP : std_logic_vector(7 downto 0) := x"66";
65 constant SC_SPACE : std_logic_vector(7 downto 0) := x"29";
68 package body gen_pkg is
69 procedure icwait(signal clk_i : IN std_logic; cycles: Natural) is
71 for i in 1 to cycles loop
72 wait until clk_i= '0' and clk_i'event;
75 end package body gen_pkg;