2 use ieee.std_logic_1164.all;
3 use ieee.numeric_std.all;
6 subtype alu_ops is std_logic_vector(2 downto 0);
7 constant ALU_NOP : alu_ops := "000";
8 constant ALU_SUB : alu_ops := "001";
9 constant ALU_ADD : alu_ops := "010";
10 constant ALU_MUL : alu_ops := "011";
11 constant ALU_DIV : alu_ops := "100";
12 constant ALU_DONE : alu_ops := "101";
14 constant CBITS : integer := 32;
15 subtype csigned is signed((CBITS-1) downto 0);
16 subtype divinteger is integer range -33 to 33;
17 -- integer ist 32bit (31bit + sign)
18 subtype cinteger is integer;
20 subtype hspalte is std_logic_vector(6 downto 0);
21 subtype hzeile is std_logic_vector(4 downto 0);
22 subtype hbyte is std_logic_vector(7 downto 0);
23 subtype hstring is string(1 to 71);
24 subtype hstr_int is integer range 0 to 72;
26 function find_msb(a : csigned) return divinteger;
27 procedure icwait(signal clk_i : IN std_logic; cycles: natural);
30 package body gen_pkg is
31 function find_msb(a : csigned) return divinteger is
32 variable r : divinteger := 0;
34 for i in (CBITS-1) downto 0 loop
39 end function find_msb;
41 procedure icwait(signal clk_i : IN std_logic; cycles: Natural) is
43 for i in 1 to cycles loop
44 wait until clk_i= '0' and clk_i'event;
47 end package body gen_pkg;