display/history: komisches init verhalten
[hwmod.git] / src / display.vhd
1 library ieee;
2 use ieee.std_logic_1164.all;
3 use ieee.numeric_std.all;
4 use work.gen_pkg.all;
5 use work.textmode_vga_component_pkg.all;
6 use work.textmode_vga_pkg.all;
7 use work.textmode_vga_platform_dependent_pkg.all;
8
9 entity display is
10         port (
11                 sys_clk : in std_logic;
12                 sys_res_n : in std_logic;
13                 -- History
14                 d_new_eingabe : in std_logic;
15                 d_new_result : in std_logic;
16                 d_zeile : out hzeile;
17                 d_spalte : out hspalte;
18                 d_get : out std_logic;
19                 d_done : in std_logic;
20                 d_char : in hbyte;
21                 -- VGA
22                 command : out std_logic_vector(7 downto 0);
23                 command_data : out std_logic_vector(31 downto 0);
24                 free : in std_logic
25         );
26 end entity display;
27
28 architecture beh of display is
29         type DISPLAY_STATE is (S_INIT, SIDLE, S_NEW_RESULT, S_NEW_INPUT, S_COUNTUP, S_GETCH,
30         S_CR1, S_NL1, S_PUTCH1, S_PUTCH2, S_WAIT, S_NOP1);
31         signal state_int, state_next : DISPLAY_STATE;
32         signal d_zeile_int, d_zeile_next : hzeile;
33         signal d_spalte_int, d_spalte_next : hspalte;
34         signal d_get_int, d_get_next : std_logic;
35         signal command_int, command_next : std_logic_vector(7 downto 0);
36         signal command_data_int, command_data_next : std_logic_vector(31 downto 0);
37 begin
38         d_zeile <= d_zeile_int;
39         d_spalte <= d_spalte_int;
40         d_get <= d_get_int;
41         command <= command_int;
42         command_data <= command_data_int;
43
44         process(sys_clk, sys_res_n)
45         begin
46                 if sys_res_n = '0' then
47                         -- internal
48                         state_int <= S_INIT;
49                         -- out
50                         d_zeile_int <= (others => '0');
51                         d_spalte_int <= (others => '0');
52                         d_get_int <= '0';
53                         command_int <= COMMAND_NOP;
54                         command_data_int <= (others => '0');
55                 elsif rising_edge(sys_clk) then
56                         -- internal
57                         state_int <= state_next;
58                         -- out
59                         d_zeile_int <= d_zeile_next;
60                         d_spalte_int <= d_spalte_next;
61                         d_get_int <= d_get_next;
62                         command_int <= command_next;
63                         command_data_int <= command_data_next;
64                 end if;
65         end process;
66
67         -- next state
68         process(state_int, d_new_result, d_new_eingabe, d_done, free, d_spalte_int,
69                 d_char)
70         begin
71                 state_next <= state_int;
72
73                 case state_int is
74                         when S_INIT =>
75                                 state_next <= SIDLE;
76                         when SIDLE =>
77                                 if d_new_eingabe = '1' then
78                                         state_next <= S_NEW_INPUT;
79                                 end if;
80                                 if d_new_result = '1' then
81                                         state_next <= S_NEW_RESULT;
82                                 end if;
83                         when S_NEW_RESULT =>
84                                 state_next <= S_CR1;
85                         when S_NEW_INPUT =>
86                                 state_next <= S_COUNTUP;
87                         when S_CR1 =>
88                                 if free = '0' then
89                                         state_next <= S_NL1;
90                                 end if;
91                         when S_NL1 =>
92                                 if free = '0' then
93                                         state_next <= S_COUNTUP;
94                                 end if;
95                         when S_COUNTUP =>
96                                 state_next <= S_GETCH;
97                         when S_GETCH =>
98                                 if free = '1' and d_done = '1' and d_new_result = '0' and d_new_eingabe = '0' then
99                                         state_next <= S_PUTCH1;
100                                 end if;
101                         when S_PUTCH1 =>
102                                 state_next <= S_PUTCH2;
103                         when S_PUTCH2 =>
104                                 if free = '0' or (free = '1' and d_char = x"00") then
105                                         state_next <= S_WAIT;
106                                 end if;
107                         when S_WAIT =>
108                                 if free = '1' and d_done = '0' then
109                                         state_next <= S_NOP1;
110                                 end if;
111                         when S_NOP1 =>
112                                 if free = '1' then
113                                         state_next <= SIDLE;
114                                         --if unsigned(d_spalte_int) = 71 then
115                                         --      state_next <= SIDLE;
116                                         --else
117                                         --      state_next <= S_COUNTUP;
118                                         --end if;
119                                 end if;
120                 end case;
121         end process;
122
123         -- out
124         process(state_int, d_zeile_int, d_spalte_int, d_get_int, command_int,
125                 command_data_int, d_char)
126         begin
127                 d_zeile_next <= d_zeile_int;
128                 d_spalte_next <= d_spalte_int;
129                 d_get_next <= '0';
130                 command_next <= command_int;
131                 command_data_next <= command_data_int;
132
133                 case state_int is
134                         when S_INIT =>
135                                 d_spalte_next <= (others => '0');
136                                 d_zeile_next <= (others => '0');
137                         when SIDLE =>
138                                 null;
139                         when S_NEW_INPUT =>
140                                 null;
141                         when S_NEW_RESULT =>
142                                 d_spalte_next <= (others => '0');
143                                 case d_zeile_int is
144                                         when "11111" => d_zeile_next <= "00000";
145                                         when others => d_zeile_next <= std_logic_vector(unsigned(d_zeile_int) + 1);
146                                 end case;
147                         when S_CR1 =>
148                                 command_next <= COMMAND_SET_CHAR;
149                                 command_data_next <= x"ffffff" & x"0d"; -- carrige return
150                         when S_NL1 =>
151                                 command_next <= COMMAND_SET_CHAR;
152                                 command_data_next <= x"ffffff" & x"0a"; -- newline
153                         when S_COUNTUP =>
154                                 d_get_next <= '1';
155                                 d_spalte_next <= std_logic_vector(unsigned(d_spalte_int) + 1);
156                         when S_GETCH =>
157                                 d_get_next <= '1';
158                         when S_PUTCH1 =>
159                                 if d_char /= x"00" then
160                                         command_next <= COMMAND_SET_CHAR;
161                                         command_data_next <= x"ffffff" & std_logic_vector(d_char);
162                                 end if;
163                         when S_PUTCH2 => null;
164                         when S_WAIT | S_NOP1 =>
165                                 command_next <= COMMAND_NOP;
166                                 command_data_next <= x"00000000";
167                 end case;
168         end process;
169 end architecture beh;