2 use ieee.std_logic_1164.all;
3 use ieee.numeric_std.all;
6 entity beh_parser_tb is
7 end entity beh_parser_tb;
9 architecture sim of beh_parser_tb is
11 signal sys_clk, sys_res_n : std_logic;
13 signal p_rw, p_rget, p_rdone, p_wtake, p_wdone, p_finished : std_logic;
14 signal p_read, p_write : hbyte;
15 signal p_spalte : hspalte;
18 signal opcode : alu_ops;
19 signal op1, op2, op3 : csigned;
20 signal do_calc, calc_done : std_logic;
23 signal do_it : std_logic;
24 signal finished : std_logic;
26 signal stop : boolean := false;
28 inst : entity work.parser(beh)
32 sys_res_n => sys_res_n,
41 p_finished => p_finished,
48 calc_done => calc_done,
49 -- TODO: calc_error : in std_logic;
55 instalu : entity work.alu(beh)
59 sys_res_n => sys_res_n,
61 calc_done => calc_done,
82 file f : text open read_mode is "../../src/parser.test";
85 variable input : hstring;
86 variable expectedresult : hstring;
87 variable realresult : hstring;
88 variable hstrtmp : hstring;
90 variable checkall : boolean := true;
91 variable run_tc : boolean := true;
92 variable i, j, k, y : natural;
98 p_read <= (others => '0');
105 f_loop : while not endfile(f) loop
106 realresult := (71 => character'val(0), others => character'val(32));
108 f1_loop : while not endfile(f) loop
110 input := (others => character'val(0));
111 if (l'length <= 72) then
112 input(1 to l'length) := l.all;
113 if (input(1) = '#') then
119 report "fehler in parser.test: eingabe zu lange in testfall " & natural'image(i);
124 f2_loop : while not endfile(f) loop
126 expectedresult := (others => character'val(0));
127 if (l'length <= 72) then
128 expectedresult(1 to l'length) := l.all;
129 if (expectedresult(1) = '#') then
136 report "fehler in parser.test: eingabe zu lange in testfall " & natural'image(i);
141 -- ergebnis string richtig formatieren
142 hstrtmp := expectedresult;
143 expectedresult := (71 => character'val(0), others => character'val(32));
144 for x in 1 to 70 loop
145 if hstrtmp(x) /= character'val(0) then
146 expectedresult((70-y) + x) := hstrtmp(x);
151 report "testcase(" & natural'image(i) & ").input: " & input;
152 report "testcase(" & natural'image(i) & ").expectedresult: " & expectedresult;
161 wait on p_rget, p_wtake, p_finished, finished;
165 p_read <= hbyte( to_unsigned(character'pos(input(j)),8) );
173 if p_wtake = '1' then
174 realresult(k) := character'val(to_integer(unsigned(p_write)));
178 if p_wtake = '0' then
182 if p_finished = '1' or finished = '1' then
188 report "realresult : " & realresult;
189 if realresult /= expectedresult then
192 report "==================";
196 report "alle testfaelle des Parser waren erfolgreich!";
198 report "nicht alle testfaelle des Parsers waren erfolgreich!";
203 end architecture sim;