d05236adfb851ffea9e8a69b8c1b52fea164301f
[hwmod.git] / src / beh_history_tb.vhd
1 library ieee;
2 use ieee.std_logic_1164.all;
3 use ieee.numeric_std.all;
4 use work.gen_pkg.all;
5 use work.textmode_vga_component_pkg.all;
6 use work.textmode_vga_pkg.all;
7 use work.textmode_vga_platform_dependent_pkg.all;
8
9 entity beh_history_tb is
10 end entity beh_history_tb;
11
12 architecture sim of beh_history_tb is
13         -- system
14         signal sys_clk, sys_res_n : std_logic;
15         -- history/display
16         signal d_new_eingabe, d_new_result, d_new_bs : std_logic;
17         signal d_zeile : hzeile;
18         signal d_spalte : hspalte;
19         signal d_get, d_done : std_logic;
20         signal d_char : hbyte;
21         -- history/scanner
22         signal s_char : hbyte;
23         signal s_take, s_done, s_backspace : std_logic;
24         -- ps/2
25         signal new_data : std_logic;
26         signal data : std_logic_vector(7 downto 0);
27         -- vga/display
28         signal free : std_logic;
29         signal command : std_logic_vector(COMMAND_SIZE - 1 downto 0);
30         signal command_data : std_logic_vector(3 * COLOR_SIZE + CHAR_SIZE -1 downto 0);
31         -- history/parser
32         signal p_rget : std_logic;
33         signal p_rdone : std_logic;
34         signal p_read : hbyte;
35         signal p_wtake : std_logic;
36         signal p_wdone : std_logic;
37         signal p_write : hbyte;
38         signal p_finished : std_logic;
39         -- parser/scanner
40         signal do_it, finished : std_logic;
41         --uart_tx
42         signal tx_data : std_logic_vector(7 downto 0);
43         signal tx_new, tx_done, txd : std_logic;
44         --pc_communication
45         signal pc_zeile : hzeile;
46         signal pc_spalte : hspalte;
47         signal pc_get, pc_done : std_logic;
48         signal pc_char : hbyte;
49         signal pc_busy : std_logic;
50         --dummy button
51         signal btn_a_int : std_logic;
52
53         --output beautifier
54         signal tx_debug : character;
55
56         signal stop : boolean := false;
57 begin
58         -- history
59         inst : entity work.history(beh)
60         port map (
61                 sys_clk => sys_clk,
62                 sys_res_n => sys_res_n,
63                 -- scanner
64                 s_char => s_char,
65                 s_take => s_take,
66                 s_done => s_done,
67                 s_backspace => s_backspace,
68                 -- display
69                 d_new_eingabe => d_new_eingabe,
70                 d_new_result => d_new_result,
71                 d_new_bs => d_new_bs,
72                 d_zeile => d_zeile,
73                 d_spalte => d_spalte,
74                 d_get => d_get,
75                 d_done => d_done,
76                 d_char => d_char,
77                 -- parser
78                 p_rget => p_rget,
79                 p_rdone => p_rdone,
80                 p_read => p_read,
81                 p_wtake => p_wtake,
82                 p_wdone => p_wdone,
83                 p_write => p_write,
84                 p_finished => p_finished,
85                 -- PC-komm
86                 pc_get    => pc_get,
87                 pc_spalte => pc_spalte,
88                 pc_zeile  => pc_zeile,
89                 pc_char   => pc_char,
90                 pc_busy   => pc_busy,
91                 pc_done   => pc_done
92         );
93
94         -- display
95         inst_disp : entity work.display(beh)
96         port map (
97                 sys_clk => sys_clk,
98                 sys_res_n => sys_res_n,
99                 -- history
100                 d_new_eingabe => d_new_eingabe,
101                 d_new_result => d_new_result,
102                 d_new_bs => d_new_bs,
103                 d_zeile => d_zeile,
104                 d_spalte => d_spalte,
105                 d_get => d_get,
106                 d_done => d_done,
107                 d_char => d_char,
108                 -- vga
109                 command => command,
110                 command_data => command_data,
111                 free => free
112         );
113
114         -- parser
115         inst_parser : entity work.parser(beh)
116         port map (
117                 sys_clk => sys_clk,
118                 sys_res_n => sys_res_n,
119                 -- history
120                 p_rget => p_rget,
121                 p_rdone => p_rdone,
122                 p_read => p_read,
123                 p_wtake => p_wtake,
124                 p_wdone => p_wdone,
125                 p_write => p_write,
126                 p_finished => p_finished,
127                 -- scanner
128                 do_it => do_it,
129                 finished => finished
130         );
131
132         -- scanner
133         inst_scan : entity work.scanner(beh)
134         port map (
135                 sys_clk => sys_clk,
136                 sys_res_n => sys_res_n,
137                 -- ps/2
138                 new_data => new_data,
139                 data => data,
140                 -- history
141                 s_char => s_char,
142                 s_take => s_take,
143                 s_done => s_done,
144                 s_backspace => s_backspace,
145                 -- Parser
146                 do_it => do_it,
147                 finished => finished
148         );
149         --uart_tx
150         inst_uart : entity work.uart_tx(beh)
151         port map (
152                 sys_clk => sys_clk,
153                 sys_res_n => sys_res_n,
154                 txd => txd,
155                 tx_data =>tx_data,
156                 tx_new => tx_new,
157                 tx_done => tx_done
158         );
159
160         --pc_communication
161         inst_pc_com : entity work.pc_communication(beh)
162         port map(
163                 sys_clk => sys_clk,
164                 sys_res_n => sys_res_n,
165                 --button
166                 btn_a => btn_a_int,
167                 --uart_tx
168                 tx_data => tx_data,
169                 tx_new => tx_new,
170                 tx_done => tx_done,
171                 --uart_rx
172                 rx_data => (others => '0'),
173                 rx_new => '0',
174                 -- History
175                 pc_zeile  => pc_zeile,
176                 pc_spalte => pc_spalte,
177                 pc_get    => pc_get,
178                 pc_done   => pc_done,
179                 pc_char   => pc_char,
180                 pc_busy   => pc_busy
181         );
182         tx_debug <= character'val(to_integer(unsigned(tx_data)));
183
184         process
185         begin
186                 sys_clk <= '0';
187                 wait for 15 ns;
188                 sys_clk <= '1';
189                 wait for 15 ns;
190                 if stop = true then
191                         wait;
192                 end if;
193         end process;
194
195         process
196         begin
197                 free <= '0';
198                 wait for 15 ns;
199                 free <= '1';
200                 wait for 30 ns;
201                 if stop = true then
202                         wait;
203                 end if;
204         end process;
205
206         process
207                 -- textio stuff
208                 use std.textio.all;
209                 file f : text open read_mode is "../../src/history.test";
210                 variable l : line;
211
212                 variable input : string(1 to 100);
213
214                 variable run_tc, run_inner : boolean := true;
215                 variable i, j, y : natural;
216         begin
217                 -- init & reset
218                 sys_res_n <= '0';
219                 new_data <= '0';
220                 data <= (others => '0');
221
222                 icwait(sys_clk, 20);
223                 sys_res_n <= '1';
224
225                 i := 1;
226                 f_loop : while not endfile(f) loop
227                         data <= (others => '0');
228
229                         f1_loop : while not endfile(f) loop
230                                 readline (f, l);
231                                 input := (others => nul);
232                                 if (l'length <= 100) then
233                                         input(1 to l'length) := l.all;
234                                         if (input(1) = '#') then
235                                                 next f1_loop;
236                                         else
237                                                 exit f1_loop;
238                                         end if;
239                                 else
240                                         report "fehler in history.test: eingabe zu lange in testfall " & natural'image(i);
241                                         next f_loop;
242                                 end if;
243                         end loop f1_loop;
244
245                         report "testcase(" & natural'image(i) & ").input: " & input;
246                         i := i + 1;
247
248                         icwait(sys_clk, 5);
249                         run_tc := true;
250                         j := 0;
251
252                         mainl : while run_tc loop
253                                 icwait(sys_clk, 10);
254                                 j := j + 1;
255
256                                 if j = 101 then
257                                         run_tc := false;
258                                         assert(false) report "wtf @ schleife";
259                                         next mainl;
260                                 end if;
261
262                                 new_data <= '1';
263
264                                 case input(j) is
265                                         when nul => data <= ascii2sc(x"1c"); -- $ (enter)
266                                         when '!' => data <= ascii2sc(x"0e"); -- ! (backspace)
267                                         when '/' =>
268                                                 data <= x"e0";
269                                                 icwait(sys_clk, 1);
270                                                 new_data <= '0';
271                                                 icwait(sys_clk, 1);
272                                                 new_data <= '1';
273                                                 data <= SC_KP_DIV;
274                                         when others => data <= ascii2sc(std_logic_vector(to_unsigned(character'pos(input(j)),8)));
275                                 end case;
276
277                                 -- ack'en skippen, falls es ein "spezielles" zeichen ist (steht
278                                 -- in abhaengigkeit zum vorherigen zeichen)
279                                 if(not valid_char(data)) then
280                                         next mainl;
281                                 end if;
282
283                                 -- wuenschswert waere das hier:
284                                 -- > wait on s_backspace, s_take, do_it;
285                                 -- geht aber leider nicht, weil sich die signale vllt schon
286                                 -- geaendert haben
287                                 run_inner := true;
288                                 main_inner : while run_inner loop
289                                         icwait(sys_clk, 1);
290
291                                         run_inner := false;
292                                         if s_backspace = '1' or s_take = '1' then
293                                                 icwait(sys_clk, 1);
294                                                 wait on s_take; -- = '0'
295                                                 icwait(sys_clk, 1);
296                                         elsif do_it = '1' then
297                                                 -- dauert normalweiser noch laenger (parser braucht
298                                                 -- relativ lange)
299                                                 icwait(sys_clk, 7);
300                                                 wait on do_it; -- = '0'
301                                                 icwait(sys_clk, 850);
302
303                                                 run_tc := false;
304                                         else
305                                                 -- assert(false) report "history_tb: kann passieren. wenn tb haengt, dann hier auskommentieren";
306                                                 run_inner := true;
307                                         end if;
308                                 end loop;
309                         end loop;
310                         report "==================";
311                 end loop f_loop;
312
313                 icwait(sys_clk, 850);
314                 stop <= true;
315                 wait;
316         end process;
317
318         btn_pressed : process is
319         begin
320                 btn_a_int <= '1';
321                 wait until sys_res_n = '1';
322                 wait for 50000 * 15 ns;
323                 wait until rising_edge(sys_clk);
324                 btn_a_int <= '0';
325                 wait for 30 ns;
326                 btn_a_int <= '1';
327                 wait;
328         end process btn_pressed;
329 end architecture sim;