beh_history: bla, was hatten wir heute gelernt? signale mehrfach treiben ist boese!
[hwmod.git] / src / beh_history_tb.vhd
1 library ieee;
2 use ieee.std_logic_1164.all;
3 use ieee.numeric_std.all;
4 use work.gen_pkg.all;
5 use work.textmode_vga_component_pkg.all;
6 use work.textmode_vga_pkg.all;
7 use work.textmode_vga_platform_dependent_pkg.all;
8
9 entity beh_history_tb is
10 end entity beh_history_tb;
11
12 architecture sim of beh_history_tb is
13         -- system
14         signal sys_clk, sys_res_n : std_logic;
15         -- history/display
16         signal d_new_eingabe, d_new_result, d_new_bs : std_logic;
17         signal d_zeile : hzeile;
18         signal d_spalte : hspalte;
19         signal d_get, d_done : std_logic;
20         signal d_char : hbyte;
21         -- history/scanner
22         signal s_char : hbyte;
23         signal s_take, s_done, s_backspace : std_logic;
24         -- ps/2
25         signal new_data : std_logic;
26         signal data : std_logic_vector(7 downto 0);
27         -- vga/display
28         signal free : std_logic;
29         signal command : std_logic_vector(COMMAND_SIZE - 1 downto 0);
30         signal command_data : std_logic_vector(3 * COLOR_SIZE + CHAR_SIZE -1 downto 0);
31         -- history/parser
32         signal p_rget : std_logic;
33         signal p_rdone : std_logic;
34         signal p_read : hbyte;
35         signal p_wtake : std_logic;
36         signal p_wdone : std_logic;
37         signal p_write : hbyte;
38         signal p_finished : std_logic;
39         -- parser/scanner
40         signal do_it, finished : std_logic;
41
42         signal stop : boolean := false;
43 begin
44         -- history
45         inst : entity work.history(beh)
46         port map (
47                 sys_clk => sys_clk,
48                 sys_res_n => sys_res_n,
49                 -- scanner
50                 s_char => s_char,
51                 s_take => s_take,
52                 s_done => s_done,
53                 s_backspace => s_backspace,
54                 -- display
55                 d_new_eingabe => d_new_eingabe,
56                 d_new_result => d_new_result,
57                 d_new_bs => d_new_bs,
58                 d_zeile => d_zeile,
59                 d_spalte => d_spalte,
60                 d_get => d_get,
61                 d_done => d_done,
62                 d_char => d_char,
63                 -- parser
64                 p_rget => p_rget,
65                 p_rdone => p_rdone,
66                 p_read => p_read,
67                 p_wtake => p_wtake,
68                 p_wdone => p_wdone,
69                 p_write => p_write,
70                 p_finished => p_finished
71         );
72
73         -- display
74         inst_disp : entity work.display(beh)
75         port map (
76                 sys_clk => sys_clk,
77                 sys_res_n => sys_res_n,
78                 -- history
79                 d_new_eingabe => d_new_eingabe,
80                 d_new_result => d_new_result,
81                 d_new_bs => d_new_bs,
82                 d_zeile => d_zeile,
83                 d_spalte => d_spalte,
84                 d_get => d_get,
85                 d_done => d_done,
86                 d_char => d_char,
87                 -- vga
88                 command => command,
89                 command_data => command_data,
90                 free => free
91         );
92
93         -- parser
94         inst_parser : entity work.parser(beh)
95         port map (
96                 sys_clk => sys_clk,
97                 sys_res_n => sys_res_n,
98                 -- history
99                 p_rget => p_rget,
100                 p_rdone => p_rdone,
101                 p_read => p_read,
102                 p_wtake => p_wtake,
103                 p_wdone => p_wdone,
104                 p_write => p_write,
105                 p_finished => p_finished,
106                 -- scanner
107                 do_it => do_it,
108                 finished => finished
109         );
110
111         -- scanner
112         inst_scan : entity work.scanner(beh)
113         port map (
114                 sys_clk => sys_clk,
115                 sys_res_n => sys_res_n,
116                 -- ps/2
117                 new_data => new_data,
118                 data => data,
119                 -- history
120                 s_char => s_char,
121                 s_take => s_take,
122                 s_done => s_done,
123                 s_backspace => s_backspace,
124                 -- Parser
125                 do_it => do_it,
126                 finished => finished
127         );
128
129
130         process
131         begin
132                 sys_clk <= '0';
133                 wait for 15 ns;
134                 sys_clk <= '1';
135                 wait for 15 ns;
136                 if stop = true then
137                         wait;
138                 end if;
139         end process;
140
141         process
142         begin
143                 free <= '0';
144                 wait for 15 ns;
145                 free <= '1';
146                 wait for 30 ns;
147                 if stop = true then
148                         wait;
149                 end if;
150         end process;
151
152         process
153                 -- textio stuff
154                 use std.textio.all;
155                 file f : text open read_mode is "../../src/history.test";
156                 variable l : line;
157
158                 variable input : string(1 to 100);
159
160                 variable run_tc, run_inner : boolean := true;
161                 variable i, j, y : natural;
162         begin
163                 -- init & reset
164                 sys_res_n <= '0';
165                 new_data <= '0';
166                 data <= (others => '0');
167
168                 icwait(sys_clk, 20);
169                 sys_res_n <= '1';
170
171                 i := 1;
172                 f_loop : while not endfile(f) loop
173                         data <= (others => '0');
174
175                         f1_loop : while not endfile(f) loop
176                                 readline (f, l);
177                                 input := (others => nul);
178                                 if (l'length <= 100) then
179                                         input(1 to l'length) := l.all;
180                                         if (input(1) = '#') then
181                                                 next f1_loop;
182                                         else
183                                                 exit f1_loop;
184                                         end if;
185                                 else
186                                         report "fehler in history.test: eingabe zu lange in testfall " & natural'image(i);
187                                         next f_loop;
188                                 end if;
189                         end loop f1_loop;
190
191                         report "testcase(" & natural'image(i) & ").input: " & input;
192                         i := i + 1;
193
194                         icwait(sys_clk, 5);
195                         run_tc := true;
196                         j := 0;
197
198                         mainl : while run_tc loop
199                                 icwait(sys_clk, 10);
200                                 j := j + 1;
201
202                                 if j = 101 then
203                                         run_tc := false;
204                                         assert(false) report "wtf @ schleife";
205                                         next mainl;
206                                 end if;
207
208                                 new_data <= '1';
209
210                                 case input(j) is
211                                         when nul => data <= ascii2sc(x"1c"); -- $ (enter)
212                                         when '!' => data <= ascii2sc(x"0e"); -- ! (backspace)
213                                         when '/' =>
214                                                 data <= x"e0";
215                                                 icwait(sys_clk, 1);
216                                                 new_data <= '0';
217                                                 icwait(sys_clk, 1);
218                                                 new_data <= '1';
219                                                 data <= SC_KP_DIV;
220                                         when others => data <= ascii2sc(std_logic_vector(to_unsigned(character'pos(input(j)),8)));
221                                 end case;
222
223                                 -- ack'en skippen, falls es ein "spezielles" zeichen ist (steht
224                                 -- in abhaengigkeit zum vorherigen zeichen)
225                                 if(not valid_char(data)) then
226                                         next mainl;
227                                 end if;
228
229                                 -- wuenschswert waere das hier:
230                                 -- > wait on s_backspace, s_take, do_it;
231                                 -- geht aber leider nicht, weil sich die signale vllt schon
232                                 -- geaendert haben
233                                 run_inner := true;
234                                 main_inner : while run_inner loop
235                                         icwait(sys_clk, 1);
236
237                                         run_inner := false;
238                                         if s_backspace = '1' or s_take = '1' then
239                                                 icwait(sys_clk, 1);
240                                                 wait on s_take; -- = '0'
241                                                 icwait(sys_clk, 1);
242                                         elsif do_it = '1' then
243                                                 -- dauert normalweiser noch laenger (parser braucht
244                                                 -- relativ lange)
245                                                 icwait(sys_clk, 7);
246                                                 wait on do_it; -- = '0'
247                                                 icwait(sys_clk, 850);
248
249                                                 run_tc := false;
250                                         else
251                                                 -- assert(false) report "history_tb: kann passieren. wenn tb haengt, dann hier auskommentieren";
252                                                 run_inner := true;
253                                         end if;
254                                 end loop;
255                         end loop;
256                         report "==================";
257                 end loop f_loop;
258
259                 icwait(sys_clk, 850);
260                 stop <= true;
261                 wait;
262         end process;
263 end architecture sim;