2 * Copyright (c) 1991-1994 by Xerox Corporation. All rights reserved.
3 * Copyright (c) 1996-1999 by Silicon Graphics. All rights reserved.
4 * Copyright (c) 1999-2003 by Hewlett-Packard Company. All rights reserved.
7 * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED
8 * OR IMPLIED. ANY USE IS AT YOUR OWN RISK.
10 * Permission is hereby granted to use or copy this program
11 * for any purpose, provided the above notices are retained on all copies.
12 * Permission to modify the code and to distribute modified code is granted,
13 * provided the above notices are retained, and a notice that the code was
14 * modified is included with the above copyright notice.
16 * Some of the machine specific code was borrowed from our GC distribution.
19 /* The following really assume we have a 486 or better. */
21 #include "../all_aligned_atomic_load_store.h"
23 /* Real X86 implementations, except for some old WinChips, appear */
24 /* to enforce ordering between memory operations, EXCEPT that a later */
25 /* read can pass earlier writes, presumably due to the visible */
26 /* presence of store buffers. */
27 /* We ignore both the WinChips, and the fact that the official specs */
28 /* seem to be much weaker (and arguably too weak to be usable). */
30 #include "../ordered_except_wr.h"
32 #include "../test_and_set_t_is_char.h"
34 #include "../standard_ao_double_t.h"
36 #if defined(AO_USE_PENTIUM4_INSTRS)
40 __asm__ __volatile__ ("mfence" : : : "memory");
42 #define AO_HAVE_nop_full
46 /* We could use the cpuid instruction. But that seems to be slower */
47 /* than the default implementation based on test_and_set_full. Thus */
48 /* we omit that bit of misinformation here. */
52 /* As far as we can tell, the lfence and sfence instructions are not */
53 /* currently needed or useful for cached memory accesses. */
55 /* Really only works for 486 and later */
57 AO_fetch_and_add_full (volatile AO_t *p, AO_t incr)
61 __asm__ __volatile__ ("lock; xaddl %0, %1" :
62 "=r" (result), "=m" (*p) : "0" (incr) /* , "m" (*p) */
66 #define AO_HAVE_fetch_and_add_full
68 AO_INLINE unsigned char
69 AO_char_fetch_and_add_full (volatile unsigned char *p, unsigned char incr)
73 __asm__ __volatile__ ("lock; xaddb %0, %1" :
74 "=q" (result), "=m" (*p) : "0" (incr) /* , "m" (*p) */
78 #define AO_HAVE_char_fetch_and_add_full
80 AO_INLINE unsigned short
81 AO_short_fetch_and_add_full (volatile unsigned short *p, unsigned short incr)
83 unsigned short result;
85 __asm__ __volatile__ ("lock; xaddw %0, %1" :
86 "=r" (result), "=m" (*p) : "0" (incr) /* , "m" (*p) */
90 #define AO_HAVE_short_fetch_and_add_full
92 /* Really only works for 486 and later */
94 AO_or_full (volatile AO_t *p, AO_t incr)
96 __asm__ __volatile__ ("lock; orl %1, %0" :
97 "=m" (*p) : "r" (incr) /* , "m" (*p) */
100 #define AO_HAVE_or_full
102 AO_INLINE AO_TS_VAL_t
103 AO_test_and_set_full (volatile AO_TS_t *addr)
106 /* Note: the "xchg" instruction does not need a "lock" prefix */
107 __asm__ __volatile__ ("xchg %b0, %1"
108 : "=q"(oldval), "=m"(*addr)
109 : "0"(0xff) /* , "m"(*addr) */
111 return (AO_TS_VAL_t)oldval;
113 #define AO_HAVE_test_and_set_full
115 /* Returns nonzero if the comparison succeeded. */
117 AO_compare_and_swap_full (volatile AO_t *addr, AO_t old, AO_t new_val)
120 __asm__ __volatile__ ("lock; cmpxchgl %2, %0; setz %1"
121 : "=m"(*addr), "=a"(result)
122 : "r" (new_val), "a"(old) : "memory");
125 #define AO_HAVE_compare_and_swap_full
128 /* FIXME: not tested (and probably wrong). Besides, */
129 /* it tickles a bug in Sun C 5.10 (when optimizing). */
130 /* Returns nonzero if the comparison succeeded. */
131 /* Really requires at least a Pentium. */
133 AO_compare_double_and_swap_double_full(volatile AO_double_t *addr,
134 AO_t old_val1, AO_t old_val2,
135 AO_t new_val1, AO_t new_val2)
139 /* If PIC is turned on, we can't use %ebx as it is reserved for the
140 GOT pointer. We can save and restore %ebx because GCC won't be
141 using it for anything else (such as any of the m operands) */
142 __asm__ __volatile__("pushl %%ebx;" /* save ebx used for PIC GOT ptr */
143 "movl %6,%%ebx;" /* move new_val1 to %ebx */
144 "lock; cmpxchg8b %0; setz %1;"
145 "pop %%ebx;" /* restore %ebx */
146 : "=m"(*addr), "=a"(result)
147 : "m"(*addr), "d" (old_val2), "a" (old_val1),
148 "c" (new_val2), "m" (new_val1) : "memory");
150 /* We can't just do the same thing in non-PIC mode, because GCC
151 * might be using %ebx as the memory operand. We could have ifdef'd
152 * in a clobber, but there's no point doing the push/pop if we don't
154 __asm__ __volatile__("lock; cmpxchg8b %0; setz %1;"
155 : "=m"(*addr), "=a"(result)
156 : /* "m"(*addr), */ "d" (old_val2), "a" (old_val1),
157 "c" (new_val2), "b" (new_val1) : "memory");
161 #define AO_HAVE_compare_double_and_swap_double_full
164 #include "../ao_t_is_int.h"