implemented Setup.hs to build boehm cpp libs and install them;
[hs-boehmgc.git] / gc-7.2 / libatomic_ops / src / atomic_ops / sysdeps / hpc / ia64.h
1 /*
2  * Copyright (c) 2003 Hewlett-Packard Development Company, L.P.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a copy
5  * of this software and associated documentation files (the "Software"), to deal
6  * in the Software without restriction, including without limitation the rights
7  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8  * copies of the Software, and to permit persons to whom the Software is
9  * furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20  * SOFTWARE.
21  */
22
23 /*
24  * This file specifies Itanimum primitives for use with the HP compiler
25  * under HP/UX.  We use intrinsics instead of the inline assembly code in the
26  * gcc file.
27  */
28
29 #include "../all_atomic_load_store.h"
30
31 #include "../all_acquire_release_volatile.h"
32
33 #include "../test_and_set_t_is_char.h"
34
35 #include <machine/sys/inline.h>
36
37 #ifdef __LP64__
38 # define AO_T_FASIZE _FASZ_D
39 # define AO_T_SIZE _SZ_D
40 #else
41 # define AO_T_FASIZE _FASZ_W
42 # define AO_T_SIZE _SZ_W
43 #endif
44
45 AO_INLINE void
46 AO_nop_full(void)
47 {
48   _Asm_mf();
49 }
50 #define AO_HAVE_nop_full
51
52 AO_INLINE AO_t
53 AO_fetch_and_add1_acquire (volatile AO_t *p)
54 {
55   return _Asm_fetchadd(AO_T_FASIZE, _SEM_ACQ, p, 1,
56                        _LDHINT_NONE, _DOWN_MEM_FENCE);
57 }
58 #define AO_HAVE_fetch_and_add1_acquire
59
60 AO_INLINE AO_t
61 AO_fetch_and_add1_release (volatile AO_t *p)
62 {
63   return _Asm_fetchadd(AO_T_FASIZE, _SEM_REL, p, 1,
64                        _LDHINT_NONE, _UP_MEM_FENCE);
65 }
66 #define AO_HAVE_fetch_and_add1_release
67
68 AO_INLINE AO_t
69 AO_fetch_and_sub1_acquire (volatile AO_t *p)
70 {
71   return _Asm_fetchadd(AO_T_FASIZE, _SEM_ACQ, p, -1,
72                        _LDHINT_NONE, _DOWN_MEM_FENCE);
73 }
74 #define AO_HAVE_fetch_and_sub1_acquire
75
76 AO_INLINE AO_t
77 AO_fetch_and_sub1_release (volatile AO_t *p)
78 {
79   return _Asm_fetchadd(AO_T_FASIZE, _SEM_REL, p, -1,
80                        _LDHINT_NONE, _UP_MEM_FENCE);
81 }
82 #define AO_HAVE_fetch_and_sub1_release
83
84 AO_INLINE int
85 AO_compare_and_swap_acquire(volatile AO_t *addr,
86                              AO_t old, AO_t new_val)
87 {
88   AO_t oldval;
89
90   _Asm_mov_to_ar(_AREG_CCV, old, _DOWN_MEM_FENCE);
91   oldval = _Asm_cmpxchg(AO_T_SIZE, _SEM_ACQ, addr,
92                         new_val, _LDHINT_NONE, _DOWN_MEM_FENCE);
93   return (oldval == old);
94 }
95 #define AO_HAVE_compare_and_swap_acquire
96
97 AO_INLINE int
98 AO_compare_and_swap_release(volatile AO_t *addr,
99                              AO_t old, AO_t new_val)
100 {
101   AO_t oldval;
102   _Asm_mov_to_ar(_AREG_CCV, old, _UP_MEM_FENCE);
103   oldval = _Asm_cmpxchg(AO_T_SIZE, _SEM_REL, addr,
104                         new_val, _LDHINT_NONE, _UP_MEM_FENCE);
105   /* Hopefully the compiler knows not to reorder the above two? */
106   return (oldval == old);
107 }
108 #define AO_HAVE_compare_and_swap_release
109
110 AO_INLINE int
111 AO_char_compare_and_swap_acquire(volatile unsigned char *addr,
112                                  unsigned char old, unsigned char new_val)
113 {
114   unsigned char oldval;
115
116   _Asm_mov_to_ar(_AREG_CCV, old, _DOWN_MEM_FENCE);
117   oldval = _Asm_cmpxchg(_SZ_B, _SEM_ACQ, addr,
118                         new_val, _LDHINT_NONE, _DOWN_MEM_FENCE);
119   return (oldval == old);
120 }
121 #define AO_HAVE_char_compare_and_swap_acquire
122
123 AO_INLINE int
124 AO_char_compare_and_swap_release(volatile unsigned char *addr,
125                                  unsigned char old, unsigned char new_val)
126 {
127   unsigned char oldval;
128   _Asm_mov_to_ar(_AREG_CCV, old, _UP_MEM_FENCE);
129   oldval = _Asm_cmpxchg(_SZ_B, _SEM_REL, addr,
130                         new_val, _LDHINT_NONE, _UP_MEM_FENCE);
131   /* Hopefully the compiler knows not to reorder the above two? */
132   return (oldval == old);
133 }
134 #define AO_HAVE_char_compare_and_swap_release
135
136 AO_INLINE int
137 AO_short_compare_and_swap_acquire(volatile unsigned short *addr,
138                                  unsigned short old, unsigned short new_val)
139 {
140   unsigned short oldval;
141
142   _Asm_mov_to_ar(_AREG_CCV, old, _DOWN_MEM_FENCE);
143   oldval = _Asm_cmpxchg(_SZ_B, _SEM_ACQ, addr,
144                         new_val, _LDHINT_NONE, _DOWN_MEM_FENCE);
145   return (oldval == old);
146 }
147 #define AO_HAVE_short_compare_and_swap_acquire
148
149 AO_INLINE int
150 AO_short_compare_and_swap_release(volatile unsigned short *addr,
151                                  unsigned short old, unsigned short new_val)
152 {
153   unsigned short oldval;
154   _Asm_mov_to_ar(_AREG_CCV, old, _UP_MEM_FENCE);
155   oldval = _Asm_cmpxchg(_SZ_B, _SEM_REL, addr,
156                         new_val, _LDHINT_NONE, _UP_MEM_FENCE);
157   /* Hopefully the compiler knows not to reorder the above two? */
158   return (oldval == old);
159 }
160 #define AO_HAVE_short_compare_and_swap_release
161
162 #ifndef __LP64__
163   /* Generalize first to define more AO_int_... primitives.     */
164 # include "../../generalize.h"
165 # include "../ao_t_is_int.h"
166 #endif