4er slot (3. bsp fertig)
[dide_16.git] / bsp3 / Designflow / sim / beh / work / _info
diff --git a/bsp3/Designflow/sim/beh/work/_info b/bsp3/Designflow/sim/beh/work/_info
new file mode 100644 (file)
index 0000000..4d5f505
--- /dev/null
@@ -0,0 +1,240 @@
+m255
+K3
+13
+cModel Technology
+Z0 d/homes/burban/didelu/dide_16/bsp3/Designflow/sim/beh
+T_opt
+Z1 Vhz;nY[bnOl:JCX`H[?B=Y1
+Z2 04 12 0 work vga_conf_beh 1
+Z3 =1-0015609ed0a8-4ae9c13d-2e230-1835
+Z4 o-quiet -auto_acc_if_foreign -work work -sdftyp /vga_unit=/homes/burban/didelu/dide_16/bsp3/Designflow/ppr/sim/simulation/modelsim/vga_vhd.sdo -suppress 1948
+Z5 n@_opt
+Z6 OE;O;6.5b;42
+T_opt1
+VEK_QegQ[@m^G6fke`cC4R1
+R2
+Z7 =1-0015609ed0a8-4ae9c14c-1ef05-183e
+Z8 o-quiet -auto_acc_if_foreign -work work
+Z9 n@_opt1
+R6
+Eboard_driver
+Z10 w1255952276
+Z11 DPx4 work 7 vga_pak 0 22 HGKInm?j6h_E?hCL1=3Rf2
+Z12 DPx4 ieee 15 std_logic_arith 0 22 GJbAT?7@hRQU9IQ702DT]2
+Z13 DPx4 ieee 18 std_logic_unsigned 0 22 hEMVMlaNCR^<OOoVNV;m90
+Z14 DPx4 ieee 14 std_logic_1164 0 22 GH1=`jDDBJ=`LM;:Ak`kf2
+Z15 8/homes/burban/didelu/dide_16/bsp3/Designflow/src/board_driver_ent.vhd
+Z16 F/homes/burban/didelu/dide_16/bsp3/Designflow/src/board_driver_ent.vhd
+l0
+L36
+Z17 VBVQhR;nY9[R<n2hUAfP^Z2
+Z18 OE;C;6.5b;42
+32
+Z19 o-work work
+Z20 tExplicit 1
+Z21 !s100 ZmKIT`@9Y:8bV1lIMd:O50
+Abehav
+Z22 DEx4 work 12 board_driver 0 22 BVQhR;nY9[R<n2hUAfP^Z2
+R11
+R12
+R13
+R14
+Z23 8/homes/burban/didelu/dide_16/bsp3/Designflow/src/board_driver_arc.vhd
+Z24 F/homes/burban/didelu/dide_16/bsp3/Designflow/src/board_driver_arc.vhd
+l49
+L37
+Z25 VGBN_oSTG]bM6]TXPeRSH52
+R18
+32
+Z26 Mx4 4 ieee 14 std_logic_1164
+Z27 Mx3 4 ieee 18 std_logic_unsigned
+Z28 Mx2 4 ieee 15 std_logic_arith
+Z29 Mx1 4 work 7 vga_pak
+R19
+R20
+Z30 !s100 z`LzgF:SW^5X7Ld12aiE[3
+Evga
+R10
+R11
+R12
+R13
+R14
+Z31 8/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_ent.vhd
+Z32 F/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_ent.vhd
+l0
+L38
+Z33 V<Pi3zn5X5SCf5hgafd?=z2
+R18
+32
+R19
+R20
+Z34 !s100 O;kzAO^SAa?QB<8?bVS1?0
+Abehav
+Z35 DEx4 work 3 vga 0 22 <Pi3zn5X5SCf5hgafd?=z2
+R11
+R12
+R13
+R14
+Z36 8/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_arc.vhd
+Z37 F/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_arc.vhd
+l107
+L36
+Z38 V4@A4a?RT3A656cP3PUWH72
+R18
+32
+R26
+R27
+R28
+R29
+R19
+R20
+Z39 !s100 X<LWhdCD;1X^M=QdCN5Hn3
+Cvga_conf_beh
+Z40 abehaviour
+Z41 evga_tb
+R35
+Z42 DAx4 work 6 vga_tb 9 behaviour 22 JShkSggmBJZ=6^]R:M7840
+R11
+R12
+R13
+R14
+Z43 DEx4 work 6 vga_tb 0 22 K;WQR0;ZeC2I8`N5aIRdM1
+R10
+Z44 8/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_beh_tb.vhd
+Z45 F/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_beh_tb.vhd
+l0
+L182
+Z46 VeNNJi03>MIdzNk_IKJFBX0
+R18
+32
+R26
+R27
+R28
+R29
+R19
+R20
+Z47 !s100 V8gLA`OF;iU;=3TA;meWi0
+Evga_control
+Z48 w1256832987
+R11
+R12
+R13
+R14
+Z49 8/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_control_ent.vhd
+Z50 F/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_control_ent.vhd
+l0
+L37
+Z51 VX7Z9HAb^YTj]zEQn8Blim3
+R18
+32
+R19
+R20
+Z52 !s100 2`MFo[_0ahEizlfnSiWU]0
+Abehav
+Z53 DEx4 work 11 vga_control 0 22 X7Z9HAb^YTj]zEQn8Blim3
+R11
+R12
+R13
+R14
+Z54 8/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_control_arc.vhd
+Z55 F/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_control_arc.vhd
+l43
+L36
+Z56 VVP;2WF47fQPlT[5Y@8BWT2
+R18
+32
+R26
+R27
+R28
+R29
+R19
+R20
+Z57 !s100 _K^9LTDS;hFXmWo@eB[Y50
+Evga_driver
+R10
+R11
+R12
+R13
+R14
+Z58 8/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_driver_ent.vhd
+Z59 F/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_driver_ent.vhd
+l0
+L37
+Z60 VWM]N=KVQa>:4ozHZC=^hX0
+R18
+32
+R19
+R20
+Z61 !s100 Y<?mNHeGL<kb9W4ng:D_62
+Abehav
+Z62 DEx4 work 10 vga_driver 0 22 WM]N=KVQa>:4ozHZC=^hX0
+R11
+R12
+R13
+R14
+Z63 8/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_driver_arc.vhd
+Z64 F/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_driver_arc.vhd
+l89
+L36
+Z65 Ve;Di?_OoPUgXCMBlVURO<1
+R18
+32
+R26
+R27
+R28
+R29
+R19
+R20
+Z66 !s100 m[>=IM[TaR5C=MnzMT7>c2
+Pvga_pak
+R12
+R13
+R14
+Z67 w1256830367
+Z68 8/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_pak.vhd
+Z69 F/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_pak.vhd
+l0
+L35
+Z70 VHGKInm?j6h_E?hCL1=3Rf2
+R18
+32
+Z71 Mx3 4 ieee 14 std_logic_1164
+Z72 Mx2 4 ieee 18 std_logic_unsigned
+Z73 Mx1 4 ieee 15 std_logic_arith
+R19
+R20
+Z74 !s100 cALhF4me<zNWYz_BWPd?70
+Evga_tb
+R10
+R11
+R12
+R13
+R14
+R44
+R45
+l0
+L37
+Z75 VK;WQR0;ZeC2I8`N5aIRdM1
+R18
+32
+R19
+R20
+Z76 !s100 KBk8Lb76>dJd2ihUfkYfd2
+Abehaviour
+R11
+R12
+R13
+R14
+R43
+l96
+L45
+Z77 VJShkSggmBJZ=6^]R:M7840
+R18
+32
+R26
+R27
+R28
+R29
+R19
+R20
+Z78 !s100 UND8<Q4o3<5YC_;WKj_BP3