bsp4/Designflow/ppr/download/simulation/modelsim/vga_pll.vo

   1 // Copyright (C) 1991-2009 Altera Corporation
   2 // Your use of Altera Corporation's design tools, logic functions
   3 // and other software and tools, and its AMPP partner logic
   4 // functions, and any output files from any of the foregoing
   5 // (including device programming or simulation files), and any
   6 // associated documentation or information are expressly subject
   7 // to the terms and conditions of the Altera Program License
   8 // Subscription Agreement, Altera MegaCore Function License
   9 // Agreement, or other applicable license agreement, including,
  10 // without limitation, that your use is for the sole purpose of
  11 // programming logic devices manufactured by Altera and sold by
  12 // Altera or its authorized distributors.  Please refer to the
  13 // applicable agreement for further details.
  14
  15 // VENDOR "Altera"
  16 // PROGRAM "Quartus II"
  17 // VERSION "Version 9.0 Build 132 02/25/2009 SJ Full Version"
  18
  19 // DATE "11/03/2009 17:37:43"
  20
  21 //
  22 // Device: Altera EP1S25F672C6 Package FBGA672
  23 //
  24
  25 //
  26 // This Verilog file should be used for ModelSim-Altera (Verilog) only
  27 //
  28
  29 `timescale 1 ps/ 1 ps
  30
  31 module vga_pll (
  32         d_hsync,
  33         board_clk,
  34         reset,
  35         d_vsync,
  36         d_set_column_counter,
  37         d_set_line_counter,
  38         d_set_hsync_counter,
  39         d_set_vsync_counter,
  40         d_r,
  41         d_g,
  42         d_b,
  43         d_h_enable,
  44         d_v_enable,
  45         d_state_clk,
  46         d_toggle,
  47         r0_pin,
  48         r1_pin,
  49         r2_pin,
  50         g0_pin,
  51         g1_pin,
  52         g2_pin,
  53         b0_pin,
  54         b1_pin,
  55         hsync_pin,
  56         vsync_pin,
  57         d_column_counter,
  58         d_hsync_counter,
  59         d_hsync_state,
  60         d_line_counter,
  61         d_toggle_counter,
  62         d_vsync_counter,
  63         d_vsync_state,
  64         seven_seg_pin);
  65 output  d_hsync;
  66 input   board_clk;
  67 input   reset;
  68 output  d_vsync;
  69 output  d_set_column_counter;
  70 output  d_set_line_counter;
  71 output  d_set_hsync_counter;
  72 output  d_set_vsync_counter;
  73 output  d_r;
  74 output  d_g;
  75 output  d_b;
  76 output  d_h_enable;
  77 output  d_v_enable;
  78 output  d_state_clk;
  79 output  d_toggle;
  80 output  r0_pin;
  81 output  r1_pin;
  82 output  r2_pin;
  83 output  g0_pin;
  84 output  g1_pin;
  85 output  g2_pin;
  86 output  b0_pin;
  87 output  b1_pin;
  88 output  hsync_pin;
  89 output  vsync_pin;
  90 output  [9:0] d_column_counter;
  91 output  [9:0] d_hsync_counter;
  92 output  [0:6] d_hsync_state;
  93 output  [8:0] d_line_counter;
  94 output  [24:0] d_toggle_counter;
  95 output  [9:0] d_vsync_counter;
  96 output  [0:6] d_vsync_state;
  97 output  [13:0] seven_seg_pin;
  98
  99 wire gnd = 1'b0;
 100 wire vcc = 1'b1;
 101
 102 tri1 devclrn;
 103 tri1 devpor;
 104 tri1 devoe;
 105 // synopsys translate_off
 106 initial $sdf_annotate("vga_pll_v.sdo");
 107 // synopsys translate_on
 108
 109 wire \inst1|altpll_component|pll~CLK1 ;
 110 wire \inst1|altpll_component|pll~CLK2 ;
 111 wire \inst1|altpll_component|pll~CLK3 ;
 112 wire \inst1|altpll_component|pll~CLK4 ;
 113 wire \inst1|altpll_component|pll~CLK5 ;
 114 wire \inst|vga_control_unit|un2_toggle_counter_next_0_~COMBOUT ;
 115 wire \inst|vga_driver_unit|un2_column_counter_next_0_~COMBOUT ;
 116 wire \inst|vga_driver_unit|un1_line_counter_sig_a_1_~COMBOUT ;
 117 wire \board_clk~combout ;
 118 wire \inst1|altpll_component|_clk0 ;
 119 wire \reset~combout ;
 120 wire \inst|vga_driver_unit|un6_dly_counter_0_x ;
 121 wire \inst|vga_driver_unit|hsync_state_6 ;
 122 wire \inst|vga_driver_unit|hsync_counter_cout[0]~COUT1_10 ;
 123 wire \inst|vga_driver_unit|hsync_counter_1 ;
 124 wire \inst|vga_driver_unit|hsync_counter_cout[1]~COUT1_12 ;
 125 wire \inst|vga_driver_unit|hsync_counter_2 ;
 126 wire \inst|vga_driver_unit|hsync_counter_cout[2]~COUT1_14 ;
 127 wire \inst|vga_driver_unit|hsync_counter_3 ;
 128 wire \inst|vga_driver_unit|un13_hsync_counter_7 ;
 129 wire \inst|vga_driver_unit|hsync_counter_cout[3]~COUT1_16 ;
 130 wire \inst|vga_driver_unit|hsync_counter_4 ;
 131 wire \inst|vga_driver_unit|hsync_counter_5 ;
 132 wire \inst|vga_driver_unit|hsync_counter_cout[5]~COUT1_18 ;
 133 wire \inst|vga_driver_unit|hsync_counter_6 ;
 134 wire \inst|vga_driver_unit|hsync_counter_cout[6]~COUT1_20 ;
 135 wire \inst|vga_driver_unit|hsync_counter_cout[7]~COUT1_22 ;
 136 wire \inst|vga_driver_unit|hsync_counter_8 ;
 137 wire \inst|vga_driver_unit|hsync_counter_cout[8]~COUT1_24 ;
 138 wire \inst|vga_driver_unit|hsync_counter_9 ;
 139 wire \inst|vga_driver_unit|un9_hsync_counterlt9_3 ;
 140 wire \inst|vga_driver_unit|un9_hsync_counterlt9 ;
 141 wire \inst|vga_driver_unit|G_2_i ;
 142 wire \inst|vga_driver_unit|hsync_counter_7 ;
 143 wire \inst|vga_driver_unit|un13_hsync_counter_2 ;
 144 wire \inst|vga_driver_unit|un13_hsync_counter ;
 145 wire \inst|vga_driver_unit|un11_hsync_counter_3 ;
 146 wire \inst|vga_driver_unit|un11_hsync_counter_2 ;
 147 wire \inst|vga_driver_unit|un10_hsync_counter_1 ;
 148 wire \inst|vga_driver_unit|un10_hsync_counter_4 ;
 149 wire \inst|vga_driver_unit|un10_hsync_counter_3 ;
 150 wire \inst|vga_driver_unit|hsync_state_5 ;
 151 wire \inst|vga_driver_unit|hsync_state_4 ;
 152 wire \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2 ;
 153 wire \inst|vga_driver_unit|hsync_state_1 ;
 154 wire \inst|vga_driver_unit|un1_hsync_state_next_1_sqmuxa_0 ;
 155 wire \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1 ;
 156 wire \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ;
 157 wire \inst|vga_driver_unit|hsync_state_2 ;
 158 wire \inst|vga_driver_unit|hsync_state_0 ;
 159 wire \inst|vga_driver_unit|d_set_hsync_counter ;
 160 wire \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ;
 161 wire \inst|vga_driver_unit|hsync_counter_0 ;
 162 wire \inst|vga_driver_unit|un12_hsync_counter_4 ;
 163 wire \inst|vga_driver_unit|un12_hsync_counter_3 ;
 164 wire \inst|vga_driver_unit|un12_hsync_counter ;
 165 wire \inst|vga_driver_unit|hsync_state_3 ;
 166 wire \inst|vga_driver_unit|un1_hsync_state_3_0 ;
 167 wire \inst|vga_driver_unit|h_sync_1_0_0_0_g1 ;
 168 wire \inst|vga_driver_unit|h_sync ;
 169 wire \inst|vga_driver_unit|vsync_counter_cout[0]~COUT1_10 ;
 170 wire \inst|vga_driver_unit|vsync_counter_1 ;
 171 wire \inst|vga_driver_unit|vsync_counter_cout[1]~COUT1_12 ;
 172 wire \inst|vga_driver_unit|vsync_counter_2 ;
 173 wire \inst|vga_driver_unit|vsync_counter_cout[2]~COUT1_14 ;
 174 wire \inst|vga_driver_unit|vsync_counter_3 ;
 175 wire \inst|vga_driver_unit|un9_vsync_counterlt9_6 ;
 176 wire \inst|vga_driver_unit|vsync_counter_cout[3]~COUT1_16 ;
 177 wire \inst|vga_driver_unit|vsync_counter_5 ;
 178 wire \inst|vga_driver_unit|vsync_counter_cout[5]~COUT1_18 ;
 179 wire \inst|vga_driver_unit|vsync_counter_6 ;
 180 wire \inst|vga_driver_unit|vsync_counter_cout[6]~COUT1_20 ;
 181 wire \inst|vga_driver_unit|vsync_counter_7 ;
 182 wire \inst|vga_driver_unit|vsync_counter_cout[7]~COUT1_22 ;
 183 wire \inst|vga_driver_unit|vsync_counter_8 ;
 184 wire \inst|vga_driver_unit|vsync_counter_cout[8]~COUT1_24 ;
 185 wire \inst|vga_driver_unit|vsync_counter_9 ;
 186 wire \inst|vga_driver_unit|un9_vsync_counterlt9_5 ;
 187 wire \inst|vga_driver_unit|un9_vsync_counterlt9 ;
 188 wire \inst|vga_driver_unit|vsync_state_6 ;
 189 wire \inst|vga_driver_unit|G_16_i ;
 190 wire \inst|vga_driver_unit|vsync_counter_4 ;
 191 wire \inst|vga_driver_unit|un12_vsync_counter_7 ;
 192 wire \inst|vga_driver_unit|un12_vsync_counter_6 ;
 193 wire \inst|vga_driver_unit|un14_vsync_counter_8 ;
 194 wire \inst|vga_driver_unit|vsync_state_5 ;
 195 wire \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1 ;
 196 wire \inst|vga_driver_unit|vsync_state_4 ;
 197 wire \inst|vga_driver_unit|un13_vsync_counter_3 ;
 198 wire \inst|vga_driver_unit|un13_vsync_counter_4 ;
 199 wire \inst|vga_driver_unit|vsync_state_1 ;
 200 wire \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_3 ;
 201 wire \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2 ;
 202 wire \inst|vga_driver_unit|un15_vsync_counter_3 ;
 203 wire \inst|vga_driver_unit|un15_vsync_counter_4 ;
 204 wire \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0 ;
 205 wire \inst|vga_driver_unit|vsync_state_next_2_sqmuxa ;
 206 wire \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0 ;
 207 wire \inst|vga_driver_unit|vsync_state_0 ;
 208 wire \inst|vga_driver_unit|d_set_vsync_counter ;
 209 wire \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ;
 210 wire \inst|vga_driver_unit|vsync_counter_0 ;
 211 wire \inst|vga_driver_unit|vsync_state_3 ;
 212 wire \inst|vga_driver_unit|vsync_state_2 ;
 213 wire \inst|vga_driver_unit|un1_vsync_state_2_0 ;
 214 wire \inst|vga_driver_unit|v_sync_1_0_0_0_g1 ;
 215 wire \inst|vga_driver_unit|v_sync ;
 216 wire \~STRATIX_FITTER_CREATED_GND~I_combout ;
 217 wire \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ;
 218 wire \inst|vga_driver_unit|column_counter_sig_0 ;
 219 wire \inst|vga_driver_unit|column_counter_sig_1 ;
 220 wire \inst|vga_driver_unit|un2_column_counter_next_cout[1]~COUT1_10 ;
 221 wire \inst|vga_driver_unit|column_counter_sig_3 ;
 222 wire \inst|vga_driver_unit|un2_column_counter_next_cout[0]~COUT1_18 ;
 223 wire \inst|vga_driver_unit|un2_column_counter_next_cout[2]~COUT1_20 ;
 224 wire \inst|vga_driver_unit|column_counter_sig_4 ;
 225 wire \inst|vga_driver_unit|un2_column_counter_next_cout[3]~COUT1_12 ;
 226 wire \inst|vga_driver_unit|column_counter_sig_5 ;
 227 wire \inst|vga_driver_unit|un2_column_counter_next_cout[4]~COUT1_22 ;
 228 wire \inst|vga_driver_unit|column_counter_sig_6 ;
 229 wire \inst|vga_driver_unit|un2_column_counter_next_cout[5]~COUT1_14 ;
 230 wire \inst|vga_driver_unit|column_counter_sig_7 ;
 231 wire \inst|vga_driver_unit|un2_column_counter_next_cout[6]~COUT1_24 ;
 232 wire \inst|vga_driver_unit|column_counter_sig_8 ;
 233 wire \inst|vga_driver_unit|un2_column_counter_next_cout[7]~COUT1_16 ;
 234 wire \inst|vga_driver_unit|column_counter_sig_9 ;
 235 wire \inst|vga_driver_unit|un10_column_counter_siglt6_2 ;
 236 wire \inst|vga_driver_unit|un10_column_counter_siglt6_1 ;
 237 wire \inst|vga_driver_unit|un10_column_counter_siglt6 ;
 238 wire \inst|vga_driver_unit|un10_column_counter_siglto9 ;
 239 wire \inst|vga_driver_unit|column_counter_sig_2 ;
 240 wire \inst|vga_control_unit|un5_v_enablelto3 ;
 241 wire \inst|vga_control_unit|un5_v_enablelto5_0 ;
 242 wire \inst|vga_control_unit|un5_v_enablelto7 ;
 243 wire \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ;
 244 wire \inst|vga_driver_unit|line_counter_sig_0 ;
 245 wire \inst|vga_driver_unit|un1_line_counter_sig_cout[1]~COUT1_9 ;
 246 wire \inst|vga_driver_unit|line_counter_sig_2 ;
 247 wire \inst|vga_driver_unit|un1_line_counter_sig_a_cout[1]~COUT1_3 ;
 248 wire \inst|vga_driver_unit|line_counter_sig_1 ;
 249 wire \inst|vga_driver_unit|un1_line_counter_sig_cout[2]~COUT1_17 ;
 250 wire \inst|vga_driver_unit|line_counter_sig_3 ;
 251 wire \inst|vga_driver_unit|un1_line_counter_sig_cout[3]~COUT1_11 ;
 252 wire \inst|vga_driver_unit|line_counter_sig_4 ;
 253 wire \inst|vga_driver_unit|un1_line_counter_sig_cout[4]~COUT1_19 ;
 254 wire \inst|vga_driver_unit|line_counter_sig_5 ;
 255 wire \inst|vga_driver_unit|un1_line_counter_sig_cout[6]~COUT1_21 ;
 256 wire \inst|vga_driver_unit|line_counter_sig_7 ;
 257 wire \inst|vga_driver_unit|un1_line_counter_sig_cout[5]~COUT1_13 ;
 258 wire \inst|vga_driver_unit|un1_line_counter_sig_cout[7]~COUT1_15 ;
 259 wire \inst|vga_driver_unit|line_counter_sig_8 ;
 260 wire \inst|vga_driver_unit|un10_line_counter_siglt4_2 ;
 261 wire \inst|vga_driver_unit|un10_line_counter_siglto5 ;
 262 wire \inst|vga_driver_unit|un10_line_counter_siglto8 ;
 263 wire \inst|vga_driver_unit|line_counter_sig_6 ;
 264 wire \inst|vga_control_unit|un17_v_enablelt2 ;
 265 wire \inst|vga_control_unit|un17_v_enablelto5 ;
 266 wire \inst|vga_control_unit|un17_v_enablelto7 ;
 267 wire \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4 ;
 268 wire \inst|vga_driver_unit|v_enable_sig ;
 269 wire \inst|vga_control_unit|b_next_0_g0_3 ;
 270 wire \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4 ;
 271 wire \inst|vga_driver_unit|h_enable_sig ;
 272 wire \inst|vga_control_unit|un9_v_enablelto6 ;
 273 wire \inst|vga_control_unit|un9_v_enablelto9 ;
 274 wire \inst|vga_control_unit|toggle_counter_sig_0 ;
 275 wire \inst|vga_control_unit|toggle_counter_sig_1 ;
 276 wire \inst|vga_control_unit|un2_toggle_counter_next_cout[0]~COUT1_3 ;
 277 wire \inst|vga_control_unit|toggle_counter_sig_2 ;
 278 wire \inst|vga_control_unit|toggle_counter_sig_cout[1]~COUT1_17 ;
 279 wire \inst|vga_control_unit|toggle_counter_sig_3 ;
 280 wire \inst|vga_control_unit|toggle_counter_sig_cout[2]~COUT1_33 ;
 281 wire \inst|vga_control_unit|toggle_counter_sig_4 ;
 282 wire \inst|vga_control_unit|toggle_counter_sig_cout[3]~COUT1_19 ;
 283 wire \inst|vga_control_unit|toggle_counter_sig_5 ;
 284 wire \inst|vga_control_unit|toggle_counter_sig_cout[5]~COUT1_21 ;
 285 wire \inst|vga_control_unit|toggle_counter_sig_7 ;
 286 wire \inst|vga_control_unit|toggle_counter_sig_cout[4]~COUT1_35 ;
 287 wire \inst|vga_control_unit|toggle_counter_sig_6 ;
 288 wire \inst|vga_control_unit|toggle_counter_sig_cout[7]~COUT1_23 ;
 289 wire \inst|vga_control_unit|toggle_counter_sig_9 ;
 290 wire \inst|vga_control_unit|toggle_counter_sig_cout[6]~COUT1_37 ;
 291 wire \inst|vga_control_unit|toggle_counter_sig_8 ;
 292 wire \inst|vga_control_unit|un1_toggle_counter_siglto7_4 ;
 293 wire \inst|vga_control_unit|un1_toggle_counter_siglto7 ;
 294 wire \inst|vga_control_unit|toggle_counter_sig_11 ;
 295 wire \inst|vga_control_unit|toggle_counter_sig_10 ;
 296 wire \inst|vga_control_unit|un1_toggle_counter_siglto10 ;
 297 wire \inst|vga_control_unit|toggle_counter_sig_cout[10]~COUT1_39 ;
 298 wire \inst|vga_control_unit|toggle_counter_sig_12 ;
 299 wire \inst|vga_control_unit|toggle_counter_sig_cout[11]~COUT1_25 ;
 300 wire \inst|vga_control_unit|toggle_counter_sig_13 ;
 301 wire \inst|vga_control_unit|toggle_counter_sig_cout[13]~COUT1_27 ;
 302 wire \inst|vga_control_unit|toggle_counter_sig_15 ;
 303 wire \inst|vga_control_unit|toggle_counter_sig_cout[12]~COUT1_41 ;
 304 wire \inst|vga_control_unit|toggle_counter_sig_14 ;
 305 wire \inst|vga_control_unit|toggle_counter_sig_cout[15]~COUT1_29 ;
 306 wire \inst|vga_control_unit|toggle_counter_sig_17 ;
 307 wire \inst|vga_control_unit|toggle_counter_sig_cout[14]~COUT1_43 ;
 308 wire \inst|vga_control_unit|toggle_counter_sig_16 ;
 309 wire \inst|vga_control_unit|toggle_counter_sig_cout[16]~COUT1_45 ;
 310 wire \inst|vga_control_unit|toggle_counter_sig_18 ;
 311 wire \inst|vga_control_unit|toggle_counter_sig_cout[17]~COUT1_31 ;
 312 wire \inst|vga_control_unit|toggle_counter_sig_19 ;
 313 wire \inst|vga_control_unit|un1_toggle_counter_siglto19_4 ;
 314 wire \inst|vga_control_unit|un1_toggle_counter_siglto19_5 ;
 315 wire \inst|vga_control_unit|un1_toggle_counter_siglto19 ;
 316 wire \inst|vga_control_unit|toggle_sig_0_0_0_g1 ;
 317 wire \inst|vga_control_unit|toggle_sig ;
 318 wire \inst|vga_control_unit|b_next_0_g0_5 ;
 319 wire \inst|vga_control_unit|un13_v_enablelto8_a ;
 320 wire \inst|vga_control_unit|un13_v_enablelto8 ;
 321 wire \inst|vga_control_unit|b ;
 322 wire [17:1] \inst|vga_control_unit|toggle_counter_sig_cout ;
 323 wire [0:0] \inst|vga_control_unit|un2_toggle_counter_next_cout ;
 324 wire [8:0] \inst|vga_driver_unit|hsync_counter_cout ;
 325 wire [1:1] \inst|vga_driver_unit|un1_line_counter_sig_a_cout ;
 326 wire [9:1] \inst|vga_driver_unit|un1_line_counter_sig_combout ;
 327 wire [7:1] \inst|vga_driver_unit|un1_line_counter_sig_cout ;
 328 wire [9:1] \inst|vga_driver_unit|un2_column_counter_next_combout ;
 329 wire [7:0] \inst|vga_driver_unit|un2_column_counter_next_cout ;
 330 wire [8:0] \inst|vga_driver_unit|vsync_counter_cout ;
 331 wire [1:0] \inst|dly_counter ;
 332
 333 wire [5:0] \inst1|altpll_component|pll_CLK_bus ;
 334
 335 assign \inst1|altpll_component|_clk0  = \inst1|altpll_component|pll_CLK_bus [0];
 336 assign \inst1|altpll_component|pll~CLK1  = \inst1|altpll_component|pll_CLK_bus [1];
 337 assign \inst1|altpll_component|pll~CLK2  = \inst1|altpll_component|pll_CLK_bus [2];
 338 assign \inst1|altpll_component|pll~CLK3  = \inst1|altpll_component|pll_CLK_bus [3];
 339 assign \inst1|altpll_component|pll~CLK4  = \inst1|altpll_component|pll_CLK_bus [4];
 340 assign \inst1|altpll_component|pll~CLK5  = \inst1|altpll_component|pll_CLK_bus [5];
 341
 342 // atom is at PIN_N3
 343 stratix_io \board_clk~I (
 344         .datain(gnd),
 345         .ddiodatain(gnd),
 346         .oe(gnd),
 347         .outclk(gnd),
 348         .outclkena(vcc),
 349         .inclk(gnd),
 350         .inclkena(vcc),
 351         .areset(gnd),
 352         .sreset(gnd),
 353         .delayctrlin(gnd),
 354         .devclrn(devclrn),
 355         .devpor(devpor),
 356         .devoe(devoe),
 357         .combout(\board_clk~combout ),
 358         .regout(),
 359         .ddioregout(),
 360         .padio(board_clk),
 361         .dqsundelayedout());
 362 // synopsys translate_off
 363 defparam \board_clk~I .ddio_mode = "none";
 364 defparam \board_clk~I .input_async_reset = "none";
 365 defparam \board_clk~I .input_power_up = "low";
 366 defparam \board_clk~I .input_register_mode = "none";
 367 defparam \board_clk~I .input_sync_reset = "none";
 368 defparam \board_clk~I .oe_async_reset = "none";
 369 defparam \board_clk~I .oe_power_up = "low";
 370 defparam \board_clk~I .oe_register_mode = "none";
 371 defparam \board_clk~I .oe_sync_reset = "none";
 372 defparam \board_clk~I .operation_mode = "input";
 373 defparam \board_clk~I .output_async_reset = "none";
 374 defparam \board_clk~I .output_power_up = "low";
 375 defparam \board_clk~I .output_register_mode = "none";
 376 defparam \board_clk~I .output_sync_reset = "none";
 377 // synopsys translate_on
 378
 379 // atom is at PLL_1
 380 stratix_pll \inst1|altpll_component|pll (
 381         .fbin(vcc),
 382         .ena(vcc),
 383         .clkswitch(gnd),
 384         .areset(gnd),
 385         .pfdena(vcc),
 386         .scanclk(gnd),
 387         .scanaclr(gnd),
 388         .scandata(gnd),
 389         .comparator(gnd),
 390         .inclk({gnd,\board_clk~combout }),
 391         .clkena(6'b111111),
 392         .extclkena(4'b1111),
 393         .activeclock(),
 394         .clkloss(),
 395         .locked(),
 396         .scandataout(),
 397         .enable0(),
 398         .enable1(),
 399         .clk(\inst1|altpll_component|pll_CLK_bus ),
 400         .extclk(),
 401         .clkbad());
 402 // synopsys translate_off
 403 defparam \inst1|altpll_component|pll .clk0_counter = "g0";
 404 defparam \inst1|altpll_component|pll .clk0_divide_by = 38;
 405 defparam \inst1|altpll_component|pll .clk0_duty_cycle = 50;
 406 defparam \inst1|altpll_component|pll .clk0_multiply_by = 31;
 407 defparam \inst1|altpll_component|pll .clk0_phase_shift = "-725";
 408 defparam \inst1|altpll_component|pll .clk1_divide_by = 1;
 409 defparam \inst1|altpll_component|pll .clk1_duty_cycle = 50;
 410 defparam \inst1|altpll_component|pll .clk1_multiply_by = 1;
 411 defparam \inst1|altpll_component|pll .clk1_phase_shift = "0";
 412 defparam \inst1|altpll_component|pll .clk2_divide_by = 1;
 413 defparam \inst1|altpll_component|pll .clk2_duty_cycle = 50;
 414 defparam \inst1|altpll_component|pll .clk2_multiply_by = 1;
 415 defparam \inst1|altpll_component|pll .clk2_phase_shift = "0";
 416 defparam \inst1|altpll_component|pll .compensate_clock = "clk0";
 417 defparam \inst1|altpll_component|pll .enable_switch_over_counter = "off";
 418 defparam \inst1|altpll_component|pll .g0_high = 10;
 419 defparam \inst1|altpll_component|pll .g0_initial = 1;
 420 defparam \inst1|altpll_component|pll .g0_low = 9;
 421 defparam \inst1|altpll_component|pll .g0_mode = "odd";
 422 defparam \inst1|altpll_component|pll .g0_ph = 0;
 423 defparam \inst1|altpll_component|pll .gate_lock_counter = 0;
 424 defparam \inst1|altpll_component|pll .gate_lock_signal = "no";
 425 defparam \inst1|altpll_component|pll .inclk0_input_frequency = 30003;
 426 defparam \inst1|altpll_component|pll .inclk1_input_frequency = 30003;
 427 defparam \inst1|altpll_component|pll .invalid_lock_multiplier = 5;
 428 defparam \inst1|altpll_component|pll .l0_high = 13;
 429 defparam \inst1|altpll_component|pll .l0_initial = 1;
 430 defparam \inst1|altpll_component|pll .l0_low = 13;
 431 defparam \inst1|altpll_component|pll .l0_mode = "even";
 432 defparam \inst1|altpll_component|pll .l0_ph = 0;
 433 defparam \inst1|altpll_component|pll .l1_mode = "bypass";
 434 defparam \inst1|altpll_component|pll .l1_ph = 0;
 435 defparam \inst1|altpll_component|pll .m = 31;
 436 defparam \inst1|altpll_component|pll .m_initial = 1;
 437 defparam \inst1|altpll_component|pll .m_ph = 3;
 438 defparam \inst1|altpll_component|pll .n = 2;
 439 defparam \inst1|altpll_component|pll .operation_mode = "normal";
 440 defparam \inst1|altpll_component|pll .pfd_max = 100000;
 441 defparam \inst1|altpll_component|pll .pfd_min = 2000;
 442 defparam \inst1|altpll_component|pll .pll_compensation_delay = 1713;
 443 defparam \inst1|altpll_component|pll .pll_type = "fast";
 444 defparam \inst1|altpll_component|pll .primary_clock = "inclk0";
 445 defparam \inst1|altpll_component|pll .qualify_conf_done = "off";
 446 defparam \inst1|altpll_component|pll .simulation_type = "timing";
 447 defparam \inst1|altpll_component|pll .skip_vco = "off";
 448 defparam \inst1|altpll_component|pll .switch_over_counter = 1;
 449 defparam \inst1|altpll_component|pll .switch_over_on_gated_lock = "off";
 450 defparam \inst1|altpll_component|pll .switch_over_on_lossclk = "off";
 451 defparam \inst1|altpll_component|pll .valid_lock_multiplier = 1;
 452 defparam \inst1|altpll_component|pll .vco_center = 1250;
 453 defparam \inst1|altpll_component|pll .vco_max = 3334;
 454 defparam \inst1|altpll_component|pll .vco_min = 1000;
 455 // synopsys translate_on
 456
 457 // atom is at PIN_A5
 458 stratix_io \inst|reset_pin_in~I (
 459         .datain(gnd),
 460         .ddiodatain(gnd),
 461         .oe(gnd),
 462         .outclk(gnd),
 463         .outclkena(vcc),
 464         .inclk(gnd),
 465         .inclkena(vcc),
 466         .areset(gnd),
 467         .sreset(gnd),
 468         .delayctrlin(gnd),
 469         .devclrn(devclrn),
 470         .devpor(devpor),
 471         .devoe(devoe),
 472         .combout(\reset~combout ),
 473         .regout(),
 474         .ddioregout(),
 475         .padio(reset),
 476         .dqsundelayedout());
 477 // synopsys translate_off
 478 defparam \inst|reset_pin_in~I .ddio_mode = "none";
 479 defparam \inst|reset_pin_in~I .input_async_reset = "none";
 480 defparam \inst|reset_pin_in~I .input_power_up = "low";
 481 defparam \inst|reset_pin_in~I .input_register_mode = "none";
 482 defparam \inst|reset_pin_in~I .input_sync_reset = "none";
 483 defparam \inst|reset_pin_in~I .oe_async_reset = "none";
 484 defparam \inst|reset_pin_in~I .oe_power_up = "low";
 485 defparam \inst|reset_pin_in~I .oe_register_mode = "none";
 486 defparam \inst|reset_pin_in~I .oe_sync_reset = "none";
 487 defparam \inst|reset_pin_in~I .operation_mode = "input";
 488 defparam \inst|reset_pin_in~I .output_async_reset = "none";
 489 defparam \inst|reset_pin_in~I .output_power_up = "low";
 490 defparam \inst|reset_pin_in~I .output_register_mode = "none";
 491 defparam \inst|reset_pin_in~I .output_sync_reset = "none";
 492 // synopsys translate_on
 493
 494 // atom is at LC_X25_Y42_N6
 495 stratix_lcell \inst|dly_counter_1_ (
 496 // Equation(s):
 497 // \inst|dly_counter [1] = DFFEAS(\reset~combout  & (\inst|dly_counter [0] # \inst|dly_counter [1]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
 498
 499         .clk(\inst1|altpll_component|_clk0 ),
 500         .dataa(vcc),
 501         .datab(\reset~combout ),
 502         .datac(\inst|dly_counter [0]),
 503         .datad(\inst|dly_counter [1]),
 504         .aclr(gnd),
 505         .aload(gnd),
 506         .sclr(gnd),
 507         .sload(gnd),
 508         .ena(vcc),
 509         .cin(gnd),
 510         .cin0(gnd),
 511         .cin1(vcc),
 512         .inverta(gnd),
 513         .regcascin(gnd),
 514         .devclrn(devclrn),
 515         .devpor(devpor),
 516         .combout(),
 517         .regout(\inst|dly_counter [1]),
 518         .cout(),
 519         .cout0(),
 520         .cout1());
 521 // synopsys translate_off
 522 defparam \inst|dly_counter_1_ .lut_mask = "ccc0";
 523 defparam \inst|dly_counter_1_ .operation_mode = "normal";
 524 defparam \inst|dly_counter_1_ .output_mode = "reg_only";
 525 defparam \inst|dly_counter_1_ .register_cascade_mode = "off";
 526 defparam \inst|dly_counter_1_ .sum_lutc_input = "datac";
 527 defparam \inst|dly_counter_1_ .synch_mode = "off";
 528 // synopsys translate_on
 529
 530 // atom is at LC_X24_Y41_N4
 531 stratix_lcell \inst|dly_counter_0_ (
 532 // Equation(s):
 533 // \inst|dly_counter [0] = DFFEAS(\reset~combout  & (\inst|dly_counter [1] # !\inst|dly_counter [0]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
 534
 535         .clk(\inst1|altpll_component|_clk0 ),
 536         .dataa(\reset~combout ),
 537         .datab(\inst|dly_counter [0]),
 538         .datac(vcc),
 539         .datad(\inst|dly_counter [1]),
 540         .aclr(gnd),
 541         .aload(gnd),
 542         .sclr(gnd),
 543         .sload(gnd),
 544         .ena(vcc),
 545         .cin(gnd),
 546         .cin0(gnd),
 547         .cin1(vcc),
 548         .inverta(gnd),
 549         .regcascin(gnd),
 550         .devclrn(devclrn),
 551         .devpor(devpor),
 552         .combout(),
 553         .regout(\inst|dly_counter [0]),
 554         .cout(),
 555         .cout0(),
 556         .cout1());
 557 // synopsys translate_off
 558 defparam \inst|dly_counter_0_ .lut_mask = "aa22";
 559 defparam \inst|dly_counter_0_ .operation_mode = "normal";
 560 defparam \inst|dly_counter_0_ .output_mode = "reg_only";
 561 defparam \inst|dly_counter_0_ .register_cascade_mode = "off";
 562 defparam \inst|dly_counter_0_ .sum_lutc_input = "datac";
 563 defparam \inst|dly_counter_0_ .synch_mode = "off";
 564 // synopsys translate_on
 565
 566 // atom is at LC_X25_Y42_N0
 567 stratix_lcell \inst|vga_driver_unit|vsync_state_6_ (
 568 // Equation(s):
 569 // \inst|vga_driver_unit|un6_dly_counter_0_x  = !\inst|dly_counter [1] # !\inst|dly_counter [0] # !\reset~combout
 570 // \inst|vga_driver_unit|vsync_state_6  = DFFEAS(\inst|vga_driver_unit|un6_dly_counter_0_x , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
 571
 572         .clk(\inst1|altpll_component|_clk0 ),
 573         .dataa(vcc),
 574         .datab(\reset~combout ),
 575         .datac(\inst|dly_counter [0]),
 576         .datad(\inst|dly_counter [1]),
 577         .aclr(gnd),
 578         .aload(gnd),
 579         .sclr(gnd),
 580         .sload(gnd),
 581         .ena(vcc),
 582         .cin(gnd),
 583         .cin0(gnd),
 584         .cin1(vcc),
 585         .inverta(gnd),
 586         .regcascin(gnd),
 587         .devclrn(devclrn),
 588         .devpor(devpor),
 589         .combout(\inst|vga_driver_unit|un6_dly_counter_0_x ),
 590         .regout(\inst|vga_driver_unit|vsync_state_6 ),
 591         .cout(),
 592         .cout0(),
 593         .cout1());
 594 // synopsys translate_off
 595 defparam \inst|vga_driver_unit|vsync_state_6_ .lut_mask = "3fff";
 596 defparam \inst|vga_driver_unit|vsync_state_6_ .operation_mode = "normal";
 597 defparam \inst|vga_driver_unit|vsync_state_6_ .output_mode = "reg_and_comb";
 598 defparam \inst|vga_driver_unit|vsync_state_6_ .register_cascade_mode = "off";
 599 defparam \inst|vga_driver_unit|vsync_state_6_ .sum_lutc_input = "datac";
 600 defparam \inst|vga_driver_unit|vsync_state_6_ .synch_mode = "off";
 601 // synopsys translate_on
 602
 603 // atom is at LC_X18_Y42_N5
 604 stratix_lcell \inst|vga_driver_unit|hsync_state_6_ (
 605 // Equation(s):
 606 // \inst|vga_driver_unit|d_set_hsync_counter  = E1_hsync_state_6 # \inst|vga_driver_unit|hsync_state_0
 607 // \inst|vga_driver_unit|hsync_state_6  = DFFEAS(\inst|vga_driver_unit|d_set_hsync_counter , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|un6_dly_counter_0_x , , , VCC)
 608
 609         .clk(\inst1|altpll_component|_clk0 ),
 610         .dataa(vcc),
 611         .datab(vcc),
 612         .datac(\inst|vga_driver_unit|un6_dly_counter_0_x ),
 613         .datad(\inst|vga_driver_unit|hsync_state_0 ),
 614         .aclr(gnd),
 615         .aload(gnd),
 616         .sclr(gnd),
 617         .sload(vcc),
 618         .ena(vcc),
 619         .cin(gnd),
 620         .cin0(gnd),
 621         .cin1(vcc),
 622         .inverta(gnd),
 623         .regcascin(gnd),
 624         .devclrn(devclrn),
 625         .devpor(devpor),
 626         .combout(\inst|vga_driver_unit|d_set_hsync_counter ),
 627         .regout(\inst|vga_driver_unit|hsync_state_6 ),
 628         .cout(),
 629         .cout0(),
 630         .cout1());
 631 // synopsys translate_off
 632 defparam \inst|vga_driver_unit|hsync_state_6_ .lut_mask = "fff0";
 633 defparam \inst|vga_driver_unit|hsync_state_6_ .operation_mode = "normal";
 634 defparam \inst|vga_driver_unit|hsync_state_6_ .output_mode = "reg_and_comb";
 635 defparam \inst|vga_driver_unit|hsync_state_6_ .register_cascade_mode = "off";
 636 defparam \inst|vga_driver_unit|hsync_state_6_ .sum_lutc_input = "qfbk";
 637 defparam \inst|vga_driver_unit|hsync_state_6_ .synch_mode = "on";
 638 // synopsys translate_on
 639
 640 // atom is at LC_X21_Y42_N0
 641 stratix_lcell \inst|vga_driver_unit|hsync_counter_0_ (
 642 // Equation(s):
 643 // \inst|vga_driver_unit|hsync_counter_0  = DFFEAS(!\inst|vga_driver_unit|hsync_counter_0 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_2_i ,
 644 // !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 645 // \inst|vga_driver_unit|hsync_counter_cout [0] = CARRY(\inst|vga_driver_unit|hsync_counter_0 )
 646 // \inst|vga_driver_unit|hsync_counter_cout[0]~COUT1_10  = CARRY(\inst|vga_driver_unit|hsync_counter_0 )
 647
 648         .clk(\inst1|altpll_component|_clk0 ),
 649         .dataa(vcc),
 650         .datab(\inst|vga_driver_unit|hsync_counter_0 ),
 651         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 652         .datad(vcc),
 653         .aclr(gnd),
 654         .aload(gnd),
 655         .sclr(!\inst|vga_driver_unit|G_2_i ),
 656         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 657         .ena(vcc),
 658         .cin(gnd),
 659         .cin0(gnd),
 660         .cin1(vcc),
 661         .inverta(gnd),
 662         .regcascin(gnd),
 663         .devclrn(devclrn),
 664         .devpor(devpor),
 665         .combout(),
 666         .regout(\inst|vga_driver_unit|hsync_counter_0 ),
 667         .cout(),
 668         .cout0(\inst|vga_driver_unit|hsync_counter_cout [0]),
 669         .cout1(\inst|vga_driver_unit|hsync_counter_cout[0]~COUT1_10 ));
 670 // synopsys translate_off
 671 defparam \inst|vga_driver_unit|hsync_counter_0_ .lut_mask = "33cc";
 672 defparam \inst|vga_driver_unit|hsync_counter_0_ .operation_mode = "arithmetic";
 673 defparam \inst|vga_driver_unit|hsync_counter_0_ .output_mode = "reg_only";
 674 defparam \inst|vga_driver_unit|hsync_counter_0_ .register_cascade_mode = "off";
 675 defparam \inst|vga_driver_unit|hsync_counter_0_ .sum_lutc_input = "datac";
 676 defparam \inst|vga_driver_unit|hsync_counter_0_ .synch_mode = "on";
 677 // synopsys translate_on
 678
 679 // atom is at LC_X21_Y42_N1
 680 stratix_lcell \inst|vga_driver_unit|hsync_counter_1_ (
 681 // Equation(s):
 682 // \inst|vga_driver_unit|hsync_counter_1  = DFFEAS(\inst|vga_driver_unit|hsync_counter_1  $ \inst|vga_driver_unit|hsync_counter_cout [0], GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , ,
 683 // !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 684 // \inst|vga_driver_unit|hsync_counter_cout [1] = CARRY(!\inst|vga_driver_unit|hsync_counter_cout [0] # !\inst|vga_driver_unit|hsync_counter_1 )
 685 // \inst|vga_driver_unit|hsync_counter_cout[1]~COUT1_12  = CARRY(!\inst|vga_driver_unit|hsync_counter_cout[0]~COUT1_10  # !\inst|vga_driver_unit|hsync_counter_1 )
 686
 687         .clk(\inst1|altpll_component|_clk0 ),
 688         .dataa(vcc),
 689         .datab(\inst|vga_driver_unit|hsync_counter_1 ),
 690         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 691         .datad(vcc),
 692         .aclr(gnd),
 693         .aload(gnd),
 694         .sclr(!\inst|vga_driver_unit|G_2_i ),
 695         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 696         .ena(vcc),
 697         .cin(gnd),
 698         .cin0(\inst|vga_driver_unit|hsync_counter_cout [0]),
 699         .cin1(\inst|vga_driver_unit|hsync_counter_cout[0]~COUT1_10 ),
 700         .inverta(gnd),
 701         .regcascin(gnd),
 702         .devclrn(devclrn),
 703         .devpor(devpor),
 704         .combout(),
 705         .regout(\inst|vga_driver_unit|hsync_counter_1 ),
 706         .cout(),
 707         .cout0(\inst|vga_driver_unit|hsync_counter_cout [1]),
 708         .cout1(\inst|vga_driver_unit|hsync_counter_cout[1]~COUT1_12 ));
 709 // synopsys translate_off
 710 defparam \inst|vga_driver_unit|hsync_counter_1_ .cin0_used = "true";
 711 defparam \inst|vga_driver_unit|hsync_counter_1_ .cin1_used = "true";
 712 defparam \inst|vga_driver_unit|hsync_counter_1_ .lut_mask = "3c3f";
 713 defparam \inst|vga_driver_unit|hsync_counter_1_ .operation_mode = "arithmetic";
 714 defparam \inst|vga_driver_unit|hsync_counter_1_ .output_mode = "reg_only";
 715 defparam \inst|vga_driver_unit|hsync_counter_1_ .register_cascade_mode = "off";
 716 defparam \inst|vga_driver_unit|hsync_counter_1_ .sum_lutc_input = "cin";
 717 defparam \inst|vga_driver_unit|hsync_counter_1_ .synch_mode = "on";
 718 // synopsys translate_on
 719
 720 // atom is at LC_X21_Y42_N2
 721 stratix_lcell \inst|vga_driver_unit|hsync_counter_2_ (
 722 // Equation(s):
 723 // \inst|vga_driver_unit|hsync_counter_2  = DFFEAS(\inst|vga_driver_unit|hsync_counter_2  $ (!\inst|vga_driver_unit|hsync_counter_cout [1]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , ,
 724 // !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 725 // \inst|vga_driver_unit|hsync_counter_cout [2] = CARRY(\inst|vga_driver_unit|hsync_counter_2  & (!\inst|vga_driver_unit|hsync_counter_cout [1]))
 726 // \inst|vga_driver_unit|hsync_counter_cout[2]~COUT1_14  = CARRY(\inst|vga_driver_unit|hsync_counter_2  & (!\inst|vga_driver_unit|hsync_counter_cout[1]~COUT1_12 ))
 727
 728         .clk(\inst1|altpll_component|_clk0 ),
 729         .dataa(\inst|vga_driver_unit|hsync_counter_2 ),
 730         .datab(vcc),
 731         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 732         .datad(vcc),
 733         .aclr(gnd),
 734         .aload(gnd),
 735         .sclr(!\inst|vga_driver_unit|G_2_i ),
 736         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 737         .ena(vcc),
 738         .cin(gnd),
 739         .cin0(\inst|vga_driver_unit|hsync_counter_cout [1]),
 740         .cin1(\inst|vga_driver_unit|hsync_counter_cout[1]~COUT1_12 ),
 741         .inverta(gnd),
 742         .regcascin(gnd),
 743         .devclrn(devclrn),
 744         .devpor(devpor),
 745         .combout(),
 746         .regout(\inst|vga_driver_unit|hsync_counter_2 ),
 747         .cout(),
 748         .cout0(\inst|vga_driver_unit|hsync_counter_cout [2]),
 749         .cout1(\inst|vga_driver_unit|hsync_counter_cout[2]~COUT1_14 ));
 750 // synopsys translate_off
 751 defparam \inst|vga_driver_unit|hsync_counter_2_ .cin0_used = "true";
 752 defparam \inst|vga_driver_unit|hsync_counter_2_ .cin1_used = "true";
 753 defparam \inst|vga_driver_unit|hsync_counter_2_ .lut_mask = "a50a";
 754 defparam \inst|vga_driver_unit|hsync_counter_2_ .operation_mode = "arithmetic";
 755 defparam \inst|vga_driver_unit|hsync_counter_2_ .output_mode = "reg_only";
 756 defparam \inst|vga_driver_unit|hsync_counter_2_ .register_cascade_mode = "off";
 757 defparam \inst|vga_driver_unit|hsync_counter_2_ .sum_lutc_input = "cin";
 758 defparam \inst|vga_driver_unit|hsync_counter_2_ .synch_mode = "on";
 759 // synopsys translate_on
 760
 761 // atom is at LC_X21_Y42_N3
 762 stratix_lcell \inst|vga_driver_unit|hsync_counter_3_ (
 763 // Equation(s):
 764 // \inst|vga_driver_unit|hsync_counter_3  = DFFEAS(\inst|vga_driver_unit|hsync_counter_3  $ (\inst|vga_driver_unit|hsync_counter_cout [2]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , ,
 765 // !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 766 // \inst|vga_driver_unit|hsync_counter_cout [3] = CARRY(!\inst|vga_driver_unit|hsync_counter_cout [2] # !\inst|vga_driver_unit|hsync_counter_3 )
 767 // \inst|vga_driver_unit|hsync_counter_cout[3]~COUT1_16  = CARRY(!\inst|vga_driver_unit|hsync_counter_cout[2]~COUT1_14  # !\inst|vga_driver_unit|hsync_counter_3 )
 768
 769         .clk(\inst1|altpll_component|_clk0 ),
 770         .dataa(\inst|vga_driver_unit|hsync_counter_3 ),
 771         .datab(vcc),
 772         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 773         .datad(vcc),
 774         .aclr(gnd),
 775         .aload(gnd),
 776         .sclr(!\inst|vga_driver_unit|G_2_i ),
 777         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 778         .ena(vcc),
 779         .cin(gnd),
 780         .cin0(\inst|vga_driver_unit|hsync_counter_cout [2]),
 781         .cin1(\inst|vga_driver_unit|hsync_counter_cout[2]~COUT1_14 ),
 782         .inverta(gnd),
 783         .regcascin(gnd),
 784         .devclrn(devclrn),
 785         .devpor(devpor),
 786         .combout(),
 787         .regout(\inst|vga_driver_unit|hsync_counter_3 ),
 788         .cout(),
 789         .cout0(\inst|vga_driver_unit|hsync_counter_cout [3]),
 790         .cout1(\inst|vga_driver_unit|hsync_counter_cout[3]~COUT1_16 ));
 791 // synopsys translate_off
 792 defparam \inst|vga_driver_unit|hsync_counter_3_ .cin0_used = "true";
 793 defparam \inst|vga_driver_unit|hsync_counter_3_ .cin1_used = "true";
 794 defparam \inst|vga_driver_unit|hsync_counter_3_ .lut_mask = "5a5f";
 795 defparam \inst|vga_driver_unit|hsync_counter_3_ .operation_mode = "arithmetic";
 796 defparam \inst|vga_driver_unit|hsync_counter_3_ .output_mode = "reg_only";
 797 defparam \inst|vga_driver_unit|hsync_counter_3_ .register_cascade_mode = "off";
 798 defparam \inst|vga_driver_unit|hsync_counter_3_ .sum_lutc_input = "cin";
 799 defparam \inst|vga_driver_unit|hsync_counter_3_ .synch_mode = "on";
 800 // synopsys translate_on
 801
 802 // atom is at LC_X22_Y42_N7
 803 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_7 (
 804 // Equation(s):
 805 // \inst|vga_driver_unit|un13_hsync_counter_7  = \inst|vga_driver_unit|hsync_counter_1  & \inst|vga_driver_unit|hsync_counter_2  & \inst|vga_driver_unit|hsync_counter_3  & \inst|vga_driver_unit|hsync_counter_0
 806
 807         .clk(gnd),
 808         .dataa(\inst|vga_driver_unit|hsync_counter_1 ),
 809         .datab(\inst|vga_driver_unit|hsync_counter_2 ),
 810         .datac(\inst|vga_driver_unit|hsync_counter_3 ),
 811         .datad(\inst|vga_driver_unit|hsync_counter_0 ),
 812         .aclr(gnd),
 813         .aload(gnd),
 814         .sclr(gnd),
 815         .sload(gnd),
 816         .ena(vcc),
 817         .cin(gnd),
 818         .cin0(gnd),
 819         .cin1(vcc),
 820         .inverta(gnd),
 821         .regcascin(gnd),
 822         .devclrn(devclrn),
 823         .devpor(devpor),
 824         .combout(\inst|vga_driver_unit|un13_hsync_counter_7 ),
 825         .regout(),
 826         .cout(),
 827         .cout0(),
 828         .cout1());
 829 // synopsys translate_off
 830 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_7 .lut_mask = "8000";
 831 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_7 .operation_mode = "normal";
 832 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_7 .output_mode = "comb_only";
 833 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_7 .register_cascade_mode = "off";
 834 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_7 .sum_lutc_input = "datac";
 835 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_7 .synch_mode = "off";
 836 // synopsys translate_on
 837
 838 // atom is at LC_X21_Y42_N4
 839 stratix_lcell \inst|vga_driver_unit|hsync_counter_4_ (
 840 // Equation(s):
 841 // \inst|vga_driver_unit|hsync_counter_4  = DFFEAS(\inst|vga_driver_unit|hsync_counter_4  $ (!\inst|vga_driver_unit|hsync_counter_cout [3]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , ,
 842 // !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 843 // \inst|vga_driver_unit|hsync_counter_cout [4] = CARRY(\inst|vga_driver_unit|hsync_counter_4  & (!\inst|vga_driver_unit|hsync_counter_cout[3]~COUT1_16 ))
 844
 845         .clk(\inst1|altpll_component|_clk0 ),
 846         .dataa(\inst|vga_driver_unit|hsync_counter_4 ),
 847         .datab(vcc),
 848         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 849         .datad(vcc),
 850         .aclr(gnd),
 851         .aload(gnd),
 852         .sclr(!\inst|vga_driver_unit|G_2_i ),
 853         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 854         .ena(vcc),
 855         .cin(gnd),
 856         .cin0(\inst|vga_driver_unit|hsync_counter_cout [3]),
 857         .cin1(\inst|vga_driver_unit|hsync_counter_cout[3]~COUT1_16 ),
 858         .inverta(gnd),
 859         .regcascin(gnd),
 860         .devclrn(devclrn),
 861         .devpor(devpor),
 862         .combout(),
 863         .regout(\inst|vga_driver_unit|hsync_counter_4 ),
 864         .cout(\inst|vga_driver_unit|hsync_counter_cout [4]),
 865         .cout0(),
 866         .cout1());
 867 // synopsys translate_off
 868 defparam \inst|vga_driver_unit|hsync_counter_4_ .cin0_used = "true";
 869 defparam \inst|vga_driver_unit|hsync_counter_4_ .cin1_used = "true";
 870 defparam \inst|vga_driver_unit|hsync_counter_4_ .lut_mask = "a50a";
 871 defparam \inst|vga_driver_unit|hsync_counter_4_ .operation_mode = "arithmetic";
 872 defparam \inst|vga_driver_unit|hsync_counter_4_ .output_mode = "reg_only";
 873 defparam \inst|vga_driver_unit|hsync_counter_4_ .register_cascade_mode = "off";
 874 defparam \inst|vga_driver_unit|hsync_counter_4_ .sum_lutc_input = "cin";
 875 defparam \inst|vga_driver_unit|hsync_counter_4_ .synch_mode = "on";
 876 // synopsys translate_on
 877
 878 // atom is at LC_X21_Y42_N5
 879 stratix_lcell \inst|vga_driver_unit|hsync_counter_5_ (
 880 // Equation(s):
 881 // \inst|vga_driver_unit|hsync_counter_5  = DFFEAS(\inst|vga_driver_unit|hsync_counter_5  $ \inst|vga_driver_unit|hsync_counter_cout [4], GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , ,
 882 // !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 883 // \inst|vga_driver_unit|hsync_counter_cout [5] = CARRY(!\inst|vga_driver_unit|hsync_counter_cout [4] # !\inst|vga_driver_unit|hsync_counter_5 )
 884 // \inst|vga_driver_unit|hsync_counter_cout[5]~COUT1_18  = CARRY(!\inst|vga_driver_unit|hsync_counter_cout [4] # !\inst|vga_driver_unit|hsync_counter_5 )
 885
 886         .clk(\inst1|altpll_component|_clk0 ),
 887         .dataa(vcc),
 888         .datab(\inst|vga_driver_unit|hsync_counter_5 ),
 889         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 890         .datad(vcc),
 891         .aclr(gnd),
 892         .aload(gnd),
 893         .sclr(!\inst|vga_driver_unit|G_2_i ),
 894         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 895         .ena(vcc),
 896         .cin(\inst|vga_driver_unit|hsync_counter_cout [4]),
 897         .cin0(gnd),
 898         .cin1(vcc),
 899         .inverta(gnd),
 900         .regcascin(gnd),
 901         .devclrn(devclrn),
 902         .devpor(devpor),
 903         .combout(),
 904         .regout(\inst|vga_driver_unit|hsync_counter_5 ),
 905         .cout(),
 906         .cout0(\inst|vga_driver_unit|hsync_counter_cout [5]),
 907         .cout1(\inst|vga_driver_unit|hsync_counter_cout[5]~COUT1_18 ));
 908 // synopsys translate_off
 909 defparam \inst|vga_driver_unit|hsync_counter_5_ .cin_used = "true";
 910 defparam \inst|vga_driver_unit|hsync_counter_5_ .lut_mask = "3c3f";
 911 defparam \inst|vga_driver_unit|hsync_counter_5_ .operation_mode = "arithmetic";
 912 defparam \inst|vga_driver_unit|hsync_counter_5_ .output_mode = "reg_only";
 913 defparam \inst|vga_driver_unit|hsync_counter_5_ .register_cascade_mode = "off";
 914 defparam \inst|vga_driver_unit|hsync_counter_5_ .sum_lutc_input = "cin";
 915 defparam \inst|vga_driver_unit|hsync_counter_5_ .synch_mode = "on";
 916 // synopsys translate_on
 917
 918 // atom is at LC_X21_Y42_N6
 919 stratix_lcell \inst|vga_driver_unit|hsync_counter_6_ (
 920 // Equation(s):
 921 // \inst|vga_driver_unit|hsync_counter_6  = DFFEAS(\inst|vga_driver_unit|hsync_counter_6  $ !(!\inst|vga_driver_unit|hsync_counter_cout [4] & \inst|vga_driver_unit|hsync_counter_cout [5]) # (\inst|vga_driver_unit|hsync_counter_cout [4] &
 922 // \inst|vga_driver_unit|hsync_counter_cout[5]~COUT1_18 ), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 923 // \inst|vga_driver_unit|hsync_counter_cout [6] = CARRY(\inst|vga_driver_unit|hsync_counter_6  & !\inst|vga_driver_unit|hsync_counter_cout [5])
 924 // \inst|vga_driver_unit|hsync_counter_cout[6]~COUT1_20  = CARRY(\inst|vga_driver_unit|hsync_counter_6  & !\inst|vga_driver_unit|hsync_counter_cout[5]~COUT1_18 )
 925
 926         .clk(\inst1|altpll_component|_clk0 ),
 927         .dataa(vcc),
 928         .datab(\inst|vga_driver_unit|hsync_counter_6 ),
 929         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 930         .datad(vcc),
 931         .aclr(gnd),
 932         .aload(gnd),
 933         .sclr(!\inst|vga_driver_unit|G_2_i ),
 934         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 935         .ena(vcc),
 936         .cin(\inst|vga_driver_unit|hsync_counter_cout [4]),
 937         .cin0(\inst|vga_driver_unit|hsync_counter_cout [5]),
 938         .cin1(\inst|vga_driver_unit|hsync_counter_cout[5]~COUT1_18 ),
 939         .inverta(gnd),
 940         .regcascin(gnd),
 941         .devclrn(devclrn),
 942         .devpor(devpor),
 943         .combout(),
 944         .regout(\inst|vga_driver_unit|hsync_counter_6 ),
 945         .cout(),
 946         .cout0(\inst|vga_driver_unit|hsync_counter_cout [6]),
 947         .cout1(\inst|vga_driver_unit|hsync_counter_cout[6]~COUT1_20 ));
 948 // synopsys translate_off
 949 defparam \inst|vga_driver_unit|hsync_counter_6_ .cin0_used = "true";
 950 defparam \inst|vga_driver_unit|hsync_counter_6_ .cin1_used = "true";
 951 defparam \inst|vga_driver_unit|hsync_counter_6_ .cin_used = "true";
 952 defparam \inst|vga_driver_unit|hsync_counter_6_ .lut_mask = "c30c";
 953 defparam \inst|vga_driver_unit|hsync_counter_6_ .operation_mode = "arithmetic";
 954 defparam \inst|vga_driver_unit|hsync_counter_6_ .output_mode = "reg_only";
 955 defparam \inst|vga_driver_unit|hsync_counter_6_ .register_cascade_mode = "off";
 956 defparam \inst|vga_driver_unit|hsync_counter_6_ .sum_lutc_input = "cin";
 957 defparam \inst|vga_driver_unit|hsync_counter_6_ .synch_mode = "on";
 958 // synopsys translate_on
 959
 960 // atom is at LC_X21_Y42_N7
 961 stratix_lcell \inst|vga_driver_unit|hsync_counter_7_ (
 962 // Equation(s):
 963 // \inst|vga_driver_unit|hsync_counter_7  = DFFEAS(\inst|vga_driver_unit|hsync_counter_7  $ ((!\inst|vga_driver_unit|hsync_counter_cout [4] & \inst|vga_driver_unit|hsync_counter_cout [6]) # (\inst|vga_driver_unit|hsync_counter_cout [4] &
 964 // \inst|vga_driver_unit|hsync_counter_cout[6]~COUT1_20 )), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 965 // \inst|vga_driver_unit|hsync_counter_cout [7] = CARRY(!\inst|vga_driver_unit|hsync_counter_cout [6] # !\inst|vga_driver_unit|hsync_counter_7 )
 966 // \inst|vga_driver_unit|hsync_counter_cout[7]~COUT1_22  = CARRY(!\inst|vga_driver_unit|hsync_counter_cout[6]~COUT1_20  # !\inst|vga_driver_unit|hsync_counter_7 )
 967
 968         .clk(\inst1|altpll_component|_clk0 ),
 969         .dataa(\inst|vga_driver_unit|hsync_counter_7 ),
 970         .datab(vcc),
 971         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 972         .datad(vcc),
 973         .aclr(gnd),
 974         .aload(gnd),
 975         .sclr(!\inst|vga_driver_unit|G_2_i ),
 976         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 977         .ena(vcc),
 978         .cin(\inst|vga_driver_unit|hsync_counter_cout [4]),
 979         .cin0(\inst|vga_driver_unit|hsync_counter_cout [6]),
 980         .cin1(\inst|vga_driver_unit|hsync_counter_cout[6]~COUT1_20 ),
 981         .inverta(gnd),
 982         .regcascin(gnd),
 983         .devclrn(devclrn),
 984         .devpor(devpor),
 985         .combout(),
 986         .regout(\inst|vga_driver_unit|hsync_counter_7 ),
 987         .cout(),
 988         .cout0(\inst|vga_driver_unit|hsync_counter_cout [7]),
 989         .cout1(\inst|vga_driver_unit|hsync_counter_cout[7]~COUT1_22 ));
 990 // synopsys translate_off
 991 defparam \inst|vga_driver_unit|hsync_counter_7_ .cin0_used = "true";
 992 defparam \inst|vga_driver_unit|hsync_counter_7_ .cin1_used = "true";
 993 defparam \inst|vga_driver_unit|hsync_counter_7_ .cin_used = "true";
 994 defparam \inst|vga_driver_unit|hsync_counter_7_ .lut_mask = "5a5f";
 995 defparam \inst|vga_driver_unit|hsync_counter_7_ .operation_mode = "arithmetic";
 996 defparam \inst|vga_driver_unit|hsync_counter_7_ .output_mode = "reg_only";
 997 defparam \inst|vga_driver_unit|hsync_counter_7_ .register_cascade_mode = "off";
 998 defparam \inst|vga_driver_unit|hsync_counter_7_ .sum_lutc_input = "cin";
 999 defparam \inst|vga_driver_unit|hsync_counter_7_ .synch_mode = "on";
1000 // synopsys translate_on
1001
1002 // atom is at LC_X21_Y42_N8
1003 stratix_lcell \inst|vga_driver_unit|hsync_counter_8_ (
1004 // Equation(s):
1005 // \inst|vga_driver_unit|hsync_counter_8  = DFFEAS(\inst|vga_driver_unit|hsync_counter_8  $ (!(!\inst|vga_driver_unit|hsync_counter_cout [4] & \inst|vga_driver_unit|hsync_counter_cout [7]) # (\inst|vga_driver_unit|hsync_counter_cout [4] &
1006 // \inst|vga_driver_unit|hsync_counter_cout[7]~COUT1_22 )), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
1007 // \inst|vga_driver_unit|hsync_counter_cout [8] = CARRY(\inst|vga_driver_unit|hsync_counter_8  & (!\inst|vga_driver_unit|hsync_counter_cout [7]))
1008 // \inst|vga_driver_unit|hsync_counter_cout[8]~COUT1_24  = CARRY(\inst|vga_driver_unit|hsync_counter_8  & (!\inst|vga_driver_unit|hsync_counter_cout[7]~COUT1_22 ))
1009
1010         .clk(\inst1|altpll_component|_clk0 ),
1011         .dataa(\inst|vga_driver_unit|hsync_counter_8 ),
1012         .datab(vcc),
1013         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
1014         .datad(vcc),
1015         .aclr(gnd),
1016         .aload(gnd),
1017         .sclr(!\inst|vga_driver_unit|G_2_i ),
1018         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
1019         .ena(vcc),
1020         .cin(\inst|vga_driver_unit|hsync_counter_cout [4]),
1021         .cin0(\inst|vga_driver_unit|hsync_counter_cout [7]),
1022         .cin1(\inst|vga_driver_unit|hsync_counter_cout[7]~COUT1_22 ),
1023         .inverta(gnd),
1024         .regcascin(gnd),
1025         .devclrn(devclrn),
1026         .devpor(devpor),
1027         .combout(),
1028         .regout(\inst|vga_driver_unit|hsync_counter_8 ),
1029         .cout(),
1030         .cout0(\inst|vga_driver_unit|hsync_counter_cout [8]),
1031         .cout1(\inst|vga_driver_unit|hsync_counter_cout[8]~COUT1_24 ));
1032 // synopsys translate_off
1033 defparam \inst|vga_driver_unit|hsync_counter_8_ .cin0_used = "true";
1034 defparam \inst|vga_driver_unit|hsync_counter_8_ .cin1_used = "true";
1035 defparam \inst|vga_driver_unit|hsync_counter_8_ .cin_used = "true";
1036 defparam \inst|vga_driver_unit|hsync_counter_8_ .lut_mask = "a50a";
1037 defparam \inst|vga_driver_unit|hsync_counter_8_ .operation_mode = "arithmetic";
1038 defparam \inst|vga_driver_unit|hsync_counter_8_ .output_mode = "reg_only";
1039 defparam \inst|vga_driver_unit|hsync_counter_8_ .register_cascade_mode = "off";
1040 defparam \inst|vga_driver_unit|hsync_counter_8_ .sum_lutc_input = "cin";
1041 defparam \inst|vga_driver_unit|hsync_counter_8_ .synch_mode = "on";
1042 // synopsys translate_on
1043
1044 // atom is at LC_X21_Y42_N9
1045 stratix_lcell \inst|vga_driver_unit|hsync_counter_9_ (
1046 // Equation(s):
1047 // \inst|vga_driver_unit|hsync_counter_9  = DFFEAS((!\inst|vga_driver_unit|hsync_counter_cout [4] & \inst|vga_driver_unit|hsync_counter_cout [8]) # (\inst|vga_driver_unit|hsync_counter_cout [4] & \inst|vga_driver_unit|hsync_counter_cout[8]~COUT1_24 ) $
1048 // \inst|vga_driver_unit|hsync_counter_9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
1049
1050         .clk(\inst1|altpll_component|_clk0 ),
1051         .dataa(vcc),
1052         .datab(vcc),
1053         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
1054         .datad(\inst|vga_driver_unit|hsync_counter_9 ),
1055         .aclr(gnd),
1056         .aload(gnd),
1057         .sclr(!\inst|vga_driver_unit|G_2_i ),
1058         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
1059         .ena(vcc),
1060         .cin(\inst|vga_driver_unit|hsync_counter_cout [4]),
1061         .cin0(\inst|vga_driver_unit|hsync_counter_cout [8]),
1062         .cin1(\inst|vga_driver_unit|hsync_counter_cout[8]~COUT1_24 ),
1063         .inverta(gnd),
1064         .regcascin(gnd),
1065         .devclrn(devclrn),
1066         .devpor(devpor),
1067         .combout(),
1068         .regout(\inst|vga_driver_unit|hsync_counter_9 ),
1069         .cout(),
1070         .cout0(),
1071         .cout1());
1072 // synopsys translate_off
1073 defparam \inst|vga_driver_unit|hsync_counter_9_ .cin0_used = "true";
1074 defparam \inst|vga_driver_unit|hsync_counter_9_ .cin1_used = "true";
1075 defparam \inst|vga_driver_unit|hsync_counter_9_ .cin_used = "true";
1076 defparam \inst|vga_driver_unit|hsync_counter_9_ .lut_mask = "0ff0";
1077 defparam \inst|vga_driver_unit|hsync_counter_9_ .operation_mode = "normal";
1078 defparam \inst|vga_driver_unit|hsync_counter_9_ .output_mode = "reg_only";
1079 defparam \inst|vga_driver_unit|hsync_counter_9_ .register_cascade_mode = "off";
1080 defparam \inst|vga_driver_unit|hsync_counter_9_ .sum_lutc_input = "cin";
1081 defparam \inst|vga_driver_unit|hsync_counter_9_ .synch_mode = "on";
1082 // synopsys translate_on
1083
1084 // atom is at LC_X22_Y42_N4
1085 stratix_lcell \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9_3 (
1086 // Equation(s):
1087 // \inst|vga_driver_unit|un9_hsync_counterlt9_3  = !\inst|vga_driver_unit|hsync_counter_4  # !\inst|vga_driver_unit|hsync_counter_7  # !\inst|vga_driver_unit|hsync_counter_6  # !\inst|vga_driver_unit|hsync_counter_5
1088
1089         .clk(gnd),
1090         .dataa(\inst|vga_driver_unit|hsync_counter_5 ),
1091         .datab(\inst|vga_driver_unit|hsync_counter_6 ),
1092         .datac(\inst|vga_driver_unit|hsync_counter_7 ),
1093         .datad(\inst|vga_driver_unit|hsync_counter_4 ),
1094         .aclr(gnd),
1095         .aload(gnd),
1096         .sclr(gnd),
1097         .sload(gnd),
1098         .ena(vcc),
1099         .cin(gnd),
1100         .cin0(gnd),
1101         .cin1(vcc),
1102         .inverta(gnd),
1103         .regcascin(gnd),
1104         .devclrn(devclrn),
1105         .devpor(devpor),
1106         .combout(\inst|vga_driver_unit|un9_hsync_counterlt9_3 ),
1107         .regout(),
1108         .cout(),
1109         .cout0(),
1110         .cout1());
1111 // synopsys translate_off
1112 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9_3 .lut_mask = "7fff";
1113 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9_3 .operation_mode = "normal";
1114 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9_3 .output_mode = "comb_only";
1115 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9_3 .register_cascade_mode = "off";
1116 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9_3 .sum_lutc_input = "datac";
1117 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9_3 .synch_mode = "off";
1118 // synopsys translate_on
1119
1120 // atom is at LC_X22_Y42_N5
1121 stratix_lcell \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9 (
1122 // Equation(s):
1123 // \inst|vga_driver_unit|un9_hsync_counterlt9  = \inst|vga_driver_unit|un9_hsync_counterlt9_3  # !\inst|vga_driver_unit|hsync_counter_8  # !\inst|vga_driver_unit|hsync_counter_9  # !\inst|vga_driver_unit|un13_hsync_counter_7
1124
1125         .clk(gnd),
1126         .dataa(\inst|vga_driver_unit|un13_hsync_counter_7 ),
1127         .datab(\inst|vga_driver_unit|hsync_counter_9 ),
1128         .datac(\inst|vga_driver_unit|hsync_counter_8 ),
1129         .datad(\inst|vga_driver_unit|un9_hsync_counterlt9_3 ),
1130         .aclr(gnd),
1131         .aload(gnd),
1132         .sclr(gnd),
1133         .sload(gnd),
1134         .ena(vcc),
1135         .cin(gnd),
1136         .cin0(gnd),
1137         .cin1(vcc),
1138         .inverta(gnd),
1139         .regcascin(gnd),
1140         .devclrn(devclrn),
1141         .devpor(devpor),
1142         .combout(\inst|vga_driver_unit|un9_hsync_counterlt9 ),
1143         .regout(),
1144         .cout(),
1145         .cout0(),
1146         .cout1());
1147 // synopsys translate_off
1148 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9 .lut_mask = "ff7f";
1149 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9 .operation_mode = "normal";
1150 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9 .output_mode = "comb_only";
1151 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9 .register_cascade_mode = "off";
1152 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9 .sum_lutc_input = "datac";
1153 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9 .synch_mode = "off";
1154 // synopsys translate_on
1155
1156 // atom is at LC_X22_Y42_N0
1157 stratix_lcell \inst|vga_driver_unit|G_2 (
1158 // Equation(s):
1159 // \inst|vga_driver_unit|G_2_i  = !\inst|vga_driver_unit|hsync_state_6  & !\inst|vga_driver_unit|hsync_state_0  & !\inst|vga_driver_unit|un6_dly_counter_0_x  # !\inst|vga_driver_unit|un9_hsync_counterlt9
1160
1161         .clk(gnd),
1162         .dataa(\inst|vga_driver_unit|hsync_state_6 ),
1163         .datab(\inst|vga_driver_unit|hsync_state_0 ),
1164         .datac(\inst|vga_driver_unit|un9_hsync_counterlt9 ),
1165         .datad(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1166         .aclr(gnd),
1167         .aload(gnd),
1168         .sclr(gnd),
1169         .sload(gnd),
1170         .ena(vcc),
1171         .cin(gnd),
1172         .cin0(gnd),
1173         .cin1(vcc),
1174         .inverta(gnd),
1175         .regcascin(gnd),
1176         .devclrn(devclrn),
1177         .devpor(devpor),
1178         .combout(\inst|vga_driver_unit|G_2_i ),
1179         .regout(),
1180         .cout(),
1181         .cout0(),
1182         .cout1());
1183 // synopsys translate_off
1184 defparam \inst|vga_driver_unit|G_2 .lut_mask = "0f1f";
1185 defparam \inst|vga_driver_unit|G_2 .operation_mode = "normal";
1186 defparam \inst|vga_driver_unit|G_2 .output_mode = "comb_only";
1187 defparam \inst|vga_driver_unit|G_2 .register_cascade_mode = "off";
1188 defparam \inst|vga_driver_unit|G_2 .sum_lutc_input = "datac";
1189 defparam \inst|vga_driver_unit|G_2 .synch_mode = "off";
1190 // synopsys translate_on
1191
1192 // atom is at LC_X22_Y42_N1
1193 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_2 (
1194 // Equation(s):
1195 // \inst|vga_driver_unit|un13_hsync_counter_2  = !\inst|vga_driver_unit|hsync_counter_5  & \inst|vga_driver_unit|hsync_counter_8  & \inst|vga_driver_unit|hsync_counter_9  & \inst|vga_driver_unit|hsync_counter_4
1196
1197         .clk(gnd),
1198         .dataa(\inst|vga_driver_unit|hsync_counter_5 ),
1199         .datab(\inst|vga_driver_unit|hsync_counter_8 ),
1200         .datac(\inst|vga_driver_unit|hsync_counter_9 ),
1201         .datad(\inst|vga_driver_unit|hsync_counter_4 ),
1202         .aclr(gnd),
1203         .aload(gnd),
1204         .sclr(gnd),
1205         .sload(gnd),
1206         .ena(vcc),
1207         .cin(gnd),
1208         .cin0(gnd),
1209         .cin1(vcc),
1210         .inverta(gnd),
1211         .regcascin(gnd),
1212         .devclrn(devclrn),
1213         .devpor(devpor),
1214         .combout(\inst|vga_driver_unit|un13_hsync_counter_2 ),
1215         .regout(),
1216         .cout(),
1217         .cout0(),
1218         .cout1());
1219 // synopsys translate_off
1220 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_2 .lut_mask = "4000";
1221 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_2 .operation_mode = "normal";
1222 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_2 .output_mode = "comb_only";
1223 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_2 .register_cascade_mode = "off";
1224 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_2 .sum_lutc_input = "datac";
1225 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_2 .synch_mode = "off";
1226 // synopsys translate_on
1227
1228 // atom is at LC_X22_Y42_N6
1229 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter (
1230 // Equation(s):
1231 // \inst|vga_driver_unit|un13_hsync_counter  = !\inst|vga_driver_unit|hsync_counter_7  & \inst|vga_driver_unit|un13_hsync_counter_2  & \inst|vga_driver_unit|un13_hsync_counter_7  & !\inst|vga_driver_unit|hsync_counter_6
1232
1233         .clk(gnd),
1234         .dataa(\inst|vga_driver_unit|hsync_counter_7 ),
1235         .datab(\inst|vga_driver_unit|un13_hsync_counter_2 ),
1236         .datac(\inst|vga_driver_unit|un13_hsync_counter_7 ),
1237         .datad(\inst|vga_driver_unit|hsync_counter_6 ),
1238         .aclr(gnd),
1239         .aload(gnd),
1240         .sclr(gnd),
1241         .sload(gnd),
1242         .ena(vcc),
1243         .cin(gnd),
1244         .cin0(gnd),
1245         .cin1(vcc),
1246         .inverta(gnd),
1247         .regcascin(gnd),
1248         .devclrn(devclrn),
1249         .devpor(devpor),
1250         .combout(\inst|vga_driver_unit|un13_hsync_counter ),
1251         .regout(),
1252         .cout(),
1253         .cout0(),
1254         .cout1());
1255 // synopsys translate_off
1256 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter .lut_mask = "0040";
1257 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter .operation_mode = "normal";
1258 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter .output_mode = "comb_only";
1259 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter .register_cascade_mode = "off";
1260 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter .sum_lutc_input = "datac";
1261 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter .synch_mode = "off";
1262 // synopsys translate_on
1263
1264 // atom is at LC_X22_Y43_N3
1265 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_3 (
1266 // Equation(s):
1267 // \inst|vga_driver_unit|un11_hsync_counter_3  = !\inst|vga_driver_unit|hsync_counter_3  & \inst|vga_driver_unit|hsync_counter_0  & \inst|vga_driver_unit|hsync_counter_1  & !\inst|vga_driver_unit|hsync_counter_4
1268
1269         .clk(gnd),
1270         .dataa(\inst|vga_driver_unit|hsync_counter_3 ),
1271         .datab(\inst|vga_driver_unit|hsync_counter_0 ),
1272         .datac(\inst|vga_driver_unit|hsync_counter_1 ),
1273         .datad(\inst|vga_driver_unit|hsync_counter_4 ),
1274         .aclr(gnd),
1275         .aload(gnd),
1276         .sclr(gnd),
1277         .sload(gnd),
1278         .ena(vcc),
1279         .cin(gnd),
1280         .cin0(gnd),
1281         .cin1(vcc),
1282         .inverta(gnd),
1283         .regcascin(gnd),
1284         .devclrn(devclrn),
1285         .devpor(devpor),
1286         .combout(\inst|vga_driver_unit|un11_hsync_counter_3 ),
1287         .regout(),
1288         .cout(),
1289         .cout0(),
1290         .cout1());
1291 // synopsys translate_off
1292 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_3 .lut_mask = "0040";
1293 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_3 .operation_mode = "normal";
1294 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_3 .output_mode = "comb_only";
1295 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_3 .register_cascade_mode = "off";
1296 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_3 .sum_lutc_input = "datac";
1297 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_3 .synch_mode = "off";
1298 // synopsys translate_on
1299
1300 // atom is at LC_X22_Y43_N6
1301 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_2 (
1302 // Equation(s):
1303 // \inst|vga_driver_unit|un11_hsync_counter_2  = !\inst|vga_driver_unit|hsync_counter_6  & \inst|vga_driver_unit|hsync_counter_7  & \inst|vga_driver_unit|hsync_counter_2
1304
1305         .clk(gnd),
1306         .dataa(\inst|vga_driver_unit|hsync_counter_6 ),
1307         .datab(\inst|vga_driver_unit|hsync_counter_7 ),
1308         .datac(\inst|vga_driver_unit|hsync_counter_2 ),
1309         .datad(vcc),
1310         .aclr(gnd),
1311         .aload(gnd),
1312         .sclr(gnd),
1313         .sload(gnd),
1314         .ena(vcc),
1315         .cin(gnd),
1316         .cin0(gnd),
1317         .cin1(vcc),
1318         .inverta(gnd),
1319         .regcascin(gnd),
1320         .devclrn(devclrn),
1321         .devpor(devpor),
1322         .combout(\inst|vga_driver_unit|un11_hsync_counter_2 ),
1323         .regout(),
1324         .cout(),
1325         .cout0(),
1326         .cout1());
1327 // synopsys translate_off
1328 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_2 .lut_mask = "4040";
1329 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_2 .operation_mode = "normal";
1330 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_2 .output_mode = "comb_only";
1331 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_2 .register_cascade_mode = "off";
1332 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_2 .sum_lutc_input = "datac";
1333 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_2 .synch_mode = "off";
1334 // synopsys translate_on
1335
1336 // atom is at LC_X22_Y43_N8
1337 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_1 (
1338 // Equation(s):
1339 // \inst|vga_driver_unit|un10_hsync_counter_1  = !\inst|vga_driver_unit|hsync_counter_9  & (!\inst|vga_driver_unit|hsync_counter_8  & !\inst|vga_driver_unit|hsync_counter_5 )
1340
1341         .clk(gnd),
1342         .dataa(\inst|vga_driver_unit|hsync_counter_9 ),
1343         .datab(vcc),
1344         .datac(\inst|vga_driver_unit|hsync_counter_8 ),
1345         .datad(\inst|vga_driver_unit|hsync_counter_5 ),
1346         .aclr(gnd),
1347         .aload(gnd),
1348         .sclr(gnd),
1349         .sload(gnd),
1350         .ena(vcc),
1351         .cin(gnd),
1352         .cin0(gnd),
1353         .cin1(vcc),
1354         .inverta(gnd),
1355         .regcascin(gnd),
1356         .devclrn(devclrn),
1357         .devpor(devpor),
1358         .combout(\inst|vga_driver_unit|un10_hsync_counter_1 ),
1359         .regout(),
1360         .cout(),
1361         .cout0(),
1362         .cout1());
1363 // synopsys translate_off
1364 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_1 .lut_mask = "0005";
1365 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_1 .operation_mode = "normal";
1366 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_1 .output_mode = "comb_only";
1367 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_1 .register_cascade_mode = "off";
1368 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_1 .sum_lutc_input = "datac";
1369 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_1 .synch_mode = "off";
1370 // synopsys translate_on
1371
1372 // atom is at LC_X22_Y43_N0
1373 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_4 (
1374 // Equation(s):
1375 // \inst|vga_driver_unit|un10_hsync_counter_4  = \inst|vga_driver_unit|hsync_counter_3  & \inst|vga_driver_unit|hsync_counter_1  & \inst|vga_driver_unit|hsync_counter_6  & \inst|vga_driver_unit|hsync_counter_4
1376
1377         .clk(gnd),
1378         .dataa(\inst|vga_driver_unit|hsync_counter_3 ),
1379         .datab(\inst|vga_driver_unit|hsync_counter_1 ),
1380         .datac(\inst|vga_driver_unit|hsync_counter_6 ),
1381         .datad(\inst|vga_driver_unit|hsync_counter_4 ),
1382         .aclr(gnd),
1383         .aload(gnd),
1384         .sclr(gnd),
1385         .sload(gnd),
1386         .ena(vcc),
1387         .cin(gnd),
1388         .cin0(gnd),
1389         .cin1(vcc),
1390         .inverta(gnd),
1391         .regcascin(gnd),
1392         .devclrn(devclrn),
1393         .devpor(devpor),
1394         .combout(\inst|vga_driver_unit|un10_hsync_counter_4 ),
1395         .regout(),
1396         .cout(),
1397         .cout0(),
1398         .cout1());
1399 // synopsys translate_off
1400 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_4 .lut_mask = "8000";
1401 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_4 .operation_mode = "normal";
1402 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_4 .output_mode = "comb_only";
1403 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_4 .register_cascade_mode = "off";
1404 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_4 .sum_lutc_input = "datac";
1405 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_4 .synch_mode = "off";
1406 // synopsys translate_on
1407
1408 // atom is at LC_X22_Y43_N1
1409 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_3 (
1410 // Equation(s):
1411 // \inst|vga_driver_unit|un10_hsync_counter_3  = !\inst|vga_driver_unit|hsync_counter_7  & !\inst|vga_driver_unit|hsync_counter_2  & !\inst|vga_driver_unit|hsync_counter_0
1412
1413         .clk(gnd),
1414         .dataa(vcc),
1415         .datab(\inst|vga_driver_unit|hsync_counter_7 ),
1416         .datac(\inst|vga_driver_unit|hsync_counter_2 ),
1417         .datad(\inst|vga_driver_unit|hsync_counter_0 ),
1418         .aclr(gnd),
1419         .aload(gnd),
1420         .sclr(gnd),
1421         .sload(gnd),
1422         .ena(vcc),
1423         .cin(gnd),
1424         .cin0(gnd),
1425         .cin1(vcc),
1426         .inverta(gnd),
1427         .regcascin(gnd),
1428         .devclrn(devclrn),
1429         .devpor(devpor),
1430         .combout(\inst|vga_driver_unit|un10_hsync_counter_3 ),
1431         .regout(),
1432         .cout(),
1433         .cout0(),
1434         .cout1());
1435 // synopsys translate_off
1436 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_3 .lut_mask = "0003";
1437 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_3 .operation_mode = "normal";
1438 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_3 .output_mode = "comb_only";
1439 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_3 .register_cascade_mode = "off";
1440 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_3 .sum_lutc_input = "datac";
1441 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_3 .synch_mode = "off";
1442 // synopsys translate_on
1443
1444 // atom is at LC_X23_Y42_N2
1445 stratix_lcell \inst|vga_driver_unit|hsync_state_5_ (
1446 // Equation(s):
1447 // \inst|vga_driver_unit|hsync_state_5  = DFFEAS(\inst|vga_driver_unit|hsync_state_0  # \inst|vga_driver_unit|hsync_state_6 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 , , ,
1448 // \inst|vga_driver_unit|un6_dly_counter_0_x , )
1449
1450         .clk(\inst1|altpll_component|_clk0 ),
1451         .dataa(vcc),
1452         .datab(vcc),
1453         .datac(\inst|vga_driver_unit|hsync_state_0 ),
1454         .datad(\inst|vga_driver_unit|hsync_state_6 ),
1455         .aclr(gnd),
1456         .aload(gnd),
1457         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1458         .sload(gnd),
1459         .ena(\inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ),
1460         .cin(gnd),
1461         .cin0(gnd),
1462         .cin1(vcc),
1463         .inverta(gnd),
1464         .regcascin(gnd),
1465         .devclrn(devclrn),
1466         .devpor(devpor),
1467         .combout(),
1468         .regout(\inst|vga_driver_unit|hsync_state_5 ),
1469         .cout(),
1470         .cout0(),
1471         .cout1());
1472 // synopsys translate_off
1473 defparam \inst|vga_driver_unit|hsync_state_5_ .lut_mask = "fff0";
1474 defparam \inst|vga_driver_unit|hsync_state_5_ .operation_mode = "normal";
1475 defparam \inst|vga_driver_unit|hsync_state_5_ .output_mode = "reg_only";
1476 defparam \inst|vga_driver_unit|hsync_state_5_ .register_cascade_mode = "off";
1477 defparam \inst|vga_driver_unit|hsync_state_5_ .sum_lutc_input = "datac";
1478 defparam \inst|vga_driver_unit|hsync_state_5_ .synch_mode = "on";
1479 // synopsys translate_on
1480
1481 // atom is at LC_X22_Y43_N5
1482 stratix_lcell \inst|vga_driver_unit|hsync_state_4_ (
1483 // Equation(s):
1484 // \inst|vga_driver_unit|hsync_state_4  = DFFEAS(\inst|vga_driver_unit|un10_hsync_counter_1  & \inst|vga_driver_unit|un10_hsync_counter_4  & \inst|vga_driver_unit|un10_hsync_counter_3  & \inst|vga_driver_unit|hsync_state_5 ,
1485 // GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 , , , \inst|vga_driver_unit|un6_dly_counter_0_x , )
1486
1487         .clk(\inst1|altpll_component|_clk0 ),
1488         .dataa(\inst|vga_driver_unit|un10_hsync_counter_1 ),
1489         .datab(\inst|vga_driver_unit|un10_hsync_counter_4 ),
1490         .datac(\inst|vga_driver_unit|un10_hsync_counter_3 ),
1491         .datad(\inst|vga_driver_unit|hsync_state_5 ),
1492         .aclr(gnd),
1493         .aload(gnd),
1494         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1495         .sload(gnd),
1496         .ena(\inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ),
1497         .cin(gnd),
1498         .cin0(gnd),
1499         .cin1(vcc),
1500         .inverta(gnd),
1501         .regcascin(gnd),
1502         .devclrn(devclrn),
1503         .devpor(devpor),
1504         .combout(),
1505         .regout(\inst|vga_driver_unit|hsync_state_4 ),
1506         .cout(),
1507         .cout0(),
1508         .cout1());
1509 // synopsys translate_off
1510 defparam \inst|vga_driver_unit|hsync_state_4_ .lut_mask = "8000";
1511 defparam \inst|vga_driver_unit|hsync_state_4_ .operation_mode = "normal";
1512 defparam \inst|vga_driver_unit|hsync_state_4_ .output_mode = "reg_only";
1513 defparam \inst|vga_driver_unit|hsync_state_4_ .register_cascade_mode = "off";
1514 defparam \inst|vga_driver_unit|hsync_state_4_ .sum_lutc_input = "datac";
1515 defparam \inst|vga_driver_unit|hsync_state_4_ .synch_mode = "on";
1516 // synopsys translate_on
1517
1518 // atom is at LC_X22_Y43_N7
1519 stratix_lcell \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2_cZ (
1520 // Equation(s):
1521 // \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2  = \inst|vga_driver_unit|hsync_state_4  & (!\inst|vga_driver_unit|un10_hsync_counter_1  # !\inst|vga_driver_unit|un11_hsync_counter_2  # !\inst|vga_driver_unit|un11_hsync_counter_3 )
1522
1523         .clk(gnd),
1524         .dataa(\inst|vga_driver_unit|un11_hsync_counter_3 ),
1525         .datab(\inst|vga_driver_unit|un11_hsync_counter_2 ),
1526         .datac(\inst|vga_driver_unit|hsync_state_4 ),
1527         .datad(\inst|vga_driver_unit|un10_hsync_counter_1 ),
1528         .aclr(gnd),
1529         .aload(gnd),
1530         .sclr(gnd),
1531         .sload(gnd),
1532         .ena(vcc),
1533         .cin(gnd),
1534         .cin0(gnd),
1535         .cin1(vcc),
1536         .inverta(gnd),
1537         .regcascin(gnd),
1538         .devclrn(devclrn),
1539         .devpor(devpor),
1540         .combout(\inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2 ),
1541         .regout(),
1542         .cout(),
1543         .cout0(),
1544         .cout1());
1545 // synopsys translate_off
1546 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2_cZ .lut_mask = "70f0";
1547 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2_cZ .operation_mode = "normal";
1548 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2_cZ .output_mode = "comb_only";
1549 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2_cZ .register_cascade_mode = "off";
1550 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2_cZ .sum_lutc_input = "datac";
1551 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2_cZ .synch_mode = "off";
1552 // synopsys translate_on
1553
1554 // atom is at LC_X22_Y43_N4
1555 stratix_lcell \inst|vga_driver_unit|hsync_state_1_ (
1556 // Equation(s):
1557 // \inst|vga_driver_unit|hsync_state_1  = DFFEAS(\inst|vga_driver_unit|un11_hsync_counter_3  & \inst|vga_driver_unit|un11_hsync_counter_2  & \inst|vga_driver_unit|hsync_state_4  & \inst|vga_driver_unit|un10_hsync_counter_1 ,
1558 // GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 , , , \inst|vga_driver_unit|un6_dly_counter_0_x , )
1559
1560         .clk(\inst1|altpll_component|_clk0 ),
1561         .dataa(\inst|vga_driver_unit|un11_hsync_counter_3 ),
1562         .datab(\inst|vga_driver_unit|un11_hsync_counter_2 ),
1563         .datac(\inst|vga_driver_unit|hsync_state_4 ),
1564         .datad(\inst|vga_driver_unit|un10_hsync_counter_1 ),
1565         .aclr(gnd),
1566         .aload(gnd),
1567         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1568         .sload(gnd),
1569         .ena(\inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ),
1570         .cin(gnd),
1571         .cin0(gnd),
1572         .cin1(vcc),
1573         .inverta(gnd),
1574         .regcascin(gnd),
1575         .devclrn(devclrn),
1576         .devpor(devpor),
1577         .combout(),
1578         .regout(\inst|vga_driver_unit|hsync_state_1 ),
1579         .cout(),
1580         .cout0(),
1581         .cout1());
1582 // synopsys translate_off
1583 defparam \inst|vga_driver_unit|hsync_state_1_ .lut_mask = "8000";
1584 defparam \inst|vga_driver_unit|hsync_state_1_ .operation_mode = "normal";
1585 defparam \inst|vga_driver_unit|hsync_state_1_ .output_mode = "reg_only";
1586 defparam \inst|vga_driver_unit|hsync_state_1_ .register_cascade_mode = "off";
1587 defparam \inst|vga_driver_unit|hsync_state_1_ .sum_lutc_input = "datac";
1588 defparam \inst|vga_driver_unit|hsync_state_1_ .synch_mode = "on";
1589 // synopsys translate_on
1590
1591 // atom is at LC_X22_Y42_N9
1592 stratix_lcell \inst|vga_driver_unit|hsync_state_3_ (
1593 // Equation(s):
1594 // \inst|vga_driver_unit|un1_hsync_state_next_1_sqmuxa_0  = \inst|vga_driver_unit|un12_hsync_counter  & !\inst|vga_driver_unit|un13_hsync_counter  & (\inst|vga_driver_unit|hsync_state_2 ) # !\inst|vga_driver_unit|un12_hsync_counter  & (E1_hsync_state_3 #
1595 // !\inst|vga_driver_unit|un13_hsync_counter  & \inst|vga_driver_unit|hsync_state_2 )
1596 // \inst|vga_driver_unit|hsync_state_3  = DFFEAS(\inst|vga_driver_unit|un1_hsync_state_next_1_sqmuxa_0 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 , \inst|vga_driver_unit|hsync_state_1 , ,
1597 // \inst|vga_driver_unit|un6_dly_counter_0_x , VCC)
1598
1599         .clk(\inst1|altpll_component|_clk0 ),
1600         .dataa(\inst|vga_driver_unit|un12_hsync_counter ),
1601         .datab(\inst|vga_driver_unit|un13_hsync_counter ),
1602         .datac(\inst|vga_driver_unit|hsync_state_1 ),
1603         .datad(\inst|vga_driver_unit|hsync_state_2 ),
1604         .aclr(gnd),
1605         .aload(gnd),
1606         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1607         .sload(vcc),
1608         .ena(\inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ),
1609         .cin(gnd),
1610         .cin0(gnd),
1611         .cin1(vcc),
1612         .inverta(gnd),
1613         .regcascin(gnd),
1614         .devclrn(devclrn),
1615         .devpor(devpor),
1616         .combout(\inst|vga_driver_unit|un1_hsync_state_next_1_sqmuxa_0 ),
1617         .regout(\inst|vga_driver_unit|hsync_state_3 ),
1618         .cout(),
1619         .cout0(),
1620         .cout1());
1621 // synopsys translate_off
1622 defparam \inst|vga_driver_unit|hsync_state_3_ .lut_mask = "7350";
1623 defparam \inst|vga_driver_unit|hsync_state_3_ .operation_mode = "normal";
1624 defparam \inst|vga_driver_unit|hsync_state_3_ .output_mode = "reg_and_comb";
1625 defparam \inst|vga_driver_unit|hsync_state_3_ .register_cascade_mode = "off";
1626 defparam \inst|vga_driver_unit|hsync_state_3_ .sum_lutc_input = "qfbk";
1627 defparam \inst|vga_driver_unit|hsync_state_3_ .synch_mode = "on";
1628 // synopsys translate_on
1629
1630 // atom is at LC_X22_Y42_N3
1631 stratix_lcell \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1_cZ (
1632 // Equation(s):
1633 // \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1  = \inst|vga_driver_unit|hsync_state_5  & (!\inst|vga_driver_unit|un10_hsync_counter_3  # !\inst|vga_driver_unit|un10_hsync_counter_1  # !\inst|vga_driver_unit|un10_hsync_counter_4 )
1634
1635         .clk(gnd),
1636         .dataa(\inst|vga_driver_unit|un10_hsync_counter_4 ),
1637         .datab(\inst|vga_driver_unit|un10_hsync_counter_1 ),
1638         .datac(\inst|vga_driver_unit|un10_hsync_counter_3 ),
1639         .datad(\inst|vga_driver_unit|hsync_state_5 ),
1640         .aclr(gnd),
1641         .aload(gnd),
1642         .sclr(gnd),
1643         .sload(gnd),
1644         .ena(vcc),
1645         .cin(gnd),
1646         .cin0(gnd),
1647         .cin1(vcc),
1648         .inverta(gnd),
1649         .regcascin(gnd),
1650         .devclrn(devclrn),
1651         .devpor(devpor),
1652         .combout(\inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1 ),
1653         .regout(),
1654         .cout(),
1655         .cout0(),
1656         .cout1());
1657 // synopsys translate_off
1658 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1_cZ .lut_mask = "7f00";
1659 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1_cZ .operation_mode = "normal";
1660 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1_cZ .output_mode = "comb_only";
1661 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1_cZ .register_cascade_mode = "off";
1662 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1_cZ .sum_lutc_input = "datac";
1663 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1_cZ .synch_mode = "off";
1664 // synopsys translate_on
1665
1666 // atom is at LC_X22_Y42_N2
1667 stratix_lcell \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0_cZ (
1668 // Equation(s):
1669 // \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0  = \inst|vga_driver_unit|un6_dly_counter_0_x  # !\inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2  & !\inst|vga_driver_unit|un1_hsync_state_next_1_sqmuxa_0  &
1670 // !\inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1
1671
1672         .clk(gnd),
1673         .dataa(\inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2 ),
1674         .datab(\inst|vga_driver_unit|un1_hsync_state_next_1_sqmuxa_0 ),
1675         .datac(\inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1 ),
1676         .datad(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1677         .aclr(gnd),
1678         .aload(gnd),
1679         .sclr(gnd),
1680         .sload(gnd),
1681         .ena(vcc),
1682         .cin(gnd),
1683         .cin0(gnd),
1684         .cin1(vcc),
1685         .inverta(gnd),
1686         .regcascin(gnd),
1687         .devclrn(devclrn),
1688         .devpor(devpor),
1689         .combout(\inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ),
1690         .regout(),
1691         .cout(),
1692         .cout0(),
1693         .cout1());
1694 // synopsys translate_off
1695 defparam \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0_cZ .lut_mask = "ff01";
1696 defparam \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0_cZ .operation_mode = "normal";
1697 defparam \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0_cZ .output_mode = "comb_only";
1698 defparam \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0_cZ .register_cascade_mode = "off";
1699 defparam \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0_cZ .sum_lutc_input = "datac";
1700 defparam \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0_cZ .synch_mode = "off";
1701 // synopsys translate_on
1702
1703 // atom is at LC_X23_Y42_N9
1704 stratix_lcell \inst|vga_driver_unit|hsync_state_2_ (
1705 // Equation(s):
1706 // \inst|vga_driver_unit|hsync_state_2  = DFFEAS(\inst|vga_driver_unit|hsync_state_3  & \inst|vga_driver_unit|un12_hsync_counter , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 , , ,
1707 // \inst|vga_driver_unit|un6_dly_counter_0_x , )
1708
1709         .clk(\inst1|altpll_component|_clk0 ),
1710         .dataa(vcc),
1711         .datab(vcc),
1712         .datac(\inst|vga_driver_unit|hsync_state_3 ),
1713         .datad(\inst|vga_driver_unit|un12_hsync_counter ),
1714         .aclr(gnd),
1715         .aload(gnd),
1716         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1717         .sload(gnd),
1718         .ena(\inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ),
1719         .cin(gnd),
1720         .cin0(gnd),
1721         .cin1(vcc),
1722         .inverta(gnd),
1723         .regcascin(gnd),
1724         .devclrn(devclrn),
1725         .devpor(devpor),
1726         .combout(),
1727         .regout(\inst|vga_driver_unit|hsync_state_2 ),
1728         .cout(),
1729         .cout0(),
1730         .cout1());
1731 // synopsys translate_off
1732 defparam \inst|vga_driver_unit|hsync_state_2_ .lut_mask = "f000";
1733 defparam \inst|vga_driver_unit|hsync_state_2_ .operation_mode = "normal";
1734 defparam \inst|vga_driver_unit|hsync_state_2_ .output_mode = "reg_only";
1735 defparam \inst|vga_driver_unit|hsync_state_2_ .register_cascade_mode = "off";
1736 defparam \inst|vga_driver_unit|hsync_state_2_ .sum_lutc_input = "datac";
1737 defparam \inst|vga_driver_unit|hsync_state_2_ .synch_mode = "on";
1738 // synopsys translate_on
1739
1740 // atom is at LC_X23_Y42_N7
1741 stratix_lcell \inst|vga_driver_unit|hsync_state_0_ (
1742 // Equation(s):
1743 // \inst|vga_driver_unit|hsync_state_0  = DFFEAS(\inst|vga_driver_unit|un13_hsync_counter  & (\inst|vga_driver_unit|hsync_state_2 ), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 , , ,
1744 // \inst|vga_driver_unit|un6_dly_counter_0_x , )
1745
1746         .clk(\inst1|altpll_component|_clk0 ),
1747         .dataa(vcc),
1748         .datab(\inst|vga_driver_unit|un13_hsync_counter ),
1749         .datac(vcc),
1750         .datad(\inst|vga_driver_unit|hsync_state_2 ),
1751         .aclr(gnd),
1752         .aload(gnd),
1753         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1754         .sload(gnd),
1755         .ena(\inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ),
1756         .cin(gnd),
1757         .cin0(gnd),
1758         .cin1(vcc),
1759         .inverta(gnd),
1760         .regcascin(gnd),
1761         .devclrn(devclrn),
1762         .devpor(devpor),
1763         .combout(),
1764         .regout(\inst|vga_driver_unit|hsync_state_0 ),
1765         .cout(),
1766         .cout0(),
1767         .cout1());
1768 // synopsys translate_off
1769 defparam \inst|vga_driver_unit|hsync_state_0_ .lut_mask = "cc00";
1770 defparam \inst|vga_driver_unit|hsync_state_0_ .operation_mode = "normal";
1771 defparam \inst|vga_driver_unit|hsync_state_0_ .output_mode = "reg_only";
1772 defparam \inst|vga_driver_unit|hsync_state_0_ .register_cascade_mode = "off";
1773 defparam \inst|vga_driver_unit|hsync_state_0_ .sum_lutc_input = "datac";
1774 defparam \inst|vga_driver_unit|hsync_state_0_ .synch_mode = "on";
1775 // synopsys translate_on
1776
1777 // atom is at LC_X23_Y42_N3
1778 stratix_lcell \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa_cZ (
1779 // Equation(s):
1780 // \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa  = \inst|dly_counter [0] & \inst|dly_counter [1] & \reset~combout  & !\inst|vga_driver_unit|d_set_hsync_counter
1781
1782         .clk(gnd),
1783         .dataa(\inst|dly_counter [0]),
1784         .datab(\inst|dly_counter [1]),
1785         .datac(\reset~combout ),
1786         .datad(\inst|vga_driver_unit|d_set_hsync_counter ),
1787         .aclr(gnd),
1788         .aload(gnd),
1789         .sclr(gnd),
1790         .sload(gnd),
1791         .ena(vcc),
1792         .cin(gnd),
1793         .cin0(gnd),
1794         .cin1(vcc),
1795         .inverta(gnd),
1796         .regcascin(gnd),
1797         .devclrn(devclrn),
1798         .devpor(devpor),
1799         .combout(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
1800         .regout(),
1801         .cout(),
1802         .cout0(),
1803         .cout1());
1804 // synopsys translate_off
1805 defparam \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa_cZ .lut_mask = "0080";
1806 defparam \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa_cZ .operation_mode = "normal";
1807 defparam \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa_cZ .output_mode = "comb_only";
1808 defparam \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa_cZ .register_cascade_mode = "off";
1809 defparam \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa_cZ .sum_lutc_input = "datac";
1810 defparam \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa_cZ .synch_mode = "off";
1811 // synopsys translate_on
1812
1813 // atom is at LC_X22_Y43_N2
1814 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_4 (
1815 // Equation(s):
1816 // \inst|vga_driver_unit|un12_hsync_counter_4  = !\inst|vga_driver_unit|hsync_counter_6  & !\inst|vga_driver_unit|hsync_counter_7  & \inst|vga_driver_unit|hsync_counter_2  & !\inst|vga_driver_unit|hsync_counter_4
1817
1818         .clk(gnd),
1819         .dataa(\inst|vga_driver_unit|hsync_counter_6 ),
1820         .datab(\inst|vga_driver_unit|hsync_counter_7 ),
1821         .datac(\inst|vga_driver_unit|hsync_counter_2 ),
1822         .datad(\inst|vga_driver_unit|hsync_counter_4 ),
1823         .aclr(gnd),
1824         .aload(gnd),
1825         .sclr(gnd),
1826         .sload(gnd),
1827         .ena(vcc),
1828         .cin(gnd),
1829         .cin0(gnd),
1830         .cin1(vcc),
1831         .inverta(gnd),
1832         .regcascin(gnd),
1833         .devclrn(devclrn),
1834         .devpor(devpor),
1835         .combout(\inst|vga_driver_unit|un12_hsync_counter_4 ),
1836         .regout(),
1837         .cout(),
1838         .cout0(),
1839         .cout1());
1840 // synopsys translate_off
1841 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_4 .lut_mask = "0010";
1842 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_4 .operation_mode = "normal";
1843 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_4 .output_mode = "comb_only";
1844 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_4 .register_cascade_mode = "off";
1845 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_4 .sum_lutc_input = "datac";
1846 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_4 .synch_mode = "off";
1847 // synopsys translate_on
1848
1849 // atom is at LC_X22_Y43_N9
1850 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_3 (
1851 // Equation(s):
1852 // \inst|vga_driver_unit|un12_hsync_counter_3  = \inst|vga_driver_unit|hsync_counter_9  & \inst|vga_driver_unit|hsync_counter_8  & !\inst|vga_driver_unit|hsync_counter_3  & !\inst|vga_driver_unit|hsync_counter_5
1853
1854         .clk(gnd),
1855         .dataa(\inst|vga_driver_unit|hsync_counter_9 ),
1856         .datab(\inst|vga_driver_unit|hsync_counter_8 ),
1857         .datac(\inst|vga_driver_unit|hsync_counter_3 ),
1858         .datad(\inst|vga_driver_unit|hsync_counter_5 ),
1859         .aclr(gnd),
1860         .aload(gnd),
1861         .sclr(gnd),
1862         .sload(gnd),
1863         .ena(vcc),
1864         .cin(gnd),
1865         .cin0(gnd),
1866         .cin1(vcc),
1867         .inverta(gnd),
1868         .regcascin(gnd),
1869         .devclrn(devclrn),
1870         .devpor(devpor),
1871         .combout(\inst|vga_driver_unit|un12_hsync_counter_3 ),
1872         .regout(),
1873         .cout(),
1874         .cout0(),
1875         .cout1());
1876 // synopsys translate_off
1877 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_3 .lut_mask = "0008";
1878 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_3 .operation_mode = "normal";
1879 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_3 .output_mode = "comb_only";
1880 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_3 .register_cascade_mode = "off";
1881 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_3 .sum_lutc_input = "datac";
1882 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_3 .synch_mode = "off";
1883 // synopsys translate_on
1884
1885 // atom is at LC_X22_Y42_N8
1886 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter (
1887 // Equation(s):
1888 // \inst|vga_driver_unit|un12_hsync_counter  = \inst|vga_driver_unit|hsync_counter_0  & \inst|vga_driver_unit|un12_hsync_counter_4  & \inst|vga_driver_unit|un12_hsync_counter_3  & \inst|vga_driver_unit|hsync_counter_1
1889
1890         .clk(gnd),
1891         .dataa(\inst|vga_driver_unit|hsync_counter_0 ),
1892         .datab(\inst|vga_driver_unit|un12_hsync_counter_4 ),
1893         .datac(\inst|vga_driver_unit|un12_hsync_counter_3 ),
1894         .datad(\inst|vga_driver_unit|hsync_counter_1 ),
1895         .aclr(gnd),
1896         .aload(gnd),
1897         .sclr(gnd),
1898         .sload(gnd),
1899         .ena(vcc),
1900         .cin(gnd),
1901         .cin0(gnd),
1902         .cin1(vcc),
1903         .inverta(gnd),
1904         .regcascin(gnd),
1905         .devclrn(devclrn),
1906         .devpor(devpor),
1907         .combout(\inst|vga_driver_unit|un12_hsync_counter ),
1908         .regout(),
1909         .cout(),
1910         .cout0(),
1911         .cout1());
1912 // synopsys translate_off
1913 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter .lut_mask = "8000";
1914 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter .operation_mode = "normal";
1915 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter .output_mode = "comb_only";
1916 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter .register_cascade_mode = "off";
1917 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter .sum_lutc_input = "datac";
1918 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter .synch_mode = "off";
1919 // synopsys translate_on
1920
1921 // atom is at LC_X23_Y42_N4
1922 stratix_lcell \inst|vga_driver_unit|un1_hsync_state_3_0_cZ (
1923 // Equation(s):
1924 // \inst|vga_driver_unit|un1_hsync_state_3_0  = \inst|vga_driver_unit|hsync_state_3  # \inst|vga_driver_unit|hsync_state_1
1925
1926         .clk(gnd),
1927         .dataa(vcc),
1928         .datab(\inst|vga_driver_unit|hsync_state_3 ),
1929         .datac(\inst|vga_driver_unit|hsync_state_1 ),
1930         .datad(vcc),
1931         .aclr(gnd),
1932         .aload(gnd),
1933         .sclr(gnd),
1934         .sload(gnd),
1935         .ena(vcc),
1936         .cin(gnd),
1937         .cin0(gnd),
1938         .cin1(vcc),
1939         .inverta(gnd),
1940         .regcascin(gnd),
1941         .devclrn(devclrn),
1942         .devpor(devpor),
1943         .combout(\inst|vga_driver_unit|un1_hsync_state_3_0 ),
1944         .regout(),
1945         .cout(),
1946         .cout0(),
1947         .cout1());
1948 // synopsys translate_off
1949 defparam \inst|vga_driver_unit|un1_hsync_state_3_0_cZ .lut_mask = "fcfc";
1950 defparam \inst|vga_driver_unit|un1_hsync_state_3_0_cZ .operation_mode = "normal";
1951 defparam \inst|vga_driver_unit|un1_hsync_state_3_0_cZ .output_mode = "comb_only";
1952 defparam \inst|vga_driver_unit|un1_hsync_state_3_0_cZ .register_cascade_mode = "off";
1953 defparam \inst|vga_driver_unit|un1_hsync_state_3_0_cZ .sum_lutc_input = "datac";
1954 defparam \inst|vga_driver_unit|un1_hsync_state_3_0_cZ .synch_mode = "off";
1955 // synopsys translate_on
1956
1957 // atom is at LC_X23_Y42_N5
1958 stratix_lcell \inst|vga_driver_unit|h_sync_1_0_0_0_g1_cZ (
1959 // Equation(s):
1960 // \inst|vga_driver_unit|h_sync_1_0_0_0_g1  = \inst|vga_driver_unit|un1_hsync_state_3_0  & (\inst|vga_driver_unit|h_sync ) # !\inst|vga_driver_unit|un1_hsync_state_3_0  & (\inst|vga_driver_unit|hsync_state_2  & (\inst|vga_driver_unit|h_sync ) #
1961 // !\inst|vga_driver_unit|hsync_state_2  & \inst|vga_driver_unit|hsync_state_4 )
1962
1963         .clk(gnd),
1964         .dataa(\inst|vga_driver_unit|un1_hsync_state_3_0 ),
1965         .datab(\inst|vga_driver_unit|hsync_state_2 ),
1966         .datac(\inst|vga_driver_unit|hsync_state_4 ),
1967         .datad(\inst|vga_driver_unit|h_sync ),
1968         .aclr(gnd),
1969         .aload(gnd),
1970         .sclr(gnd),
1971         .sload(gnd),
1972         .ena(vcc),
1973         .cin(gnd),
1974         .cin0(gnd),
1975         .cin1(vcc),
1976         .inverta(gnd),
1977         .regcascin(gnd),
1978         .devclrn(devclrn),
1979         .devpor(devpor),
1980         .combout(\inst|vga_driver_unit|h_sync_1_0_0_0_g1 ),
1981         .regout(),
1982         .cout(),
1983         .cout0(),
1984         .cout1());
1985 // synopsys translate_off
1986 defparam \inst|vga_driver_unit|h_sync_1_0_0_0_g1_cZ .lut_mask = "fe10";
1987 defparam \inst|vga_driver_unit|h_sync_1_0_0_0_g1_cZ .operation_mode = "normal";
1988 defparam \inst|vga_driver_unit|h_sync_1_0_0_0_g1_cZ .output_mode = "comb_only";
1989 defparam \inst|vga_driver_unit|h_sync_1_0_0_0_g1_cZ .register_cascade_mode = "off";
1990 defparam \inst|vga_driver_unit|h_sync_1_0_0_0_g1_cZ .sum_lutc_input = "datac";
1991 defparam \inst|vga_driver_unit|h_sync_1_0_0_0_g1_cZ .synch_mode = "off";
1992 // synopsys translate_on
1993
1994 // atom is at LC_X23_Y42_N6
1995 stratix_lcell \inst|vga_driver_unit|h_sync_Z (
1996 // Equation(s):
1997 // \inst|vga_driver_unit|h_sync  = DFFEAS(\inst|vga_driver_unit|h_sync_1_0_0_0_g1  # !\inst|dly_counter [1] # !\reset~combout  # !\inst|dly_counter [0], GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
1998
1999         .clk(\inst1|altpll_component|_clk0 ),
2000         .dataa(\inst|dly_counter [0]),
2001         .datab(\inst|vga_driver_unit|h_sync_1_0_0_0_g1 ),
2002         .datac(\reset~combout ),
2003         .datad(\inst|dly_counter [1]),
2004         .aclr(gnd),
2005         .aload(gnd),
2006         .sclr(gnd),
2007         .sload(gnd),
2008         .ena(vcc),
2009         .cin(gnd),
2010         .cin0(gnd),
2011         .cin1(vcc),
2012         .inverta(gnd),
2013         .regcascin(gnd),
2014         .devclrn(devclrn),
2015         .devpor(devpor),
2016         .combout(),
2017         .regout(\inst|vga_driver_unit|h_sync ),
2018         .cout(),
2019         .cout0(),
2020         .cout1());
2021 // synopsys translate_off
2022 defparam \inst|vga_driver_unit|h_sync_Z .lut_mask = "dfff";
2023 defparam \inst|vga_driver_unit|h_sync_Z .operation_mode = "normal";
2024 defparam \inst|vga_driver_unit|h_sync_Z .output_mode = "reg_only";
2025 defparam \inst|vga_driver_unit|h_sync_Z .register_cascade_mode = "off";
2026 defparam \inst|vga_driver_unit|h_sync_Z .sum_lutc_input = "datac";
2027 defparam \inst|vga_driver_unit|h_sync_Z .synch_mode = "off";
2028 // synopsys translate_on
2029
2030 // atom is at LC_X25_Y43_N0
2031 stratix_lcell \inst|vga_driver_unit|vsync_counter_0_ (
2032 // Equation(s):
2033 // \inst|vga_driver_unit|vsync_counter_0  = DFFEAS(\inst|vga_driver_unit|d_set_hsync_counter  $ \inst|vga_driver_unit|vsync_counter_0 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , ,
2034 // !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2035 // \inst|vga_driver_unit|vsync_counter_cout [0] = CARRY(\inst|vga_driver_unit|d_set_hsync_counter  & \inst|vga_driver_unit|vsync_counter_0 )
2036 // \inst|vga_driver_unit|vsync_counter_cout[0]~COUT1_10  = CARRY(\inst|vga_driver_unit|d_set_hsync_counter  & \inst|vga_driver_unit|vsync_counter_0 )
2037
2038         .clk(\inst1|altpll_component|_clk0 ),
2039         .dataa(\inst|vga_driver_unit|d_set_hsync_counter ),
2040         .datab(\inst|vga_driver_unit|vsync_counter_0 ),
2041         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2042         .datad(vcc),
2043         .aclr(gnd),
2044         .aload(gnd),
2045         .sclr(!\inst|vga_driver_unit|G_16_i ),
2046         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2047         .ena(vcc),
2048         .cin(gnd),
2049         .cin0(gnd),
2050         .cin1(vcc),
2051         .inverta(gnd),
2052         .regcascin(gnd),
2053         .devclrn(devclrn),
2054         .devpor(devpor),
2055         .combout(),
2056         .regout(\inst|vga_driver_unit|vsync_counter_0 ),
2057         .cout(),
2058         .cout0(\inst|vga_driver_unit|vsync_counter_cout [0]),
2059         .cout1(\inst|vga_driver_unit|vsync_counter_cout[0]~COUT1_10 ));
2060 // synopsys translate_off
2061 defparam \inst|vga_driver_unit|vsync_counter_0_ .lut_mask = "6688";
2062 defparam \inst|vga_driver_unit|vsync_counter_0_ .operation_mode = "arithmetic";
2063 defparam \inst|vga_driver_unit|vsync_counter_0_ .output_mode = "reg_only";
2064 defparam \inst|vga_driver_unit|vsync_counter_0_ .register_cascade_mode = "off";
2065 defparam \inst|vga_driver_unit|vsync_counter_0_ .sum_lutc_input = "datac";
2066 defparam \inst|vga_driver_unit|vsync_counter_0_ .synch_mode = "on";
2067 // synopsys translate_on
2068
2069 // atom is at LC_X25_Y43_N1
2070 stratix_lcell \inst|vga_driver_unit|vsync_counter_1_ (
2071 // Equation(s):
2072 // \inst|vga_driver_unit|vsync_counter_1  = DFFEAS(\inst|vga_driver_unit|vsync_counter_1  $ \inst|vga_driver_unit|vsync_counter_cout [0], GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , ,
2073 // !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2074 // \inst|vga_driver_unit|vsync_counter_cout [1] = CARRY(!\inst|vga_driver_unit|vsync_counter_cout [0] # !\inst|vga_driver_unit|vsync_counter_1 )
2075 // \inst|vga_driver_unit|vsync_counter_cout[1]~COUT1_12  = CARRY(!\inst|vga_driver_unit|vsync_counter_cout[0]~COUT1_10  # !\inst|vga_driver_unit|vsync_counter_1 )
2076
2077         .clk(\inst1|altpll_component|_clk0 ),
2078         .dataa(vcc),
2079         .datab(\inst|vga_driver_unit|vsync_counter_1 ),
2080         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2081         .datad(vcc),
2082         .aclr(gnd),
2083         .aload(gnd),
2084         .sclr(!\inst|vga_driver_unit|G_16_i ),
2085         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2086         .ena(vcc),
2087         .cin(gnd),
2088         .cin0(\inst|vga_driver_unit|vsync_counter_cout [0]),
2089         .cin1(\inst|vga_driver_unit|vsync_counter_cout[0]~COUT1_10 ),
2090         .inverta(gnd),
2091         .regcascin(gnd),
2092         .devclrn(devclrn),
2093         .devpor(devpor),
2094         .combout(),
2095         .regout(\inst|vga_driver_unit|vsync_counter_1 ),
2096         .cout(),
2097         .cout0(\inst|vga_driver_unit|vsync_counter_cout [1]),
2098         .cout1(\inst|vga_driver_unit|vsync_counter_cout[1]~COUT1_12 ));
2099 // synopsys translate_off
2100 defparam \inst|vga_driver_unit|vsync_counter_1_ .cin0_used = "true";
2101 defparam \inst|vga_driver_unit|vsync_counter_1_ .cin1_used = "true";
2102 defparam \inst|vga_driver_unit|vsync_counter_1_ .lut_mask = "3c3f";
2103 defparam \inst|vga_driver_unit|vsync_counter_1_ .operation_mode = "arithmetic";
2104 defparam \inst|vga_driver_unit|vsync_counter_1_ .output_mode = "reg_only";
2105 defparam \inst|vga_driver_unit|vsync_counter_1_ .register_cascade_mode = "off";
2106 defparam \inst|vga_driver_unit|vsync_counter_1_ .sum_lutc_input = "cin";
2107 defparam \inst|vga_driver_unit|vsync_counter_1_ .synch_mode = "on";
2108 // synopsys translate_on
2109
2110 // atom is at LC_X25_Y43_N2
2111 stratix_lcell \inst|vga_driver_unit|vsync_counter_2_ (
2112 // Equation(s):
2113 // \inst|vga_driver_unit|vsync_counter_2  = DFFEAS(\inst|vga_driver_unit|vsync_counter_2  $ (!\inst|vga_driver_unit|vsync_counter_cout [1]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , ,
2114 // !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2115 // \inst|vga_driver_unit|vsync_counter_cout [2] = CARRY(\inst|vga_driver_unit|vsync_counter_2  & (!\inst|vga_driver_unit|vsync_counter_cout [1]))
2116 // \inst|vga_driver_unit|vsync_counter_cout[2]~COUT1_14  = CARRY(\inst|vga_driver_unit|vsync_counter_2  & (!\inst|vga_driver_unit|vsync_counter_cout[1]~COUT1_12 ))
2117
2118         .clk(\inst1|altpll_component|_clk0 ),
2119         .dataa(\inst|vga_driver_unit|vsync_counter_2 ),
2120         .datab(vcc),
2121         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2122         .datad(vcc),
2123         .aclr(gnd),
2124         .aload(gnd),
2125         .sclr(!\inst|vga_driver_unit|G_16_i ),
2126         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2127         .ena(vcc),
2128         .cin(gnd),
2129         .cin0(\inst|vga_driver_unit|vsync_counter_cout [1]),
2130         .cin1(\inst|vga_driver_unit|vsync_counter_cout[1]~COUT1_12 ),
2131         .inverta(gnd),
2132         .regcascin(gnd),
2133         .devclrn(devclrn),
2134         .devpor(devpor),
2135         .combout(),
2136         .regout(\inst|vga_driver_unit|vsync_counter_2 ),
2137         .cout(),
2138         .cout0(\inst|vga_driver_unit|vsync_counter_cout [2]),
2139         .cout1(\inst|vga_driver_unit|vsync_counter_cout[2]~COUT1_14 ));
2140 // synopsys translate_off
2141 defparam \inst|vga_driver_unit|vsync_counter_2_ .cin0_used = "true";
2142 defparam \inst|vga_driver_unit|vsync_counter_2_ .cin1_used = "true";
2143 defparam \inst|vga_driver_unit|vsync_counter_2_ .lut_mask = "a50a";
2144 defparam \inst|vga_driver_unit|vsync_counter_2_ .operation_mode = "arithmetic";
2145 defparam \inst|vga_driver_unit|vsync_counter_2_ .output_mode = "reg_only";
2146 defparam \inst|vga_driver_unit|vsync_counter_2_ .register_cascade_mode = "off";
2147 defparam \inst|vga_driver_unit|vsync_counter_2_ .sum_lutc_input = "cin";
2148 defparam \inst|vga_driver_unit|vsync_counter_2_ .synch_mode = "on";
2149 // synopsys translate_on
2150
2151 // atom is at LC_X25_Y43_N3
2152 stratix_lcell \inst|vga_driver_unit|vsync_counter_3_ (
2153 // Equation(s):
2154 // \inst|vga_driver_unit|vsync_counter_3  = DFFEAS(\inst|vga_driver_unit|vsync_counter_3  $ (\inst|vga_driver_unit|vsync_counter_cout [2]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , ,
2155 // !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2156 // \inst|vga_driver_unit|vsync_counter_cout [3] = CARRY(!\inst|vga_driver_unit|vsync_counter_cout [2] # !\inst|vga_driver_unit|vsync_counter_3 )
2157 // \inst|vga_driver_unit|vsync_counter_cout[3]~COUT1_16  = CARRY(!\inst|vga_driver_unit|vsync_counter_cout[2]~COUT1_14  # !\inst|vga_driver_unit|vsync_counter_3 )
2158
2159         .clk(\inst1|altpll_component|_clk0 ),
2160         .dataa(\inst|vga_driver_unit|vsync_counter_3 ),
2161         .datab(vcc),
2162         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2163         .datad(vcc),
2164         .aclr(gnd),
2165         .aload(gnd),
2166         .sclr(!\inst|vga_driver_unit|G_16_i ),
2167         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2168         .ena(vcc),
2169         .cin(gnd),
2170         .cin0(\inst|vga_driver_unit|vsync_counter_cout [2]),
2171         .cin1(\inst|vga_driver_unit|vsync_counter_cout[2]~COUT1_14 ),
2172         .inverta(gnd),
2173         .regcascin(gnd),
2174         .devclrn(devclrn),
2175         .devpor(devpor),
2176         .combout(),
2177         .regout(\inst|vga_driver_unit|vsync_counter_3 ),
2178         .cout(),
2179         .cout0(\inst|vga_driver_unit|vsync_counter_cout [3]),
2180         .cout1(\inst|vga_driver_unit|vsync_counter_cout[3]~COUT1_16 ));
2181 // synopsys translate_off
2182 defparam \inst|vga_driver_unit|vsync_counter_3_ .cin0_used = "true";
2183 defparam \inst|vga_driver_unit|vsync_counter_3_ .cin1_used = "true";
2184 defparam \inst|vga_driver_unit|vsync_counter_3_ .lut_mask = "5a5f";
2185 defparam \inst|vga_driver_unit|vsync_counter_3_ .operation_mode = "arithmetic";
2186 defparam \inst|vga_driver_unit|vsync_counter_3_ .output_mode = "reg_only";
2187 defparam \inst|vga_driver_unit|vsync_counter_3_ .register_cascade_mode = "off";
2188 defparam \inst|vga_driver_unit|vsync_counter_3_ .sum_lutc_input = "cin";
2189 defparam \inst|vga_driver_unit|vsync_counter_3_ .synch_mode = "on";
2190 // synopsys translate_on
2191
2192 // atom is at LC_X25_Y42_N3
2193 stratix_lcell \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_6 (
2194 // Equation(s):
2195 // \inst|vga_driver_unit|un9_vsync_counterlt9_6  = !\inst|vga_driver_unit|vsync_counter_3  # !\inst|vga_driver_unit|vsync_counter_1  # !\inst|vga_driver_unit|vsync_counter_2  # !\inst|vga_driver_unit|vsync_counter_0
2196
2197         .clk(gnd),
2198         .dataa(\inst|vga_driver_unit|vsync_counter_0 ),
2199         .datab(\inst|vga_driver_unit|vsync_counter_2 ),
2200         .datac(\inst|vga_driver_unit|vsync_counter_1 ),
2201         .datad(\inst|vga_driver_unit|vsync_counter_3 ),
2202         .aclr(gnd),
2203         .aload(gnd),
2204         .sclr(gnd),
2205         .sload(gnd),
2206         .ena(vcc),
2207         .cin(gnd),
2208         .cin0(gnd),
2209         .cin1(vcc),
2210         .inverta(gnd),
2211         .regcascin(gnd),
2212         .devclrn(devclrn),
2213         .devpor(devpor),
2214         .combout(\inst|vga_driver_unit|un9_vsync_counterlt9_6 ),
2215         .regout(),
2216         .cout(),
2217         .cout0(),
2218         .cout1());
2219 // synopsys translate_off
2220 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_6 .lut_mask = "7fff";
2221 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_6 .operation_mode = "normal";
2222 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_6 .output_mode = "comb_only";
2223 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_6 .register_cascade_mode = "off";
2224 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_6 .sum_lutc_input = "datac";
2225 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_6 .synch_mode = "off";
2226 // synopsys translate_on
2227
2228 // atom is at LC_X25_Y43_N4
2229 stratix_lcell \inst|vga_driver_unit|vsync_counter_4_ (
2230 // Equation(s):
2231 // \inst|vga_driver_unit|vsync_counter_4  = DFFEAS(\inst|vga_driver_unit|vsync_counter_4  $ (!\inst|vga_driver_unit|vsync_counter_cout [3]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , ,
2232 // !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2233 // \inst|vga_driver_unit|vsync_counter_cout [4] = CARRY(\inst|vga_driver_unit|vsync_counter_4  & (!\inst|vga_driver_unit|vsync_counter_cout[3]~COUT1_16 ))
2234
2235         .clk(\inst1|altpll_component|_clk0 ),
2236         .dataa(\inst|vga_driver_unit|vsync_counter_4 ),
2237         .datab(vcc),
2238         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2239         .datad(vcc),
2240         .aclr(gnd),
2241         .aload(gnd),
2242         .sclr(!\inst|vga_driver_unit|G_16_i ),
2243         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2244         .ena(vcc),
2245         .cin(gnd),
2246         .cin0(\inst|vga_driver_unit|vsync_counter_cout [3]),
2247         .cin1(\inst|vga_driver_unit|vsync_counter_cout[3]~COUT1_16 ),
2248         .inverta(gnd),
2249         .regcascin(gnd),
2250         .devclrn(devclrn),
2251         .devpor(devpor),
2252         .combout(),
2253         .regout(\inst|vga_driver_unit|vsync_counter_4 ),
2254         .cout(\inst|vga_driver_unit|vsync_counter_cout [4]),
2255         .cout0(),
2256         .cout1());
2257 // synopsys translate_off
2258 defparam \inst|vga_driver_unit|vsync_counter_4_ .cin0_used = "true";
2259 defparam \inst|vga_driver_unit|vsync_counter_4_ .cin1_used = "true";
2260 defparam \inst|vga_driver_unit|vsync_counter_4_ .lut_mask = "a50a";
2261 defparam \inst|vga_driver_unit|vsync_counter_4_ .operation_mode = "arithmetic";
2262 defparam \inst|vga_driver_unit|vsync_counter_4_ .output_mode = "reg_only";
2263 defparam \inst|vga_driver_unit|vsync_counter_4_ .register_cascade_mode = "off";
2264 defparam \inst|vga_driver_unit|vsync_counter_4_ .sum_lutc_input = "cin";
2265 defparam \inst|vga_driver_unit|vsync_counter_4_ .synch_mode = "on";
2266 // synopsys translate_on
2267
2268 // atom is at LC_X25_Y43_N5
2269 stratix_lcell \inst|vga_driver_unit|vsync_counter_5_ (
2270 // Equation(s):
2271 // \inst|vga_driver_unit|vsync_counter_5  = DFFEAS(\inst|vga_driver_unit|vsync_counter_5  $ \inst|vga_driver_unit|vsync_counter_cout [4], GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , ,
2272 // !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2273 // \inst|vga_driver_unit|vsync_counter_cout [5] = CARRY(!\inst|vga_driver_unit|vsync_counter_cout [4] # !\inst|vga_driver_unit|vsync_counter_5 )
2274 // \inst|vga_driver_unit|vsync_counter_cout[5]~COUT1_18  = CARRY(!\inst|vga_driver_unit|vsync_counter_cout [4] # !\inst|vga_driver_unit|vsync_counter_5 )
2275
2276         .clk(\inst1|altpll_component|_clk0 ),
2277         .dataa(vcc),
2278         .datab(\inst|vga_driver_unit|vsync_counter_5 ),
2279         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2280         .datad(vcc),
2281         .aclr(gnd),
2282         .aload(gnd),
2283         .sclr(!\inst|vga_driver_unit|G_16_i ),
2284         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2285         .ena(vcc),
2286         .cin(\inst|vga_driver_unit|vsync_counter_cout [4]),
2287         .cin0(gnd),
2288         .cin1(vcc),
2289         .inverta(gnd),
2290         .regcascin(gnd),
2291         .devclrn(devclrn),
2292         .devpor(devpor),
2293         .combout(),
2294         .regout(\inst|vga_driver_unit|vsync_counter_5 ),
2295         .cout(),
2296         .cout0(\inst|vga_driver_unit|vsync_counter_cout [5]),
2297         .cout1(\inst|vga_driver_unit|vsync_counter_cout[5]~COUT1_18 ));
2298 // synopsys translate_off
2299 defparam \inst|vga_driver_unit|vsync_counter_5_ .cin_used = "true";
2300 defparam \inst|vga_driver_unit|vsync_counter_5_ .lut_mask = "3c3f";
2301 defparam \inst|vga_driver_unit|vsync_counter_5_ .operation_mode = "arithmetic";
2302 defparam \inst|vga_driver_unit|vsync_counter_5_ .output_mode = "reg_only";
2303 defparam \inst|vga_driver_unit|vsync_counter_5_ .register_cascade_mode = "off";
2304 defparam \inst|vga_driver_unit|vsync_counter_5_ .sum_lutc_input = "cin";
2305 defparam \inst|vga_driver_unit|vsync_counter_5_ .synch_mode = "on";
2306 // synopsys translate_on
2307
2308 // atom is at LC_X25_Y43_N6
2309 stratix_lcell \inst|vga_driver_unit|vsync_counter_6_ (
2310 // Equation(s):
2311 // \inst|vga_driver_unit|vsync_counter_6  = DFFEAS(\inst|vga_driver_unit|vsync_counter_6  $ !(!\inst|vga_driver_unit|vsync_counter_cout [4] & \inst|vga_driver_unit|vsync_counter_cout [5]) # (\inst|vga_driver_unit|vsync_counter_cout [4] &
2312 // \inst|vga_driver_unit|vsync_counter_cout[5]~COUT1_18 ), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2313 // \inst|vga_driver_unit|vsync_counter_cout [6] = CARRY(\inst|vga_driver_unit|vsync_counter_6  & !\inst|vga_driver_unit|vsync_counter_cout [5])
2314 // \inst|vga_driver_unit|vsync_counter_cout[6]~COUT1_20  = CARRY(\inst|vga_driver_unit|vsync_counter_6  & !\inst|vga_driver_unit|vsync_counter_cout[5]~COUT1_18 )
2315
2316         .clk(\inst1|altpll_component|_clk0 ),
2317         .dataa(vcc),
2318         .datab(\inst|vga_driver_unit|vsync_counter_6 ),
2319         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2320         .datad(vcc),
2321         .aclr(gnd),
2322         .aload(gnd),
2323         .sclr(!\inst|vga_driver_unit|G_16_i ),
2324         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2325         .ena(vcc),
2326         .cin(\inst|vga_driver_unit|vsync_counter_cout [4]),
2327         .cin0(\inst|vga_driver_unit|vsync_counter_cout [5]),
2328         .cin1(\inst|vga_driver_unit|vsync_counter_cout[5]~COUT1_18 ),
2329         .inverta(gnd),
2330         .regcascin(gnd),
2331         .devclrn(devclrn),
2332         .devpor(devpor),
2333         .combout(),
2334         .regout(\inst|vga_driver_unit|vsync_counter_6 ),
2335         .cout(),
2336         .cout0(\inst|vga_driver_unit|vsync_counter_cout [6]),
2337         .cout1(\inst|vga_driver_unit|vsync_counter_cout[6]~COUT1_20 ));
2338 // synopsys translate_off
2339 defparam \inst|vga_driver_unit|vsync_counter_6_ .cin0_used = "true";
2340 defparam \inst|vga_driver_unit|vsync_counter_6_ .cin1_used = "true";
2341 defparam \inst|vga_driver_unit|vsync_counter_6_ .cin_used = "true";
2342 defparam \inst|vga_driver_unit|vsync_counter_6_ .lut_mask = "c30c";
2343 defparam \inst|vga_driver_unit|vsync_counter_6_ .operation_mode = "arithmetic";
2344 defparam \inst|vga_driver_unit|vsync_counter_6_ .output_mode = "reg_only";
2345 defparam \inst|vga_driver_unit|vsync_counter_6_ .register_cascade_mode = "off";
2346 defparam \inst|vga_driver_unit|vsync_counter_6_ .sum_lutc_input = "cin";
2347 defparam \inst|vga_driver_unit|vsync_counter_6_ .synch_mode = "on";
2348 // synopsys translate_on
2349
2350 // atom is at LC_X25_Y43_N7
2351 stratix_lcell \inst|vga_driver_unit|vsync_counter_7_ (
2352 // Equation(s):
2353 // \inst|vga_driver_unit|vsync_counter_7  = DFFEAS(\inst|vga_driver_unit|vsync_counter_7  $ ((!\inst|vga_driver_unit|vsync_counter_cout [4] & \inst|vga_driver_unit|vsync_counter_cout [6]) # (\inst|vga_driver_unit|vsync_counter_cout [4] &
2354 // \inst|vga_driver_unit|vsync_counter_cout[6]~COUT1_20 )), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2355 // \inst|vga_driver_unit|vsync_counter_cout [7] = CARRY(!\inst|vga_driver_unit|vsync_counter_cout [6] # !\inst|vga_driver_unit|vsync_counter_7 )
2356 // \inst|vga_driver_unit|vsync_counter_cout[7]~COUT1_22  = CARRY(!\inst|vga_driver_unit|vsync_counter_cout[6]~COUT1_20  # !\inst|vga_driver_unit|vsync_counter_7 )
2357
2358         .clk(\inst1|altpll_component|_clk0 ),
2359         .dataa(\inst|vga_driver_unit|vsync_counter_7 ),
2360         .datab(vcc),
2361         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2362         .datad(vcc),
2363         .aclr(gnd),
2364         .aload(gnd),
2365         .sclr(!\inst|vga_driver_unit|G_16_i ),
2366         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2367         .ena(vcc),
2368         .cin(\inst|vga_driver_unit|vsync_counter_cout [4]),
2369         .cin0(\inst|vga_driver_unit|vsync_counter_cout [6]),
2370         .cin1(\inst|vga_driver_unit|vsync_counter_cout[6]~COUT1_20 ),
2371         .inverta(gnd),
2372         .regcascin(gnd),
2373         .devclrn(devclrn),
2374         .devpor(devpor),
2375         .combout(),
2376         .regout(\inst|vga_driver_unit|vsync_counter_7 ),
2377         .cout(),
2378         .cout0(\inst|vga_driver_unit|vsync_counter_cout [7]),
2379         .cout1(\inst|vga_driver_unit|vsync_counter_cout[7]~COUT1_22 ));
2380 // synopsys translate_off
2381 defparam \inst|vga_driver_unit|vsync_counter_7_ .cin0_used = "true";
2382 defparam \inst|vga_driver_unit|vsync_counter_7_ .cin1_used = "true";
2383 defparam \inst|vga_driver_unit|vsync_counter_7_ .cin_used = "true";
2384 defparam \inst|vga_driver_unit|vsync_counter_7_ .lut_mask = "5a5f";
2385 defparam \inst|vga_driver_unit|vsync_counter_7_ .operation_mode = "arithmetic";
2386 defparam \inst|vga_driver_unit|vsync_counter_7_ .output_mode = "reg_only";
2387 defparam \inst|vga_driver_unit|vsync_counter_7_ .register_cascade_mode = "off";
2388 defparam \inst|vga_driver_unit|vsync_counter_7_ .sum_lutc_input = "cin";
2389 defparam \inst|vga_driver_unit|vsync_counter_7_ .synch_mode = "on";
2390 // synopsys translate_on
2391
2392 // atom is at LC_X25_Y43_N8
2393 stratix_lcell \inst|vga_driver_unit|vsync_counter_8_ (
2394 // Equation(s):
2395 // \inst|vga_driver_unit|vsync_counter_8  = DFFEAS(\inst|vga_driver_unit|vsync_counter_8  $ (!(!\inst|vga_driver_unit|vsync_counter_cout [4] & \inst|vga_driver_unit|vsync_counter_cout [7]) # (\inst|vga_driver_unit|vsync_counter_cout [4] &
2396 // \inst|vga_driver_unit|vsync_counter_cout[7]~COUT1_22 )), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2397 // \inst|vga_driver_unit|vsync_counter_cout [8] = CARRY(\inst|vga_driver_unit|vsync_counter_8  & (!\inst|vga_driver_unit|vsync_counter_cout [7]))
2398 // \inst|vga_driver_unit|vsync_counter_cout[8]~COUT1_24  = CARRY(\inst|vga_driver_unit|vsync_counter_8  & (!\inst|vga_driver_unit|vsync_counter_cout[7]~COUT1_22 ))
2399
2400         .clk(\inst1|altpll_component|_clk0 ),
2401         .dataa(\inst|vga_driver_unit|vsync_counter_8 ),
2402         .datab(vcc),
2403         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2404         .datad(vcc),
2405         .aclr(gnd),
2406         .aload(gnd),
2407         .sclr(!\inst|vga_driver_unit|G_16_i ),
2408         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2409         .ena(vcc),
2410         .cin(\inst|vga_driver_unit|vsync_counter_cout [4]),
2411         .cin0(\inst|vga_driver_unit|vsync_counter_cout [7]),
2412         .cin1(\inst|vga_driver_unit|vsync_counter_cout[7]~COUT1_22 ),
2413         .inverta(gnd),
2414         .regcascin(gnd),
2415         .devclrn(devclrn),
2416         .devpor(devpor),
2417         .combout(),
2418         .regout(\inst|vga_driver_unit|vsync_counter_8 ),
2419         .cout(),
2420         .cout0(\inst|vga_driver_unit|vsync_counter_cout [8]),
2421         .cout1(\inst|vga_driver_unit|vsync_counter_cout[8]~COUT1_24 ));
2422 // synopsys translate_off
2423 defparam \inst|vga_driver_unit|vsync_counter_8_ .cin0_used = "true";
2424 defparam \inst|vga_driver_unit|vsync_counter_8_ .cin1_used = "true";
2425 defparam \inst|vga_driver_unit|vsync_counter_8_ .cin_used = "true";
2426 defparam \inst|vga_driver_unit|vsync_counter_8_ .lut_mask = "a50a";
2427 defparam \inst|vga_driver_unit|vsync_counter_8_ .operation_mode = "arithmetic";
2428 defparam \inst|vga_driver_unit|vsync_counter_8_ .output_mode = "reg_only";
2429 defparam \inst|vga_driver_unit|vsync_counter_8_ .register_cascade_mode = "off";
2430 defparam \inst|vga_driver_unit|vsync_counter_8_ .sum_lutc_input = "cin";
2431 defparam \inst|vga_driver_unit|vsync_counter_8_ .synch_mode = "on";
2432 // synopsys translate_on
2433
2434 // atom is at LC_X25_Y43_N9
2435 stratix_lcell \inst|vga_driver_unit|vsync_counter_9_ (
2436 // Equation(s):
2437 // \inst|vga_driver_unit|vsync_counter_9  = DFFEAS((!\inst|vga_driver_unit|vsync_counter_cout [4] & \inst|vga_driver_unit|vsync_counter_cout [8]) # (\inst|vga_driver_unit|vsync_counter_cout [4] & \inst|vga_driver_unit|vsync_counter_cout[8]~COUT1_24 ) $
2438 // \inst|vga_driver_unit|vsync_counter_9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2439
2440         .clk(\inst1|altpll_component|_clk0 ),
2441         .dataa(vcc),
2442         .datab(vcc),
2443         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2444         .datad(\inst|vga_driver_unit|vsync_counter_9 ),
2445         .aclr(gnd),
2446         .aload(gnd),
2447         .sclr(!\inst|vga_driver_unit|G_16_i ),
2448         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2449         .ena(vcc),
2450         .cin(\inst|vga_driver_unit|vsync_counter_cout [4]),
2451         .cin0(\inst|vga_driver_unit|vsync_counter_cout [8]),
2452         .cin1(\inst|vga_driver_unit|vsync_counter_cout[8]~COUT1_24 ),
2453         .inverta(gnd),
2454         .regcascin(gnd),
2455         .devclrn(devclrn),
2456         .devpor(devpor),
2457         .combout(),
2458         .regout(\inst|vga_driver_unit|vsync_counter_9 ),
2459         .cout(),
2460         .cout0(),
2461         .cout1());
2462 // synopsys translate_off
2463 defparam \inst|vga_driver_unit|vsync_counter_9_ .cin0_used = "true";
2464 defparam \inst|vga_driver_unit|vsync_counter_9_ .cin1_used = "true";
2465 defparam \inst|vga_driver_unit|vsync_counter_9_ .cin_used = "true";
2466 defparam \inst|vga_driver_unit|vsync_counter_9_ .lut_mask = "0ff0";
2467 defparam \inst|vga_driver_unit|vsync_counter_9_ .operation_mode = "normal";
2468 defparam \inst|vga_driver_unit|vsync_counter_9_ .output_mode = "reg_only";
2469 defparam \inst|vga_driver_unit|vsync_counter_9_ .register_cascade_mode = "off";
2470 defparam \inst|vga_driver_unit|vsync_counter_9_ .sum_lutc_input = "cin";
2471 defparam \inst|vga_driver_unit|vsync_counter_9_ .synch_mode = "on";
2472 // synopsys translate_on
2473
2474 // atom is at LC_X25_Y42_N7
2475 stratix_lcell \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_5 (
2476 // Equation(s):
2477 // \inst|vga_driver_unit|un9_vsync_counterlt9_5  = !\inst|vga_driver_unit|vsync_counter_8  # !\inst|vga_driver_unit|vsync_counter_7  # !\inst|vga_driver_unit|vsync_counter_6  # !\inst|vga_driver_unit|vsync_counter_9
2478
2479         .clk(gnd),
2480         .dataa(\inst|vga_driver_unit|vsync_counter_9 ),
2481         .datab(\inst|vga_driver_unit|vsync_counter_6 ),
2482         .datac(\inst|vga_driver_unit|vsync_counter_7 ),
2483         .datad(\inst|vga_driver_unit|vsync_counter_8 ),
2484         .aclr(gnd),
2485         .aload(gnd),
2486         .sclr(gnd),
2487         .sload(gnd),
2488         .ena(vcc),
2489         .cin(gnd),
2490         .cin0(gnd),
2491         .cin1(vcc),
2492         .inverta(gnd),
2493         .regcascin(gnd),
2494         .devclrn(devclrn),
2495         .devpor(devpor),
2496         .combout(\inst|vga_driver_unit|un9_vsync_counterlt9_5 ),
2497         .regout(),
2498         .cout(),
2499         .cout0(),
2500         .cout1());
2501 // synopsys translate_off
2502 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_5 .lut_mask = "7fff";
2503 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_5 .operation_mode = "normal";
2504 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_5 .output_mode = "comb_only";
2505 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_5 .register_cascade_mode = "off";
2506 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_5 .sum_lutc_input = "datac";
2507 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_5 .synch_mode = "off";
2508 // synopsys translate_on
2509
2510 // atom is at LC_X25_Y42_N5
2511 stratix_lcell \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9 (
2512 // Equation(s):
2513 // \inst|vga_driver_unit|un9_vsync_counterlt9  = \inst|vga_driver_unit|un9_vsync_counterlt9_6  # \inst|vga_driver_unit|un9_vsync_counterlt9_5  # !\inst|vga_driver_unit|vsync_counter_5  # !\inst|vga_driver_unit|vsync_counter_4
2514
2515         .clk(gnd),
2516         .dataa(\inst|vga_driver_unit|un9_vsync_counterlt9_6 ),
2517         .datab(\inst|vga_driver_unit|vsync_counter_4 ),
2518         .datac(\inst|vga_driver_unit|un9_vsync_counterlt9_5 ),
2519         .datad(\inst|vga_driver_unit|vsync_counter_5 ),
2520         .aclr(gnd),
2521         .aload(gnd),
2522         .sclr(gnd),
2523         .sload(gnd),
2524         .ena(vcc),
2525         .cin(gnd),
2526         .cin0(gnd),
2527         .cin1(vcc),
2528         .inverta(gnd),
2529         .regcascin(gnd),
2530         .devclrn(devclrn),
2531         .devpor(devpor),
2532         .combout(\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2533         .regout(),
2534         .cout(),
2535         .cout0(),
2536         .cout1());
2537 // synopsys translate_off
2538 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9 .lut_mask = "fbff";
2539 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9 .operation_mode = "normal";
2540 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9 .output_mode = "comb_only";
2541 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9 .register_cascade_mode = "off";
2542 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9 .sum_lutc_input = "datac";
2543 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9 .synch_mode = "off";
2544 // synopsys translate_on
2545
2546 // atom is at LC_X25_Y42_N2
2547 stratix_lcell \inst|vga_driver_unit|G_16 (
2548 // Equation(s):
2549 // \inst|vga_driver_unit|G_16_i  = !\inst|vga_driver_unit|vsync_state_0  & !\inst|vga_driver_unit|un6_dly_counter_0_x  & !\inst|vga_driver_unit|vsync_state_6  # !\inst|vga_driver_unit|un9_vsync_counterlt9
2550
2551         .clk(gnd),
2552         .dataa(\inst|vga_driver_unit|vsync_state_0 ),
2553         .datab(\inst|vga_driver_unit|un6_dly_counter_0_x ),
2554         .datac(\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2555         .datad(\inst|vga_driver_unit|vsync_state_6 ),
2556         .aclr(gnd),
2557         .aload(gnd),
2558         .sclr(gnd),
2559         .sload(gnd),
2560         .ena(vcc),
2561         .cin(gnd),
2562         .cin0(gnd),
2563         .cin1(vcc),
2564         .inverta(gnd),
2565         .regcascin(gnd),
2566         .devclrn(devclrn),
2567         .devpor(devpor),
2568         .combout(\inst|vga_driver_unit|G_16_i ),
2569         .regout(),
2570         .cout(),
2571         .cout0(),
2572         .cout1());
2573 // synopsys translate_off
2574 defparam \inst|vga_driver_unit|G_16 .lut_mask = "0f1f";
2575 defparam \inst|vga_driver_unit|G_16 .operation_mode = "normal";
2576 defparam \inst|vga_driver_unit|G_16 .output_mode = "comb_only";
2577 defparam \inst|vga_driver_unit|G_16 .register_cascade_mode = "off";
2578 defparam \inst|vga_driver_unit|G_16 .sum_lutc_input = "datac";
2579 defparam \inst|vga_driver_unit|G_16 .synch_mode = "off";
2580 // synopsys translate_on
2581
2582 // atom is at LC_X24_Y42_N4
2583 stratix_lcell \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_7 (
2584 // Equation(s):
2585 // \inst|vga_driver_unit|un12_vsync_counter_7  = !\inst|vga_driver_unit|vsync_counter_4  & !\inst|vga_driver_unit|vsync_counter_1  & !\inst|vga_driver_unit|vsync_counter_2  & !\inst|vga_driver_unit|vsync_counter_3
2586
2587         .clk(gnd),
2588         .dataa(\inst|vga_driver_unit|vsync_counter_4 ),
2589         .datab(\inst|vga_driver_unit|vsync_counter_1 ),
2590         .datac(\inst|vga_driver_unit|vsync_counter_2 ),
2591         .datad(\inst|vga_driver_unit|vsync_counter_3 ),
2592         .aclr(gnd),
2593         .aload(gnd),
2594         .sclr(gnd),
2595         .sload(gnd),
2596         .ena(vcc),
2597         .cin(gnd),
2598         .cin0(gnd),
2599         .cin1(vcc),
2600         .inverta(gnd),
2601         .regcascin(gnd),
2602         .devclrn(devclrn),
2603         .devpor(devpor),
2604         .combout(\inst|vga_driver_unit|un12_vsync_counter_7 ),
2605         .regout(),
2606         .cout(),
2607         .cout0(),
2608         .cout1());
2609 // synopsys translate_off
2610 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_7 .lut_mask = "0001";
2611 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_7 .operation_mode = "normal";
2612 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_7 .output_mode = "comb_only";
2613 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_7 .register_cascade_mode = "off";
2614 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_7 .sum_lutc_input = "datac";
2615 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_7 .synch_mode = "off";
2616 // synopsys translate_on
2617
2618 // atom is at LC_X24_Y42_N2
2619 stratix_lcell \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_6 (
2620 // Equation(s):
2621 // \inst|vga_driver_unit|un12_vsync_counter_6  = !\inst|vga_driver_unit|vsync_counter_5  & !\inst|vga_driver_unit|vsync_counter_6  & !\inst|vga_driver_unit|vsync_counter_7  & !\inst|vga_driver_unit|vsync_counter_8
2622
2623         .clk(gnd),
2624         .dataa(\inst|vga_driver_unit|vsync_counter_5 ),
2625         .datab(\inst|vga_driver_unit|vsync_counter_6 ),
2626         .datac(\inst|vga_driver_unit|vsync_counter_7 ),
2627         .datad(\inst|vga_driver_unit|vsync_counter_8 ),
2628         .aclr(gnd),
2629         .aload(gnd),
2630         .sclr(gnd),
2631         .sload(gnd),
2632         .ena(vcc),
2633         .cin(gnd),
2634         .cin0(gnd),
2635         .cin1(vcc),
2636         .inverta(gnd),
2637         .regcascin(gnd),
2638         .devclrn(devclrn),
2639         .devpor(devpor),
2640         .combout(\inst|vga_driver_unit|un12_vsync_counter_6 ),
2641         .regout(),
2642         .cout(),
2643         .cout0(),
2644         .cout1());
2645 // synopsys translate_off
2646 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_6 .lut_mask = "0001";
2647 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_6 .operation_mode = "normal";
2648 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_6 .output_mode = "comb_only";
2649 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_6 .register_cascade_mode = "off";
2650 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_6 .sum_lutc_input = "datac";
2651 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_6 .synch_mode = "off";
2652 // synopsys translate_on
2653
2654 // atom is at LC_X24_Y42_N1
2655 stratix_lcell \inst|vga_driver_unit|VSYNC_FSM_next_un14_vsync_counter_8 (
2656 // Equation(s):
2657 // \inst|vga_driver_unit|un14_vsync_counter_8  = \inst|vga_driver_unit|un12_vsync_counter_7  & (\inst|vga_driver_unit|un12_vsync_counter_6 )
2658
2659         .clk(gnd),
2660         .dataa(\inst|vga_driver_unit|un12_vsync_counter_7 ),
2661         .datab(vcc),
2662         .datac(vcc),
2663         .datad(\inst|vga_driver_unit|un12_vsync_counter_6 ),
2664         .aclr(gnd),
2665         .aload(gnd),
2666         .sclr(gnd),
2667         .sload(gnd),
2668         .ena(vcc),
2669         .cin(gnd),
2670         .cin0(gnd),
2671         .cin1(vcc),
2672         .inverta(gnd),
2673         .regcascin(gnd),
2674         .devclrn(devclrn),
2675         .devpor(devpor),
2676         .combout(\inst|vga_driver_unit|un14_vsync_counter_8 ),
2677         .regout(),
2678         .cout(),
2679         .cout0(),
2680         .cout1());
2681 // synopsys translate_off
2682 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un14_vsync_counter_8 .lut_mask = "aa00";
2683 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un14_vsync_counter_8 .operation_mode = "normal";
2684 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un14_vsync_counter_8 .output_mode = "comb_only";
2685 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un14_vsync_counter_8 .register_cascade_mode = "off";
2686 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un14_vsync_counter_8 .sum_lutc_input = "datac";
2687 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un14_vsync_counter_8 .synch_mode = "off";
2688 // synopsys translate_on
2689
2690 // atom is at LC_X24_Y41_N8
2691 stratix_lcell \inst|vga_driver_unit|vsync_state_5_ (
2692 // Equation(s):
2693 // \inst|vga_driver_unit|vsync_state_5  = DFFEAS(\inst|vga_driver_unit|vsync_state_0  # \inst|vga_driver_unit|vsync_state_6 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|vsync_state_next_2_sqmuxa , , ,
2694 // \inst|vga_driver_unit|un6_dly_counter_0_x , )
2695
2696         .clk(\inst1|altpll_component|_clk0 ),
2697         .dataa(vcc),
2698         .datab(\inst|vga_driver_unit|vsync_state_0 ),
2699         .datac(\inst|vga_driver_unit|vsync_state_6 ),
2700         .datad(vcc),
2701         .aclr(gnd),
2702         .aload(gnd),
2703         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
2704         .sload(gnd),
2705         .ena(\inst|vga_driver_unit|vsync_state_next_2_sqmuxa ),
2706         .cin(gnd),
2707         .cin0(gnd),
2708         .cin1(vcc),
2709         .inverta(gnd),
2710         .regcascin(gnd),
2711         .devclrn(devclrn),
2712         .devpor(devpor),
2713         .combout(),
2714         .regout(\inst|vga_driver_unit|vsync_state_5 ),
2715         .cout(),
2716         .cout0(),
2717         .cout1());
2718 // synopsys translate_off
2719 defparam \inst|vga_driver_unit|vsync_state_5_ .lut_mask = "fcfc";
2720 defparam \inst|vga_driver_unit|vsync_state_5_ .operation_mode = "normal";
2721 defparam \inst|vga_driver_unit|vsync_state_5_ .output_mode = "reg_only";
2722 defparam \inst|vga_driver_unit|vsync_state_5_ .register_cascade_mode = "off";
2723 defparam \inst|vga_driver_unit|vsync_state_5_ .sum_lutc_input = "datac";
2724 defparam \inst|vga_driver_unit|vsync_state_5_ .synch_mode = "on";
2725 // synopsys translate_on
2726
2727 // atom is at LC_X24_Y42_N8
2728 stratix_lcell \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1_cZ (
2729 // Equation(s):
2730 // \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1  = \inst|vga_driver_unit|vsync_state_5  & (\inst|vga_driver_unit|vsync_counter_9  # !\inst|vga_driver_unit|un14_vsync_counter_8  # !\inst|vga_driver_unit|vsync_counter_0 )
2731
2732         .clk(gnd),
2733         .dataa(\inst|vga_driver_unit|vsync_counter_0 ),
2734         .datab(\inst|vga_driver_unit|un14_vsync_counter_8 ),
2735         .datac(\inst|vga_driver_unit|vsync_state_5 ),
2736         .datad(\inst|vga_driver_unit|vsync_counter_9 ),
2737         .aclr(gnd),
2738         .aload(gnd),
2739         .sclr(gnd),
2740         .sload(gnd),
2741         .ena(vcc),
2742         .cin(gnd),
2743         .cin0(gnd),
2744         .cin1(vcc),
2745         .inverta(gnd),
2746         .regcascin(gnd),
2747         .devclrn(devclrn),
2748         .devpor(devpor),
2749         .combout(\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1 ),
2750         .regout(),
2751         .cout(),
2752         .cout0(),
2753         .cout1());
2754 // synopsys translate_off
2755 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1_cZ .lut_mask = "f070";
2756 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1_cZ .operation_mode = "normal";
2757 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1_cZ .output_mode = "comb_only";
2758 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1_cZ .register_cascade_mode = "off";
2759 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1_cZ .sum_lutc_input = "datac";
2760 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1_cZ .synch_mode = "off";
2761 // synopsys translate_on
2762
2763 // atom is at LC_X24_Y41_N6
2764 stratix_lcell \inst|vga_driver_unit|vsync_state_4_ (
2765 // Equation(s):
2766 // \inst|vga_driver_unit|vsync_state_4  = DFFEAS(\inst|vga_driver_unit|vsync_state_5  & \inst|vga_driver_unit|un14_vsync_counter_8  & \inst|vga_driver_unit|vsync_counter_0  & !\inst|vga_driver_unit|vsync_counter_9 , GLOBAL(\inst1|altpll_component|_clk0 ),
2767 // VCC, , \inst|vga_driver_unit|vsync_state_next_2_sqmuxa , , , \inst|vga_driver_unit|un6_dly_counter_0_x , )
2768
2769         .clk(\inst1|altpll_component|_clk0 ),
2770         .dataa(\inst|vga_driver_unit|vsync_state_5 ),
2771         .datab(\inst|vga_driver_unit|un14_vsync_counter_8 ),
2772         .datac(\inst|vga_driver_unit|vsync_counter_0 ),
2773         .datad(\inst|vga_driver_unit|vsync_counter_9 ),
2774         .aclr(gnd),
2775         .aload(gnd),
2776         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
2777         .sload(gnd),
2778         .ena(\inst|vga_driver_unit|vsync_state_next_2_sqmuxa ),
2779         .cin(gnd),
2780         .cin0(gnd),
2781         .cin1(vcc),
2782         .inverta(gnd),
2783         .regcascin(gnd),
2784         .devclrn(devclrn),
2785         .devpor(devpor),
2786         .combout(),
2787         .regout(\inst|vga_driver_unit|vsync_state_4 ),
2788         .cout(),
2789         .cout0(),
2790         .cout1());
2791 // synopsys translate_off
2792 defparam \inst|vga_driver_unit|vsync_state_4_ .lut_mask = "0080";
2793 defparam \inst|vga_driver_unit|vsync_state_4_ .operation_mode = "normal";
2794 defparam \inst|vga_driver_unit|vsync_state_4_ .output_mode = "reg_only";
2795 defparam \inst|vga_driver_unit|vsync_state_4_ .register_cascade_mode = "off";
2796 defparam \inst|vga_driver_unit|vsync_state_4_ .sum_lutc_input = "datac";
2797 defparam \inst|vga_driver_unit|vsync_state_4_ .synch_mode = "on";
2798 // synopsys translate_on
2799
2800 // atom is at LC_X25_Y42_N4
2801 stratix_lcell \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_3 (
2802 // Equation(s):
2803 // \inst|vga_driver_unit|un13_vsync_counter_3  = !\inst|vga_driver_unit|vsync_counter_9  & !\inst|vga_driver_unit|vsync_counter_6  & !\inst|vga_driver_unit|vsync_counter_7  & !\inst|vga_driver_unit|vsync_counter_8
2804
2805         .clk(gnd),
2806         .dataa(\inst|vga_driver_unit|vsync_counter_9 ),
2807         .datab(\inst|vga_driver_unit|vsync_counter_6 ),
2808         .datac(\inst|vga_driver_unit|vsync_counter_7 ),
2809         .datad(\inst|vga_driver_unit|vsync_counter_8 ),
2810         .aclr(gnd),
2811         .aload(gnd),
2812         .sclr(gnd),
2813         .sload(gnd),
2814         .ena(vcc),
2815         .cin(gnd),
2816         .cin0(gnd),
2817         .cin1(vcc),
2818         .inverta(gnd),
2819         .regcascin(gnd),
2820         .devclrn(devclrn),
2821         .devpor(devpor),
2822         .combout(\inst|vga_driver_unit|un13_vsync_counter_3 ),
2823         .regout(),
2824         .cout(),
2825         .cout0(),
2826         .cout1());
2827 // synopsys translate_off
2828 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_3 .lut_mask = "0001";
2829 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_3 .operation_mode = "normal";
2830 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_3 .output_mode = "comb_only";
2831 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_3 .register_cascade_mode = "off";
2832 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_3 .sum_lutc_input = "datac";
2833 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_3 .synch_mode = "off";
2834 // synopsys translate_on
2835
2836 // atom is at LC_X24_Y42_N3
2837 stratix_lcell \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_4 (
2838 // Equation(s):
2839 // \inst|vga_driver_unit|un13_vsync_counter_4  = \inst|vga_driver_unit|vsync_counter_5  & \inst|vga_driver_unit|un13_vsync_counter_3  & \inst|vga_driver_unit|vsync_counter_0
2840
2841         .clk(gnd),
2842         .dataa(\inst|vga_driver_unit|vsync_counter_5 ),
2843         .datab(\inst|vga_driver_unit|un13_vsync_counter_3 ),
2844         .datac(\inst|vga_driver_unit|vsync_counter_0 ),
2845         .datad(vcc),
2846         .aclr(gnd),
2847         .aload(gnd),
2848         .sclr(gnd),
2849         .sload(gnd),
2850         .ena(vcc),
2851         .cin(gnd),
2852         .cin0(gnd),
2853         .cin1(vcc),
2854         .inverta(gnd),
2855         .regcascin(gnd),
2856         .devclrn(devclrn),
2857         .devpor(devpor),
2858         .combout(\inst|vga_driver_unit|un13_vsync_counter_4 ),
2859         .regout(),
2860         .cout(),
2861         .cout0(),
2862         .cout1());
2863 // synopsys translate_off
2864 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_4 .lut_mask = "8080";
2865 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_4 .operation_mode = "normal";
2866 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_4 .output_mode = "comb_only";
2867 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_4 .register_cascade_mode = "off";
2868 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_4 .sum_lutc_input = "datac";
2869 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_4 .synch_mode = "off";
2870 // synopsys translate_on
2871
2872 // atom is at LC_X24_Y41_N3
2873 stratix_lcell \inst|vga_driver_unit|vsync_state_1_ (
2874 // Equation(s):
2875 // \inst|vga_driver_unit|vsync_state_1  = DFFEAS(\inst|vga_driver_unit|un12_vsync_counter_7  & \inst|vga_driver_unit|vsync_state_4  & \inst|vga_driver_unit|un13_vsync_counter_4  & !\inst|vga_driver_unit|un6_dly_counter_0_x ,
2876 // GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
2877
2878         .clk(\inst1|altpll_component|_clk0 ),
2879         .dataa(\inst|vga_driver_unit|un12_vsync_counter_7 ),
2880         .datab(\inst|vga_driver_unit|vsync_state_4 ),
2881         .datac(\inst|vga_driver_unit|un13_vsync_counter_4 ),
2882         .datad(\inst|vga_driver_unit|un6_dly_counter_0_x ),
2883         .aclr(gnd),
2884         .aload(gnd),
2885         .sclr(gnd),
2886         .sload(gnd),
2887         .ena(vcc),
2888         .cin(gnd),
2889         .cin0(gnd),
2890         .cin1(vcc),
2891         .inverta(gnd),
2892         .regcascin(gnd),
2893         .devclrn(devclrn),
2894         .devpor(devpor),
2895         .combout(),
2896         .regout(\inst|vga_driver_unit|vsync_state_1 ),
2897         .cout(),
2898         .cout0(),
2899         .cout1());
2900 // synopsys translate_off
2901 defparam \inst|vga_driver_unit|vsync_state_1_ .lut_mask = "0080";
2902 defparam \inst|vga_driver_unit|vsync_state_1_ .operation_mode = "normal";
2903 defparam \inst|vga_driver_unit|vsync_state_1_ .output_mode = "reg_only";
2904 defparam \inst|vga_driver_unit|vsync_state_1_ .register_cascade_mode = "off";
2905 defparam \inst|vga_driver_unit|vsync_state_1_ .sum_lutc_input = "datac";
2906 defparam \inst|vga_driver_unit|vsync_state_1_ .synch_mode = "off";
2907 // synopsys translate_on
2908
2909 // atom is at LC_X24_Y42_N6
2910 stratix_lcell \inst|vga_driver_unit|vsync_state_3_ (
2911 // Equation(s):
2912 // \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_3  = E1_vsync_state_3 & (!\inst|vga_driver_unit|vsync_counter_9  # !\inst|vga_driver_unit|un14_vsync_counter_8  # !\inst|vga_driver_unit|vsync_counter_0 )
2913 // \inst|vga_driver_unit|vsync_state_3  = DFFEAS(\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_3 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|vsync_state_next_2_sqmuxa , \inst|vga_driver_unit|vsync_state_1 , ,
2914 // \inst|vga_driver_unit|un6_dly_counter_0_x , VCC)
2915
2916         .clk(\inst1|altpll_component|_clk0 ),
2917         .dataa(\inst|vga_driver_unit|vsync_counter_0 ),
2918         .datab(\inst|vga_driver_unit|un14_vsync_counter_8 ),
2919         .datac(\inst|vga_driver_unit|vsync_state_1 ),
2920         .datad(\inst|vga_driver_unit|vsync_counter_9 ),
2921         .aclr(gnd),
2922         .aload(gnd),
2923         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
2924         .sload(vcc),
2925         .ena(\inst|vga_driver_unit|vsync_state_next_2_sqmuxa ),
2926         .cin(gnd),
2927         .cin0(gnd),
2928         .cin1(vcc),
2929         .inverta(gnd),
2930         .regcascin(gnd),
2931         .devclrn(devclrn),
2932         .devpor(devpor),
2933         .combout(\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_3 ),
2934         .regout(\inst|vga_driver_unit|vsync_state_3 ),
2935         .cout(),
2936         .cout0(),
2937         .cout1());
2938 // synopsys translate_off
2939 defparam \inst|vga_driver_unit|vsync_state_3_ .lut_mask = "70f0";
2940 defparam \inst|vga_driver_unit|vsync_state_3_ .operation_mode = "normal";
2941 defparam \inst|vga_driver_unit|vsync_state_3_ .output_mode = "reg_and_comb";
2942 defparam \inst|vga_driver_unit|vsync_state_3_ .register_cascade_mode = "off";
2943 defparam \inst|vga_driver_unit|vsync_state_3_ .sum_lutc_input = "qfbk";
2944 defparam \inst|vga_driver_unit|vsync_state_3_ .synch_mode = "on";
2945 // synopsys translate_on
2946
2947 // atom is at LC_X24_Y42_N5
2948 stratix_lcell \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2_cZ (
2949 // Equation(s):
2950 // \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2  = \inst|vga_driver_unit|vsync_state_4  & (!\inst|vga_driver_unit|un12_vsync_counter_7  # !\inst|vga_driver_unit|un13_vsync_counter_4 )
2951
2952         .clk(gnd),
2953         .dataa(\inst|vga_driver_unit|vsync_state_4 ),
2954         .datab(vcc),
2955         .datac(\inst|vga_driver_unit|un13_vsync_counter_4 ),
2956         .datad(\inst|vga_driver_unit|un12_vsync_counter_7 ),
2957         .aclr(gnd),
2958         .aload(gnd),
2959         .sclr(gnd),
2960         .sload(gnd),
2961         .ena(vcc),
2962         .cin(gnd),
2963         .cin0(gnd),
2964         .cin1(vcc),
2965         .inverta(gnd),
2966         .regcascin(gnd),
2967         .devclrn(devclrn),
2968         .devpor(devpor),
2969         .combout(\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2 ),
2970         .regout(),
2971         .cout(),
2972         .cout0(),
2973         .cout1());
2974 // synopsys translate_off
2975 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2_cZ .lut_mask = "0aaa";
2976 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2_cZ .operation_mode = "normal";
2977 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2_cZ .output_mode = "comb_only";
2978 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2_cZ .register_cascade_mode = "off";
2979 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2_cZ .sum_lutc_input = "datac";
2980 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2_cZ .synch_mode = "off";
2981 // synopsys translate_on
2982
2983 // atom is at LC_X24_Y43_N5
2984 stratix_lcell \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_3 (
2985 // Equation(s):
2986 // \inst|vga_driver_unit|un15_vsync_counter_3  = \inst|vga_driver_unit|vsync_counter_3  & !\inst|vga_driver_unit|vsync_counter_2  & !\inst|vga_driver_unit|vsync_counter_0  & \inst|vga_driver_unit|vsync_counter_9
2987
2988         .clk(gnd),
2989         .dataa(\inst|vga_driver_unit|vsync_counter_3 ),
2990         .datab(\inst|vga_driver_unit|vsync_counter_2 ),
2991         .datac(\inst|vga_driver_unit|vsync_counter_0 ),
2992         .datad(\inst|vga_driver_unit|vsync_counter_9 ),
2993         .aclr(gnd),
2994         .aload(gnd),
2995         .sclr(gnd),
2996         .sload(gnd),
2997         .ena(vcc),
2998         .cin(gnd),
2999         .cin0(gnd),
3000         .cin1(vcc),
3001         .inverta(gnd),
3002         .regcascin(gnd),
3003         .devclrn(devclrn),
3004         .devpor(devpor),
3005         .combout(\inst|vga_driver_unit|un15_vsync_counter_3 ),
3006         .regout(),
3007         .cout(),
3008         .cout0(),
3009         .cout1());
3010 // synopsys translate_off
3011 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_3 .lut_mask = "0200";
3012 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_3 .operation_mode = "normal";
3013 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_3 .output_mode = "comb_only";
3014 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_3 .register_cascade_mode = "off";
3015 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_3 .sum_lutc_input = "datac";
3016 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_3 .synch_mode = "off";
3017 // synopsys translate_on
3018
3019 // atom is at LC_X24_Y43_N2
3020 stratix_lcell \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_4 (
3021 // Equation(s):
3022 // \inst|vga_driver_unit|un15_vsync_counter_4  = \inst|vga_driver_unit|un15_vsync_counter_3  & !\inst|vga_driver_unit|vsync_counter_4  & !\inst|vga_driver_unit|vsync_counter_1
3023
3024         .clk(gnd),
3025         .dataa(vcc),
3026         .datab(\inst|vga_driver_unit|un15_vsync_counter_3 ),
3027         .datac(\inst|vga_driver_unit|vsync_counter_4 ),
3028         .datad(\inst|vga_driver_unit|vsync_counter_1 ),
3029         .aclr(gnd),
3030         .aload(gnd),
3031         .sclr(gnd),
3032         .sload(gnd),
3033         .ena(vcc),
3034         .cin(gnd),
3035         .cin0(gnd),
3036         .cin1(vcc),
3037         .inverta(gnd),
3038         .regcascin(gnd),
3039         .devclrn(devclrn),
3040         .devpor(devpor),
3041         .combout(\inst|vga_driver_unit|un15_vsync_counter_4 ),
3042         .regout(),
3043         .cout(),
3044         .cout0(),
3045         .cout1());
3046 // synopsys translate_off
3047 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_4 .lut_mask = "000c";
3048 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_4 .operation_mode = "normal";
3049 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_4 .output_mode = "comb_only";
3050 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_4 .register_cascade_mode = "off";
3051 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_4 .sum_lutc_input = "datac";
3052 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_4 .synch_mode = "off";
3053 // synopsys translate_on
3054
3055 // atom is at LC_X24_Y42_N9
3056 stratix_lcell \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0_cZ (
3057 // Equation(s):
3058 // \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0  = \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2  # \inst|vga_driver_unit|vsync_state_2  & (!\inst|vga_driver_unit|un15_vsync_counter_4  # !\inst|vga_driver_unit|un12_vsync_counter_6 )
3059
3060         .clk(gnd),
3061         .dataa(\inst|vga_driver_unit|un12_vsync_counter_6 ),
3062         .datab(\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2 ),
3063         .datac(\inst|vga_driver_unit|vsync_state_2 ),
3064         .datad(\inst|vga_driver_unit|un15_vsync_counter_4 ),
3065         .aclr(gnd),
3066         .aload(gnd),
3067         .sclr(gnd),
3068         .sload(gnd),
3069         .ena(vcc),
3070         .cin(gnd),
3071         .cin0(gnd),
3072         .cin1(vcc),
3073         .inverta(gnd),
3074         .regcascin(gnd),
3075         .devclrn(devclrn),
3076         .devpor(devpor),
3077         .combout(\inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0 ),
3078         .regout(),
3079         .cout(),
3080         .cout0(),
3081         .cout1());
3082 // synopsys translate_off
3083 defparam \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0_cZ .lut_mask = "dcfc";
3084 defparam \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0_cZ .operation_mode = "normal";
3085 defparam \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0_cZ .output_mode = "comb_only";
3086 defparam \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0_cZ .register_cascade_mode = "off";
3087 defparam \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0_cZ .sum_lutc_input = "datac";
3088 defparam \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0_cZ .synch_mode = "off";
3089 // synopsys translate_on
3090
3091 // atom is at LC_X24_Y42_N7
3092 stratix_lcell \inst|vga_driver_unit|vsync_state_next_2_sqmuxa_cZ (
3093 // Equation(s):
3094 // \inst|vga_driver_unit|vsync_state_next_2_sqmuxa  = \inst|vga_driver_unit|un6_dly_counter_0_x  # !\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1  & !\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_3  &
3095 // !\inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0
3096
3097         .clk(gnd),
3098         .dataa(\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1 ),
3099         .datab(\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_3 ),
3100         .datac(\inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0 ),
3101         .datad(\inst|vga_driver_unit|un6_dly_counter_0_x ),
3102         .aclr(gnd),
3103         .aload(gnd),
3104         .sclr(gnd),
3105         .sload(gnd),
3106         .ena(vcc),
3107         .cin(gnd),
3108         .cin0(gnd),
3109         .cin1(vcc),
3110         .inverta(gnd),
3111         .regcascin(gnd),
3112         .devclrn(devclrn),
3113         .devpor(devpor),
3114         .combout(\inst|vga_driver_unit|vsync_state_next_2_sqmuxa ),
3115         .regout(),
3116         .cout(),
3117         .cout0(),
3118         .cout1());
3119 // synopsys translate_off
3120 defparam \inst|vga_driver_unit|vsync_state_next_2_sqmuxa_cZ .lut_mask = "ff01";
3121 defparam \inst|vga_driver_unit|vsync_state_next_2_sqmuxa_cZ .operation_mode = "normal";
3122 defparam \inst|vga_driver_unit|vsync_state_next_2_sqmuxa_cZ .output_mode = "comb_only";
3123 defparam \inst|vga_driver_unit|vsync_state_next_2_sqmuxa_cZ .register_cascade_mode = "off";
3124 defparam \inst|vga_driver_unit|vsync_state_next_2_sqmuxa_cZ .sum_lutc_input = "datac";
3125 defparam \inst|vga_driver_unit|vsync_state_next_2_sqmuxa_cZ .synch_mode = "off";
3126 // synopsys translate_on
3127
3128 // atom is at LC_X24_Y43_N4
3129 stratix_lcell \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0_cZ (
3130 // Equation(s):
3131 // \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0  = \inst|vga_driver_unit|un12_vsync_counter_6  & \inst|vga_driver_unit|vsync_state_2  & \inst|vga_driver_unit|un15_vsync_counter_4
3132
3133         .clk(gnd),
3134         .dataa(vcc),
3135         .datab(\inst|vga_driver_unit|un12_vsync_counter_6 ),
3136         .datac(\inst|vga_driver_unit|vsync_state_2 ),
3137         .datad(\inst|vga_driver_unit|un15_vsync_counter_4 ),
3138         .aclr(gnd),
3139         .aload(gnd),
3140         .sclr(gnd),
3141         .sload(gnd),
3142         .ena(vcc),
3143         .cin(gnd),
3144         .cin0(gnd),
3145         .cin1(vcc),
3146         .inverta(gnd),
3147         .regcascin(gnd),
3148         .devclrn(devclrn),
3149         .devpor(devpor),
3150         .combout(\inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0 ),
3151         .regout(),
3152         .cout(),
3153         .cout0(),
3154         .cout1());
3155 // synopsys translate_off
3156 defparam \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0_cZ .lut_mask = "c000";
3157 defparam \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0_cZ .operation_mode = "normal";
3158 defparam \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0_cZ .output_mode = "comb_only";
3159 defparam \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0_cZ .register_cascade_mode = "off";
3160 defparam \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0_cZ .sum_lutc_input = "datac";
3161 defparam \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0_cZ .synch_mode = "off";
3162 // synopsys translate_on
3163
3164 // atom is at LC_X24_Y42_N0
3165 stratix_lcell \inst|vga_driver_unit|vsync_state_0_ (
3166 // Equation(s):
3167 // \inst|vga_driver_unit|vsync_state_0  = DFFEAS(\inst|vga_driver_unit|un6_dly_counter_0_x  & \inst|vga_driver_unit|vsync_state_0  & !\inst|vga_driver_unit|vsync_state_next_2_sqmuxa  # !\inst|vga_driver_unit|un6_dly_counter_0_x  &
3168 // (\inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0  # \inst|vga_driver_unit|vsync_state_0  & !\inst|vga_driver_unit|vsync_state_next_2_sqmuxa ), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
3169
3170         .clk(\inst1|altpll_component|_clk0 ),
3171         .dataa(\inst|vga_driver_unit|un6_dly_counter_0_x ),
3172         .datab(\inst|vga_driver_unit|vsync_state_0 ),
3173         .datac(\inst|vga_driver_unit|vsync_state_next_2_sqmuxa ),
3174         .datad(\inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0 ),
3175         .aclr(gnd),
3176         .aload(gnd),
3177         .sclr(gnd),
3178         .sload(gnd),
3179         .ena(vcc),
3180         .cin(gnd),
3181         .cin0(gnd),
3182         .cin1(vcc),
3183         .inverta(gnd),
3184         .regcascin(gnd),
3185         .devclrn(devclrn),
3186         .devpor(devpor),
3187         .combout(),
3188         .regout(\inst|vga_driver_unit|vsync_state_0 ),
3189         .cout(),
3190         .cout0(),
3191         .cout1());
3192 // synopsys translate_off
3193 defparam \inst|vga_driver_unit|vsync_state_0_ .lut_mask = "5d0c";
3194 defparam \inst|vga_driver_unit|vsync_state_0_ .operation_mode = "normal";
3195 defparam \inst|vga_driver_unit|vsync_state_0_ .output_mode = "reg_only";
3196 defparam \inst|vga_driver_unit|vsync_state_0_ .register_cascade_mode = "off";
3197 defparam \inst|vga_driver_unit|vsync_state_0_ .sum_lutc_input = "datac";
3198 defparam \inst|vga_driver_unit|vsync_state_0_ .synch_mode = "off";
3199 // synopsys translate_on
3200
3201 // atom is at LC_X25_Y42_N9
3202 stratix_lcell \inst|vga_driver_unit|d_set_vsync_counter_cZ (
3203 // Equation(s):
3204 // \inst|vga_driver_unit|d_set_vsync_counter  = \inst|vga_driver_unit|vsync_state_0  # \inst|vga_driver_unit|vsync_state_6
3205
3206         .clk(gnd),
3207         .dataa(\inst|vga_driver_unit|vsync_state_0 ),
3208         .datab(vcc),
3209         .datac(vcc),
3210         .datad(\inst|vga_driver_unit|vsync_state_6 ),
3211         .aclr(gnd),
3212         .aload(gnd),
3213         .sclr(gnd),
3214         .sload(gnd),
3215         .ena(vcc),
3216         .cin(gnd),
3217         .cin0(gnd),
3218         .cin1(vcc),
3219         .inverta(gnd),
3220         .regcascin(gnd),
3221         .devclrn(devclrn),
3222         .devpor(devpor),
3223         .combout(\inst|vga_driver_unit|d_set_vsync_counter ),
3224         .regout(),
3225         .cout(),
3226         .cout0(),
3227         .cout1());
3228 // synopsys translate_off
3229 defparam \inst|vga_driver_unit|d_set_vsync_counter_cZ .lut_mask = "ffaa";
3230 defparam \inst|vga_driver_unit|d_set_vsync_counter_cZ .operation_mode = "normal";
3231 defparam \inst|vga_driver_unit|d_set_vsync_counter_cZ .output_mode = "comb_only";
3232 defparam \inst|vga_driver_unit|d_set_vsync_counter_cZ .register_cascade_mode = "off";
3233 defparam \inst|vga_driver_unit|d_set_vsync_counter_cZ .sum_lutc_input = "datac";
3234 defparam \inst|vga_driver_unit|d_set_vsync_counter_cZ .synch_mode = "off";
3235 // synopsys translate_on
3236
3237 // atom is at LC_X25_Y42_N8
3238 stratix_lcell \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa_cZ (
3239 // Equation(s):
3240 // \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa  = \inst|dly_counter [1] & !\inst|vga_driver_unit|d_set_vsync_counter  & \inst|dly_counter [0] & \reset~combout
3241
3242         .clk(gnd),
3243         .dataa(\inst|dly_counter [1]),
3244         .datab(\inst|vga_driver_unit|d_set_vsync_counter ),
3245         .datac(\inst|dly_counter [0]),
3246         .datad(\reset~combout ),
3247         .aclr(gnd),
3248         .aload(gnd),
3249         .sclr(gnd),
3250         .sload(gnd),
3251         .ena(vcc),
3252         .cin(gnd),
3253         .cin0(gnd),
3254         .cin1(vcc),
3255         .inverta(gnd),
3256         .regcascin(gnd),
3257         .devclrn(devclrn),
3258         .devpor(devpor),
3259         .combout(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
3260         .regout(),
3261         .cout(),
3262         .cout0(),
3263         .cout1());
3264 // synopsys translate_off
3265 defparam \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa_cZ .lut_mask = "2000";
3266 defparam \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa_cZ .operation_mode = "normal";
3267 defparam \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa_cZ .output_mode = "comb_only";
3268 defparam \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa_cZ .register_cascade_mode = "off";
3269 defparam \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa_cZ .sum_lutc_input = "datac";
3270 defparam \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa_cZ .synch_mode = "off";
3271 // synopsys translate_on
3272
3273 // atom is at LC_X24_Y41_N0
3274 stratix_lcell \inst|vga_driver_unit|vsync_state_2_ (
3275 // Equation(s):
3276 // \inst|vga_driver_unit|vsync_state_2  = DFFEAS(\inst|vga_driver_unit|vsync_counter_0  & \inst|vga_driver_unit|vsync_state_3  & \inst|vga_driver_unit|un14_vsync_counter_8  & \inst|vga_driver_unit|vsync_counter_9 , GLOBAL(\inst1|altpll_component|_clk0 ),
3277 // VCC, , \inst|vga_driver_unit|vsync_state_next_2_sqmuxa , , , \inst|vga_driver_unit|un6_dly_counter_0_x , )
3278
3279         .clk(\inst1|altpll_component|_clk0 ),
3280         .dataa(\inst|vga_driver_unit|vsync_counter_0 ),
3281         .datab(\inst|vga_driver_unit|vsync_state_3 ),
3282         .datac(\inst|vga_driver_unit|un14_vsync_counter_8 ),
3283         .datad(\inst|vga_driver_unit|vsync_counter_9 ),
3284         .aclr(gnd),
3285         .aload(gnd),
3286         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
3287         .sload(gnd),
3288         .ena(\inst|vga_driver_unit|vsync_state_next_2_sqmuxa ),
3289         .cin(gnd),
3290         .cin0(gnd),
3291         .cin1(vcc),
3292         .inverta(gnd),
3293         .regcascin(gnd),
3294         .devclrn(devclrn),
3295         .devpor(devpor),
3296         .combout(),
3297         .regout(\inst|vga_driver_unit|vsync_state_2 ),
3298         .cout(),
3299         .cout0(),
3300         .cout1());
3301 // synopsys translate_off
3302 defparam \inst|vga_driver_unit|vsync_state_2_ .lut_mask = "8000";
3303 defparam \inst|vga_driver_unit|vsync_state_2_ .operation_mode = "normal";
3304 defparam \inst|vga_driver_unit|vsync_state_2_ .output_mode = "reg_only";
3305 defparam \inst|vga_driver_unit|vsync_state_2_ .register_cascade_mode = "off";
3306 defparam \inst|vga_driver_unit|vsync_state_2_ .sum_lutc_input = "datac";
3307 defparam \inst|vga_driver_unit|vsync_state_2_ .synch_mode = "on";
3308 // synopsys translate_on
3309
3310 // atom is at LC_X24_Y41_N7
3311 stratix_lcell \inst|vga_driver_unit|un1_vsync_state_2_0_cZ (
3312 // Equation(s):
3313 // \inst|vga_driver_unit|un1_vsync_state_2_0  = \inst|vga_driver_unit|vsync_state_3  # \inst|vga_driver_unit|vsync_state_1
3314
3315         .clk(gnd),
3316         .dataa(vcc),
3317         .datab(\inst|vga_driver_unit|vsync_state_3 ),
3318         .datac(\inst|vga_driver_unit|vsync_state_1 ),
3319         .datad(vcc),
3320         .aclr(gnd),
3321         .aload(gnd),
3322         .sclr(gnd),
3323         .sload(gnd),
3324         .ena(vcc),
3325         .cin(gnd),
3326         .cin0(gnd),
3327         .cin1(vcc),
3328         .inverta(gnd),
3329         .regcascin(gnd),
3330         .devclrn(devclrn),
3331         .devpor(devpor),
3332         .combout(\inst|vga_driver_unit|un1_vsync_state_2_0 ),
3333         .regout(),
3334         .cout(),
3335         .cout0(),
3336         .cout1());
3337 // synopsys translate_off
3338 defparam \inst|vga_driver_unit|un1_vsync_state_2_0_cZ .lut_mask = "fcfc";
3339 defparam \inst|vga_driver_unit|un1_vsync_state_2_0_cZ .operation_mode = "normal";
3340 defparam \inst|vga_driver_unit|un1_vsync_state_2_0_cZ .output_mode = "comb_only";
3341 defparam \inst|vga_driver_unit|un1_vsync_state_2_0_cZ .register_cascade_mode = "off";
3342 defparam \inst|vga_driver_unit|un1_vsync_state_2_0_cZ .sum_lutc_input = "datac";
3343 defparam \inst|vga_driver_unit|un1_vsync_state_2_0_cZ .synch_mode = "off";
3344 // synopsys translate_on
3345
3346 // atom is at LC_X24_Y41_N5
3347 stratix_lcell \inst|vga_driver_unit|v_sync_1_0_0_0_g1_cZ (
3348 // Equation(s):
3349 // \inst|vga_driver_unit|v_sync_1_0_0_0_g1  = \inst|vga_driver_unit|vsync_state_2  & (\inst|vga_driver_unit|v_sync ) # !\inst|vga_driver_unit|vsync_state_2  & (\inst|vga_driver_unit|un1_vsync_state_2_0  & (\inst|vga_driver_unit|v_sync ) #
3350 // !\inst|vga_driver_unit|un1_vsync_state_2_0  & \inst|vga_driver_unit|vsync_state_4 )
3351
3352         .clk(gnd),
3353         .dataa(\inst|vga_driver_unit|vsync_state_2 ),
3354         .datab(\inst|vga_driver_unit|vsync_state_4 ),
3355         .datac(\inst|vga_driver_unit|un1_vsync_state_2_0 ),
3356         .datad(\inst|vga_driver_unit|v_sync ),
3357         .aclr(gnd),
3358         .aload(gnd),
3359         .sclr(gnd),
3360         .sload(gnd),
3361         .ena(vcc),
3362         .cin(gnd),
3363         .cin0(gnd),
3364         .cin1(vcc),
3365         .inverta(gnd),
3366         .regcascin(gnd),
3367         .devclrn(devclrn),
3368         .devpor(devpor),
3369         .combout(\inst|vga_driver_unit|v_sync_1_0_0_0_g1 ),
3370         .regout(),
3371         .cout(),
3372         .cout0(),
3373         .cout1());
3374 // synopsys translate_off
3375 defparam \inst|vga_driver_unit|v_sync_1_0_0_0_g1_cZ .lut_mask = "fe04";
3376 defparam \inst|vga_driver_unit|v_sync_1_0_0_0_g1_cZ .operation_mode = "normal";
3377 defparam \inst|vga_driver_unit|v_sync_1_0_0_0_g1_cZ .output_mode = "comb_only";
3378 defparam \inst|vga_driver_unit|v_sync_1_0_0_0_g1_cZ .register_cascade_mode = "off";
3379 defparam \inst|vga_driver_unit|v_sync_1_0_0_0_g1_cZ .sum_lutc_input = "datac";
3380 defparam \inst|vga_driver_unit|v_sync_1_0_0_0_g1_cZ .synch_mode = "off";
3381 // synopsys translate_on
3382
3383 // atom is at LC_X24_Y41_N9
3384 stratix_lcell \inst|vga_driver_unit|v_sync_Z (
3385 // Equation(s):
3386 // \inst|vga_driver_unit|v_sync  = DFFEAS(\inst|vga_driver_unit|v_sync_1_0_0_0_g1  # !\inst|dly_counter [1] # !\inst|dly_counter [0] # !\reset~combout , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
3387
3388         .clk(\inst1|altpll_component|_clk0 ),
3389         .dataa(\reset~combout ),
3390         .datab(\inst|dly_counter [0]),
3391         .datac(\inst|vga_driver_unit|v_sync_1_0_0_0_g1 ),
3392         .datad(\inst|dly_counter [1]),
3393         .aclr(gnd),
3394         .aload(gnd),
3395         .sclr(gnd),
3396         .sload(gnd),
3397         .ena(vcc),
3398         .cin(gnd),
3399         .cin0(gnd),
3400         .cin1(vcc),
3401         .inverta(gnd),
3402         .regcascin(gnd),
3403         .devclrn(devclrn),
3404         .devpor(devpor),
3405         .combout(),
3406         .regout(\inst|vga_driver_unit|v_sync ),
3407         .cout(),
3408         .cout0(),
3409         .cout1());
3410 // synopsys translate_off
3411 defparam \inst|vga_driver_unit|v_sync_Z .lut_mask = "f7ff";
3412 defparam \inst|vga_driver_unit|v_sync_Z .operation_mode = "normal";
3413 defparam \inst|vga_driver_unit|v_sync_Z .output_mode = "reg_only";
3414 defparam \inst|vga_driver_unit|v_sync_Z .register_cascade_mode = "off";
3415 defparam \inst|vga_driver_unit|v_sync_Z .sum_lutc_input = "datac";
3416 defparam \inst|vga_driver_unit|v_sync_Z .synch_mode = "off";
3417 // synopsys translate_on
3418
3419 // atom is at LC_X51_Y30_N5
3420 stratix_lcell \~STRATIX_FITTER_CREATED_GND~I (
3421 // Equation(s):
3422 // \~STRATIX_FITTER_CREATED_GND~I_combout  = GND
3423
3424         .clk(gnd),
3425         .dataa(vcc),
3426         .datab(vcc),
3427         .datac(vcc),
3428         .datad(vcc),
3429         .aclr(gnd),
3430         .aload(gnd),
3431         .sclr(gnd),
3432         .sload(gnd),
3433         .ena(vcc),
3434         .cin(gnd),
3435         .cin0(gnd),
3436         .cin1(vcc),
3437         .inverta(gnd),
3438         .regcascin(gnd),
3439         .devclrn(devclrn),
3440         .devpor(devpor),
3441         .combout(\~STRATIX_FITTER_CREATED_GND~I_combout ),
3442         .regout(),
3443         .cout(),
3444         .cout0(),
3445         .cout1());
3446 // synopsys translate_off
3447 defparam \~STRATIX_FITTER_CREATED_GND~I .lut_mask = "0000";
3448 defparam \~STRATIX_FITTER_CREATED_GND~I .operation_mode = "normal";
3449 defparam \~STRATIX_FITTER_CREATED_GND~I .output_mode = "comb_only";
3450 defparam \~STRATIX_FITTER_CREATED_GND~I .register_cascade_mode = "off";
3451 defparam \~STRATIX_FITTER_CREATED_GND~I .sum_lutc_input = "datac";
3452 defparam \~STRATIX_FITTER_CREATED_GND~I .synch_mode = "off";
3453 // synopsys translate_on
3454
3455 // atom is at LC_X25_Y42_N1
3456 stratix_lcell \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1_cZ (
3457 // Equation(s):
3458 // \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1  = \inst|dly_counter [0] & \reset~combout  & !\inst|vga_driver_unit|hsync_state_1  & \inst|dly_counter [1]
3459
3460         .clk(gnd),
3461         .dataa(\inst|dly_counter [0]),
3462         .datab(\reset~combout ),
3463         .datac(\inst|vga_driver_unit|hsync_state_1 ),
3464         .datad(\inst|dly_counter [1]),
3465         .aclr(gnd),
3466         .aload(gnd),
3467         .sclr(gnd),
3468         .sload(gnd),
3469         .ena(vcc),
3470         .cin(gnd),
3471         .cin0(gnd),
3472         .cin1(vcc),
3473         .inverta(gnd),
3474         .regcascin(gnd),
3475         .devclrn(devclrn),
3476         .devpor(devpor),
3477         .combout(\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
3478         .regout(),
3479         .cout(),
3480         .cout0(),
3481         .cout1());
3482 // synopsys translate_off
3483 defparam \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1_cZ .lut_mask = "0800";
3484 defparam \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1_cZ .operation_mode = "normal";
3485 defparam \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1_cZ .output_mode = "comb_only";
3486 defparam \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1_cZ .register_cascade_mode = "off";
3487 defparam \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1_cZ .sum_lutc_input = "datac";
3488 defparam \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1_cZ .synch_mode = "off";
3489 // synopsys translate_on
3490
3491 // atom is at LC_X48_Y32_N4
3492 stratix_lcell \inst|vga_driver_unit|column_counter_sig_0_ (
3493 // Equation(s):
3494 // \inst|vga_driver_unit|column_counter_sig_0  = DFFEAS(!\inst|vga_driver_unit|column_counter_sig_0  # !\inst|vga_driver_unit|un10_column_counter_siglto9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
3495 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
3496
3497         .clk(\inst1|altpll_component|_clk0 ),
3498         .dataa(vcc),
3499         .datab(vcc),
3500         .datac(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
3501         .datad(\inst|vga_driver_unit|column_counter_sig_0 ),
3502         .aclr(gnd),
3503         .aload(gnd),
3504         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
3505         .sload(gnd),
3506         .ena(vcc),
3507         .cin(gnd),
3508         .cin0(gnd),
3509         .cin1(vcc),
3510         .inverta(gnd),
3511         .regcascin(gnd),
3512         .devclrn(devclrn),
3513         .devpor(devpor),
3514         .combout(),
3515         .regout(\inst|vga_driver_unit|column_counter_sig_0 ),
3516         .cout(),
3517         .cout0(),
3518         .cout1());
3519 // synopsys translate_off
3520 defparam \inst|vga_driver_unit|column_counter_sig_0_ .lut_mask = "0fff";
3521 defparam \inst|vga_driver_unit|column_counter_sig_0_ .operation_mode = "normal";
3522 defparam \inst|vga_driver_unit|column_counter_sig_0_ .output_mode = "reg_only";
3523 defparam \inst|vga_driver_unit|column_counter_sig_0_ .register_cascade_mode = "off";
3524 defparam \inst|vga_driver_unit|column_counter_sig_0_ .sum_lutc_input = "datac";
3525 defparam \inst|vga_driver_unit|column_counter_sig_0_ .synch_mode = "on";
3526 // synopsys translate_on
3527
3528 // atom is at LC_X48_Y33_N0
3529 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_1_ (
3530 // Equation(s):
3531 // \inst|vga_driver_unit|un2_column_counter_next_combout [1] = \inst|vga_driver_unit|column_counter_sig_0  $ \inst|vga_driver_unit|column_counter_sig_1
3532 // \inst|vga_driver_unit|un2_column_counter_next_cout [1] = CARRY(\inst|vga_driver_unit|column_counter_sig_0  & \inst|vga_driver_unit|column_counter_sig_1 )
3533 // \inst|vga_driver_unit|un2_column_counter_next_cout[1]~COUT1_10  = CARRY(\inst|vga_driver_unit|column_counter_sig_0  & \inst|vga_driver_unit|column_counter_sig_1 )
3534
3535         .clk(gnd),
3536         .dataa(\inst|vga_driver_unit|column_counter_sig_0 ),
3537         .datab(\inst|vga_driver_unit|column_counter_sig_1 ),
3538         .datac(vcc),
3539         .datad(vcc),
3540         .aclr(gnd),
3541         .aload(gnd),
3542         .sclr(gnd),
3543         .sload(gnd),
3544         .ena(vcc),
3545         .cin(gnd),
3546         .cin0(gnd),
3547         .cin1(vcc),
3548         .inverta(gnd),
3549         .regcascin(gnd),
3550         .devclrn(devclrn),
3551         .devpor(devpor),
3552         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [1]),
3553         .regout(),
3554         .cout(),
3555         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [1]),
3556         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[1]~COUT1_10 ));
3557 // synopsys translate_off
3558 defparam \inst|vga_driver_unit|un2_column_counter_next_1_ .lut_mask = "6688";
3559 defparam \inst|vga_driver_unit|un2_column_counter_next_1_ .operation_mode = "arithmetic";
3560 defparam \inst|vga_driver_unit|un2_column_counter_next_1_ .output_mode = "comb_only";
3561 defparam \inst|vga_driver_unit|un2_column_counter_next_1_ .register_cascade_mode = "off";
3562 defparam \inst|vga_driver_unit|un2_column_counter_next_1_ .sum_lutc_input = "datac";
3563 defparam \inst|vga_driver_unit|un2_column_counter_next_1_ .synch_mode = "off";
3564 // synopsys translate_on
3565
3566 // atom is at LC_X48_Y33_N5
3567 stratix_lcell \inst|vga_driver_unit|column_counter_sig_1_ (
3568 // Equation(s):
3569 // \inst|vga_driver_unit|column_counter_sig_1  = DFFEAS(\inst|vga_driver_unit|un2_column_counter_next_combout [1] # !\inst|vga_driver_unit|un10_column_counter_siglto9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
3570 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
3571
3572         .clk(\inst1|altpll_component|_clk0 ),
3573         .dataa(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
3574         .datab(vcc),
3575         .datac(vcc),
3576         .datad(\inst|vga_driver_unit|un2_column_counter_next_combout [1]),
3577         .aclr(gnd),
3578         .aload(gnd),
3579         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
3580         .sload(gnd),
3581         .ena(vcc),
3582         .cin(gnd),
3583         .cin0(gnd),
3584         .cin1(vcc),
3585         .inverta(gnd),
3586         .regcascin(gnd),
3587         .devclrn(devclrn),
3588         .devpor(devpor),
3589         .combout(),
3590         .regout(\inst|vga_driver_unit|column_counter_sig_1 ),
3591         .cout(),
3592         .cout0(),
3593         .cout1());
3594 // synopsys translate_off
3595 defparam \inst|vga_driver_unit|column_counter_sig_1_ .lut_mask = "ff55";
3596 defparam \inst|vga_driver_unit|column_counter_sig_1_ .operation_mode = "normal";
3597 defparam \inst|vga_driver_unit|column_counter_sig_1_ .output_mode = "reg_only";
3598 defparam \inst|vga_driver_unit|column_counter_sig_1_ .register_cascade_mode = "off";
3599 defparam \inst|vga_driver_unit|column_counter_sig_1_ .sum_lutc_input = "datac";
3600 defparam \inst|vga_driver_unit|column_counter_sig_1_ .synch_mode = "on";
3601 // synopsys translate_on
3602
3603 // atom is at LC_X48_Y33_N1
3604 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_3_ (
3605 // Equation(s):
3606 // \inst|vga_driver_unit|un2_column_counter_next_combout [3] = \inst|vga_driver_unit|column_counter_sig_3  $ (\inst|vga_driver_unit|column_counter_sig_2  & \inst|vga_driver_unit|un2_column_counter_next_cout [1])
3607 // \inst|vga_driver_unit|un2_column_counter_next_cout [3] = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout [1] # !\inst|vga_driver_unit|column_counter_sig_3  # !\inst|vga_driver_unit|column_counter_sig_2 )
3608 // \inst|vga_driver_unit|un2_column_counter_next_cout[3]~COUT1_12  = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout[1]~COUT1_10  # !\inst|vga_driver_unit|column_counter_sig_3  # !\inst|vga_driver_unit|column_counter_sig_2 )
3609
3610         .clk(gnd),
3611         .dataa(\inst|vga_driver_unit|column_counter_sig_2 ),
3612         .datab(\inst|vga_driver_unit|column_counter_sig_3 ),
3613         .datac(vcc),
3614         .datad(vcc),
3615         .aclr(gnd),
3616         .aload(gnd),
3617         .sclr(gnd),
3618         .sload(gnd),
3619         .ena(vcc),
3620         .cin(gnd),
3621         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [1]),
3622         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[1]~COUT1_10 ),
3623         .inverta(gnd),
3624         .regcascin(gnd),
3625         .devclrn(devclrn),
3626         .devpor(devpor),
3627         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [3]),
3628         .regout(),
3629         .cout(),
3630         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [3]),
3631         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[3]~COUT1_12 ));
3632 // synopsys translate_off
3633 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .cin0_used = "true";
3634 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .cin1_used = "true";
3635 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .lut_mask = "6c7f";
3636 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .operation_mode = "arithmetic";
3637 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .output_mode = "comb_only";
3638 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .register_cascade_mode = "off";
3639 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .sum_lutc_input = "cin";
3640 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .synch_mode = "off";
3641 // synopsys translate_on
3642
3643 // atom is at LC_X48_Y32_N2
3644 stratix_lcell \inst|vga_driver_unit|column_counter_sig_3_ (
3645 // Equation(s):
3646 // \inst|vga_driver_unit|column_counter_sig_3  = DFFEAS(\inst|vga_driver_unit|un2_column_counter_next_combout [3] # !\inst|vga_driver_unit|un10_column_counter_siglto9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
3647 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
3648
3649         .clk(\inst1|altpll_component|_clk0 ),
3650         .dataa(vcc),
3651         .datab(vcc),
3652         .datac(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
3653         .datad(\inst|vga_driver_unit|un2_column_counter_next_combout [3]),
3654         .aclr(gnd),
3655         .aload(gnd),
3656         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
3657         .sload(gnd),
3658         .ena(vcc),
3659         .cin(gnd),
3660         .cin0(gnd),
3661         .cin1(vcc),
3662         .inverta(gnd),
3663         .regcascin(gnd),
3664         .devclrn(devclrn),
3665         .devpor(devpor),
3666         .combout(),
3667         .regout(\inst|vga_driver_unit|column_counter_sig_3 ),
3668         .cout(),
3669         .cout0(),
3670         .cout1());
3671 // synopsys translate_off
3672 defparam \inst|vga_driver_unit|column_counter_sig_3_ .lut_mask = "ff0f";
3673 defparam \inst|vga_driver_unit|column_counter_sig_3_ .operation_mode = "normal";
3674 defparam \inst|vga_driver_unit|column_counter_sig_3_ .output_mode = "reg_only";
3675 defparam \inst|vga_driver_unit|column_counter_sig_3_ .register_cascade_mode = "off";
3676 defparam \inst|vga_driver_unit|column_counter_sig_3_ .sum_lutc_input = "datac";
3677 defparam \inst|vga_driver_unit|column_counter_sig_3_ .synch_mode = "on";
3678 // synopsys translate_on
3679
3680 // atom is at LC_X49_Y32_N0
3681 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_0_ (
3682 // Equation(s):
3683 // \inst|vga_driver_unit|un2_column_counter_next_cout [0] = CARRY(\inst|vga_driver_unit|column_counter_sig_0  & \inst|vga_driver_unit|column_counter_sig_1 )
3684 // \inst|vga_driver_unit|un2_column_counter_next_cout[0]~COUT1_18  = CARRY(\inst|vga_driver_unit|column_counter_sig_0  & \inst|vga_driver_unit|column_counter_sig_1 )
3685
3686         .clk(gnd),
3687         .dataa(\inst|vga_driver_unit|column_counter_sig_0 ),
3688         .datab(\inst|vga_driver_unit|column_counter_sig_1 ),
3689         .datac(vcc),
3690         .datad(vcc),
3691         .aclr(gnd),
3692         .aload(gnd),
3693         .sclr(gnd),
3694         .sload(gnd),
3695         .ena(vcc),
3696         .cin(gnd),
3697         .cin0(gnd),
3698         .cin1(vcc),
3699         .inverta(gnd),
3700         .regcascin(gnd),
3701         .devclrn(devclrn),
3702         .devpor(devpor),
3703         .combout(\inst|vga_driver_unit|un2_column_counter_next_0_~COMBOUT ),
3704         .regout(),
3705         .cout(),
3706         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [0]),
3707         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[0]~COUT1_18 ));
3708 // synopsys translate_off
3709 defparam \inst|vga_driver_unit|un2_column_counter_next_0_ .lut_mask = "ff88";
3710 defparam \inst|vga_driver_unit|un2_column_counter_next_0_ .operation_mode = "arithmetic";
3711 defparam \inst|vga_driver_unit|un2_column_counter_next_0_ .output_mode = "none";
3712 defparam \inst|vga_driver_unit|un2_column_counter_next_0_ .register_cascade_mode = "off";
3713 defparam \inst|vga_driver_unit|un2_column_counter_next_0_ .sum_lutc_input = "datac";
3714 defparam \inst|vga_driver_unit|un2_column_counter_next_0_ .synch_mode = "off";
3715 // synopsys translate_on
3716
3717 // atom is at LC_X49_Y32_N1
3718 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_2_ (
3719 // Equation(s):
3720 // \inst|vga_driver_unit|un2_column_counter_next_combout [2] = \inst|vga_driver_unit|column_counter_sig_2  $ (\inst|vga_driver_unit|un2_column_counter_next_cout [0])
3721 // \inst|vga_driver_unit|un2_column_counter_next_cout [2] = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout [0] # !\inst|vga_driver_unit|column_counter_sig_3  # !\inst|vga_driver_unit|column_counter_sig_2 )
3722 // \inst|vga_driver_unit|un2_column_counter_next_cout[2]~COUT1_20  = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout[0]~COUT1_18  # !\inst|vga_driver_unit|column_counter_sig_3  # !\inst|vga_driver_unit|column_counter_sig_2 )
3723
3724         .clk(gnd),
3725         .dataa(\inst|vga_driver_unit|column_counter_sig_2 ),
3726         .datab(\inst|vga_driver_unit|column_counter_sig_3 ),
3727         .datac(vcc),
3728         .datad(vcc),
3729         .aclr(gnd),
3730         .aload(gnd),
3731         .sclr(gnd),
3732         .sload(gnd),
3733         .ena(vcc),
3734         .cin(gnd),
3735         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [0]),
3736         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[0]~COUT1_18 ),
3737         .inverta(gnd),
3738         .regcascin(gnd),
3739         .devclrn(devclrn),
3740         .devpor(devpor),
3741         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [2]),
3742         .regout(),
3743         .cout(),
3744         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [2]),
3745         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[2]~COUT1_20 ));
3746 // synopsys translate_off
3747 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .cin0_used = "true";
3748 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .cin1_used = "true";
3749 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .lut_mask = "5a7f";
3750 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .operation_mode = "arithmetic";
3751 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .output_mode = "comb_only";
3752 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .register_cascade_mode = "off";
3753 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .sum_lutc_input = "cin";
3754 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .synch_mode = "off";
3755 // synopsys translate_on
3756
3757 // atom is at LC_X49_Y32_N2
3758 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_4_ (
3759 // Equation(s):
3760 // \inst|vga_driver_unit|un2_column_counter_next_combout [4] = \inst|vga_driver_unit|column_counter_sig_4  $ !\inst|vga_driver_unit|un2_column_counter_next_cout [2]
3761 // \inst|vga_driver_unit|un2_column_counter_next_cout [4] = CARRY(\inst|vga_driver_unit|column_counter_sig_5  & \inst|vga_driver_unit|column_counter_sig_4  & !\inst|vga_driver_unit|un2_column_counter_next_cout [2])
3762 // \inst|vga_driver_unit|un2_column_counter_next_cout[4]~COUT1_22  = CARRY(\inst|vga_driver_unit|column_counter_sig_5  & \inst|vga_driver_unit|column_counter_sig_4  & !\inst|vga_driver_unit|un2_column_counter_next_cout[2]~COUT1_20 )
3763
3764         .clk(gnd),
3765         .dataa(\inst|vga_driver_unit|column_counter_sig_5 ),
3766         .datab(\inst|vga_driver_unit|column_counter_sig_4 ),
3767         .datac(vcc),
3768         .datad(vcc),
3769         .aclr(gnd),
3770         .aload(gnd),
3771         .sclr(gnd),
3772         .sload(gnd),
3773         .ena(vcc),
3774         .cin(gnd),
3775         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [2]),
3776         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[2]~COUT1_20 ),
3777         .inverta(gnd),
3778         .regcascin(gnd),
3779         .devclrn(devclrn),
3780         .devpor(devpor),
3781         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [4]),
3782         .regout(),
3783         .cout(),
3784         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [4]),
3785         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[4]~COUT1_22 ));
3786 // synopsys translate_off
3787 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .cin0_used = "true";
3788 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .cin1_used = "true";
3789 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .lut_mask = "c308";
3790 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .operation_mode = "arithmetic";
3791 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .output_mode = "comb_only";
3792 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .register_cascade_mode = "off";
3793 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .sum_lutc_input = "cin";
3794 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .synch_mode = "off";
3795 // synopsys translate_on
3796
3797 // atom is at LC_X48_Y32_N8
3798 stratix_lcell \inst|vga_driver_unit|column_counter_sig_4_ (
3799 // Equation(s):
3800 // \inst|vga_driver_unit|column_counter_sig_4  = DFFEAS(\inst|vga_driver_unit|un2_column_counter_next_combout [4] # !\inst|vga_driver_unit|un10_column_counter_siglto9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
3801 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
3802
3803         .clk(\inst1|altpll_component|_clk0 ),
3804         .dataa(vcc),
3805         .datab(vcc),
3806         .datac(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
3807         .datad(\inst|vga_driver_unit|un2_column_counter_next_combout [4]),
3808         .aclr(gnd),
3809         .aload(gnd),
3810         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
3811         .sload(gnd),
3812         .ena(vcc),
3813         .cin(gnd),
3814         .cin0(gnd),
3815         .cin1(vcc),
3816         .inverta(gnd),
3817         .regcascin(gnd),
3818         .devclrn(devclrn),
3819         .devpor(devpor),
3820         .combout(),
3821         .regout(\inst|vga_driver_unit|column_counter_sig_4 ),
3822         .cout(),
3823         .cout0(),
3824         .cout1());
3825 // synopsys translate_off
3826 defparam \inst|vga_driver_unit|column_counter_sig_4_ .lut_mask = "ff0f";
3827 defparam \inst|vga_driver_unit|column_counter_sig_4_ .operation_mode = "normal";
3828 defparam \inst|vga_driver_unit|column_counter_sig_4_ .output_mode = "reg_only";
3829 defparam \inst|vga_driver_unit|column_counter_sig_4_ .register_cascade_mode = "off";
3830 defparam \inst|vga_driver_unit|column_counter_sig_4_ .sum_lutc_input = "datac";
3831 defparam \inst|vga_driver_unit|column_counter_sig_4_ .synch_mode = "on";
3832 // synopsys translate_on
3833
3834 // atom is at LC_X48_Y33_N2
3835 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_5_ (
3836 // Equation(s):
3837 // \inst|vga_driver_unit|un2_column_counter_next_combout [5] = \inst|vga_driver_unit|column_counter_sig_5  $ (\inst|vga_driver_unit|column_counter_sig_4  & !\inst|vga_driver_unit|un2_column_counter_next_cout [3])
3838 // \inst|vga_driver_unit|un2_column_counter_next_cout [5] = CARRY(\inst|vga_driver_unit|column_counter_sig_5  & \inst|vga_driver_unit|column_counter_sig_4  & !\inst|vga_driver_unit|un2_column_counter_next_cout [3])
3839 // \inst|vga_driver_unit|un2_column_counter_next_cout[5]~COUT1_14  = CARRY(\inst|vga_driver_unit|column_counter_sig_5  & \inst|vga_driver_unit|column_counter_sig_4  & !\inst|vga_driver_unit|un2_column_counter_next_cout[3]~COUT1_12 )
3840
3841         .clk(gnd),
3842         .dataa(\inst|vga_driver_unit|column_counter_sig_5 ),
3843         .datab(\inst|vga_driver_unit|column_counter_sig_4 ),
3844         .datac(vcc),
3845         .datad(vcc),
3846         .aclr(gnd),
3847         .aload(gnd),
3848         .sclr(gnd),
3849         .sload(gnd),
3850         .ena(vcc),
3851         .cin(gnd),
3852         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [3]),
3853         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[3]~COUT1_12 ),
3854         .inverta(gnd),
3855         .regcascin(gnd),
3856         .devclrn(devclrn),
3857         .devpor(devpor),
3858         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [5]),
3859         .regout(),
3860         .cout(),
3861         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [5]),
3862         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[5]~COUT1_14 ));
3863 // synopsys translate_off
3864 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .cin0_used = "true";
3865 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .cin1_used = "true";
3866 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .lut_mask = "a608";
3867 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .operation_mode = "arithmetic";
3868 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .output_mode = "comb_only";
3869 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .register_cascade_mode = "off";
3870 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .sum_lutc_input = "cin";
3871 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .synch_mode = "off";
3872 // synopsys translate_on
3873
3874 // atom is at LC_X48_Y32_N9
3875 stratix_lcell \inst|vga_driver_unit|column_counter_sig_5_ (
3876 // Equation(s):
3877 // \inst|vga_driver_unit|column_counter_sig_5  = DFFEAS(\inst|vga_driver_unit|un2_column_counter_next_combout [5] # !\inst|vga_driver_unit|un10_column_counter_siglto9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
3878 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
3879
3880         .clk(\inst1|altpll_component|_clk0 ),
3881         .dataa(vcc),
3882         .datab(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
3883         .datac(\inst|vga_driver_unit|un2_column_counter_next_combout [5]),
3884         .datad(vcc),
3885         .aclr(gnd),
3886         .aload(gnd),
3887         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
3888         .sload(gnd),
3889         .ena(vcc),
3890         .cin(gnd),
3891         .cin0(gnd),
3892         .cin1(vcc),
3893         .inverta(gnd),
3894         .regcascin(gnd),
3895         .devclrn(devclrn),
3896         .devpor(devpor),
3897         .combout(),
3898         .regout(\inst|vga_driver_unit|column_counter_sig_5 ),
3899         .cout(),
3900         .cout0(),
3901         .cout1());
3902 // synopsys translate_off
3903 defparam \inst|vga_driver_unit|column_counter_sig_5_ .lut_mask = "f3f3";
3904 defparam \inst|vga_driver_unit|column_counter_sig_5_ .operation_mode = "normal";
3905 defparam \inst|vga_driver_unit|column_counter_sig_5_ .output_mode = "reg_only";
3906 defparam \inst|vga_driver_unit|column_counter_sig_5_ .register_cascade_mode = "off";
3907 defparam \inst|vga_driver_unit|column_counter_sig_5_ .sum_lutc_input = "datac";
3908 defparam \inst|vga_driver_unit|column_counter_sig_5_ .synch_mode = "on";
3909 // synopsys translate_on
3910
3911 // atom is at LC_X49_Y32_N3
3912 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_6_ (
3913 // Equation(s):
3914 // \inst|vga_driver_unit|un2_column_counter_next_combout [6] = \inst|vga_driver_unit|column_counter_sig_6  $ \inst|vga_driver_unit|un2_column_counter_next_cout [4]
3915 // \inst|vga_driver_unit|un2_column_counter_next_cout [6] = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout [4] # !\inst|vga_driver_unit|column_counter_sig_6  # !\inst|vga_driver_unit|column_counter_sig_7 )
3916 // \inst|vga_driver_unit|un2_column_counter_next_cout[6]~COUT1_24  = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout[4]~COUT1_22  # !\inst|vga_driver_unit|column_counter_sig_6  # !\inst|vga_driver_unit|column_counter_sig_7 )
3917
3918         .clk(gnd),
3919         .dataa(\inst|vga_driver_unit|column_counter_sig_7 ),
3920         .datab(\inst|vga_driver_unit|column_counter_sig_6 ),
3921         .datac(vcc),
3922         .datad(vcc),
3923         .aclr(gnd),
3924         .aload(gnd),
3925         .sclr(gnd),
3926         .sload(gnd),
3927         .ena(vcc),
3928         .cin(gnd),
3929         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [4]),
3930         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[4]~COUT1_22 ),
3931         .inverta(gnd),
3932         .regcascin(gnd),
3933         .devclrn(devclrn),
3934         .devpor(devpor),
3935         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [6]),
3936         .regout(),
3937         .cout(),
3938         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [6]),
3939         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[6]~COUT1_24 ));
3940 // synopsys translate_off
3941 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .cin0_used = "true";
3942 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .cin1_used = "true";
3943 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .lut_mask = "3c7f";
3944 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .operation_mode = "arithmetic";
3945 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .output_mode = "comb_only";
3946 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .register_cascade_mode = "off";
3947 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .sum_lutc_input = "cin";
3948 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .synch_mode = "off";
3949 // synopsys translate_on
3950
3951 // atom is at LC_X48_Y32_N6
3952 stratix_lcell \inst|vga_driver_unit|column_counter_sig_6_ (
3953 // Equation(s):
3954 // \inst|vga_driver_unit|column_counter_sig_6  = DFFEAS(\inst|vga_driver_unit|un2_column_counter_next_combout [6] # !\inst|vga_driver_unit|un10_column_counter_siglto9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
3955 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
3956
3957         .clk(\inst1|altpll_component|_clk0 ),
3958         .dataa(vcc),
3959         .datab(vcc),
3960         .datac(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
3961         .datad(\inst|vga_driver_unit|un2_column_counter_next_combout [6]),
3962         .aclr(gnd),
3963         .aload(gnd),
3964         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
3965         .sload(gnd),
3966         .ena(vcc),
3967         .cin(gnd),
3968         .cin0(gnd),
3969         .cin1(vcc),
3970         .inverta(gnd),
3971         .regcascin(gnd),
3972         .devclrn(devclrn),
3973         .devpor(devpor),
3974         .combout(),
3975         .regout(\inst|vga_driver_unit|column_counter_sig_6 ),
3976         .cout(),
3977         .cout0(),
3978         .cout1());
3979 // synopsys translate_off
3980 defparam \inst|vga_driver_unit|column_counter_sig_6_ .lut_mask = "ff0f";
3981 defparam \inst|vga_driver_unit|column_counter_sig_6_ .operation_mode = "normal";
3982 defparam \inst|vga_driver_unit|column_counter_sig_6_ .output_mode = "reg_only";
3983 defparam \inst|vga_driver_unit|column_counter_sig_6_ .register_cascade_mode = "off";
3984 defparam \inst|vga_driver_unit|column_counter_sig_6_ .sum_lutc_input = "datac";
3985 defparam \inst|vga_driver_unit|column_counter_sig_6_ .synch_mode = "on";
3986 // synopsys translate_on
3987
3988 // atom is at LC_X48_Y33_N3
3989 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_7_ (
3990 // Equation(s):
3991 // \inst|vga_driver_unit|un2_column_counter_next_combout [7] = \inst|vga_driver_unit|column_counter_sig_7  $ (\inst|vga_driver_unit|column_counter_sig_6  & \inst|vga_driver_unit|un2_column_counter_next_cout [5])
3992 // \inst|vga_driver_unit|un2_column_counter_next_cout [7] = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout [5] # !\inst|vga_driver_unit|column_counter_sig_7  # !\inst|vga_driver_unit|column_counter_sig_6 )
3993 // \inst|vga_driver_unit|un2_column_counter_next_cout[7]~COUT1_16  = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout[5]~COUT1_14  # !\inst|vga_driver_unit|column_counter_sig_7  # !\inst|vga_driver_unit|column_counter_sig_6 )
3994
3995         .clk(gnd),
3996         .dataa(\inst|vga_driver_unit|column_counter_sig_6 ),
3997         .datab(\inst|vga_driver_unit|column_counter_sig_7 ),
3998         .datac(vcc),
3999         .datad(vcc),
4000         .aclr(gnd),
4001         .aload(gnd),
4002         .sclr(gnd),
4003         .sload(gnd),
4004         .ena(vcc),
4005         .cin(gnd),
4006         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [5]),
4007         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[5]~COUT1_14 ),
4008         .inverta(gnd),
4009         .regcascin(gnd),
4010         .devclrn(devclrn),
4011         .devpor(devpor),
4012         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [7]),
4013         .regout(),
4014         .cout(),
4015         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [7]),
4016         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[7]~COUT1_16 ));
4017 // synopsys translate_off
4018 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .cin0_used = "true";
4019 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .cin1_used = "true";
4020 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .lut_mask = "6c7f";
4021 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .operation_mode = "arithmetic";
4022 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .output_mode = "comb_only";
4023 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .register_cascade_mode = "off";
4024 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .sum_lutc_input = "cin";
4025 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .synch_mode = "off";
4026 // synopsys translate_on
4027
4028 // atom is at LC_X48_Y33_N8
4029 stratix_lcell \inst|vga_driver_unit|column_counter_sig_7_ (
4030 // Equation(s):
4031 // \inst|vga_driver_unit|column_counter_sig_7  = DFFEAS(\inst|vga_driver_unit|un2_column_counter_next_combout [7] & (\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1  & \inst|vga_driver_unit|un10_column_counter_siglto9 ),
4032 // GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
4033
4034         .clk(\inst1|altpll_component|_clk0 ),
4035         .dataa(\inst|vga_driver_unit|un2_column_counter_next_combout [7]),
4036         .datab(vcc),
4037         .datac(\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
4038         .datad(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
4039         .aclr(gnd),
4040         .aload(gnd),
4041         .sclr(gnd),
4042         .sload(gnd),
4043         .ena(vcc),
4044         .cin(gnd),
4045         .cin0(gnd),
4046         .cin1(vcc),
4047         .inverta(gnd),
4048         .regcascin(gnd),
4049         .devclrn(devclrn),
4050         .devpor(devpor),
4051         .combout(),
4052         .regout(\inst|vga_driver_unit|column_counter_sig_7 ),
4053         .cout(),
4054         .cout0(),
4055         .cout1());
4056 // synopsys translate_off
4057 defparam \inst|vga_driver_unit|column_counter_sig_7_ .lut_mask = "a000";
4058 defparam \inst|vga_driver_unit|column_counter_sig_7_ .operation_mode = "normal";
4059 defparam \inst|vga_driver_unit|column_counter_sig_7_ .output_mode = "reg_only";
4060 defparam \inst|vga_driver_unit|column_counter_sig_7_ .register_cascade_mode = "off";
4061 defparam \inst|vga_driver_unit|column_counter_sig_7_ .sum_lutc_input = "datac";
4062 defparam \inst|vga_driver_unit|column_counter_sig_7_ .synch_mode = "off";
4063 // synopsys translate_on
4064
4065 // atom is at LC_X49_Y32_N4
4066 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_8_ (
4067 // Equation(s):
4068 // \inst|vga_driver_unit|un2_column_counter_next_combout [8] = \inst|vga_driver_unit|column_counter_sig_8  $ !\inst|vga_driver_unit|un2_column_counter_next_cout [6]
4069
4070         .clk(gnd),
4071         .dataa(vcc),
4072         .datab(\inst|vga_driver_unit|column_counter_sig_8 ),
4073         .datac(vcc),
4074         .datad(vcc),
4075         .aclr(gnd),
4076         .aload(gnd),
4077         .sclr(gnd),
4078         .sload(gnd),
4079         .ena(vcc),
4080         .cin(gnd),
4081         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [6]),
4082         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[6]~COUT1_24 ),
4083         .inverta(gnd),
4084         .regcascin(gnd),
4085         .devclrn(devclrn),
4086         .devpor(devpor),
4087         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [8]),
4088         .regout(),
4089         .cout(),
4090         .cout0(),
4091         .cout1());
4092 // synopsys translate_off
4093 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .cin0_used = "true";
4094 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .cin1_used = "true";
4095 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .lut_mask = "c3c3";
4096 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .operation_mode = "normal";
4097 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .output_mode = "comb_only";
4098 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .register_cascade_mode = "off";
4099 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .sum_lutc_input = "cin";
4100 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .synch_mode = "off";
4101 // synopsys translate_on
4102
4103 // atom is at LC_X48_Y33_N7
4104 stratix_lcell \inst|vga_driver_unit|column_counter_sig_8_ (
4105 // Equation(s):
4106 // \inst|vga_driver_unit|column_counter_sig_8  = DFFEAS(\inst|vga_driver_unit|un10_column_counter_siglto9  & (\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1  & \inst|vga_driver_unit|un2_column_counter_next_combout [8]),
4107 // GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
4108
4109         .clk(\inst1|altpll_component|_clk0 ),
4110         .dataa(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
4111         .datab(vcc),
4112         .datac(\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
4113         .datad(\inst|vga_driver_unit|un2_column_counter_next_combout [8]),
4114         .aclr(gnd),
4115         .aload(gnd),
4116         .sclr(gnd),
4117         .sload(gnd),
4118         .ena(vcc),
4119         .cin(gnd),
4120         .cin0(gnd),
4121         .cin1(vcc),
4122         .inverta(gnd),
4123         .regcascin(gnd),
4124         .devclrn(devclrn),
4125         .devpor(devpor),
4126         .combout(),
4127         .regout(\inst|vga_driver_unit|column_counter_sig_8 ),
4128         .cout(),
4129         .cout0(),
4130         .cout1());
4131 // synopsys translate_off
4132 defparam \inst|vga_driver_unit|column_counter_sig_8_ .lut_mask = "a000";
4133 defparam \inst|vga_driver_unit|column_counter_sig_8_ .operation_mode = "normal";
4134 defparam \inst|vga_driver_unit|column_counter_sig_8_ .output_mode = "reg_only";
4135 defparam \inst|vga_driver_unit|column_counter_sig_8_ .register_cascade_mode = "off";
4136 defparam \inst|vga_driver_unit|column_counter_sig_8_ .sum_lutc_input = "datac";
4137 defparam \inst|vga_driver_unit|column_counter_sig_8_ .synch_mode = "off";
4138 // synopsys translate_on
4139
4140 // atom is at LC_X48_Y33_N4
4141 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_9_ (
4142 // Equation(s):
4143 // \inst|vga_driver_unit|un2_column_counter_next_combout [9] = \inst|vga_driver_unit|column_counter_sig_9  $ (\inst|vga_driver_unit|column_counter_sig_8  & !\inst|vga_driver_unit|un2_column_counter_next_cout [7])
4144
4145         .clk(gnd),
4146         .dataa(\inst|vga_driver_unit|column_counter_sig_8 ),
4147         .datab(vcc),
4148         .datac(vcc),
4149         .datad(\inst|vga_driver_unit|column_counter_sig_9 ),
4150         .aclr(gnd),
4151         .aload(gnd),
4152         .sclr(gnd),
4153         .sload(gnd),
4154         .ena(vcc),
4155         .cin(gnd),
4156         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [7]),
4157         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[7]~COUT1_16 ),
4158         .inverta(gnd),
4159         .regcascin(gnd),
4160         .devclrn(devclrn),
4161         .devpor(devpor),
4162         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [9]),
4163         .regout(),
4164         .cout(),
4165         .cout0(),
4166         .cout1());
4167 // synopsys translate_off
4168 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .cin0_used = "true";
4169 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .cin1_used = "true";
4170 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .lut_mask = "f50a";
4171 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .operation_mode = "normal";
4172 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .output_mode = "comb_only";
4173 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .register_cascade_mode = "off";
4174 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .sum_lutc_input = "cin";
4175 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .synch_mode = "off";
4176 // synopsys translate_on
4177
4178 // atom is at LC_X48_Y33_N9
4179 stratix_lcell \inst|vga_driver_unit|column_counter_sig_9_ (
4180 // Equation(s):
4181 // \inst|vga_driver_unit|column_counter_sig_9  = DFFEAS(\inst|vga_driver_unit|un2_column_counter_next_combout [9] # !\inst|vga_driver_unit|un10_column_counter_siglto9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
4182 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
4183
4184         .clk(\inst1|altpll_component|_clk0 ),
4185         .dataa(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
4186         .datab(vcc),
4187         .datac(vcc),
4188         .datad(\inst|vga_driver_unit|un2_column_counter_next_combout [9]),
4189         .aclr(gnd),
4190         .aload(gnd),
4191         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
4192         .sload(gnd),
4193         .ena(vcc),
4194         .cin(gnd),
4195         .cin0(gnd),
4196         .cin1(vcc),
4197         .inverta(gnd),
4198         .regcascin(gnd),
4199         .devclrn(devclrn),
4200         .devpor(devpor),
4201         .combout(),
4202         .regout(\inst|vga_driver_unit|column_counter_sig_9 ),
4203         .cout(),
4204         .cout0(),
4205         .cout1());
4206 // synopsys translate_off
4207 defparam \inst|vga_driver_unit|column_counter_sig_9_ .lut_mask = "ff55";
4208 defparam \inst|vga_driver_unit|column_counter_sig_9_ .operation_mode = "normal";
4209 defparam \inst|vga_driver_unit|column_counter_sig_9_ .output_mode = "reg_only";
4210 defparam \inst|vga_driver_unit|column_counter_sig_9_ .register_cascade_mode = "off";
4211 defparam \inst|vga_driver_unit|column_counter_sig_9_ .sum_lutc_input = "datac";
4212 defparam \inst|vga_driver_unit|column_counter_sig_9_ .synch_mode = "on";
4213 // synopsys translate_on
4214
4215 // atom is at LC_X48_Y32_N0
4216 stratix_lcell \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_2 (
4217 // Equation(s):
4218 // \inst|vga_driver_unit|un10_column_counter_siglt6_2  = !\inst|vga_driver_unit|column_counter_sig_3  # !\inst|vga_driver_unit|column_counter_sig_4  # !\inst|vga_driver_unit|column_counter_sig_2
4219
4220         .clk(gnd),
4221         .dataa(\inst|vga_driver_unit|column_counter_sig_2 ),
4222         .datab(vcc),
4223         .datac(\inst|vga_driver_unit|column_counter_sig_4 ),
4224         .datad(\inst|vga_driver_unit|column_counter_sig_3 ),
4225         .aclr(gnd),
4226         .aload(gnd),
4227         .sclr(gnd),
4228         .sload(gnd),
4229         .ena(vcc),
4230         .cin(gnd),
4231         .cin0(gnd),
4232         .cin1(vcc),
4233         .inverta(gnd),
4234         .regcascin(gnd),
4235         .devclrn(devclrn),
4236         .devpor(devpor),
4237         .combout(\inst|vga_driver_unit|un10_column_counter_siglt6_2 ),
4238         .regout(),
4239         .cout(),
4240         .cout0(),
4241         .cout1());
4242 // synopsys translate_off
4243 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_2 .lut_mask = "5fff";
4244 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_2 .operation_mode = "normal";
4245 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_2 .output_mode = "comb_only";
4246 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_2 .register_cascade_mode = "off";
4247 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_2 .sum_lutc_input = "datac";
4248 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_2 .synch_mode = "off";
4249 // synopsys translate_on
4250
4251 // atom is at LC_X48_Y32_N3
4252 stratix_lcell \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_1 (
4253 // Equation(s):
4254 // \inst|vga_driver_unit|un10_column_counter_siglt6_1  = !\inst|vga_driver_unit|column_counter_sig_6  # !\inst|vga_driver_unit|column_counter_sig_5
4255
4256         .clk(gnd),
4257         .dataa(vcc),
4258         .datab(\inst|vga_driver_unit|column_counter_sig_5 ),
4259         .datac(vcc),
4260         .datad(\inst|vga_driver_unit|column_counter_sig_6 ),
4261         .aclr(gnd),
4262         .aload(gnd),
4263         .sclr(gnd),
4264         .sload(gnd),
4265         .ena(vcc),
4266         .cin(gnd),
4267         .cin0(gnd),
4268         .cin1(vcc),
4269         .inverta(gnd),
4270         .regcascin(gnd),
4271         .devclrn(devclrn),
4272         .devpor(devpor),
4273         .combout(\inst|vga_driver_unit|un10_column_counter_siglt6_1 ),
4274         .regout(),
4275         .cout(),
4276         .cout0(),
4277         .cout1());
4278 // synopsys translate_off
4279 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_1 .lut_mask = "33ff";
4280 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_1 .operation_mode = "normal";
4281 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_1 .output_mode = "comb_only";
4282 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_1 .register_cascade_mode = "off";
4283 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_1 .sum_lutc_input = "datac";
4284 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_1 .synch_mode = "off";
4285 // synopsys translate_on
4286
4287 // atom is at LC_X48_Y32_N7
4288 stratix_lcell \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6 (
4289 // Equation(s):
4290 // \inst|vga_driver_unit|un10_column_counter_siglt6  = \inst|vga_driver_unit|un10_column_counter_siglt6_2  # \inst|vga_driver_unit|un10_column_counter_siglt6_1  # !\inst|vga_driver_unit|column_counter_sig_1  # !\inst|vga_driver_unit|column_counter_sig_0
4291
4292         .clk(gnd),
4293         .dataa(\inst|vga_driver_unit|column_counter_sig_0 ),
4294         .datab(\inst|vga_driver_unit|un10_column_counter_siglt6_2 ),
4295         .datac(\inst|vga_driver_unit|un10_column_counter_siglt6_1 ),
4296         .datad(\inst|vga_driver_unit|column_counter_sig_1 ),
4297         .aclr(gnd),
4298         .aload(gnd),
4299         .sclr(gnd),
4300         .sload(gnd),
4301         .ena(vcc),
4302         .cin(gnd),
4303         .cin0(gnd),
4304         .cin1(vcc),
4305         .inverta(gnd),
4306         .regcascin(gnd),
4307         .devclrn(devclrn),
4308         .devpor(devpor),
4309         .combout(\inst|vga_driver_unit|un10_column_counter_siglt6 ),
4310         .regout(),
4311         .cout(),
4312         .cout0(),
4313         .cout1());
4314 // synopsys translate_off
4315 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6 .lut_mask = "fdff";
4316 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6 .operation_mode = "normal";
4317 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6 .output_mode = "comb_only";
4318 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6 .register_cascade_mode = "off";
4319 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6 .sum_lutc_input = "datac";
4320 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6 .synch_mode = "off";
4321 // synopsys translate_on
4322
4323 // atom is at LC_X48_Y32_N5
4324 stratix_lcell \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglto9 (
4325 // Equation(s):
4326 // \inst|vga_driver_unit|un10_column_counter_siglto9  = !\inst|vga_driver_unit|column_counter_sig_7  & \inst|vga_driver_unit|un10_column_counter_siglt6  & !\inst|vga_driver_unit|column_counter_sig_8  # !\inst|vga_driver_unit|column_counter_sig_9
4327
4328         .clk(gnd),
4329         .dataa(\inst|vga_driver_unit|column_counter_sig_9 ),
4330         .datab(\inst|vga_driver_unit|column_counter_sig_7 ),
4331         .datac(\inst|vga_driver_unit|un10_column_counter_siglt6 ),
4332         .datad(\inst|vga_driver_unit|column_counter_sig_8 ),
4333         .aclr(gnd),
4334         .aload(gnd),
4335         .sclr(gnd),
4336         .sload(gnd),
4337         .ena(vcc),
4338         .cin(gnd),
4339         .cin0(gnd),
4340         .cin1(vcc),
4341         .inverta(gnd),
4342         .regcascin(gnd),
4343         .devclrn(devclrn),
4344         .devpor(devpor),
4345         .combout(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
4346         .regout(),
4347         .cout(),
4348         .cout0(),
4349         .cout1());
4350 // synopsys translate_off
4351 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglto9 .lut_mask = "5575";
4352 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglto9 .operation_mode = "normal";
4353 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglto9 .output_mode = "comb_only";
4354 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglto9 .register_cascade_mode = "off";
4355 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglto9 .sum_lutc_input = "datac";
4356 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglto9 .synch_mode = "off";
4357 // synopsys translate_on
4358
4359 // atom is at LC_X48_Y32_N1
4360 stratix_lcell \inst|vga_driver_unit|column_counter_sig_2_ (
4361 // Equation(s):
4362 // \inst|vga_driver_unit|column_counter_sig_2  = DFFEAS(\inst|vga_driver_unit|un2_column_counter_next_combout [2] # !\inst|vga_driver_unit|un10_column_counter_siglto9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
4363 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
4364
4365         .clk(\inst1|altpll_component|_clk0 ),
4366         .dataa(vcc),
4367         .datab(vcc),
4368         .datac(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
4369         .datad(\inst|vga_driver_unit|un2_column_counter_next_combout [2]),
4370         .aclr(gnd),
4371         .aload(gnd),
4372         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
4373         .sload(gnd),
4374         .ena(vcc),
4375         .cin(gnd),
4376         .cin0(gnd),
4377         .cin1(vcc),
4378         .inverta(gnd),
4379         .regcascin(gnd),
4380         .devclrn(devclrn),
4381         .devpor(devpor),
4382         .combout(),
4383         .regout(\inst|vga_driver_unit|column_counter_sig_2 ),
4384         .cout(),
4385         .cout0(),
4386         .cout1());
4387 // synopsys translate_off
4388 defparam \inst|vga_driver_unit|column_counter_sig_2_ .lut_mask = "ff0f";
4389 defparam \inst|vga_driver_unit|column_counter_sig_2_ .operation_mode = "normal";
4390 defparam \inst|vga_driver_unit|column_counter_sig_2_ .output_mode = "reg_only";
4391 defparam \inst|vga_driver_unit|column_counter_sig_2_ .register_cascade_mode = "off";
4392 defparam \inst|vga_driver_unit|column_counter_sig_2_ .sum_lutc_input = "datac";
4393 defparam \inst|vga_driver_unit|column_counter_sig_2_ .synch_mode = "on";
4394 // synopsys translate_on
4395
4396 // atom is at LC_X49_Y33_N4
4397 stratix_lcell \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto3 (
4398 // Equation(s):
4399 // \inst|vga_control_unit|un5_v_enablelto3  = \inst|vga_driver_unit|column_counter_sig_3  & (\inst|vga_driver_unit|column_counter_sig_2  # \inst|vga_driver_unit|column_counter_sig_0  # \inst|vga_driver_unit|column_counter_sig_1 )
4400
4401         .clk(gnd),
4402         .dataa(\inst|vga_driver_unit|column_counter_sig_2 ),
4403         .datab(\inst|vga_driver_unit|column_counter_sig_3 ),
4404         .datac(\inst|vga_driver_unit|column_counter_sig_0 ),
4405         .datad(\inst|vga_driver_unit|column_counter_sig_1 ),
4406         .aclr(gnd),
4407         .aload(gnd),
4408         .sclr(gnd),
4409         .sload(gnd),
4410         .ena(vcc),
4411         .cin(gnd),
4412         .cin0(gnd),
4413         .cin1(vcc),
4414         .inverta(gnd),
4415         .regcascin(gnd),
4416         .devclrn(devclrn),
4417         .devpor(devpor),
4418         .combout(\inst|vga_control_unit|un5_v_enablelto3 ),
4419         .regout(),
4420         .cout(),
4421         .cout0(),
4422         .cout1());
4423 // synopsys translate_off
4424 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto3 .lut_mask = "ccc8";
4425 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto3 .operation_mode = "normal";
4426 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto3 .output_mode = "comb_only";
4427 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto3 .register_cascade_mode = "off";
4428 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto3 .sum_lutc_input = "datac";
4429 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto3 .synch_mode = "off";
4430 // synopsys translate_on
4431
4432 // atom is at LC_X48_Y33_N6
4433 stratix_lcell \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto5_0 (
4434 // Equation(s):
4435 // \inst|vga_control_unit|un5_v_enablelto5_0  = \inst|vga_driver_unit|column_counter_sig_4  # \inst|vga_driver_unit|column_counter_sig_5
4436
4437         .clk(gnd),
4438         .dataa(vcc),
4439         .datab(\inst|vga_driver_unit|column_counter_sig_4 ),
4440         .datac(\inst|vga_driver_unit|column_counter_sig_5 ),
4441         .datad(vcc),
4442         .aclr(gnd),
4443         .aload(gnd),
4444         .sclr(gnd),
4445         .sload(gnd),
4446         .ena(vcc),
4447         .cin(gnd),
4448         .cin0(gnd),
4449         .cin1(vcc),
4450         .inverta(gnd),
4451         .regcascin(gnd),
4452         .devclrn(devclrn),
4453         .devpor(devpor),
4454         .combout(\inst|vga_control_unit|un5_v_enablelto5_0 ),
4455         .regout(),
4456         .cout(),
4457         .cout0(),
4458         .cout1());
4459 // synopsys translate_off
4460 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto5_0 .lut_mask = "fcfc";
4461 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto5_0 .operation_mode = "normal";
4462 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto5_0 .output_mode = "comb_only";
4463 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto5_0 .register_cascade_mode = "off";
4464 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto5_0 .sum_lutc_input = "datac";
4465 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto5_0 .synch_mode = "off";
4466 // synopsys translate_on
4467
4468 // atom is at LC_X49_Y33_N2
4469 stratix_lcell \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto7 (
4470 // Equation(s):
4471 // \inst|vga_control_unit|un5_v_enablelto7  = \inst|vga_driver_unit|column_counter_sig_7  & \inst|vga_driver_unit|column_counter_sig_6  & (\inst|vga_control_unit|un5_v_enablelto3  # \inst|vga_control_unit|un5_v_enablelto5_0 )
4472
4473         .clk(gnd),
4474         .dataa(\inst|vga_control_unit|un5_v_enablelto3 ),
4475         .datab(\inst|vga_driver_unit|column_counter_sig_7 ),
4476         .datac(\inst|vga_driver_unit|column_counter_sig_6 ),
4477         .datad(\inst|vga_control_unit|un5_v_enablelto5_0 ),
4478         .aclr(gnd),
4479         .aload(gnd),
4480         .sclr(gnd),
4481         .sload(gnd),
4482         .ena(vcc),
4483         .cin(gnd),
4484         .cin0(gnd),
4485         .cin1(vcc),
4486         .inverta(gnd),
4487         .regcascin(gnd),
4488         .devclrn(devclrn),
4489         .devpor(devpor),
4490         .combout(\inst|vga_control_unit|un5_v_enablelto7 ),
4491         .regout(),
4492         .cout(),
4493         .cout0(),
4494         .cout1());
4495 // synopsys translate_off
4496 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto7 .lut_mask = "c080";
4497 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto7 .operation_mode = "normal";
4498 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto7 .output_mode = "comb_only";
4499 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto7 .register_cascade_mode = "off";
4500 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto7 .sum_lutc_input = "datac";
4501 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto7 .synch_mode = "off";
4502 // synopsys translate_on
4503
4504 // atom is at LC_X1_Y33_N5
4505 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_1_ (
4506 // Equation(s):
4507 // \inst|vga_driver_unit|un1_line_counter_sig_combout [1] = \inst|vga_driver_unit|line_counter_sig_0  $ \inst|vga_driver_unit|d_set_hsync_counter
4508 // \inst|vga_driver_unit|un1_line_counter_sig_cout [1] = CARRY(\inst|vga_driver_unit|line_counter_sig_0  & \inst|vga_driver_unit|d_set_hsync_counter )
4509 // \inst|vga_driver_unit|un1_line_counter_sig_cout[1]~COUT1_9  = CARRY(\inst|vga_driver_unit|line_counter_sig_0  & \inst|vga_driver_unit|d_set_hsync_counter )
4510
4511         .clk(gnd),
4512         .dataa(\inst|vga_driver_unit|line_counter_sig_0 ),
4513         .datab(\inst|vga_driver_unit|d_set_hsync_counter ),
4514         .datac(vcc),
4515         .datad(vcc),
4516         .aclr(gnd),
4517         .aload(gnd),
4518         .sclr(gnd),
4519         .sload(gnd),
4520         .ena(vcc),
4521         .cin(gnd),
4522         .cin0(gnd),
4523         .cin1(vcc),
4524         .inverta(gnd),
4525         .regcascin(gnd),
4526         .devclrn(devclrn),
4527         .devpor(devpor),
4528         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [1]),
4529         .regout(),
4530         .cout(),
4531         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_cout [1]),
4532         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_cout[1]~COUT1_9 ));
4533 // synopsys translate_off
4534 defparam \inst|vga_driver_unit|un1_line_counter_sig_1_ .lut_mask = "6688";
4535 defparam \inst|vga_driver_unit|un1_line_counter_sig_1_ .operation_mode = "arithmetic";
4536 defparam \inst|vga_driver_unit|un1_line_counter_sig_1_ .output_mode = "comb_only";
4537 defparam \inst|vga_driver_unit|un1_line_counter_sig_1_ .register_cascade_mode = "off";
4538 defparam \inst|vga_driver_unit|un1_line_counter_sig_1_ .sum_lutc_input = "datac";
4539 defparam \inst|vga_driver_unit|un1_line_counter_sig_1_ .synch_mode = "off";
4540 // synopsys translate_on
4541
4542 // atom is at LC_X24_Y41_N2
4543 stratix_lcell \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1_cZ (
4544 // Equation(s):
4545 // \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1  = \reset~combout  & \inst|dly_counter [0] & !\inst|vga_driver_unit|vsync_state_1  & \inst|dly_counter [1]
4546
4547         .clk(gnd),
4548         .dataa(\reset~combout ),
4549         .datab(\inst|dly_counter [0]),
4550         .datac(\inst|vga_driver_unit|vsync_state_1 ),
4551         .datad(\inst|dly_counter [1]),
4552         .aclr(gnd),
4553         .aload(gnd),
4554         .sclr(gnd),
4555         .sload(gnd),
4556         .ena(vcc),
4557         .cin(gnd),
4558         .cin0(gnd),
4559         .cin1(vcc),
4560         .inverta(gnd),
4561         .regcascin(gnd),
4562         .devclrn(devclrn),
4563         .devpor(devpor),
4564         .combout(\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
4565         .regout(),
4566         .cout(),
4567         .cout0(),
4568         .cout1());
4569 // synopsys translate_off
4570 defparam \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1_cZ .lut_mask = "0800";
4571 defparam \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1_cZ .operation_mode = "normal";
4572 defparam \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1_cZ .output_mode = "comb_only";
4573 defparam \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1_cZ .register_cascade_mode = "off";
4574 defparam \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1_cZ .sum_lutc_input = "datac";
4575 defparam \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1_cZ .synch_mode = "off";
4576 // synopsys translate_on
4577
4578 // atom is at LC_X1_Y33_N4
4579 stratix_lcell \inst|vga_driver_unit|line_counter_sig_0_ (
4580 // Equation(s):
4581 // \inst|vga_driver_unit|line_counter_sig_0  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [1] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
4582 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
4583
4584         .clk(\inst1|altpll_component|_clk0 ),
4585         .dataa(vcc),
4586         .datab(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
4587         .datac(\inst|vga_driver_unit|un1_line_counter_sig_combout [1]),
4588         .datad(vcc),
4589         .aclr(gnd),
4590         .aload(gnd),
4591         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
4592         .sload(gnd),
4593         .ena(vcc),
4594         .cin(gnd),
4595         .cin0(gnd),
4596         .cin1(vcc),
4597         .inverta(gnd),
4598         .regcascin(gnd),
4599         .devclrn(devclrn),
4600         .devpor(devpor),
4601         .combout(),
4602         .regout(\inst|vga_driver_unit|line_counter_sig_0 ),
4603         .cout(),
4604         .cout0(),
4605         .cout1());
4606 // synopsys translate_off
4607 defparam \inst|vga_driver_unit|line_counter_sig_0_ .lut_mask = "f3f3";
4608 defparam \inst|vga_driver_unit|line_counter_sig_0_ .operation_mode = "normal";
4609 defparam \inst|vga_driver_unit|line_counter_sig_0_ .output_mode = "reg_only";
4610 defparam \inst|vga_driver_unit|line_counter_sig_0_ .register_cascade_mode = "off";
4611 defparam \inst|vga_driver_unit|line_counter_sig_0_ .sum_lutc_input = "datac";
4612 defparam \inst|vga_driver_unit|line_counter_sig_0_ .synch_mode = "on";
4613 // synopsys translate_on
4614
4615 // atom is at LC_X1_Y33_N6
4616 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_3_ (
4617 // Equation(s):
4618 // \inst|vga_driver_unit|un1_line_counter_sig_combout [3] = \inst|vga_driver_unit|line_counter_sig_2  $ (\inst|vga_driver_unit|line_counter_sig_1  & \inst|vga_driver_unit|un1_line_counter_sig_cout [1])
4619 // \inst|vga_driver_unit|un1_line_counter_sig_cout [3] = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_cout [1] # !\inst|vga_driver_unit|line_counter_sig_1  # !\inst|vga_driver_unit|line_counter_sig_2 )
4620 // \inst|vga_driver_unit|un1_line_counter_sig_cout[3]~COUT1_11  = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_cout[1]~COUT1_9  # !\inst|vga_driver_unit|line_counter_sig_1  # !\inst|vga_driver_unit|line_counter_sig_2 )
4621
4622         .clk(gnd),
4623         .dataa(\inst|vga_driver_unit|line_counter_sig_2 ),
4624         .datab(\inst|vga_driver_unit|line_counter_sig_1 ),
4625         .datac(vcc),
4626         .datad(vcc),
4627         .aclr(gnd),
4628         .aload(gnd),
4629         .sclr(gnd),
4630         .sload(gnd),
4631         .ena(vcc),
4632         .cin(gnd),
4633         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_cout [1]),
4634         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_cout[1]~COUT1_9 ),
4635         .inverta(gnd),
4636         .regcascin(gnd),
4637         .devclrn(devclrn),
4638         .devpor(devpor),
4639         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [3]),
4640         .regout(),
4641         .cout(),
4642         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_cout [3]),
4643         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_cout[3]~COUT1_11 ));
4644 // synopsys translate_off
4645 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .cin0_used = "true";
4646 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .cin1_used = "true";
4647 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .lut_mask = "6a7f";
4648 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .operation_mode = "arithmetic";
4649 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .output_mode = "comb_only";
4650 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .register_cascade_mode = "off";
4651 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .sum_lutc_input = "cin";
4652 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .synch_mode = "off";
4653 // synopsys translate_on
4654
4655 // atom is at LC_X1_Y33_N3
4656 stratix_lcell \inst|vga_driver_unit|line_counter_sig_2_ (
4657 // Equation(s):
4658 // \inst|vga_driver_unit|line_counter_sig_2  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [3] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
4659 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
4660
4661         .clk(\inst1|altpll_component|_clk0 ),
4662         .dataa(vcc),
4663         .datab(vcc),
4664         .datac(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
4665         .datad(\inst|vga_driver_unit|un1_line_counter_sig_combout [3]),
4666         .aclr(gnd),
4667         .aload(gnd),
4668         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
4669         .sload(gnd),
4670         .ena(vcc),
4671         .cin(gnd),
4672         .cin0(gnd),
4673         .cin1(vcc),
4674         .inverta(gnd),
4675         .regcascin(gnd),
4676         .devclrn(devclrn),
4677         .devpor(devpor),
4678         .combout(),
4679         .regout(\inst|vga_driver_unit|line_counter_sig_2 ),
4680         .cout(),
4681         .cout0(),
4682         .cout1());
4683 // synopsys translate_off
4684 defparam \inst|vga_driver_unit|line_counter_sig_2_ .lut_mask = "ff0f";
4685 defparam \inst|vga_driver_unit|line_counter_sig_2_ .operation_mode = "normal";
4686 defparam \inst|vga_driver_unit|line_counter_sig_2_ .output_mode = "reg_only";
4687 defparam \inst|vga_driver_unit|line_counter_sig_2_ .register_cascade_mode = "off";
4688 defparam \inst|vga_driver_unit|line_counter_sig_2_ .sum_lutc_input = "datac";
4689 defparam \inst|vga_driver_unit|line_counter_sig_2_ .synch_mode = "on";
4690 // synopsys translate_on
4691
4692 // atom is at LC_X2_Y33_N0
4693 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_a_1_ (
4694 // Equation(s):
4695 // \inst|vga_driver_unit|un1_line_counter_sig_a_cout [1] = CARRY(\inst|vga_driver_unit|d_set_hsync_counter  & \inst|vga_driver_unit|line_counter_sig_0 )
4696 // \inst|vga_driver_unit|un1_line_counter_sig_a_cout[1]~COUT1_3  = CARRY(\inst|vga_driver_unit|d_set_hsync_counter  & \inst|vga_driver_unit|line_counter_sig_0 )
4697
4698         .clk(gnd),
4699         .dataa(\inst|vga_driver_unit|d_set_hsync_counter ),
4700         .datab(\inst|vga_driver_unit|line_counter_sig_0 ),
4701         .datac(vcc),
4702         .datad(vcc),
4703         .aclr(gnd),
4704         .aload(gnd),
4705         .sclr(gnd),
4706         .sload(gnd),
4707         .ena(vcc),
4708         .cin(gnd),
4709         .cin0(gnd),
4710         .cin1(vcc),
4711         .inverta(gnd),
4712         .regcascin(gnd),
4713         .devclrn(devclrn),
4714         .devpor(devpor),
4715         .combout(\inst|vga_driver_unit|un1_line_counter_sig_a_1_~COMBOUT ),
4716         .regout(),
4717         .cout(),
4718         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_a_cout [1]),
4719         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_a_cout[1]~COUT1_3 ));
4720 // synopsys translate_off
4721 defparam \inst|vga_driver_unit|un1_line_counter_sig_a_1_ .lut_mask = "ff88";
4722 defparam \inst|vga_driver_unit|un1_line_counter_sig_a_1_ .operation_mode = "arithmetic";
4723 defparam \inst|vga_driver_unit|un1_line_counter_sig_a_1_ .output_mode = "none";
4724 defparam \inst|vga_driver_unit|un1_line_counter_sig_a_1_ .register_cascade_mode = "off";
4725 defparam \inst|vga_driver_unit|un1_line_counter_sig_a_1_ .sum_lutc_input = "datac";
4726 defparam \inst|vga_driver_unit|un1_line_counter_sig_a_1_ .synch_mode = "off";
4727 // synopsys translate_on
4728
4729 // atom is at LC_X2_Y33_N1
4730 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_2_ (
4731 // Equation(s):
4732 // \inst|vga_driver_unit|un1_line_counter_sig_combout [2] = \inst|vga_driver_unit|line_counter_sig_1  $ (\inst|vga_driver_unit|un1_line_counter_sig_a_cout [1])
4733 // \inst|vga_driver_unit|un1_line_counter_sig_cout [2] = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_a_cout [1] # !\inst|vga_driver_unit|line_counter_sig_2  # !\inst|vga_driver_unit|line_counter_sig_1 )
4734 // \inst|vga_driver_unit|un1_line_counter_sig_cout[2]~COUT1_17  = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_a_cout[1]~COUT1_3  # !\inst|vga_driver_unit|line_counter_sig_2  # !\inst|vga_driver_unit|line_counter_sig_1 )
4735
4736         .clk(gnd),
4737         .dataa(\inst|vga_driver_unit|line_counter_sig_1 ),
4738         .datab(\inst|vga_driver_unit|line_counter_sig_2 ),
4739         .datac(vcc),
4740         .datad(vcc),
4741         .aclr(gnd),
4742         .aload(gnd),
4743         .sclr(gnd),
4744         .sload(gnd),
4745         .ena(vcc),
4746         .cin(gnd),
4747         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_a_cout [1]),
4748         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_a_cout[1]~COUT1_3 ),
4749         .inverta(gnd),
4750         .regcascin(gnd),
4751         .devclrn(devclrn),
4752         .devpor(devpor),
4753         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [2]),
4754         .regout(),
4755         .cout(),
4756         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_cout [2]),
4757         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_cout[2]~COUT1_17 ));
4758 // synopsys translate_off
4759 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .cin0_used = "true";
4760 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .cin1_used = "true";
4761 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .lut_mask = "5a7f";
4762 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .operation_mode = "arithmetic";
4763 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .output_mode = "comb_only";
4764 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .register_cascade_mode = "off";
4765 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .sum_lutc_input = "cin";
4766 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .synch_mode = "off";
4767 // synopsys translate_on
4768
4769 // atom is at LC_X3_Y33_N4
4770 stratix_lcell \inst|vga_driver_unit|line_counter_sig_1_ (
4771 // Equation(s):
4772 // \inst|vga_driver_unit|line_counter_sig_1  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [2] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
4773 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
4774
4775         .clk(\inst1|altpll_component|_clk0 ),
4776         .dataa(vcc),
4777         .datab(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
4778         .datac(vcc),
4779         .datad(\inst|vga_driver_unit|un1_line_counter_sig_combout [2]),
4780         .aclr(gnd),
4781         .aload(gnd),
4782         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
4783         .sload(gnd),
4784         .ena(vcc),
4785         .cin(gnd),
4786         .cin0(gnd),
4787         .cin1(vcc),
4788         .inverta(gnd),
4789         .regcascin(gnd),
4790         .devclrn(devclrn),
4791         .devpor(devpor),
4792         .combout(),
4793         .regout(\inst|vga_driver_unit|line_counter_sig_1 ),
4794         .cout(),
4795         .cout0(),
4796         .cout1());
4797 // synopsys translate_off
4798 defparam \inst|vga_driver_unit|line_counter_sig_1_ .lut_mask = "ff33";
4799 defparam \inst|vga_driver_unit|line_counter_sig_1_ .operation_mode = "normal";
4800 defparam \inst|vga_driver_unit|line_counter_sig_1_ .output_mode = "reg_only";
4801 defparam \inst|vga_driver_unit|line_counter_sig_1_ .register_cascade_mode = "off";
4802 defparam \inst|vga_driver_unit|line_counter_sig_1_ .sum_lutc_input = "datac";
4803 defparam \inst|vga_driver_unit|line_counter_sig_1_ .synch_mode = "on";
4804 // synopsys translate_on
4805
4806 // atom is at LC_X2_Y33_N2
4807 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_4_ (
4808 // Equation(s):
4809 // \inst|vga_driver_unit|un1_line_counter_sig_combout [4] = \inst|vga_driver_unit|line_counter_sig_3  $ !\inst|vga_driver_unit|un1_line_counter_sig_cout [2]
4810 // \inst|vga_driver_unit|un1_line_counter_sig_cout [4] = CARRY(\inst|vga_driver_unit|line_counter_sig_4  & \inst|vga_driver_unit|line_counter_sig_3  & !\inst|vga_driver_unit|un1_line_counter_sig_cout [2])
4811 // \inst|vga_driver_unit|un1_line_counter_sig_cout[4]~COUT1_19  = CARRY(\inst|vga_driver_unit|line_counter_sig_4  & \inst|vga_driver_unit|line_counter_sig_3  & !\inst|vga_driver_unit|un1_line_counter_sig_cout[2]~COUT1_17 )
4812
4813         .clk(gnd),
4814         .dataa(\inst|vga_driver_unit|line_counter_sig_4 ),
4815         .datab(\inst|vga_driver_unit|line_counter_sig_3 ),
4816         .datac(vcc),
4817         .datad(vcc),
4818         .aclr(gnd),
4819         .aload(gnd),
4820         .sclr(gnd),
4821         .sload(gnd),
4822         .ena(vcc),
4823         .cin(gnd),
4824         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_cout [2]),
4825         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_cout[2]~COUT1_17 ),
4826         .inverta(gnd),
4827         .regcascin(gnd),
4828         .devclrn(devclrn),
4829         .devpor(devpor),
4830         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [4]),
4831         .regout(),
4832         .cout(),
4833         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_cout [4]),
4834         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_cout[4]~COUT1_19 ));
4835 // synopsys translate_off
4836 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .cin0_used = "true";
4837 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .cin1_used = "true";
4838 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .lut_mask = "c308";
4839 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .operation_mode = "arithmetic";
4840 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .output_mode = "comb_only";
4841 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .register_cascade_mode = "off";
4842 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .sum_lutc_input = "cin";
4843 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .synch_mode = "off";
4844 // synopsys translate_on
4845
4846 // atom is at LC_X2_Y33_N9
4847 stratix_lcell \inst|vga_driver_unit|line_counter_sig_3_ (
4848 // Equation(s):
4849 // \inst|vga_driver_unit|line_counter_sig_3  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [4] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
4850 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
4851
4852         .clk(\inst1|altpll_component|_clk0 ),
4853         .dataa(\inst|vga_driver_unit|un1_line_counter_sig_combout [4]),
4854         .datab(vcc),
4855         .datac(vcc),
4856         .datad(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
4857         .aclr(gnd),
4858         .aload(gnd),
4859         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
4860         .sload(gnd),
4861         .ena(vcc),
4862         .cin(gnd),
4863         .cin0(gnd),
4864         .cin1(vcc),
4865         .inverta(gnd),
4866         .regcascin(gnd),
4867         .devclrn(devclrn),
4868         .devpor(devpor),
4869         .combout(),
4870         .regout(\inst|vga_driver_unit|line_counter_sig_3 ),
4871         .cout(),
4872         .cout0(),
4873         .cout1());
4874 // synopsys translate_off
4875 defparam \inst|vga_driver_unit|line_counter_sig_3_ .lut_mask = "aaff";
4876 defparam \inst|vga_driver_unit|line_counter_sig_3_ .operation_mode = "normal";
4877 defparam \inst|vga_driver_unit|line_counter_sig_3_ .output_mode = "reg_only";
4878 defparam \inst|vga_driver_unit|line_counter_sig_3_ .register_cascade_mode = "off";
4879 defparam \inst|vga_driver_unit|line_counter_sig_3_ .sum_lutc_input = "datac";
4880 defparam \inst|vga_driver_unit|line_counter_sig_3_ .synch_mode = "on";
4881 // synopsys translate_on
4882
4883 // atom is at LC_X1_Y33_N7
4884 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_5_ (
4885 // Equation(s):
4886 // \inst|vga_driver_unit|un1_line_counter_sig_combout [5] = \inst|vga_driver_unit|line_counter_sig_4  $ (\inst|vga_driver_unit|line_counter_sig_3  & !\inst|vga_driver_unit|un1_line_counter_sig_cout [3])
4887 // \inst|vga_driver_unit|un1_line_counter_sig_cout [5] = CARRY(\inst|vga_driver_unit|line_counter_sig_4  & \inst|vga_driver_unit|line_counter_sig_3  & !\inst|vga_driver_unit|un1_line_counter_sig_cout [3])
4888 // \inst|vga_driver_unit|un1_line_counter_sig_cout[5]~COUT1_13  = CARRY(\inst|vga_driver_unit|line_counter_sig_4  & \inst|vga_driver_unit|line_counter_sig_3  & !\inst|vga_driver_unit|un1_line_counter_sig_cout[3]~COUT1_11 )
4889
4890         .clk(gnd),
4891         .dataa(\inst|vga_driver_unit|line_counter_sig_4 ),
4892         .datab(\inst|vga_driver_unit|line_counter_sig_3 ),
4893         .datac(vcc),
4894         .datad(vcc),
4895         .aclr(gnd),
4896         .aload(gnd),
4897         .sclr(gnd),
4898         .sload(gnd),
4899         .ena(vcc),
4900         .cin(gnd),
4901         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_cout [3]),
4902         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_cout[3]~COUT1_11 ),
4903         .inverta(gnd),
4904         .regcascin(gnd),
4905         .devclrn(devclrn),
4906         .devpor(devpor),
4907         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [5]),
4908         .regout(),
4909         .cout(),
4910         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_cout [5]),
4911         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_cout[5]~COUT1_13 ));
4912 // synopsys translate_off
4913 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .cin0_used = "true";
4914 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .cin1_used = "true";
4915 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .lut_mask = "a608";
4916 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .operation_mode = "arithmetic";
4917 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .output_mode = "comb_only";
4918 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .register_cascade_mode = "off";
4919 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .sum_lutc_input = "cin";
4920 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .synch_mode = "off";
4921 // synopsys translate_on
4922
4923 // atom is at LC_X1_Y33_N1
4924 stratix_lcell \inst|vga_driver_unit|line_counter_sig_4_ (
4925 // Equation(s):
4926 // \inst|vga_driver_unit|line_counter_sig_4  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [5] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
4927 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
4928
4929         .clk(\inst1|altpll_component|_clk0 ),
4930         .dataa(vcc),
4931         .datab(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
4932         .datac(\inst|vga_driver_unit|un1_line_counter_sig_combout [5]),
4933         .datad(vcc),
4934         .aclr(gnd),
4935         .aload(gnd),
4936         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
4937         .sload(gnd),
4938         .ena(vcc),
4939         .cin(gnd),
4940         .cin0(gnd),
4941         .cin1(vcc),
4942         .inverta(gnd),
4943         .regcascin(gnd),
4944         .devclrn(devclrn),
4945         .devpor(devpor),
4946         .combout(),
4947         .regout(\inst|vga_driver_unit|line_counter_sig_4 ),
4948         .cout(),
4949         .cout0(),
4950         .cout1());
4951 // synopsys translate_off
4952 defparam \inst|vga_driver_unit|line_counter_sig_4_ .lut_mask = "f3f3";
4953 defparam \inst|vga_driver_unit|line_counter_sig_4_ .operation_mode = "normal";
4954 defparam \inst|vga_driver_unit|line_counter_sig_4_ .output_mode = "reg_only";
4955 defparam \inst|vga_driver_unit|line_counter_sig_4_ .register_cascade_mode = "off";
4956 defparam \inst|vga_driver_unit|line_counter_sig_4_ .sum_lutc_input = "datac";
4957 defparam \inst|vga_driver_unit|line_counter_sig_4_ .synch_mode = "on";
4958 // synopsys translate_on
4959
4960 // atom is at LC_X2_Y33_N3
4961 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_6_ (
4962 // Equation(s):
4963 // \inst|vga_driver_unit|un1_line_counter_sig_combout [6] = \inst|vga_driver_unit|line_counter_sig_5  $ \inst|vga_driver_unit|un1_line_counter_sig_cout [4]
4964 // \inst|vga_driver_unit|un1_line_counter_sig_cout [6] = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_cout [4] # !\inst|vga_driver_unit|line_counter_sig_5  # !\inst|vga_driver_unit|line_counter_sig_6 )
4965 // \inst|vga_driver_unit|un1_line_counter_sig_cout[6]~COUT1_21  = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_cout[4]~COUT1_19  # !\inst|vga_driver_unit|line_counter_sig_5  # !\inst|vga_driver_unit|line_counter_sig_6 )
4966
4967         .clk(gnd),
4968         .dataa(\inst|vga_driver_unit|line_counter_sig_6 ),
4969         .datab(\inst|vga_driver_unit|line_counter_sig_5 ),
4970         .datac(vcc),
4971         .datad(vcc),
4972         .aclr(gnd),
4973         .aload(gnd),
4974         .sclr(gnd),
4975         .sload(gnd),
4976         .ena(vcc),
4977         .cin(gnd),
4978         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_cout [4]),
4979         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_cout[4]~COUT1_19 ),
4980         .inverta(gnd),
4981         .regcascin(gnd),
4982         .devclrn(devclrn),
4983         .devpor(devpor),
4984         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [6]),
4985         .regout(),
4986         .cout(),
4987         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_cout [6]),
4988         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_cout[6]~COUT1_21 ));
4989 // synopsys translate_off
4990 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .cin0_used = "true";
4991 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .cin1_used = "true";
4992 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .lut_mask = "3c7f";
4993 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .operation_mode = "arithmetic";
4994 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .output_mode = "comb_only";
4995 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .register_cascade_mode = "off";
4996 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .sum_lutc_input = "cin";
4997 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .synch_mode = "off";
4998 // synopsys translate_on
4999
5000 // atom is at LC_X3_Y33_N2
5001 stratix_lcell \inst|vga_driver_unit|line_counter_sig_5_ (
5002 // Equation(s):
5003 // \inst|vga_driver_unit|line_counter_sig_5  = DFFEAS(\inst|vga_driver_unit|un10_line_counter_siglto8  & \inst|vga_driver_unit|un1_line_counter_sig_combout [6] & \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , GLOBAL(\inst1|altpll_component|_clk0 ),
5004 // VCC, , , , , , )
5005
5006         .clk(\inst1|altpll_component|_clk0 ),
5007         .dataa(vcc),
5008         .datab(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
5009         .datac(\inst|vga_driver_unit|un1_line_counter_sig_combout [6]),
5010         .datad(\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
5011         .aclr(gnd),
5012         .aload(gnd),
5013         .sclr(gnd),
5014         .sload(gnd),
5015         .ena(vcc),
5016         .cin(gnd),
5017         .cin0(gnd),
5018         .cin1(vcc),
5019         .inverta(gnd),
5020         .regcascin(gnd),
5021         .devclrn(devclrn),
5022         .devpor(devpor),
5023         .combout(),
5024         .regout(\inst|vga_driver_unit|line_counter_sig_5 ),
5025         .cout(),
5026         .cout0(),
5027         .cout1());
5028 // synopsys translate_off
5029 defparam \inst|vga_driver_unit|line_counter_sig_5_ .lut_mask = "c000";
5030 defparam \inst|vga_driver_unit|line_counter_sig_5_ .operation_mode = "normal";
5031 defparam \inst|vga_driver_unit|line_counter_sig_5_ .output_mode = "reg_only";
5032 defparam \inst|vga_driver_unit|line_counter_sig_5_ .register_cascade_mode = "off";
5033 defparam \inst|vga_driver_unit|line_counter_sig_5_ .sum_lutc_input = "datac";
5034 defparam \inst|vga_driver_unit|line_counter_sig_5_ .synch_mode = "off";
5035 // synopsys translate_on
5036
5037 // atom is at LC_X2_Y33_N4
5038 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_8_ (
5039 // Equation(s):
5040 // \inst|vga_driver_unit|un1_line_counter_sig_combout [8] = \inst|vga_driver_unit|line_counter_sig_7  $ (!\inst|vga_driver_unit|un1_line_counter_sig_cout [6])
5041
5042         .clk(gnd),
5043         .dataa(\inst|vga_driver_unit|line_counter_sig_7 ),
5044         .datab(vcc),
5045         .datac(vcc),
5046         .datad(vcc),
5047         .aclr(gnd),
5048         .aload(gnd),
5049         .sclr(gnd),
5050         .sload(gnd),
5051         .ena(vcc),
5052         .cin(gnd),
5053         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_cout [6]),
5054         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_cout[6]~COUT1_21 ),
5055         .inverta(gnd),
5056         .regcascin(gnd),
5057         .devclrn(devclrn),
5058         .devpor(devpor),
5059         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [8]),
5060         .regout(),
5061         .cout(),
5062         .cout0(),
5063         .cout1());
5064 // synopsys translate_off
5065 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .cin0_used = "true";
5066 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .cin1_used = "true";
5067 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .lut_mask = "a5a5";
5068 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .operation_mode = "normal";
5069 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .output_mode = "comb_only";
5070 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .register_cascade_mode = "off";
5071 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .sum_lutc_input = "cin";
5072 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .synch_mode = "off";
5073 // synopsys translate_on
5074
5075 // atom is at LC_X2_Y33_N7
5076 stratix_lcell \inst|vga_driver_unit|line_counter_sig_7_ (
5077 // Equation(s):
5078 // \inst|vga_driver_unit|line_counter_sig_7  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [8] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
5079 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
5080
5081         .clk(\inst1|altpll_component|_clk0 ),
5082         .dataa(\inst|vga_driver_unit|un1_line_counter_sig_combout [8]),
5083         .datab(vcc),
5084         .datac(vcc),
5085         .datad(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
5086         .aclr(gnd),
5087         .aload(gnd),
5088         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
5089         .sload(gnd),
5090         .ena(vcc),
5091         .cin(gnd),
5092         .cin0(gnd),
5093         .cin1(vcc),
5094         .inverta(gnd),
5095         .regcascin(gnd),
5096         .devclrn(devclrn),
5097         .devpor(devpor),
5098         .combout(),
5099         .regout(\inst|vga_driver_unit|line_counter_sig_7 ),
5100         .cout(),
5101         .cout0(),
5102         .cout1());
5103 // synopsys translate_off
5104 defparam \inst|vga_driver_unit|line_counter_sig_7_ .lut_mask = "aaff";
5105 defparam \inst|vga_driver_unit|line_counter_sig_7_ .operation_mode = "normal";
5106 defparam \inst|vga_driver_unit|line_counter_sig_7_ .output_mode = "reg_only";
5107 defparam \inst|vga_driver_unit|line_counter_sig_7_ .register_cascade_mode = "off";
5108 defparam \inst|vga_driver_unit|line_counter_sig_7_ .sum_lutc_input = "datac";
5109 defparam \inst|vga_driver_unit|line_counter_sig_7_ .synch_mode = "on";
5110 // synopsys translate_on
5111
5112 // atom is at LC_X1_Y33_N8
5113 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_7_ (
5114 // Equation(s):
5115 // \inst|vga_driver_unit|un1_line_counter_sig_combout [7] = \inst|vga_driver_unit|line_counter_sig_6  $ (\inst|vga_driver_unit|line_counter_sig_5  & \inst|vga_driver_unit|un1_line_counter_sig_cout [5])
5116 // \inst|vga_driver_unit|un1_line_counter_sig_cout [7] = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_cout [5] # !\inst|vga_driver_unit|line_counter_sig_5  # !\inst|vga_driver_unit|line_counter_sig_6 )
5117 // \inst|vga_driver_unit|un1_line_counter_sig_cout[7]~COUT1_15  = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_cout[5]~COUT1_13  # !\inst|vga_driver_unit|line_counter_sig_5  # !\inst|vga_driver_unit|line_counter_sig_6 )
5118
5119         .clk(gnd),
5120         .dataa(\inst|vga_driver_unit|line_counter_sig_6 ),
5121         .datab(\inst|vga_driver_unit|line_counter_sig_5 ),
5122         .datac(vcc),
5123         .datad(vcc),
5124         .aclr(gnd),
5125         .aload(gnd),
5126         .sclr(gnd),
5127         .sload(gnd),
5128         .ena(vcc),
5129         .cin(gnd),
5130         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_cout [5]),
5131         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_cout[5]~COUT1_13 ),
5132         .inverta(gnd),
5133         .regcascin(gnd),
5134         .devclrn(devclrn),
5135         .devpor(devpor),
5136         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [7]),
5137         .regout(),
5138         .cout(),
5139         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_cout [7]),
5140         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_cout[7]~COUT1_15 ));
5141 // synopsys translate_off
5142 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .cin0_used = "true";
5143 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .cin1_used = "true";
5144 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .lut_mask = "6a7f";
5145 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .operation_mode = "arithmetic";
5146 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .output_mode = "comb_only";
5147 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .register_cascade_mode = "off";
5148 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .sum_lutc_input = "cin";
5149 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .synch_mode = "off";
5150 // synopsys translate_on
5151
5152 // atom is at LC_X1_Y33_N9
5153 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_9_ (
5154 // Equation(s):
5155 // \inst|vga_driver_unit|un1_line_counter_sig_combout [9] = \inst|vga_driver_unit|line_counter_sig_8  $ (\inst|vga_driver_unit|line_counter_sig_7  & !\inst|vga_driver_unit|un1_line_counter_sig_cout [7])
5156
5157         .clk(gnd),
5158         .dataa(\inst|vga_driver_unit|line_counter_sig_7 ),
5159         .datab(vcc),
5160         .datac(vcc),
5161         .datad(\inst|vga_driver_unit|line_counter_sig_8 ),
5162         .aclr(gnd),
5163         .aload(gnd),
5164         .sclr(gnd),
5165         .sload(gnd),
5166         .ena(vcc),
5167         .cin(gnd),
5168         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_cout [7]),
5169         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_cout[7]~COUT1_15 ),
5170         .inverta(gnd),
5171         .regcascin(gnd),
5172         .devclrn(devclrn),
5173         .devpor(devpor),
5174         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [9]),
5175         .regout(),
5176         .cout(),
5177         .cout0(),
5178         .cout1());
5179 // synopsys translate_off
5180 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .cin0_used = "true";
5181 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .cin1_used = "true";
5182 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .lut_mask = "f50a";
5183 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .operation_mode = "normal";
5184 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .output_mode = "comb_only";
5185 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .register_cascade_mode = "off";
5186 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .sum_lutc_input = "cin";
5187 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .synch_mode = "off";
5188 // synopsys translate_on
5189
5190 // atom is at LC_X1_Y33_N0
5191 stratix_lcell \inst|vga_driver_unit|line_counter_sig_8_ (
5192 // Equation(s):
5193 // \inst|vga_driver_unit|line_counter_sig_8  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [9] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
5194 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
5195
5196         .clk(\inst1|altpll_component|_clk0 ),
5197         .dataa(vcc),
5198         .datab(vcc),
5199         .datac(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
5200         .datad(\inst|vga_driver_unit|un1_line_counter_sig_combout [9]),
5201         .aclr(gnd),
5202         .aload(gnd),
5203         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
5204         .sload(gnd),
5205         .ena(vcc),
5206         .cin(gnd),
5207         .cin0(gnd),
5208         .cin1(vcc),
5209         .inverta(gnd),
5210         .regcascin(gnd),
5211         .devclrn(devclrn),
5212         .devpor(devpor),
5213         .combout(),
5214         .regout(\inst|vga_driver_unit|line_counter_sig_8 ),
5215         .cout(),
5216         .cout0(),
5217         .cout1());
5218 // synopsys translate_off
5219 defparam \inst|vga_driver_unit|line_counter_sig_8_ .lut_mask = "ff0f";
5220 defparam \inst|vga_driver_unit|line_counter_sig_8_ .operation_mode = "normal";
5221 defparam \inst|vga_driver_unit|line_counter_sig_8_ .output_mode = "reg_only";
5222 defparam \inst|vga_driver_unit|line_counter_sig_8_ .register_cascade_mode = "off";
5223 defparam \inst|vga_driver_unit|line_counter_sig_8_ .sum_lutc_input = "datac";
5224 defparam \inst|vga_driver_unit|line_counter_sig_8_ .synch_mode = "on";
5225 // synopsys translate_on
5226
5227 // atom is at LC_X2_Y33_N8
5228 stratix_lcell \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglt4_2 (
5229 // Equation(s):
5230 // \inst|vga_driver_unit|un10_line_counter_siglt4_2  = !\inst|vga_driver_unit|line_counter_sig_3  # !\inst|vga_driver_unit|line_counter_sig_0  # !\inst|vga_driver_unit|line_counter_sig_4
5231
5232         .clk(gnd),
5233         .dataa(\inst|vga_driver_unit|line_counter_sig_4 ),
5234         .datab(\inst|vga_driver_unit|line_counter_sig_0 ),
5235         .datac(vcc),
5236         .datad(\inst|vga_driver_unit|line_counter_sig_3 ),
5237         .aclr(gnd),
5238         .aload(gnd),
5239         .sclr(gnd),
5240         .sload(gnd),
5241         .ena(vcc),
5242         .cin(gnd),
5243         .cin0(gnd),
5244         .cin1(vcc),
5245         .inverta(gnd),
5246         .regcascin(gnd),
5247         .devclrn(devclrn),
5248         .devpor(devpor),
5249         .combout(\inst|vga_driver_unit|un10_line_counter_siglt4_2 ),
5250         .regout(),
5251         .cout(),
5252         .cout0(),
5253         .cout1());
5254 // synopsys translate_off
5255 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglt4_2 .lut_mask = "77ff";
5256 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglt4_2 .operation_mode = "normal";
5257 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglt4_2 .output_mode = "comb_only";
5258 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglt4_2 .register_cascade_mode = "off";
5259 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglt4_2 .sum_lutc_input = "datac";
5260 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglt4_2 .synch_mode = "off";
5261 // synopsys translate_on
5262
5263 // atom is at LC_X2_Y33_N5
5264 stratix_lcell \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto5 (
5265 // Equation(s):
5266 // \inst|vga_driver_unit|un10_line_counter_siglto5  = !\inst|vga_driver_unit|line_counter_sig_5  & (\inst|vga_driver_unit|un10_line_counter_siglt4_2  # !\inst|vga_driver_unit|line_counter_sig_2  # !\inst|vga_driver_unit|line_counter_sig_1 )
5267
5268         .clk(gnd),
5269         .dataa(\inst|vga_driver_unit|line_counter_sig_1 ),
5270         .datab(\inst|vga_driver_unit|line_counter_sig_2 ),
5271         .datac(\inst|vga_driver_unit|un10_line_counter_siglt4_2 ),
5272         .datad(\inst|vga_driver_unit|line_counter_sig_5 ),
5273         .aclr(gnd),
5274         .aload(gnd),
5275         .sclr(gnd),
5276         .sload(gnd),
5277         .ena(vcc),
5278         .cin(gnd),
5279         .cin0(gnd),
5280         .cin1(vcc),
5281         .inverta(gnd),
5282         .regcascin(gnd),
5283         .devclrn(devclrn),
5284         .devpor(devpor),
5285         .combout(\inst|vga_driver_unit|un10_line_counter_siglto5 ),
5286         .regout(),
5287         .cout(),
5288         .cout0(),
5289         .cout1());
5290 // synopsys translate_off
5291 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto5 .lut_mask = "00f7";
5292 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto5 .operation_mode = "normal";
5293 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto5 .output_mode = "comb_only";
5294 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto5 .register_cascade_mode = "off";
5295 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto5 .sum_lutc_input = "datac";
5296 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto5 .synch_mode = "off";
5297 // synopsys translate_on
5298
5299 // atom is at LC_X2_Y33_N6
5300 stratix_lcell \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto8 (
5301 // Equation(s):
5302 // \inst|vga_driver_unit|un10_line_counter_siglto8  = \inst|vga_driver_unit|un10_line_counter_siglto5  # !\inst|vga_driver_unit|line_counter_sig_6  # !\inst|vga_driver_unit|line_counter_sig_8  # !\inst|vga_driver_unit|line_counter_sig_7
5303
5304         .clk(gnd),
5305         .dataa(\inst|vga_driver_unit|line_counter_sig_7 ),
5306         .datab(\inst|vga_driver_unit|line_counter_sig_8 ),
5307         .datac(\inst|vga_driver_unit|line_counter_sig_6 ),
5308         .datad(\inst|vga_driver_unit|un10_line_counter_siglto5 ),
5309         .aclr(gnd),
5310         .aload(gnd),
5311         .sclr(gnd),
5312         .sload(gnd),
5313         .ena(vcc),
5314         .cin(gnd),
5315         .cin0(gnd),
5316         .cin1(vcc),
5317         .inverta(gnd),
5318         .regcascin(gnd),
5319         .devclrn(devclrn),
5320         .devpor(devpor),
5321         .combout(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
5322         .regout(),
5323         .cout(),
5324         .cout0(),
5325         .cout1());
5326 // synopsys translate_off
5327 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto8 .lut_mask = "ff7f";
5328 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto8 .operation_mode = "normal";
5329 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto8 .output_mode = "comb_only";
5330 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto8 .register_cascade_mode = "off";
5331 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto8 .sum_lutc_input = "datac";
5332 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto8 .synch_mode = "off";
5333 // synopsys translate_on
5334
5335 // atom is at LC_X1_Y33_N2
5336 stratix_lcell \inst|vga_driver_unit|line_counter_sig_6_ (
5337 // Equation(s):
5338 // \inst|vga_driver_unit|line_counter_sig_6  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [7] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
5339 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
5340
5341         .clk(\inst1|altpll_component|_clk0 ),
5342         .dataa(vcc),
5343         .datab(vcc),
5344         .datac(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
5345         .datad(\inst|vga_driver_unit|un1_line_counter_sig_combout [7]),
5346         .aclr(gnd),
5347         .aload(gnd),
5348         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
5349         .sload(gnd),
5350         .ena(vcc),
5351         .cin(gnd),
5352         .cin0(gnd),
5353         .cin1(vcc),
5354         .inverta(gnd),
5355         .regcascin(gnd),
5356         .devclrn(devclrn),
5357         .devpor(devpor),
5358         .combout(),
5359         .regout(\inst|vga_driver_unit|line_counter_sig_6 ),
5360         .cout(),
5361         .cout0(),
5362         .cout1());
5363 // synopsys translate_off
5364 defparam \inst|vga_driver_unit|line_counter_sig_6_ .lut_mask = "ff0f";
5365 defparam \inst|vga_driver_unit|line_counter_sig_6_ .operation_mode = "normal";
5366 defparam \inst|vga_driver_unit|line_counter_sig_6_ .output_mode = "reg_only";
5367 defparam \inst|vga_driver_unit|line_counter_sig_6_ .register_cascade_mode = "off";
5368 defparam \inst|vga_driver_unit|line_counter_sig_6_ .sum_lutc_input = "datac";
5369 defparam \inst|vga_driver_unit|line_counter_sig_6_ .synch_mode = "on";
5370 // synopsys translate_on
5371
5372 // atom is at LC_X3_Y33_N5
5373 stratix_lcell \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelt2 (
5374 // Equation(s):
5375 // \inst|vga_control_unit|un17_v_enablelt2  = \inst|vga_driver_unit|line_counter_sig_0  # \inst|vga_driver_unit|line_counter_sig_2  # \inst|vga_driver_unit|line_counter_sig_1
5376
5377         .clk(gnd),
5378         .dataa(\inst|vga_driver_unit|line_counter_sig_0 ),
5379         .datab(\inst|vga_driver_unit|line_counter_sig_2 ),
5380         .datac(vcc),
5381         .datad(\inst|vga_driver_unit|line_counter_sig_1 ),
5382         .aclr(gnd),
5383         .aload(gnd),
5384         .sclr(gnd),
5385         .sload(gnd),
5386         .ena(vcc),
5387         .cin(gnd),
5388         .cin0(gnd),
5389         .cin1(vcc),
5390         .inverta(gnd),
5391         .regcascin(gnd),
5392         .devclrn(devclrn),
5393         .devpor(devpor),
5394         .combout(\inst|vga_control_unit|un17_v_enablelt2 ),
5395         .regout(),
5396         .cout(),
5397         .cout0(),
5398         .cout1());
5399 // synopsys translate_off
5400 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelt2 .lut_mask = "ffee";
5401 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelt2 .operation_mode = "normal";
5402 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelt2 .output_mode = "comb_only";
5403 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelt2 .register_cascade_mode = "off";
5404 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelt2 .sum_lutc_input = "datac";
5405 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelt2 .synch_mode = "off";
5406 // synopsys translate_on
5407
5408 // atom is at LC_X3_Y33_N8
5409 stratix_lcell \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelto5 (
5410 // Equation(s):
5411 // \inst|vga_control_unit|un17_v_enablelto5  = \inst|vga_driver_unit|line_counter_sig_4  # \inst|vga_driver_unit|line_counter_sig_5  # \inst|vga_control_unit|un17_v_enablelt2  & \inst|vga_driver_unit|line_counter_sig_3
5412
5413         .clk(gnd),
5414         .dataa(\inst|vga_driver_unit|line_counter_sig_4 ),
5415         .datab(\inst|vga_control_unit|un17_v_enablelt2 ),
5416         .datac(\inst|vga_driver_unit|line_counter_sig_3 ),
5417         .datad(\inst|vga_driver_unit|line_counter_sig_5 ),
5418         .aclr(gnd),
5419         .aload(gnd),
5420         .sclr(gnd),
5421         .sload(gnd),
5422         .ena(vcc),
5423         .cin(gnd),
5424         .cin0(gnd),
5425         .cin1(vcc),
5426         .inverta(gnd),
5427         .regcascin(gnd),
5428         .devclrn(devclrn),
5429         .devpor(devpor),
5430         .combout(\inst|vga_control_unit|un17_v_enablelto5 ),
5431         .regout(),
5432         .cout(),
5433         .cout0(),
5434         .cout1());
5435 // synopsys translate_off
5436 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelto5 .lut_mask = "ffea";
5437 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelto5 .operation_mode = "normal";
5438 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelto5 .output_mode = "comb_only";
5439 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelto5 .register_cascade_mode = "off";
5440 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelto5 .sum_lutc_input = "datac";
5441 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelto5 .synch_mode = "off";
5442 // synopsys translate_on
5443
5444 // atom is at LC_X49_Y33_N1
5445 stratix_lcell \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelto7 (
5446 // Equation(s):
5447 // \inst|vga_control_unit|un17_v_enablelto7  = \inst|vga_driver_unit|line_counter_sig_6  & \inst|vga_driver_unit|line_counter_sig_7  & \inst|vga_control_unit|un17_v_enablelto5
5448
5449         .clk(gnd),
5450         .dataa(vcc),
5451         .datab(\inst|vga_driver_unit|line_counter_sig_6 ),
5452         .datac(\inst|vga_driver_unit|line_counter_sig_7 ),
5453         .datad(\inst|vga_control_unit|un17_v_enablelto5 ),
5454         .aclr(gnd),
5455         .aload(gnd),
5456         .sclr(gnd),
5457         .sload(gnd),
5458         .ena(vcc),
5459         .cin(gnd),
5460         .cin0(gnd),
5461         .cin1(vcc),
5462         .inverta(gnd),
5463         .regcascin(gnd),
5464         .devclrn(devclrn),
5465         .devpor(devpor),
5466         .combout(\inst|vga_control_unit|un17_v_enablelto7 ),
5467         .regout(),
5468         .cout(),
5469         .cout0(),
5470         .cout1());
5471 // synopsys translate_off
5472 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelto7 .lut_mask = "c000";
5473 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelto7 .operation_mode = "normal";
5474 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelto7 .output_mode = "comb_only";
5475 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelto7 .register_cascade_mode = "off";
5476 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelto7 .sum_lutc_input = "datac";
5477 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelto7 .synch_mode = "off";
5478 // synopsys translate_on
5479
5480 // atom is at LC_X23_Y42_N8
5481 stratix_lcell \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4_cZ (
5482 // Equation(s):
5483 // \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4  = \inst|vga_driver_unit|un6_dly_counter_0_x  # !\inst|vga_driver_unit|hsync_state_5  & !\inst|vga_driver_unit|hsync_state_4
5484
5485         .clk(gnd),
5486         .dataa(\inst|vga_driver_unit|hsync_state_5 ),
5487         .datab(vcc),
5488         .datac(\inst|vga_driver_unit|hsync_state_4 ),
5489         .datad(\inst|vga_driver_unit|un6_dly_counter_0_x ),
5490         .aclr(gnd),
5491         .aload(gnd),
5492         .sclr(gnd),
5493         .sload(gnd),
5494         .ena(vcc),
5495         .cin(gnd),
5496         .cin0(gnd),
5497         .cin1(vcc),
5498         .inverta(gnd),
5499         .regcascin(gnd),
5500         .devclrn(devclrn),
5501         .devpor(devpor),
5502         .combout(\inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4 ),
5503         .regout(),
5504         .cout(),
5505         .cout0(),
5506         .cout1());
5507 // synopsys translate_off
5508 defparam \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4_cZ .lut_mask = "ff05";
5509 defparam \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4_cZ .operation_mode = "normal";
5510 defparam \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4_cZ .output_mode = "comb_only";
5511 defparam \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4_cZ .register_cascade_mode = "off";
5512 defparam \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4_cZ .sum_lutc_input = "datac";
5513 defparam \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4_cZ .synch_mode = "off";
5514 // synopsys translate_on
5515
5516 // atom is at LC_X23_Y43_N1
5517 stratix_lcell \inst|vga_driver_unit|v_enable_sig_Z (
5518 // Equation(s):
5519 // \inst|vga_driver_unit|v_enable_sig  = DFFEAS(\inst|vga_driver_unit|hsync_state_3  # \inst|vga_driver_unit|hsync_state_1 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4 , , ,
5520 // \inst|vga_driver_unit|un6_dly_counter_0_x , )
5521
5522         .clk(\inst1|altpll_component|_clk0 ),
5523         .dataa(vcc),
5524         .datab(\inst|vga_driver_unit|hsync_state_3 ),
5525         .datac(vcc),
5526         .datad(\inst|vga_driver_unit|hsync_state_1 ),
5527         .aclr(gnd),
5528         .aload(gnd),
5529         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
5530         .sload(gnd),
5531         .ena(\inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4 ),
5532         .cin(gnd),
5533         .cin0(gnd),
5534         .cin1(vcc),
5535         .inverta(gnd),
5536         .regcascin(gnd),
5537         .devclrn(devclrn),
5538         .devpor(devpor),
5539         .combout(),
5540         .regout(\inst|vga_driver_unit|v_enable_sig ),
5541         .cout(),
5542         .cout0(),
5543         .cout1());
5544 // synopsys translate_off
5545 defparam \inst|vga_driver_unit|v_enable_sig_Z .lut_mask = "ffcc";
5546 defparam \inst|vga_driver_unit|v_enable_sig_Z .operation_mode = "normal";
5547 defparam \inst|vga_driver_unit|v_enable_sig_Z .output_mode = "reg_only";
5548 defparam \inst|vga_driver_unit|v_enable_sig_Z .register_cascade_mode = "off";
5549 defparam \inst|vga_driver_unit|v_enable_sig_Z .sum_lutc_input = "datac";
5550 defparam \inst|vga_driver_unit|v_enable_sig_Z .synch_mode = "on";
5551 // synopsys translate_on
5552
5553 // atom is at LC_X49_Y33_N8
5554 stratix_lcell \inst|vga_control_unit|b_next_0_g0_3_cZ (
5555 // Equation(s):
5556 // \inst|vga_control_unit|b_next_0_g0_3  = \inst|vga_driver_unit|v_enable_sig  & !\inst|vga_driver_unit|column_counter_sig_9  & !\inst|vga_driver_unit|line_counter_sig_8  & !\inst|vga_driver_unit|column_counter_sig_8
5557
5558         .clk(gnd),
5559         .dataa(\inst|vga_driver_unit|v_enable_sig ),
5560         .datab(\inst|vga_driver_unit|column_counter_sig_9 ),
5561         .datac(\inst|vga_driver_unit|line_counter_sig_8 ),
5562         .datad(\inst|vga_driver_unit|column_counter_sig_8 ),
5563         .aclr(gnd),
5564         .aload(gnd),
5565         .sclr(gnd),
5566         .sload(gnd),
5567         .ena(vcc),
5568         .cin(gnd),
5569         .cin0(gnd),
5570         .cin1(vcc),
5571         .inverta(gnd),
5572         .regcascin(gnd),
5573         .devclrn(devclrn),
5574         .devpor(devpor),
5575         .combout(\inst|vga_control_unit|b_next_0_g0_3 ),
5576         .regout(),
5577         .cout(),
5578         .cout0(),
5579         .cout1());
5580 // synopsys translate_off
5581 defparam \inst|vga_control_unit|b_next_0_g0_3_cZ .lut_mask = "0002";
5582 defparam \inst|vga_control_unit|b_next_0_g0_3_cZ .operation_mode = "normal";
5583 defparam \inst|vga_control_unit|b_next_0_g0_3_cZ .output_mode = "comb_only";
5584 defparam \inst|vga_control_unit|b_next_0_g0_3_cZ .register_cascade_mode = "off";
5585 defparam \inst|vga_control_unit|b_next_0_g0_3_cZ .sum_lutc_input = "datac";
5586 defparam \inst|vga_control_unit|b_next_0_g0_3_cZ .synch_mode = "off";
5587 // synopsys translate_on
5588
5589 // atom is at LC_X24_Y41_N1
5590 stratix_lcell \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4_cZ (
5591 // Equation(s):
5592 // \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4  = \inst|vga_driver_unit|un6_dly_counter_0_x  # !\inst|vga_driver_unit|vsync_state_5  & !\inst|vga_driver_unit|vsync_state_4
5593
5594         .clk(gnd),
5595         .dataa(\inst|vga_driver_unit|vsync_state_5 ),
5596         .datab(\inst|vga_driver_unit|vsync_state_4 ),
5597         .datac(vcc),
5598         .datad(\inst|vga_driver_unit|un6_dly_counter_0_x ),
5599         .aclr(gnd),
5600         .aload(gnd),
5601         .sclr(gnd),
5602         .sload(gnd),
5603         .ena(vcc),
5604         .cin(gnd),
5605         .cin0(gnd),
5606         .cin1(vcc),
5607         .inverta(gnd),
5608         .regcascin(gnd),
5609         .devclrn(devclrn),
5610         .devpor(devpor),
5611         .combout(\inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4 ),
5612         .regout(),
5613         .cout(),
5614         .cout0(),
5615         .cout1());
5616 // synopsys translate_off
5617 defparam \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4_cZ .lut_mask = "ff11";
5618 defparam \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4_cZ .operation_mode = "normal";
5619 defparam \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4_cZ .output_mode = "comb_only";
5620 defparam \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4_cZ .register_cascade_mode = "off";
5621 defparam \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4_cZ .sum_lutc_input = "datac";
5622 defparam \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4_cZ .synch_mode = "off";
5623 // synopsys translate_on
5624
5625 // atom is at LC_X49_Y33_N0
5626 stratix_lcell \inst|vga_driver_unit|h_enable_sig_Z (
5627 // Equation(s):
5628 // \inst|vga_driver_unit|h_enable_sig  = DFFEAS(\inst|vga_driver_unit|vsync_state_3  # \inst|vga_driver_unit|vsync_state_1 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4 , , ,
5629 // \inst|vga_driver_unit|un6_dly_counter_0_x , )
5630
5631         .clk(\inst1|altpll_component|_clk0 ),
5632         .dataa(\inst|vga_driver_unit|vsync_state_3 ),
5633         .datab(vcc),
5634         .datac(vcc),
5635         .datad(\inst|vga_driver_unit|vsync_state_1 ),
5636         .aclr(gnd),
5637         .aload(gnd),
5638         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
5639         .sload(gnd),
5640         .ena(\inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4 ),
5641         .cin(gnd),
5642         .cin0(gnd),
5643         .cin1(vcc),
5644         .inverta(gnd),
5645         .regcascin(gnd),
5646         .devclrn(devclrn),
5647         .devpor(devpor),
5648         .combout(),
5649         .regout(\inst|vga_driver_unit|h_enable_sig ),
5650         .cout(),
5651         .cout0(),
5652         .cout1());
5653 // synopsys translate_off
5654 defparam \inst|vga_driver_unit|h_enable_sig_Z .lut_mask = "ffaa";
5655 defparam \inst|vga_driver_unit|h_enable_sig_Z .operation_mode = "normal";
5656 defparam \inst|vga_driver_unit|h_enable_sig_Z .output_mode = "reg_only";
5657 defparam \inst|vga_driver_unit|h_enable_sig_Z .register_cascade_mode = "off";
5658 defparam \inst|vga_driver_unit|h_enable_sig_Z .sum_lutc_input = "datac";
5659 defparam \inst|vga_driver_unit|h_enable_sig_Z .synch_mode = "on";
5660 // synopsys translate_on
5661
5662 // atom is at LC_X49_Y33_N9
5663 stratix_lcell \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto6 (
5664 // Equation(s):
5665 // \inst|vga_control_unit|un9_v_enablelto6  = \inst|vga_driver_unit|un10_column_counter_siglt6_1  # !\inst|vga_driver_unit|column_counter_sig_2  & !\inst|vga_driver_unit|column_counter_sig_3  & !\inst|vga_driver_unit|column_counter_sig_4
5666
5667         .clk(gnd),
5668         .dataa(\inst|vga_driver_unit|column_counter_sig_2 ),
5669         .datab(\inst|vga_driver_unit|un10_column_counter_siglt6_1 ),
5670         .datac(\inst|vga_driver_unit|column_counter_sig_3 ),
5671         .datad(\inst|vga_driver_unit|column_counter_sig_4 ),
5672         .aclr(gnd),
5673         .aload(gnd),
5674         .sclr(gnd),
5675         .sload(gnd),
5676         .ena(vcc),
5677         .cin(gnd),
5678         .cin0(gnd),
5679         .cin1(vcc),
5680         .inverta(gnd),
5681         .regcascin(gnd),
5682         .devclrn(devclrn),
5683         .devpor(devpor),
5684         .combout(\inst|vga_control_unit|un9_v_enablelto6 ),
5685         .regout(),
5686         .cout(),
5687         .cout0(),
5688         .cout1());
5689 // synopsys translate_off
5690 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto6 .lut_mask = "cccd";
5691 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto6 .operation_mode = "normal";
5692 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto6 .output_mode = "comb_only";
5693 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto6 .register_cascade_mode = "off";
5694 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto6 .sum_lutc_input = "datac";
5695 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto6 .synch_mode = "off";
5696 // synopsys translate_on
5697
5698 // atom is at LC_X49_Y33_N3
5699 stratix_lcell \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto9 (
5700 // Equation(s):
5701 // \inst|vga_control_unit|un9_v_enablelto9  = !\inst|vga_driver_unit|column_counter_sig_8  & !\inst|vga_driver_unit|column_counter_sig_7  & !\inst|vga_driver_unit|column_counter_sig_9  & \inst|vga_control_unit|un9_v_enablelto6
5702
5703         .clk(gnd),
5704         .dataa(\inst|vga_driver_unit|column_counter_sig_8 ),
5705         .datab(\inst|vga_driver_unit|column_counter_sig_7 ),
5706         .datac(\inst|vga_driver_unit|column_counter_sig_9 ),
5707         .datad(\inst|vga_control_unit|un9_v_enablelto6 ),
5708         .aclr(gnd),
5709         .aload(gnd),
5710         .sclr(gnd),
5711         .sload(gnd),
5712         .ena(vcc),
5713         .cin(gnd),
5714         .cin0(gnd),
5715         .cin1(vcc),
5716         .inverta(gnd),
5717         .regcascin(gnd),
5718         .devclrn(devclrn),
5719         .devpor(devpor),
5720         .combout(\inst|vga_control_unit|un9_v_enablelto9 ),
5721         .regout(),
5722         .cout(),
5723         .cout0(),
5724         .cout1());
5725 // synopsys translate_off
5726 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto9 .lut_mask = "0100";
5727 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto9 .operation_mode = "normal";
5728 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto9 .output_mode = "comb_only";
5729 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto9 .register_cascade_mode = "off";
5730 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto9 .sum_lutc_input = "datac";
5731 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto9 .synch_mode = "off";
5732 // synopsys translate_on
5733
5734 // atom is at LC_X50_Y46_N6
5735 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_0_ (
5736 // Equation(s):
5737 // \inst|vga_control_unit|toggle_counter_sig_0  = DFFEAS(!\inst|vga_control_unit|toggle_counter_sig_0 , GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , , !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
5738
5739         .clk(\inst1|altpll_component|_clk0 ),
5740         .dataa(vcc),
5741         .datab(vcc),
5742         .datac(vcc),
5743         .datad(\inst|vga_control_unit|toggle_counter_sig_0 ),
5744         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
5745         .aload(gnd),
5746         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
5747         .sload(gnd),
5748         .ena(vcc),
5749         .cin(gnd),
5750         .cin0(gnd),
5751         .cin1(vcc),
5752         .inverta(gnd),
5753         .regcascin(gnd),
5754         .devclrn(devclrn),
5755         .devpor(devpor),
5756         .combout(),
5757         .regout(\inst|vga_control_unit|toggle_counter_sig_0 ),
5758         .cout(),
5759         .cout0(),
5760         .cout1());
5761 // synopsys translate_off
5762 defparam \inst|vga_control_unit|toggle_counter_sig_0_ .lut_mask = "00ff";
5763 defparam \inst|vga_control_unit|toggle_counter_sig_0_ .operation_mode = "normal";
5764 defparam \inst|vga_control_unit|toggle_counter_sig_0_ .output_mode = "reg_only";
5765 defparam \inst|vga_control_unit|toggle_counter_sig_0_ .register_cascade_mode = "off";
5766 defparam \inst|vga_control_unit|toggle_counter_sig_0_ .sum_lutc_input = "datac";
5767 defparam \inst|vga_control_unit|toggle_counter_sig_0_ .synch_mode = "on";
5768 // synopsys translate_on
5769
5770 // atom is at LC_X51_Y46_N0
5771 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_1_ (
5772 // Equation(s):
5773 // \inst|vga_control_unit|toggle_counter_sig_1  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_0  $ \inst|vga_control_unit|toggle_counter_sig_1 , GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , ,
5774 // !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
5775 // \inst|vga_control_unit|toggle_counter_sig_cout [1] = CARRY(\inst|vga_control_unit|toggle_counter_sig_0  & \inst|vga_control_unit|toggle_counter_sig_1 )
5776 // \inst|vga_control_unit|toggle_counter_sig_cout[1]~COUT1_17  = CARRY(\inst|vga_control_unit|toggle_counter_sig_0  & \inst|vga_control_unit|toggle_counter_sig_1 )
5777
5778         .clk(\inst1|altpll_component|_clk0 ),
5779         .dataa(\inst|vga_control_unit|toggle_counter_sig_0 ),
5780         .datab(\inst|vga_control_unit|toggle_counter_sig_1 ),
5781         .datac(vcc),
5782         .datad(vcc),
5783         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
5784         .aload(gnd),
5785         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
5786         .sload(gnd),
5787         .ena(vcc),
5788         .cin(gnd),
5789         .cin0(gnd),
5790         .cin1(vcc),
5791         .inverta(gnd),
5792         .regcascin(gnd),
5793         .devclrn(devclrn),
5794         .devpor(devpor),
5795         .combout(),
5796         .regout(\inst|vga_control_unit|toggle_counter_sig_1 ),
5797         .cout(),
5798         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [1]),
5799         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[1]~COUT1_17 ));
5800 // synopsys translate_off
5801 defparam \inst|vga_control_unit|toggle_counter_sig_1_ .lut_mask = "6688";
5802 defparam \inst|vga_control_unit|toggle_counter_sig_1_ .operation_mode = "arithmetic";
5803 defparam \inst|vga_control_unit|toggle_counter_sig_1_ .output_mode = "reg_only";
5804 defparam \inst|vga_control_unit|toggle_counter_sig_1_ .register_cascade_mode = "off";
5805 defparam \inst|vga_control_unit|toggle_counter_sig_1_ .sum_lutc_input = "datac";
5806 defparam \inst|vga_control_unit|toggle_counter_sig_1_ .synch_mode = "on";
5807 // synopsys translate_on
5808
5809 // atom is at LC_X52_Y46_N0
5810 stratix_lcell \inst|vga_control_unit|un2_toggle_counter_next_0_ (
5811 // Equation(s):
5812 // \inst|vga_control_unit|un2_toggle_counter_next_cout [0] = CARRY(\inst|vga_control_unit|toggle_counter_sig_1  & \inst|vga_control_unit|toggle_counter_sig_0 )
5813 // \inst|vga_control_unit|un2_toggle_counter_next_cout[0]~COUT1_3  = CARRY(\inst|vga_control_unit|toggle_counter_sig_1  & \inst|vga_control_unit|toggle_counter_sig_0 )
5814
5815         .clk(gnd),
5816         .dataa(\inst|vga_control_unit|toggle_counter_sig_1 ),
5817         .datab(\inst|vga_control_unit|toggle_counter_sig_0 ),
5818         .datac(vcc),
5819         .datad(vcc),
5820         .aclr(gnd),
5821         .aload(gnd),
5822         .sclr(gnd),
5823         .sload(gnd),
5824         .ena(vcc),
5825         .cin(gnd),
5826         .cin0(gnd),
5827         .cin1(vcc),
5828         .inverta(gnd),
5829         .regcascin(gnd),
5830         .devclrn(devclrn),
5831         .devpor(devpor),
5832         .combout(\inst|vga_control_unit|un2_toggle_counter_next_0_~COMBOUT ),
5833         .regout(),
5834         .cout(),
5835         .cout0(\inst|vga_control_unit|un2_toggle_counter_next_cout [0]),
5836         .cout1(\inst|vga_control_unit|un2_toggle_counter_next_cout[0]~COUT1_3 ));
5837 // synopsys translate_off
5838 defparam \inst|vga_control_unit|un2_toggle_counter_next_0_ .lut_mask = "ff88";
5839 defparam \inst|vga_control_unit|un2_toggle_counter_next_0_ .operation_mode = "arithmetic";
5840 defparam \inst|vga_control_unit|un2_toggle_counter_next_0_ .output_mode = "none";
5841 defparam \inst|vga_control_unit|un2_toggle_counter_next_0_ .register_cascade_mode = "off";
5842 defparam \inst|vga_control_unit|un2_toggle_counter_next_0_ .sum_lutc_input = "datac";
5843 defparam \inst|vga_control_unit|un2_toggle_counter_next_0_ .synch_mode = "off";
5844 // synopsys translate_on
5845
5846 // atom is at LC_X52_Y46_N1
5847 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_2_ (
5848 // Equation(s):
5849 // \inst|vga_control_unit|toggle_counter_sig_2  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_2  $ \inst|vga_control_unit|un2_toggle_counter_next_cout [0], GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , ,
5850 // , , !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
5851 // \inst|vga_control_unit|toggle_counter_sig_cout [2] = CARRY(!\inst|vga_control_unit|un2_toggle_counter_next_cout [0] # !\inst|vga_control_unit|toggle_counter_sig_2  # !\inst|vga_control_unit|toggle_counter_sig_3 )
5852 // \inst|vga_control_unit|toggle_counter_sig_cout[2]~COUT1_33  = CARRY(!\inst|vga_control_unit|un2_toggle_counter_next_cout[0]~COUT1_3  # !\inst|vga_control_unit|toggle_counter_sig_2  # !\inst|vga_control_unit|toggle_counter_sig_3 )
5853
5854         .clk(\inst1|altpll_component|_clk0 ),
5855         .dataa(\inst|vga_control_unit|toggle_counter_sig_3 ),
5856         .datab(\inst|vga_control_unit|toggle_counter_sig_2 ),
5857         .datac(vcc),
5858         .datad(vcc),
5859         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
5860         .aload(gnd),
5861         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
5862         .sload(gnd),
5863         .ena(vcc),
5864         .cin(gnd),
5865         .cin0(\inst|vga_control_unit|un2_toggle_counter_next_cout [0]),
5866         .cin1(\inst|vga_control_unit|un2_toggle_counter_next_cout[0]~COUT1_3 ),
5867         .inverta(gnd),
5868         .regcascin(gnd),
5869         .devclrn(devclrn),
5870         .devpor(devpor),
5871         .combout(),
5872         .regout(\inst|vga_control_unit|toggle_counter_sig_2 ),
5873         .cout(),
5874         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [2]),
5875         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[2]~COUT1_33 ));
5876 // synopsys translate_off
5877 defparam \inst|vga_control_unit|toggle_counter_sig_2_ .cin0_used = "true";
5878 defparam \inst|vga_control_unit|toggle_counter_sig_2_ .cin1_used = "true";
5879 defparam \inst|vga_control_unit|toggle_counter_sig_2_ .lut_mask = "3c7f";
5880 defparam \inst|vga_control_unit|toggle_counter_sig_2_ .operation_mode = "arithmetic";
5881 defparam \inst|vga_control_unit|toggle_counter_sig_2_ .output_mode = "reg_only";
5882 defparam \inst|vga_control_unit|toggle_counter_sig_2_ .register_cascade_mode = "off";
5883 defparam \inst|vga_control_unit|toggle_counter_sig_2_ .sum_lutc_input = "cin";
5884 defparam \inst|vga_control_unit|toggle_counter_sig_2_ .synch_mode = "on";
5885 // synopsys translate_on
5886
5887 // atom is at LC_X51_Y46_N1
5888 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_3_ (
5889 // Equation(s):
5890 // \inst|vga_control_unit|toggle_counter_sig_3  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_3  $ (\inst|vga_control_unit|toggle_counter_sig_2  & \inst|vga_control_unit|toggle_counter_sig_cout [1]), GLOBAL(\inst1|altpll_component|_clk0 ),
5891 // !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , , !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
5892 // \inst|vga_control_unit|toggle_counter_sig_cout [3] = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout [1] # !\inst|vga_control_unit|toggle_counter_sig_3  # !\inst|vga_control_unit|toggle_counter_sig_2 )
5893 // \inst|vga_control_unit|toggle_counter_sig_cout[3]~COUT1_19  = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout[1]~COUT1_17  # !\inst|vga_control_unit|toggle_counter_sig_3  # !\inst|vga_control_unit|toggle_counter_sig_2 )
5894
5895         .clk(\inst1|altpll_component|_clk0 ),
5896         .dataa(\inst|vga_control_unit|toggle_counter_sig_2 ),
5897         .datab(\inst|vga_control_unit|toggle_counter_sig_3 ),
5898         .datac(vcc),
5899         .datad(vcc),
5900         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
5901         .aload(gnd),
5902         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
5903         .sload(gnd),
5904         .ena(vcc),
5905         .cin(gnd),
5906         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [1]),
5907         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[1]~COUT1_17 ),
5908         .inverta(gnd),
5909         .regcascin(gnd),
5910         .devclrn(devclrn),
5911         .devpor(devpor),
5912         .combout(),
5913         .regout(\inst|vga_control_unit|toggle_counter_sig_3 ),
5914         .cout(),
5915         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [3]),
5916         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[3]~COUT1_19 ));
5917 // synopsys translate_off
5918 defparam \inst|vga_control_unit|toggle_counter_sig_3_ .cin0_used = "true";
5919 defparam \inst|vga_control_unit|toggle_counter_sig_3_ .cin1_used = "true";
5920 defparam \inst|vga_control_unit|toggle_counter_sig_3_ .lut_mask = "6c7f";
5921 defparam \inst|vga_control_unit|toggle_counter_sig_3_ .operation_mode = "arithmetic";
5922 defparam \inst|vga_control_unit|toggle_counter_sig_3_ .output_mode = "reg_only";
5923 defparam \inst|vga_control_unit|toggle_counter_sig_3_ .register_cascade_mode = "off";
5924 defparam \inst|vga_control_unit|toggle_counter_sig_3_ .sum_lutc_input = "cin";
5925 defparam \inst|vga_control_unit|toggle_counter_sig_3_ .synch_mode = "on";
5926 // synopsys translate_on
5927
5928 // atom is at LC_X52_Y46_N2
5929 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_4_ (
5930 // Equation(s):
5931 // \inst|vga_control_unit|toggle_counter_sig_4  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_4  $ (!\inst|vga_control_unit|toggle_counter_sig_cout [2]), GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , ,
5932 // , !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
5933 // \inst|vga_control_unit|toggle_counter_sig_cout [4] = CARRY(\inst|vga_control_unit|toggle_counter_sig_4  & \inst|vga_control_unit|toggle_counter_sig_5  & !\inst|vga_control_unit|toggle_counter_sig_cout [2])
5934 // \inst|vga_control_unit|toggle_counter_sig_cout[4]~COUT1_35  = CARRY(\inst|vga_control_unit|toggle_counter_sig_4  & \inst|vga_control_unit|toggle_counter_sig_5  & !\inst|vga_control_unit|toggle_counter_sig_cout[2]~COUT1_33 )
5935
5936         .clk(\inst1|altpll_component|_clk0 ),
5937         .dataa(\inst|vga_control_unit|toggle_counter_sig_4 ),
5938         .datab(\inst|vga_control_unit|toggle_counter_sig_5 ),
5939         .datac(vcc),
5940         .datad(vcc),
5941         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
5942         .aload(gnd),
5943         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
5944         .sload(gnd),
5945         .ena(vcc),
5946         .cin(gnd),
5947         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [2]),
5948         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[2]~COUT1_33 ),
5949         .inverta(gnd),
5950         .regcascin(gnd),
5951         .devclrn(devclrn),
5952         .devpor(devpor),
5953         .combout(),
5954         .regout(\inst|vga_control_unit|toggle_counter_sig_4 ),
5955         .cout(),
5956         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [4]),
5957         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[4]~COUT1_35 ));
5958 // synopsys translate_off
5959 defparam \inst|vga_control_unit|toggle_counter_sig_4_ .cin0_used = "true";
5960 defparam \inst|vga_control_unit|toggle_counter_sig_4_ .cin1_used = "true";
5961 defparam \inst|vga_control_unit|toggle_counter_sig_4_ .lut_mask = "a508";
5962 defparam \inst|vga_control_unit|toggle_counter_sig_4_ .operation_mode = "arithmetic";
5963 defparam \inst|vga_control_unit|toggle_counter_sig_4_ .output_mode = "reg_only";
5964 defparam \inst|vga_control_unit|toggle_counter_sig_4_ .register_cascade_mode = "off";
5965 defparam \inst|vga_control_unit|toggle_counter_sig_4_ .sum_lutc_input = "cin";
5966 defparam \inst|vga_control_unit|toggle_counter_sig_4_ .synch_mode = "on";
5967 // synopsys translate_on
5968
5969 // atom is at LC_X51_Y46_N2
5970 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_5_ (
5971 // Equation(s):
5972 // \inst|vga_control_unit|toggle_counter_sig_5  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_5  $ (\inst|vga_control_unit|toggle_counter_sig_4  & !\inst|vga_control_unit|toggle_counter_sig_cout [3]), GLOBAL(\inst1|altpll_component|_clk0 ),
5973 // !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , , !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
5974 // \inst|vga_control_unit|toggle_counter_sig_cout [5] = CARRY(\inst|vga_control_unit|toggle_counter_sig_5  & \inst|vga_control_unit|toggle_counter_sig_4  & !\inst|vga_control_unit|toggle_counter_sig_cout [3])
5975 // \inst|vga_control_unit|toggle_counter_sig_cout[5]~COUT1_21  = CARRY(\inst|vga_control_unit|toggle_counter_sig_5  & \inst|vga_control_unit|toggle_counter_sig_4  & !\inst|vga_control_unit|toggle_counter_sig_cout[3]~COUT1_19 )
5976
5977         .clk(\inst1|altpll_component|_clk0 ),
5978         .dataa(\inst|vga_control_unit|toggle_counter_sig_5 ),
5979         .datab(\inst|vga_control_unit|toggle_counter_sig_4 ),
5980         .datac(vcc),
5981         .datad(vcc),
5982         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
5983         .aload(gnd),
5984         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
5985         .sload(gnd),
5986         .ena(vcc),
5987         .cin(gnd),
5988         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [3]),
5989         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[3]~COUT1_19 ),
5990         .inverta(gnd),
5991         .regcascin(gnd),
5992         .devclrn(devclrn),
5993         .devpor(devpor),
5994         .combout(),
5995         .regout(\inst|vga_control_unit|toggle_counter_sig_5 ),
5996         .cout(),
5997         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [5]),
5998         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[5]~COUT1_21 ));
5999 // synopsys translate_off
6000 defparam \inst|vga_control_unit|toggle_counter_sig_5_ .cin0_used = "true";
6001 defparam \inst|vga_control_unit|toggle_counter_sig_5_ .cin1_used = "true";
6002 defparam \inst|vga_control_unit|toggle_counter_sig_5_ .lut_mask = "a608";
6003 defparam \inst|vga_control_unit|toggle_counter_sig_5_ .operation_mode = "arithmetic";
6004 defparam \inst|vga_control_unit|toggle_counter_sig_5_ .output_mode = "reg_only";
6005 defparam \inst|vga_control_unit|toggle_counter_sig_5_ .register_cascade_mode = "off";
6006 defparam \inst|vga_control_unit|toggle_counter_sig_5_ .sum_lutc_input = "cin";
6007 defparam \inst|vga_control_unit|toggle_counter_sig_5_ .synch_mode = "on";
6008 // synopsys translate_on
6009
6010 // atom is at LC_X51_Y46_N3
6011 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_7_ (
6012 // Equation(s):
6013 // \inst|vga_control_unit|toggle_counter_sig_7  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_7  $ (\inst|vga_control_unit|toggle_counter_sig_6  & \inst|vga_control_unit|toggle_counter_sig_cout [5]), GLOBAL(\inst1|altpll_component|_clk0 ),
6014 // !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , , !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6015 // \inst|vga_control_unit|toggle_counter_sig_cout [7] = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout [5] # !\inst|vga_control_unit|toggle_counter_sig_7  # !\inst|vga_control_unit|toggle_counter_sig_6 )
6016 // \inst|vga_control_unit|toggle_counter_sig_cout[7]~COUT1_23  = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout[5]~COUT1_21  # !\inst|vga_control_unit|toggle_counter_sig_7  # !\inst|vga_control_unit|toggle_counter_sig_6 )
6017
6018         .clk(\inst1|altpll_component|_clk0 ),
6019         .dataa(\inst|vga_control_unit|toggle_counter_sig_6 ),
6020         .datab(\inst|vga_control_unit|toggle_counter_sig_7 ),
6021         .datac(vcc),
6022         .datad(vcc),
6023         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6024         .aload(gnd),
6025         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6026         .sload(gnd),
6027         .ena(vcc),
6028         .cin(gnd),
6029         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [5]),
6030         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[5]~COUT1_21 ),
6031         .inverta(gnd),
6032         .regcascin(gnd),
6033         .devclrn(devclrn),
6034         .devpor(devpor),
6035         .combout(),
6036         .regout(\inst|vga_control_unit|toggle_counter_sig_7 ),
6037         .cout(),
6038         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [7]),
6039         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[7]~COUT1_23 ));
6040 // synopsys translate_off
6041 defparam \inst|vga_control_unit|toggle_counter_sig_7_ .cin0_used = "true";
6042 defparam \inst|vga_control_unit|toggle_counter_sig_7_ .cin1_used = "true";
6043 defparam \inst|vga_control_unit|toggle_counter_sig_7_ .lut_mask = "6c7f";
6044 defparam \inst|vga_control_unit|toggle_counter_sig_7_ .operation_mode = "arithmetic";
6045 defparam \inst|vga_control_unit|toggle_counter_sig_7_ .output_mode = "reg_only";
6046 defparam \inst|vga_control_unit|toggle_counter_sig_7_ .register_cascade_mode = "off";
6047 defparam \inst|vga_control_unit|toggle_counter_sig_7_ .sum_lutc_input = "cin";
6048 defparam \inst|vga_control_unit|toggle_counter_sig_7_ .synch_mode = "on";
6049 // synopsys translate_on
6050
6051 // atom is at LC_X52_Y46_N3
6052 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_6_ (
6053 // Equation(s):
6054 // \inst|vga_control_unit|toggle_counter_sig_6  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_6  $ (\inst|vga_control_unit|toggle_counter_sig_cout [4]), GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , ,
6055 // !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6056 // \inst|vga_control_unit|toggle_counter_sig_cout [6] = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout [4] # !\inst|vga_control_unit|toggle_counter_sig_7  # !\inst|vga_control_unit|toggle_counter_sig_6 )
6057 // \inst|vga_control_unit|toggle_counter_sig_cout[6]~COUT1_37  = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout[4]~COUT1_35  # !\inst|vga_control_unit|toggle_counter_sig_7  # !\inst|vga_control_unit|toggle_counter_sig_6 )
6058
6059         .clk(\inst1|altpll_component|_clk0 ),
6060         .dataa(\inst|vga_control_unit|toggle_counter_sig_6 ),
6061         .datab(\inst|vga_control_unit|toggle_counter_sig_7 ),
6062         .datac(vcc),
6063         .datad(vcc),
6064         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6065         .aload(gnd),
6066         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6067         .sload(gnd),
6068         .ena(vcc),
6069         .cin(gnd),
6070         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [4]),
6071         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[4]~COUT1_35 ),
6072         .inverta(gnd),
6073         .regcascin(gnd),
6074         .devclrn(devclrn),
6075         .devpor(devpor),
6076         .combout(),
6077         .regout(\inst|vga_control_unit|toggle_counter_sig_6 ),
6078         .cout(),
6079         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [6]),
6080         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[6]~COUT1_37 ));
6081 // synopsys translate_off
6082 defparam \inst|vga_control_unit|toggle_counter_sig_6_ .cin0_used = "true";
6083 defparam \inst|vga_control_unit|toggle_counter_sig_6_ .cin1_used = "true";
6084 defparam \inst|vga_control_unit|toggle_counter_sig_6_ .lut_mask = "5a7f";
6085 defparam \inst|vga_control_unit|toggle_counter_sig_6_ .operation_mode = "arithmetic";
6086 defparam \inst|vga_control_unit|toggle_counter_sig_6_ .output_mode = "reg_only";
6087 defparam \inst|vga_control_unit|toggle_counter_sig_6_ .register_cascade_mode = "off";
6088 defparam \inst|vga_control_unit|toggle_counter_sig_6_ .sum_lutc_input = "cin";
6089 defparam \inst|vga_control_unit|toggle_counter_sig_6_ .synch_mode = "on";
6090 // synopsys translate_on
6091
6092 // atom is at LC_X51_Y46_N4
6093 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_9_ (
6094 // Equation(s):
6095 // \inst|vga_control_unit|toggle_counter_sig_9  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_9  $ (\inst|vga_control_unit|toggle_counter_sig_8  & !\inst|vga_control_unit|toggle_counter_sig_cout [7]), GLOBAL(\inst1|altpll_component|_clk0 ),
6096 // !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , , !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6097 // \inst|vga_control_unit|toggle_counter_sig_cout [9] = CARRY(\inst|vga_control_unit|toggle_counter_sig_8  & \inst|vga_control_unit|toggle_counter_sig_9  & !\inst|vga_control_unit|toggle_counter_sig_cout[7]~COUT1_23 )
6098
6099         .clk(\inst1|altpll_component|_clk0 ),
6100         .dataa(\inst|vga_control_unit|toggle_counter_sig_8 ),
6101         .datab(\inst|vga_control_unit|toggle_counter_sig_9 ),
6102         .datac(vcc),
6103         .datad(vcc),
6104         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6105         .aload(gnd),
6106         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6107         .sload(gnd),
6108         .ena(vcc),
6109         .cin(gnd),
6110         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [7]),
6111         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[7]~COUT1_23 ),
6112         .inverta(gnd),
6113         .regcascin(gnd),
6114         .devclrn(devclrn),
6115         .devpor(devpor),
6116         .combout(),
6117         .regout(\inst|vga_control_unit|toggle_counter_sig_9 ),
6118         .cout(\inst|vga_control_unit|toggle_counter_sig_cout [9]),
6119         .cout0(),
6120         .cout1());
6121 // synopsys translate_off
6122 defparam \inst|vga_control_unit|toggle_counter_sig_9_ .cin0_used = "true";
6123 defparam \inst|vga_control_unit|toggle_counter_sig_9_ .cin1_used = "true";
6124 defparam \inst|vga_control_unit|toggle_counter_sig_9_ .lut_mask = "c608";
6125 defparam \inst|vga_control_unit|toggle_counter_sig_9_ .operation_mode = "arithmetic";
6126 defparam \inst|vga_control_unit|toggle_counter_sig_9_ .output_mode = "reg_only";
6127 defparam \inst|vga_control_unit|toggle_counter_sig_9_ .register_cascade_mode = "off";
6128 defparam \inst|vga_control_unit|toggle_counter_sig_9_ .sum_lutc_input = "cin";
6129 defparam \inst|vga_control_unit|toggle_counter_sig_9_ .synch_mode = "on";
6130 // synopsys translate_on
6131
6132 // atom is at LC_X52_Y46_N4
6133 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_8_ (
6134 // Equation(s):
6135 // \inst|vga_control_unit|toggle_counter_sig_8  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_8  $ (!\inst|vga_control_unit|toggle_counter_sig_cout [6]), GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , ,
6136 // , !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6137 // \inst|vga_control_unit|toggle_counter_sig_cout [8] = CARRY(\inst|vga_control_unit|toggle_counter_sig_8  & \inst|vga_control_unit|toggle_counter_sig_9  & !\inst|vga_control_unit|toggle_counter_sig_cout[6]~COUT1_37 )
6138
6139         .clk(\inst1|altpll_component|_clk0 ),
6140         .dataa(\inst|vga_control_unit|toggle_counter_sig_8 ),
6141         .datab(\inst|vga_control_unit|toggle_counter_sig_9 ),
6142         .datac(vcc),
6143         .datad(vcc),
6144         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6145         .aload(gnd),
6146         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6147         .sload(gnd),
6148         .ena(vcc),
6149         .cin(gnd),
6150         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [6]),
6151         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[6]~COUT1_37 ),
6152         .inverta(gnd),
6153         .regcascin(gnd),
6154         .devclrn(devclrn),
6155         .devpor(devpor),
6156         .combout(),
6157         .regout(\inst|vga_control_unit|toggle_counter_sig_8 ),
6158         .cout(\inst|vga_control_unit|toggle_counter_sig_cout [8]),
6159         .cout0(),
6160         .cout1());
6161 // synopsys translate_off
6162 defparam \inst|vga_control_unit|toggle_counter_sig_8_ .cin0_used = "true";
6163 defparam \inst|vga_control_unit|toggle_counter_sig_8_ .cin1_used = "true";
6164 defparam \inst|vga_control_unit|toggle_counter_sig_8_ .lut_mask = "a508";
6165 defparam \inst|vga_control_unit|toggle_counter_sig_8_ .operation_mode = "arithmetic";
6166 defparam \inst|vga_control_unit|toggle_counter_sig_8_ .output_mode = "reg_only";
6167 defparam \inst|vga_control_unit|toggle_counter_sig_8_ .register_cascade_mode = "off";
6168 defparam \inst|vga_control_unit|toggle_counter_sig_8_ .sum_lutc_input = "cin";
6169 defparam \inst|vga_control_unit|toggle_counter_sig_8_ .synch_mode = "on";
6170 // synopsys translate_on
6171
6172 // atom is at LC_X50_Y46_N5
6173 stratix_lcell \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto7_4 (
6174 // Equation(s):
6175 // \inst|vga_control_unit|un1_toggle_counter_siglto7_4  = !\inst|vga_control_unit|toggle_counter_sig_7  & !\inst|vga_control_unit|toggle_counter_sig_5  & !\inst|vga_control_unit|toggle_counter_sig_1  & !\inst|vga_control_unit|toggle_counter_sig_6
6176
6177         .clk(gnd),
6178         .dataa(\inst|vga_control_unit|toggle_counter_sig_7 ),
6179         .datab(\inst|vga_control_unit|toggle_counter_sig_5 ),
6180         .datac(\inst|vga_control_unit|toggle_counter_sig_1 ),
6181         .datad(\inst|vga_control_unit|toggle_counter_sig_6 ),
6182         .aclr(gnd),
6183         .aload(gnd),
6184         .sclr(gnd),
6185         .sload(gnd),
6186         .ena(vcc),
6187         .cin(gnd),
6188         .cin0(gnd),
6189         .cin1(vcc),
6190         .inverta(gnd),
6191         .regcascin(gnd),
6192         .devclrn(devclrn),
6193         .devpor(devpor),
6194         .combout(\inst|vga_control_unit|un1_toggle_counter_siglto7_4 ),
6195         .regout(),
6196         .cout(),
6197         .cout0(),
6198         .cout1());
6199 // synopsys translate_off
6200 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto7_4 .lut_mask = "0001";
6201 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto7_4 .operation_mode = "normal";
6202 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto7_4 .output_mode = "comb_only";
6203 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto7_4 .register_cascade_mode = "off";
6204 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto7_4 .sum_lutc_input = "datac";
6205 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto7_4 .synch_mode = "off";
6206 // synopsys translate_on
6207
6208 // atom is at LC_X50_Y46_N9
6209 stratix_lcell \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto7 (
6210 // Equation(s):
6211 // \inst|vga_control_unit|un1_toggle_counter_siglto7  = !\inst|vga_control_unit|toggle_counter_sig_3  & !\inst|vga_control_unit|toggle_counter_sig_4  & \inst|vga_control_unit|un1_toggle_counter_siglto7_4  & !\inst|vga_control_unit|toggle_counter_sig_2
6212
6213         .clk(gnd),
6214         .dataa(\inst|vga_control_unit|toggle_counter_sig_3 ),
6215         .datab(\inst|vga_control_unit|toggle_counter_sig_4 ),
6216         .datac(\inst|vga_control_unit|un1_toggle_counter_siglto7_4 ),
6217         .datad(\inst|vga_control_unit|toggle_counter_sig_2 ),
6218         .aclr(gnd),
6219         .aload(gnd),
6220         .sclr(gnd),
6221         .sload(gnd),
6222         .ena(vcc),
6223         .cin(gnd),
6224         .cin0(gnd),
6225         .cin1(vcc),
6226         .inverta(gnd),
6227         .regcascin(gnd),
6228         .devclrn(devclrn),
6229         .devpor(devpor),
6230         .combout(\inst|vga_control_unit|un1_toggle_counter_siglto7 ),
6231         .regout(),
6232         .cout(),
6233         .cout0(),
6234         .cout1());
6235 // synopsys translate_off
6236 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto7 .lut_mask = "0010";
6237 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto7 .operation_mode = "normal";
6238 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto7 .output_mode = "comb_only";
6239 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto7 .register_cascade_mode = "off";
6240 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto7 .sum_lutc_input = "datac";
6241 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto7 .synch_mode = "off";
6242 // synopsys translate_on
6243
6244 // atom is at LC_X51_Y46_N5
6245 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_11_ (
6246 // Equation(s):
6247 // \inst|vga_control_unit|toggle_counter_sig_11  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_11  $ (\inst|vga_control_unit|toggle_counter_sig_10  & \inst|vga_control_unit|toggle_counter_sig_cout [9]), GLOBAL(\inst1|altpll_component|_clk0 ),
6248 // !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , , !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6249 // \inst|vga_control_unit|toggle_counter_sig_cout [11] = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout [9] # !\inst|vga_control_unit|toggle_counter_sig_11  # !\inst|vga_control_unit|toggle_counter_sig_10 )
6250 // \inst|vga_control_unit|toggle_counter_sig_cout[11]~COUT1_25  = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout [9] # !\inst|vga_control_unit|toggle_counter_sig_11  # !\inst|vga_control_unit|toggle_counter_sig_10 )
6251
6252         .clk(\inst1|altpll_component|_clk0 ),
6253         .dataa(\inst|vga_control_unit|toggle_counter_sig_10 ),
6254         .datab(\inst|vga_control_unit|toggle_counter_sig_11 ),
6255         .datac(vcc),
6256         .datad(vcc),
6257         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6258         .aload(gnd),
6259         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6260         .sload(gnd),
6261         .ena(vcc),
6262         .cin(\inst|vga_control_unit|toggle_counter_sig_cout [9]),
6263         .cin0(gnd),
6264         .cin1(vcc),
6265         .inverta(gnd),
6266         .regcascin(gnd),
6267         .devclrn(devclrn),
6268         .devpor(devpor),
6269         .combout(),
6270         .regout(\inst|vga_control_unit|toggle_counter_sig_11 ),
6271         .cout(),
6272         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [11]),
6273         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[11]~COUT1_25 ));
6274 // synopsys translate_off
6275 defparam \inst|vga_control_unit|toggle_counter_sig_11_ .cin_used = "true";
6276 defparam \inst|vga_control_unit|toggle_counter_sig_11_ .lut_mask = "6c7f";
6277 defparam \inst|vga_control_unit|toggle_counter_sig_11_ .operation_mode = "arithmetic";
6278 defparam \inst|vga_control_unit|toggle_counter_sig_11_ .output_mode = "reg_only";
6279 defparam \inst|vga_control_unit|toggle_counter_sig_11_ .register_cascade_mode = "off";
6280 defparam \inst|vga_control_unit|toggle_counter_sig_11_ .sum_lutc_input = "cin";
6281 defparam \inst|vga_control_unit|toggle_counter_sig_11_ .synch_mode = "on";
6282 // synopsys translate_on
6283
6284 // atom is at LC_X52_Y46_N5
6285 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_10_ (
6286 // Equation(s):
6287 // \inst|vga_control_unit|toggle_counter_sig_10  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_10  $ \inst|vga_control_unit|toggle_counter_sig_cout [8], GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , ,
6288 // !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6289 // \inst|vga_control_unit|toggle_counter_sig_cout [10] = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout [8] # !\inst|vga_control_unit|toggle_counter_sig_10  # !\inst|vga_control_unit|toggle_counter_sig_11 )
6290 // \inst|vga_control_unit|toggle_counter_sig_cout[10]~COUT1_39  = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout [8] # !\inst|vga_control_unit|toggle_counter_sig_10  # !\inst|vga_control_unit|toggle_counter_sig_11 )
6291
6292         .clk(\inst1|altpll_component|_clk0 ),
6293         .dataa(\inst|vga_control_unit|toggle_counter_sig_11 ),
6294         .datab(\inst|vga_control_unit|toggle_counter_sig_10 ),
6295         .datac(vcc),
6296         .datad(vcc),
6297         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6298         .aload(gnd),
6299         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6300         .sload(gnd),
6301         .ena(vcc),
6302         .cin(\inst|vga_control_unit|toggle_counter_sig_cout [8]),
6303         .cin0(gnd),
6304         .cin1(vcc),
6305         .inverta(gnd),
6306         .regcascin(gnd),
6307         .devclrn(devclrn),
6308         .devpor(devpor),
6309         .combout(),
6310         .regout(\inst|vga_control_unit|toggle_counter_sig_10 ),
6311         .cout(),
6312         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [10]),
6313         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[10]~COUT1_39 ));
6314 // synopsys translate_off
6315 defparam \inst|vga_control_unit|toggle_counter_sig_10_ .cin_used = "true";
6316 defparam \inst|vga_control_unit|toggle_counter_sig_10_ .lut_mask = "3c7f";
6317 defparam \inst|vga_control_unit|toggle_counter_sig_10_ .operation_mode = "arithmetic";
6318 defparam \inst|vga_control_unit|toggle_counter_sig_10_ .output_mode = "reg_only";
6319 defparam \inst|vga_control_unit|toggle_counter_sig_10_ .register_cascade_mode = "off";
6320 defparam \inst|vga_control_unit|toggle_counter_sig_10_ .sum_lutc_input = "cin";
6321 defparam \inst|vga_control_unit|toggle_counter_sig_10_ .synch_mode = "on";
6322 // synopsys translate_on
6323
6324 // atom is at LC_X50_Y46_N8
6325 stratix_lcell \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto10 (
6326 // Equation(s):
6327 // \inst|vga_control_unit|un1_toggle_counter_siglto10  = !\inst|vga_control_unit|toggle_counter_sig_9  & (\inst|vga_control_unit|un1_toggle_counter_siglto7  # !\inst|vga_control_unit|toggle_counter_sig_8 ) # !\inst|vga_control_unit|toggle_counter_sig_10
6328
6329         .clk(gnd),
6330         .dataa(\inst|vga_control_unit|toggle_counter_sig_8 ),
6331         .datab(\inst|vga_control_unit|un1_toggle_counter_siglto7 ),
6332         .datac(\inst|vga_control_unit|toggle_counter_sig_9 ),
6333         .datad(\inst|vga_control_unit|toggle_counter_sig_10 ),
6334         .aclr(gnd),
6335         .aload(gnd),
6336         .sclr(gnd),
6337         .sload(gnd),
6338         .ena(vcc),
6339         .cin(gnd),
6340         .cin0(gnd),
6341         .cin1(vcc),
6342         .inverta(gnd),
6343         .regcascin(gnd),
6344         .devclrn(devclrn),
6345         .devpor(devpor),
6346         .combout(\inst|vga_control_unit|un1_toggle_counter_siglto10 ),
6347         .regout(),
6348         .cout(),
6349         .cout0(),
6350         .cout1());
6351 // synopsys translate_off
6352 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto10 .lut_mask = "0dff";
6353 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto10 .operation_mode = "normal";
6354 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto10 .output_mode = "comb_only";
6355 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto10 .register_cascade_mode = "off";
6356 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto10 .sum_lutc_input = "datac";
6357 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto10 .synch_mode = "off";
6358 // synopsys translate_on
6359
6360 // atom is at LC_X52_Y46_N6
6361 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_12_ (
6362 // Equation(s):
6363 // \inst|vga_control_unit|toggle_counter_sig_12  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_12  $ !(!\inst|vga_control_unit|toggle_counter_sig_cout [8] & \inst|vga_control_unit|toggle_counter_sig_cout [10]) #
6364 // (\inst|vga_control_unit|toggle_counter_sig_cout [8] & \inst|vga_control_unit|toggle_counter_sig_cout[10]~COUT1_39 ), GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , ,
6365 // !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6366 // \inst|vga_control_unit|toggle_counter_sig_cout [12] = CARRY(\inst|vga_control_unit|toggle_counter_sig_13  & \inst|vga_control_unit|toggle_counter_sig_12  & !\inst|vga_control_unit|toggle_counter_sig_cout [10])
6367 // \inst|vga_control_unit|toggle_counter_sig_cout[12]~COUT1_41  = CARRY(\inst|vga_control_unit|toggle_counter_sig_13  & \inst|vga_control_unit|toggle_counter_sig_12  & !\inst|vga_control_unit|toggle_counter_sig_cout[10]~COUT1_39 )
6368
6369         .clk(\inst1|altpll_component|_clk0 ),
6370         .dataa(\inst|vga_control_unit|toggle_counter_sig_13 ),
6371         .datab(\inst|vga_control_unit|toggle_counter_sig_12 ),
6372         .datac(vcc),
6373         .datad(vcc),
6374         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6375         .aload(gnd),
6376         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6377         .sload(gnd),
6378         .ena(vcc),
6379         .cin(\inst|vga_control_unit|toggle_counter_sig_cout [8]),
6380         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [10]),
6381         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[10]~COUT1_39 ),
6382         .inverta(gnd),
6383         .regcascin(gnd),
6384         .devclrn(devclrn),
6385         .devpor(devpor),
6386         .combout(),
6387         .regout(\inst|vga_control_unit|toggle_counter_sig_12 ),
6388         .cout(),
6389         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [12]),
6390         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[12]~COUT1_41 ));
6391 // synopsys translate_off
6392 defparam \inst|vga_control_unit|toggle_counter_sig_12_ .cin0_used = "true";
6393 defparam \inst|vga_control_unit|toggle_counter_sig_12_ .cin1_used = "true";
6394 defparam \inst|vga_control_unit|toggle_counter_sig_12_ .cin_used = "true";
6395 defparam \inst|vga_control_unit|toggle_counter_sig_12_ .lut_mask = "c308";
6396 defparam \inst|vga_control_unit|toggle_counter_sig_12_ .operation_mode = "arithmetic";
6397 defparam \inst|vga_control_unit|toggle_counter_sig_12_ .output_mode = "reg_only";
6398 defparam \inst|vga_control_unit|toggle_counter_sig_12_ .register_cascade_mode = "off";
6399 defparam \inst|vga_control_unit|toggle_counter_sig_12_ .sum_lutc_input = "cin";
6400 defparam \inst|vga_control_unit|toggle_counter_sig_12_ .synch_mode = "on";
6401 // synopsys translate_on
6402
6403 // atom is at LC_X51_Y46_N6
6404 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_13_ (
6405 // Equation(s):
6406 // \inst|vga_control_unit|toggle_counter_sig_13  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_13  $ (\inst|vga_control_unit|toggle_counter_sig_12  & !(!\inst|vga_control_unit|toggle_counter_sig_cout [9] & \inst|vga_control_unit|toggle_counter_sig_cout
6407 // [11]) # (\inst|vga_control_unit|toggle_counter_sig_cout [9] & \inst|vga_control_unit|toggle_counter_sig_cout[11]~COUT1_25 )), GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , ,
6408 // !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6409 // \inst|vga_control_unit|toggle_counter_sig_cout [13] = CARRY(\inst|vga_control_unit|toggle_counter_sig_13  & \inst|vga_control_unit|toggle_counter_sig_12  & !\inst|vga_control_unit|toggle_counter_sig_cout [11])
6410 // \inst|vga_control_unit|toggle_counter_sig_cout[13]~COUT1_27  = CARRY(\inst|vga_control_unit|toggle_counter_sig_13  & \inst|vga_control_unit|toggle_counter_sig_12  & !\inst|vga_control_unit|toggle_counter_sig_cout[11]~COUT1_25 )
6411
6412         .clk(\inst1|altpll_component|_clk0 ),
6413         .dataa(\inst|vga_control_unit|toggle_counter_sig_13 ),
6414         .datab(\inst|vga_control_unit|toggle_counter_sig_12 ),
6415         .datac(vcc),
6416         .datad(vcc),
6417         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6418         .aload(gnd),
6419         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6420         .sload(gnd),
6421         .ena(vcc),
6422         .cin(\inst|vga_control_unit|toggle_counter_sig_cout [9]),
6423         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [11]),
6424         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[11]~COUT1_25 ),
6425         .inverta(gnd),
6426         .regcascin(gnd),
6427         .devclrn(devclrn),
6428         .devpor(devpor),
6429         .combout(),
6430         .regout(\inst|vga_control_unit|toggle_counter_sig_13 ),
6431         .cout(),
6432         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [13]),
6433         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[13]~COUT1_27 ));
6434 // synopsys translate_off
6435 defparam \inst|vga_control_unit|toggle_counter_sig_13_ .cin0_used = "true";
6436 defparam \inst|vga_control_unit|toggle_counter_sig_13_ .cin1_used = "true";
6437 defparam \inst|vga_control_unit|toggle_counter_sig_13_ .cin_used = "true";
6438 defparam \inst|vga_control_unit|toggle_counter_sig_13_ .lut_mask = "a608";
6439 defparam \inst|vga_control_unit|toggle_counter_sig_13_ .operation_mode = "arithmetic";
6440 defparam \inst|vga_control_unit|toggle_counter_sig_13_ .output_mode = "reg_only";
6441 defparam \inst|vga_control_unit|toggle_counter_sig_13_ .register_cascade_mode = "off";
6442 defparam \inst|vga_control_unit|toggle_counter_sig_13_ .sum_lutc_input = "cin";
6443 defparam \inst|vga_control_unit|toggle_counter_sig_13_ .synch_mode = "on";
6444 // synopsys translate_on
6445
6446 // atom is at LC_X51_Y46_N7
6447 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_15_ (
6448 // Equation(s):
6449 // \inst|vga_control_unit|toggle_counter_sig_15  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_15  $ (\inst|vga_control_unit|toggle_counter_sig_14  & (!\inst|vga_control_unit|toggle_counter_sig_cout [9] & \inst|vga_control_unit|toggle_counter_sig_cout
6450 // [13]) # (\inst|vga_control_unit|toggle_counter_sig_cout [9] & \inst|vga_control_unit|toggle_counter_sig_cout[13]~COUT1_27 )), GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , ,
6451 // !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6452 // \inst|vga_control_unit|toggle_counter_sig_cout [15] = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout [13] # !\inst|vga_control_unit|toggle_counter_sig_15  # !\inst|vga_control_unit|toggle_counter_sig_14 )
6453 // \inst|vga_control_unit|toggle_counter_sig_cout[15]~COUT1_29  = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout[13]~COUT1_27  # !\inst|vga_control_unit|toggle_counter_sig_15  # !\inst|vga_control_unit|toggle_counter_sig_14 )
6454
6455         .clk(\inst1|altpll_component|_clk0 ),
6456         .dataa(\inst|vga_control_unit|toggle_counter_sig_14 ),
6457         .datab(\inst|vga_control_unit|toggle_counter_sig_15 ),
6458         .datac(vcc),
6459         .datad(vcc),
6460         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6461         .aload(gnd),
6462         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6463         .sload(gnd),
6464         .ena(vcc),
6465         .cin(\inst|vga_control_unit|toggle_counter_sig_cout [9]),
6466         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [13]),
6467         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[13]~COUT1_27 ),
6468         .inverta(gnd),
6469         .regcascin(gnd),
6470         .devclrn(devclrn),
6471         .devpor(devpor),
6472         .combout(),
6473         .regout(\inst|vga_control_unit|toggle_counter_sig_15 ),
6474         .cout(),
6475         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [15]),
6476         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[15]~COUT1_29 ));
6477 // synopsys translate_off
6478 defparam \inst|vga_control_unit|toggle_counter_sig_15_ .cin0_used = "true";
6479 defparam \inst|vga_control_unit|toggle_counter_sig_15_ .cin1_used = "true";
6480 defparam \inst|vga_control_unit|toggle_counter_sig_15_ .cin_used = "true";
6481 defparam \inst|vga_control_unit|toggle_counter_sig_15_ .lut_mask = "6c7f";
6482 defparam \inst|vga_control_unit|toggle_counter_sig_15_ .operation_mode = "arithmetic";
6483 defparam \inst|vga_control_unit|toggle_counter_sig_15_ .output_mode = "reg_only";
6484 defparam \inst|vga_control_unit|toggle_counter_sig_15_ .register_cascade_mode = "off";
6485 defparam \inst|vga_control_unit|toggle_counter_sig_15_ .sum_lutc_input = "cin";
6486 defparam \inst|vga_control_unit|toggle_counter_sig_15_ .synch_mode = "on";
6487 // synopsys translate_on
6488
6489 // atom is at LC_X52_Y46_N7
6490 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_14_ (
6491 // Equation(s):
6492 // \inst|vga_control_unit|toggle_counter_sig_14  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_14  $ ((!\inst|vga_control_unit|toggle_counter_sig_cout [8] & \inst|vga_control_unit|toggle_counter_sig_cout [12]) #
6493 // (\inst|vga_control_unit|toggle_counter_sig_cout [8] & \inst|vga_control_unit|toggle_counter_sig_cout[12]~COUT1_41 )), GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , ,
6494 // !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6495 // \inst|vga_control_unit|toggle_counter_sig_cout [14] = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout [12] # !\inst|vga_control_unit|toggle_counter_sig_15  # !\inst|vga_control_unit|toggle_counter_sig_14 )
6496 // \inst|vga_control_unit|toggle_counter_sig_cout[14]~COUT1_43  = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout[12]~COUT1_41  # !\inst|vga_control_unit|toggle_counter_sig_15  # !\inst|vga_control_unit|toggle_counter_sig_14 )
6497
6498         .clk(\inst1|altpll_component|_clk0 ),
6499         .dataa(\inst|vga_control_unit|toggle_counter_sig_14 ),
6500         .datab(\inst|vga_control_unit|toggle_counter_sig_15 ),
6501         .datac(vcc),
6502         .datad(vcc),
6503         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6504         .aload(gnd),
6505         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6506         .sload(gnd),
6507         .ena(vcc),
6508         .cin(\inst|vga_control_unit|toggle_counter_sig_cout [8]),
6509         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [12]),
6510         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[12]~COUT1_41 ),
6511         .inverta(gnd),
6512         .regcascin(gnd),
6513         .devclrn(devclrn),
6514         .devpor(devpor),
6515         .combout(),
6516         .regout(\inst|vga_control_unit|toggle_counter_sig_14 ),
6517         .cout(),
6518         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [14]),
6519         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[14]~COUT1_43 ));
6520 // synopsys translate_off
6521 defparam \inst|vga_control_unit|toggle_counter_sig_14_ .cin0_used = "true";
6522 defparam \inst|vga_control_unit|toggle_counter_sig_14_ .cin1_used = "true";
6523 defparam \inst|vga_control_unit|toggle_counter_sig_14_ .cin_used = "true";
6524 defparam \inst|vga_control_unit|toggle_counter_sig_14_ .lut_mask = "5a7f";
6525 defparam \inst|vga_control_unit|toggle_counter_sig_14_ .operation_mode = "arithmetic";
6526 defparam \inst|vga_control_unit|toggle_counter_sig_14_ .output_mode = "reg_only";
6527 defparam \inst|vga_control_unit|toggle_counter_sig_14_ .register_cascade_mode = "off";
6528 defparam \inst|vga_control_unit|toggle_counter_sig_14_ .sum_lutc_input = "cin";
6529 defparam \inst|vga_control_unit|toggle_counter_sig_14_ .synch_mode = "on";
6530 // synopsys translate_on
6531
6532 // atom is at LC_X51_Y46_N8
6533 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_17_ (
6534 // Equation(s):
6535 // \inst|vga_control_unit|toggle_counter_sig_17  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_17  $ (\inst|vga_control_unit|toggle_counter_sig_16  & !(!\inst|vga_control_unit|toggle_counter_sig_cout [9] & \inst|vga_control_unit|toggle_counter_sig_cout
6536 // [15]) # (\inst|vga_control_unit|toggle_counter_sig_cout [9] & \inst|vga_control_unit|toggle_counter_sig_cout[15]~COUT1_29 )), GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , ,
6537 // !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6538 // \inst|vga_control_unit|toggle_counter_sig_cout [17] = CARRY(\inst|vga_control_unit|toggle_counter_sig_17  & \inst|vga_control_unit|toggle_counter_sig_16  & !\inst|vga_control_unit|toggle_counter_sig_cout [15])
6539 // \inst|vga_control_unit|toggle_counter_sig_cout[17]~COUT1_31  = CARRY(\inst|vga_control_unit|toggle_counter_sig_17  & \inst|vga_control_unit|toggle_counter_sig_16  & !\inst|vga_control_unit|toggle_counter_sig_cout[15]~COUT1_29 )
6540
6541         .clk(\inst1|altpll_component|_clk0 ),
6542         .dataa(\inst|vga_control_unit|toggle_counter_sig_17 ),
6543         .datab(\inst|vga_control_unit|toggle_counter_sig_16 ),
6544         .datac(vcc),
6545         .datad(vcc),
6546         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6547         .aload(gnd),
6548         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6549         .sload(gnd),
6550         .ena(vcc),
6551         .cin(\inst|vga_control_unit|toggle_counter_sig_cout [9]),
6552         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [15]),
6553         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[15]~COUT1_29 ),
6554         .inverta(gnd),
6555         .regcascin(gnd),
6556         .devclrn(devclrn),
6557         .devpor(devpor),
6558         .combout(),
6559         .regout(\inst|vga_control_unit|toggle_counter_sig_17 ),
6560         .cout(),
6561         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [17]),
6562         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[17]~COUT1_31 ));
6563 // synopsys translate_off
6564 defparam \inst|vga_control_unit|toggle_counter_sig_17_ .cin0_used = "true";
6565 defparam \inst|vga_control_unit|toggle_counter_sig_17_ .cin1_used = "true";
6566 defparam \inst|vga_control_unit|toggle_counter_sig_17_ .cin_used = "true";
6567 defparam \inst|vga_control_unit|toggle_counter_sig_17_ .lut_mask = "a608";
6568 defparam \inst|vga_control_unit|toggle_counter_sig_17_ .operation_mode = "arithmetic";
6569 defparam \inst|vga_control_unit|toggle_counter_sig_17_ .output_mode = "reg_only";
6570 defparam \inst|vga_control_unit|toggle_counter_sig_17_ .register_cascade_mode = "off";
6571 defparam \inst|vga_control_unit|toggle_counter_sig_17_ .sum_lutc_input = "cin";
6572 defparam \inst|vga_control_unit|toggle_counter_sig_17_ .synch_mode = "on";
6573 // synopsys translate_on
6574
6575 // atom is at LC_X52_Y46_N8
6576 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_16_ (
6577 // Equation(s):
6578 // \inst|vga_control_unit|toggle_counter_sig_16  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_16  $ (!(!\inst|vga_control_unit|toggle_counter_sig_cout [8] & \inst|vga_control_unit|toggle_counter_sig_cout [14]) #
6579 // (\inst|vga_control_unit|toggle_counter_sig_cout [8] & \inst|vga_control_unit|toggle_counter_sig_cout[14]~COUT1_43 )), GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , ,
6580 // !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6581 // \inst|vga_control_unit|toggle_counter_sig_cout [16] = CARRY(\inst|vga_control_unit|toggle_counter_sig_16  & \inst|vga_control_unit|toggle_counter_sig_17  & !\inst|vga_control_unit|toggle_counter_sig_cout [14])
6582 // \inst|vga_control_unit|toggle_counter_sig_cout[16]~COUT1_45  = CARRY(\inst|vga_control_unit|toggle_counter_sig_16  & \inst|vga_control_unit|toggle_counter_sig_17  & !\inst|vga_control_unit|toggle_counter_sig_cout[14]~COUT1_43 )
6583
6584         .clk(\inst1|altpll_component|_clk0 ),
6585         .dataa(\inst|vga_control_unit|toggle_counter_sig_16 ),
6586         .datab(\inst|vga_control_unit|toggle_counter_sig_17 ),
6587         .datac(vcc),
6588         .datad(vcc),
6589         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6590         .aload(gnd),
6591         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6592         .sload(gnd),
6593         .ena(vcc),
6594         .cin(\inst|vga_control_unit|toggle_counter_sig_cout [8]),
6595         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [14]),
6596         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[14]~COUT1_43 ),
6597         .inverta(gnd),
6598         .regcascin(gnd),
6599         .devclrn(devclrn),
6600         .devpor(devpor),
6601         .combout(),
6602         .regout(\inst|vga_control_unit|toggle_counter_sig_16 ),
6603         .cout(),
6604         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [16]),
6605         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[16]~COUT1_45 ));
6606 // synopsys translate_off
6607 defparam \inst|vga_control_unit|toggle_counter_sig_16_ .cin0_used = "true";
6608 defparam \inst|vga_control_unit|toggle_counter_sig_16_ .cin1_used = "true";
6609 defparam \inst|vga_control_unit|toggle_counter_sig_16_ .cin_used = "true";
6610 defparam \inst|vga_control_unit|toggle_counter_sig_16_ .lut_mask = "a508";
6611 defparam \inst|vga_control_unit|toggle_counter_sig_16_ .operation_mode = "arithmetic";
6612 defparam \inst|vga_control_unit|toggle_counter_sig_16_ .output_mode = "reg_only";
6613 defparam \inst|vga_control_unit|toggle_counter_sig_16_ .register_cascade_mode = "off";
6614 defparam \inst|vga_control_unit|toggle_counter_sig_16_ .sum_lutc_input = "cin";
6615 defparam \inst|vga_control_unit|toggle_counter_sig_16_ .synch_mode = "on";
6616 // synopsys translate_on
6617
6618 // atom is at LC_X52_Y46_N9
6619 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_18_ (
6620 // Equation(s):
6621 // \inst|vga_control_unit|toggle_counter_sig_18  = DFFEAS((!\inst|vga_control_unit|toggle_counter_sig_cout [8] & \inst|vga_control_unit|toggle_counter_sig_cout [16]) # (\inst|vga_control_unit|toggle_counter_sig_cout [8] &
6622 // \inst|vga_control_unit|toggle_counter_sig_cout[16]~COUT1_45 ) $ \inst|vga_control_unit|toggle_counter_sig_18 , GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , , !\inst|vga_control_unit|toggle_sig_0_0_0_g1
6623 // , )
6624
6625         .clk(\inst1|altpll_component|_clk0 ),
6626         .dataa(vcc),
6627         .datab(vcc),
6628         .datac(vcc),
6629         .datad(\inst|vga_control_unit|toggle_counter_sig_18 ),
6630         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6631         .aload(gnd),
6632         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6633         .sload(gnd),
6634         .ena(vcc),
6635         .cin(\inst|vga_control_unit|toggle_counter_sig_cout [8]),
6636         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [16]),
6637         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[16]~COUT1_45 ),
6638         .inverta(gnd),
6639         .regcascin(gnd),
6640         .devclrn(devclrn),
6641         .devpor(devpor),
6642         .combout(),
6643         .regout(\inst|vga_control_unit|toggle_counter_sig_18 ),
6644         .cout(),
6645         .cout0(),
6646         .cout1());
6647 // synopsys translate_off
6648 defparam \inst|vga_control_unit|toggle_counter_sig_18_ .cin0_used = "true";
6649 defparam \inst|vga_control_unit|toggle_counter_sig_18_ .cin1_used = "true";
6650 defparam \inst|vga_control_unit|toggle_counter_sig_18_ .cin_used = "true";
6651 defparam \inst|vga_control_unit|toggle_counter_sig_18_ .lut_mask = "0ff0";
6652 defparam \inst|vga_control_unit|toggle_counter_sig_18_ .operation_mode = "normal";
6653 defparam \inst|vga_control_unit|toggle_counter_sig_18_ .output_mode = "reg_only";
6654 defparam \inst|vga_control_unit|toggle_counter_sig_18_ .register_cascade_mode = "off";
6655 defparam \inst|vga_control_unit|toggle_counter_sig_18_ .sum_lutc_input = "cin";
6656 defparam \inst|vga_control_unit|toggle_counter_sig_18_ .synch_mode = "on";
6657 // synopsys translate_on
6658
6659 // atom is at LC_X51_Y46_N9
6660 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_19_ (
6661 // Equation(s):
6662 // \inst|vga_control_unit|toggle_counter_sig_19  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_19  $ ((!\inst|vga_control_unit|toggle_counter_sig_cout [9] & \inst|vga_control_unit|toggle_counter_sig_cout [17]) #
6663 // (\inst|vga_control_unit|toggle_counter_sig_cout [9] & \inst|vga_control_unit|toggle_counter_sig_cout[17]~COUT1_31 ) & \inst|vga_control_unit|toggle_counter_sig_18 ), GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x
6664 // ), , , , , !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6665
6666         .clk(\inst1|altpll_component|_clk0 ),
6667         .dataa(vcc),
6668         .datab(\inst|vga_control_unit|toggle_counter_sig_19 ),
6669         .datac(vcc),
6670         .datad(\inst|vga_control_unit|toggle_counter_sig_18 ),
6671         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6672         .aload(gnd),
6673         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6674         .sload(gnd),
6675         .ena(vcc),
6676         .cin(\inst|vga_control_unit|toggle_counter_sig_cout [9]),
6677         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [17]),
6678         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[17]~COUT1_31 ),
6679         .inverta(gnd),
6680         .regcascin(gnd),
6681         .devclrn(devclrn),
6682         .devpor(devpor),
6683         .combout(),
6684         .regout(\inst|vga_control_unit|toggle_counter_sig_19 ),
6685         .cout(),
6686         .cout0(),
6687         .cout1());
6688 // synopsys translate_off
6689 defparam \inst|vga_control_unit|toggle_counter_sig_19_ .cin0_used = "true";
6690 defparam \inst|vga_control_unit|toggle_counter_sig_19_ .cin1_used = "true";
6691 defparam \inst|vga_control_unit|toggle_counter_sig_19_ .cin_used = "true";
6692 defparam \inst|vga_control_unit|toggle_counter_sig_19_ .lut_mask = "3ccc";
6693 defparam \inst|vga_control_unit|toggle_counter_sig_19_ .operation_mode = "normal";
6694 defparam \inst|vga_control_unit|toggle_counter_sig_19_ .output_mode = "reg_only";
6695 defparam \inst|vga_control_unit|toggle_counter_sig_19_ .register_cascade_mode = "off";
6696 defparam \inst|vga_control_unit|toggle_counter_sig_19_ .sum_lutc_input = "cin";
6697 defparam \inst|vga_control_unit|toggle_counter_sig_19_ .synch_mode = "on";
6698 // synopsys translate_on
6699
6700 // atom is at LC_X50_Y46_N1
6701 stratix_lcell \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto19_4 (
6702 // Equation(s):
6703 // \inst|vga_control_unit|un1_toggle_counter_siglto19_4  = !\inst|vga_control_unit|toggle_counter_sig_18  # !\inst|vga_control_unit|toggle_counter_sig_17  # !\inst|vga_control_unit|toggle_counter_sig_19  # !\inst|vga_control_unit|toggle_counter_sig_16
6704
6705         .clk(gnd),
6706         .dataa(\inst|vga_control_unit|toggle_counter_sig_16 ),
6707         .datab(\inst|vga_control_unit|toggle_counter_sig_19 ),
6708         .datac(\inst|vga_control_unit|toggle_counter_sig_17 ),
6709         .datad(\inst|vga_control_unit|toggle_counter_sig_18 ),
6710         .aclr(gnd),
6711         .aload(gnd),
6712         .sclr(gnd),
6713         .sload(gnd),
6714         .ena(vcc),
6715         .cin(gnd),
6716         .cin0(gnd),
6717         .cin1(vcc),
6718         .inverta(gnd),
6719         .regcascin(gnd),
6720         .devclrn(devclrn),
6721         .devpor(devpor),
6722         .combout(\inst|vga_control_unit|un1_toggle_counter_siglto19_4 ),
6723         .regout(),
6724         .cout(),
6725         .cout0(),
6726         .cout1());
6727 // synopsys translate_off
6728 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto19_4 .lut_mask = "7fff";
6729 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto19_4 .operation_mode = "normal";
6730 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto19_4 .output_mode = "comb_only";
6731 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto19_4 .register_cascade_mode = "off";
6732 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto19_4 .sum_lutc_input = "datac";
6733 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto19_4 .synch_mode = "off";
6734 // synopsys translate_on
6735
6736 // atom is at LC_X50_Y46_N7
6737 stratix_lcell \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto19_5 (
6738 // Equation(s):
6739 // \inst|vga_control_unit|un1_toggle_counter_siglto19_5  = \inst|vga_control_unit|un1_toggle_counter_siglto19_4  # !\inst|vga_control_unit|toggle_counter_sig_14  # !\inst|vga_control_unit|toggle_counter_sig_15  # !\inst|vga_control_unit|toggle_counter_sig_13
6740
6741         .clk(gnd),
6742         .dataa(\inst|vga_control_unit|toggle_counter_sig_13 ),
6743         .datab(\inst|vga_control_unit|un1_toggle_counter_siglto19_4 ),
6744         .datac(\inst|vga_control_unit|toggle_counter_sig_15 ),
6745         .datad(\inst|vga_control_unit|toggle_counter_sig_14 ),
6746         .aclr(gnd),
6747         .aload(gnd),
6748         .sclr(gnd),
6749         .sload(gnd),
6750         .ena(vcc),
6751         .cin(gnd),
6752         .cin0(gnd),
6753         .cin1(vcc),
6754         .inverta(gnd),
6755         .regcascin(gnd),
6756         .devclrn(devclrn),
6757         .devpor(devpor),
6758         .combout(\inst|vga_control_unit|un1_toggle_counter_siglto19_5 ),
6759         .regout(),
6760         .cout(),
6761         .cout0(),
6762         .cout1());
6763 // synopsys translate_off
6764 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto19_5 .lut_mask = "dfff";
6765 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto19_5 .operation_mode = "normal";
6766 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto19_5 .output_mode = "comb_only";
6767 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto19_5 .register_cascade_mode = "off";
6768 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto19_5 .sum_lutc_input = "datac";
6769 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto19_5 .synch_mode = "off";
6770 // synopsys translate_on
6771
6772 // atom is at LC_X50_Y46_N3
6773 stratix_lcell \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto19 (
6774 // Equation(s):
6775 // \inst|vga_control_unit|un1_toggle_counter_siglto19  = \inst|vga_control_unit|un1_toggle_counter_siglto19_5  # \inst|vga_control_unit|un1_toggle_counter_siglto10  & !\inst|vga_control_unit|toggle_counter_sig_11  &
6776 // !\inst|vga_control_unit|toggle_counter_sig_12
6777
6778         .clk(gnd),
6779         .dataa(\inst|vga_control_unit|un1_toggle_counter_siglto10 ),
6780         .datab(\inst|vga_control_unit|toggle_counter_sig_11 ),
6781         .datac(\inst|vga_control_unit|un1_toggle_counter_siglto19_5 ),
6782         .datad(\inst|vga_control_unit|toggle_counter_sig_12 ),
6783         .aclr(gnd),
6784         .aload(gnd),
6785         .sclr(gnd),
6786         .sload(gnd),
6787         .ena(vcc),
6788         .cin(gnd),
6789         .cin0(gnd),
6790         .cin1(vcc),
6791         .inverta(gnd),
6792         .regcascin(gnd),
6793         .devclrn(devclrn),
6794         .devpor(devpor),
6795         .combout(\inst|vga_control_unit|un1_toggle_counter_siglto19 ),
6796         .regout(),
6797         .cout(),
6798         .cout0(),
6799         .cout1());
6800 // synopsys translate_off
6801 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto19 .lut_mask = "f0f2";
6802 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto19 .operation_mode = "normal";
6803 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto19 .output_mode = "comb_only";
6804 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto19 .register_cascade_mode = "off";
6805 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto19 .sum_lutc_input = "datac";
6806 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto19 .synch_mode = "off";
6807 // synopsys translate_on
6808
6809 // atom is at LC_X50_Y46_N4
6810 stratix_lcell \inst|vga_control_unit|toggle_sig_0_0_0_g1_cZ (
6811 // Equation(s):
6812 // \inst|vga_control_unit|toggle_sig_0_0_0_g1  = \inst|vga_control_unit|un1_toggle_counter_siglto19
6813
6814         .clk(gnd),
6815         .dataa(vcc),
6816         .datab(vcc),
6817         .datac(vcc),
6818         .datad(\inst|vga_control_unit|un1_toggle_counter_siglto19 ),
6819         .aclr(gnd),
6820         .aload(gnd),
6821         .sclr(gnd),
6822         .sload(gnd),
6823         .ena(vcc),
6824         .cin(gnd),
6825         .cin0(gnd),
6826         .cin1(vcc),
6827         .inverta(gnd),
6828         .regcascin(gnd),
6829         .devclrn(devclrn),
6830         .devpor(devpor),
6831         .combout(\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6832         .regout(),
6833         .cout(),
6834         .cout0(),
6835         .cout1());
6836 // synopsys translate_off
6837 defparam \inst|vga_control_unit|toggle_sig_0_0_0_g1_cZ .lut_mask = "ff00";
6838 defparam \inst|vga_control_unit|toggle_sig_0_0_0_g1_cZ .operation_mode = "normal";
6839 defparam \inst|vga_control_unit|toggle_sig_0_0_0_g1_cZ .output_mode = "comb_only";
6840 defparam \inst|vga_control_unit|toggle_sig_0_0_0_g1_cZ .register_cascade_mode = "off";
6841 defparam \inst|vga_control_unit|toggle_sig_0_0_0_g1_cZ .sum_lutc_input = "datac";
6842 defparam \inst|vga_control_unit|toggle_sig_0_0_0_g1_cZ .synch_mode = "off";
6843 // synopsys translate_on
6844
6845 // atom is at LC_X50_Y46_N2
6846 stratix_lcell \inst|vga_control_unit|toggle_sig_Z (
6847 // Equation(s):
6848 // \inst|vga_control_unit|toggle_sig  = DFFEAS(\inst|vga_control_unit|toggle_sig  $ (!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ), GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , , , )
6849
6850         .clk(\inst1|altpll_component|_clk0 ),
6851         .dataa(\inst|vga_control_unit|toggle_sig ),
6852         .datab(vcc),
6853         .datac(vcc),
6854         .datad(\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6855         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6856         .aload(gnd),
6857         .sclr(gnd),
6858         .sload(gnd),
6859         .ena(vcc),
6860         .cin(gnd),
6861         .cin0(gnd),
6862         .cin1(vcc),
6863         .inverta(gnd),
6864         .regcascin(gnd),
6865         .devclrn(devclrn),
6866         .devpor(devpor),
6867         .combout(),
6868         .regout(\inst|vga_control_unit|toggle_sig ),
6869         .cout(),
6870         .cout0(),
6871         .cout1());
6872 // synopsys translate_off
6873 defparam \inst|vga_control_unit|toggle_sig_Z .lut_mask = "aa55";
6874 defparam \inst|vga_control_unit|toggle_sig_Z .operation_mode = "normal";
6875 defparam \inst|vga_control_unit|toggle_sig_Z .output_mode = "reg_only";
6876 defparam \inst|vga_control_unit|toggle_sig_Z .register_cascade_mode = "off";
6877 defparam \inst|vga_control_unit|toggle_sig_Z .sum_lutc_input = "datac";
6878 defparam \inst|vga_control_unit|toggle_sig_Z .synch_mode = "off";
6879 // synopsys translate_on
6880
6881 // atom is at LC_X49_Y33_N7
6882 stratix_lcell \inst|vga_control_unit|b_next_0_g0_5_cZ (
6883 // Equation(s):
6884 // \inst|vga_control_unit|b_next_0_g0_5  = \inst|vga_control_unit|b_next_0_g0_3  & \inst|vga_driver_unit|h_enable_sig  & !\inst|vga_control_unit|un9_v_enablelto9  & \inst|vga_control_unit|toggle_sig
6885
6886         .clk(gnd),
6887         .dataa(\inst|vga_control_unit|b_next_0_g0_3 ),
6888         .datab(\inst|vga_driver_unit|h_enable_sig ),
6889         .datac(\inst|vga_control_unit|un9_v_enablelto9 ),
6890         .datad(\inst|vga_control_unit|toggle_sig ),
6891         .aclr(gnd),
6892         .aload(gnd),
6893         .sclr(gnd),
6894         .sload(gnd),
6895         .ena(vcc),
6896         .cin(gnd),
6897         .cin0(gnd),
6898         .cin1(vcc),
6899         .inverta(gnd),
6900         .regcascin(gnd),
6901         .devclrn(devclrn),
6902         .devpor(devpor),
6903         .combout(\inst|vga_control_unit|b_next_0_g0_5 ),
6904         .regout(),
6905         .cout(),
6906         .cout0(),
6907         .cout1());
6908 // synopsys translate_off
6909 defparam \inst|vga_control_unit|b_next_0_g0_5_cZ .lut_mask = "0800";
6910 defparam \inst|vga_control_unit|b_next_0_g0_5_cZ .operation_mode = "normal";
6911 defparam \inst|vga_control_unit|b_next_0_g0_5_cZ .output_mode = "comb_only";
6912 defparam \inst|vga_control_unit|b_next_0_g0_5_cZ .register_cascade_mode = "off";
6913 defparam \inst|vga_control_unit|b_next_0_g0_5_cZ .sum_lutc_input = "datac";
6914 defparam \inst|vga_control_unit|b_next_0_g0_5_cZ .synch_mode = "off";
6915 // synopsys translate_on
6916
6917 // atom is at LC_X3_Y33_N6
6918 stratix_lcell \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto8_a (
6919 // Equation(s):
6920 // \inst|vga_control_unit|un13_v_enablelto8_a  = !\inst|vga_driver_unit|line_counter_sig_4  & !\inst|vga_driver_unit|line_counter_sig_2  & !\inst|vga_driver_unit|line_counter_sig_3  # !\inst|vga_driver_unit|line_counter_sig_5
6921
6922         .clk(gnd),
6923         .dataa(\inst|vga_driver_unit|line_counter_sig_4 ),
6924         .datab(\inst|vga_driver_unit|line_counter_sig_2 ),
6925         .datac(\inst|vga_driver_unit|line_counter_sig_3 ),
6926         .datad(\inst|vga_driver_unit|line_counter_sig_5 ),
6927         .aclr(gnd),
6928         .aload(gnd),
6929         .sclr(gnd),
6930         .sload(gnd),
6931         .ena(vcc),
6932         .cin(gnd),
6933         .cin0(gnd),
6934         .cin1(vcc),
6935         .inverta(gnd),
6936         .regcascin(gnd),
6937         .devclrn(devclrn),
6938         .devpor(devpor),
6939         .combout(\inst|vga_control_unit|un13_v_enablelto8_a ),
6940         .regout(),
6941         .cout(),
6942         .cout0(),
6943         .cout1());
6944 // synopsys translate_off
6945 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto8_a .lut_mask = "01ff";
6946 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto8_a .operation_mode = "normal";
6947 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto8_a .output_mode = "comb_only";
6948 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto8_a .register_cascade_mode = "off";
6949 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto8_a .sum_lutc_input = "datac";
6950 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto8_a .synch_mode = "off";
6951 // synopsys translate_on
6952
6953 // atom is at LC_X49_Y33_N5
6954 stratix_lcell \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto8 (
6955 // Equation(s):
6956 // \inst|vga_control_unit|un13_v_enablelto8  = !\inst|vga_driver_unit|line_counter_sig_8  & !\inst|vga_driver_unit|line_counter_sig_7  & (\inst|vga_control_unit|un13_v_enablelto8_a  # !\inst|vga_driver_unit|line_counter_sig_6 )
6957
6958         .clk(gnd),
6959         .dataa(\inst|vga_driver_unit|line_counter_sig_8 ),
6960         .datab(\inst|vga_control_unit|un13_v_enablelto8_a ),
6961         .datac(\inst|vga_driver_unit|line_counter_sig_7 ),
6962         .datad(\inst|vga_driver_unit|line_counter_sig_6 ),
6963         .aclr(gnd),
6964         .aload(gnd),
6965         .sclr(gnd),
6966         .sload(gnd),
6967         .ena(vcc),
6968         .cin(gnd),
6969         .cin0(gnd),
6970         .cin1(vcc),
6971         .inverta(gnd),
6972         .regcascin(gnd),
6973         .devclrn(devclrn),
6974         .devpor(devpor),
6975         .combout(\inst|vga_control_unit|un13_v_enablelto8 ),
6976         .regout(),
6977         .cout(),
6978         .cout0(),
6979         .cout1());
6980 // synopsys translate_off
6981 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto8 .lut_mask = "0405";
6982 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto8 .operation_mode = "normal";
6983 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto8 .output_mode = "comb_only";
6984 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto8 .register_cascade_mode = "off";
6985 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto8 .sum_lutc_input = "datac";
6986 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto8 .synch_mode = "off";
6987 // synopsys translate_on
6988
6989 // atom is at LC_X49_Y33_N6
6990 stratix_lcell \inst|vga_control_unit|b_Z (
6991 // Equation(s):
6992 // \inst|vga_control_unit|b  = DFFEAS(!\inst|vga_control_unit|un5_v_enablelto7  & !\inst|vga_control_unit|un17_v_enablelto7  & \inst|vga_control_unit|b_next_0_g0_5  & !\inst|vga_control_unit|un13_v_enablelto8 , GLOBAL(\inst1|altpll_component|_clk0 ),
6993 // !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , , , )
6994
6995         .clk(\inst1|altpll_component|_clk0 ),
6996         .dataa(\inst|vga_control_unit|un5_v_enablelto7 ),
6997         .datab(\inst|vga_control_unit|un17_v_enablelto7 ),
6998         .datac(\inst|vga_control_unit|b_next_0_g0_5 ),
6999         .datad(\inst|vga_control_unit|un13_v_enablelto8 ),
7000         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
7001         .aload(gnd),
7002         .sclr(gnd),
7003         .sload(gnd),
7004         .ena(vcc),
7005         .cin(gnd),
7006         .cin0(gnd),
7007         .cin1(vcc),
7008         .inverta(gnd),
7009         .regcascin(gnd),
7010         .devclrn(devclrn),
7011         .devpor(devpor),
7012         .combout(),
7013         .regout(\inst|vga_control_unit|b ),
7014         .cout(),
7015         .cout0(),
7016         .cout1());
7017 // synopsys translate_off
7018 defparam \inst|vga_control_unit|b_Z .lut_mask = "0010";
7019 defparam \inst|vga_control_unit|b_Z .operation_mode = "normal";
7020 defparam \inst|vga_control_unit|b_Z .output_mode = "reg_only";
7021 defparam \inst|vga_control_unit|b_Z .register_cascade_mode = "off";
7022 defparam \inst|vga_control_unit|b_Z .sum_lutc_input = "datac";
7023 defparam \inst|vga_control_unit|b_Z .synch_mode = "off";
7024 // synopsys translate_on
7025
7026 // atom is at PIN_L7
7027 stratix_io \inst|d_hsync_out~I (
7028         .datain(\inst|vga_driver_unit|h_sync ),
7029         .ddiodatain(gnd),
7030         .oe(vcc),
7031         .outclk(gnd),
7032         .outclkena(vcc),
7033         .inclk(gnd),
7034         .inclkena(vcc),
7035         .areset(gnd),
7036         .sreset(gnd),
7037         .delayctrlin(gnd),
7038         .devclrn(devclrn),
7039         .devpor(devpor),
7040         .devoe(devoe),
7041         .combout(),
7042         .regout(),
7043         .ddioregout(),
7044         .padio(d_hsync),
7045         .dqsundelayedout());
7046 // synopsys translate_off
7047 defparam \inst|d_hsync_out~I .ddio_mode = "none";
7048 defparam \inst|d_hsync_out~I .input_async_reset = "none";
7049 defparam \inst|d_hsync_out~I .input_power_up = "low";
7050 defparam \inst|d_hsync_out~I .input_register_mode = "none";
7051 defparam \inst|d_hsync_out~I .input_sync_reset = "none";
7052 defparam \inst|d_hsync_out~I .oe_async_reset = "none";
7053 defparam \inst|d_hsync_out~I .oe_power_up = "low";
7054 defparam \inst|d_hsync_out~I .oe_register_mode = "none";
7055 defparam \inst|d_hsync_out~I .oe_sync_reset = "none";
7056 defparam \inst|d_hsync_out~I .operation_mode = "output";
7057 defparam \inst|d_hsync_out~I .output_async_reset = "none";
7058 defparam \inst|d_hsync_out~I .output_power_up = "low";
7059 defparam \inst|d_hsync_out~I .output_register_mode = "none";
7060 defparam \inst|d_hsync_out~I .output_sync_reset = "none";
7061 // synopsys translate_on
7062
7063 // atom is at PIN_L5
7064 stratix_io \inst|d_vsync_out~I (
7065         .datain(\inst|vga_driver_unit|v_sync ),
7066         .ddiodatain(gnd),
7067         .oe(vcc),
7068         .outclk(gnd),
7069         .outclkena(vcc),
7070         .inclk(gnd),
7071         .inclkena(vcc),
7072         .areset(gnd),
7073         .sreset(gnd),
7074         .delayctrlin(gnd),
7075         .devclrn(devclrn),
7076         .devpor(devpor),
7077         .devoe(devoe),
7078         .combout(),
7079         .regout(),
7080         .ddioregout(),
7081         .padio(d_vsync),
7082         .dqsundelayedout());
7083 // synopsys translate_off
7084 defparam \inst|d_vsync_out~I .ddio_mode = "none";
7085 defparam \inst|d_vsync_out~I .input_async_reset = "none";
7086 defparam \inst|d_vsync_out~I .input_power_up = "low";
7087 defparam \inst|d_vsync_out~I .input_register_mode = "none";
7088 defparam \inst|d_vsync_out~I .input_sync_reset = "none";
7089 defparam \inst|d_vsync_out~I .oe_async_reset = "none";
7090 defparam \inst|d_vsync_out~I .oe_power_up = "low";
7091 defparam \inst|d_vsync_out~I .oe_register_mode = "none";
7092 defparam \inst|d_vsync_out~I .oe_sync_reset = "none";
7093 defparam \inst|d_vsync_out~I .operation_mode = "output";
7094 defparam \inst|d_vsync_out~I .output_async_reset = "none";
7095 defparam \inst|d_vsync_out~I .output_power_up = "low";
7096 defparam \inst|d_vsync_out~I .output_register_mode = "none";
7097 defparam \inst|d_vsync_out~I .output_sync_reset = "none";
7098 // synopsys translate_on
7099
7100 // atom is at PIN_Y23
7101 stratix_io \inst|d_set_column_counter_out~I (
7102         .datain(\inst|vga_driver_unit|hsync_state_1 ),
7103         .ddiodatain(gnd),
7104         .oe(vcc),
7105         .outclk(gnd),
7106         .outclkena(vcc),
7107         .inclk(gnd),
7108         .inclkena(vcc),
7109         .areset(gnd),
7110         .sreset(gnd),
7111         .delayctrlin(gnd),
7112         .devclrn(devclrn),
7113         .devpor(devpor),
7114         .devoe(devoe),
7115         .combout(),
7116         .regout(),
7117         .ddioregout(),
7118         .padio(d_set_column_counter),
7119         .dqsundelayedout());
7120 // synopsys translate_off
7121 defparam \inst|d_set_column_counter_out~I .ddio_mode = "none";
7122 defparam \inst|d_set_column_counter_out~I .input_async_reset = "none";
7123 defparam \inst|d_set_column_counter_out~I .input_power_up = "low";
7124 defparam \inst|d_set_column_counter_out~I .input_register_mode = "none";
7125 defparam \inst|d_set_column_counter_out~I .input_sync_reset = "none";
7126 defparam \inst|d_set_column_counter_out~I .oe_async_reset = "none";
7127 defparam \inst|d_set_column_counter_out~I .oe_power_up = "low";
7128 defparam \inst|d_set_column_counter_out~I .oe_register_mode = "none";
7129 defparam \inst|d_set_column_counter_out~I .oe_sync_reset = "none";
7130 defparam \inst|d_set_column_counter_out~I .operation_mode = "output";
7131 defparam \inst|d_set_column_counter_out~I .output_async_reset = "none";
7132 defparam \inst|d_set_column_counter_out~I .output_power_up = "low";
7133 defparam \inst|d_set_column_counter_out~I .output_register_mode = "none";
7134 defparam \inst|d_set_column_counter_out~I .output_sync_reset = "none";
7135 // synopsys translate_on
7136
7137 // atom is at PIN_F21
7138 stratix_io \inst|d_set_line_counter_out~I (
7139         .datain(\inst|vga_driver_unit|vsync_state_1 ),
7140         .ddiodatain(gnd),
7141         .oe(vcc),
7142         .outclk(gnd),
7143         .outclkena(vcc),
7144         .inclk(gnd),
7145         .inclkena(vcc),
7146         .areset(gnd),
7147         .sreset(gnd),
7148         .delayctrlin(gnd),
7149         .devclrn(devclrn),
7150         .devpor(devpor),
7151         .devoe(devoe),
7152         .combout(),
7153         .regout(),
7154         .ddioregout(),
7155         .padio(d_set_line_counter),
7156         .dqsundelayedout());
7157 // synopsys translate_off
7158 defparam \inst|d_set_line_counter_out~I .ddio_mode = "none";
7159 defparam \inst|d_set_line_counter_out~I .input_async_reset = "none";
7160 defparam \inst|d_set_line_counter_out~I .input_power_up = "low";
7161 defparam \inst|d_set_line_counter_out~I .input_register_mode = "none";
7162 defparam \inst|d_set_line_counter_out~I .input_sync_reset = "none";
7163 defparam \inst|d_set_line_counter_out~I .oe_async_reset = "none";
7164 defparam \inst|d_set_line_counter_out~I .oe_power_up = "low";
7165 defparam \inst|d_set_line_counter_out~I .oe_register_mode = "none";
7166 defparam \inst|d_set_line_counter_out~I .oe_sync_reset = "none";
7167 defparam \inst|d_set_line_counter_out~I .operation_mode = "output";
7168 defparam \inst|d_set_line_counter_out~I .output_async_reset = "none";
7169 defparam \inst|d_set_line_counter_out~I .output_power_up = "low";
7170 defparam \inst|d_set_line_counter_out~I .output_register_mode = "none";
7171 defparam \inst|d_set_line_counter_out~I .output_sync_reset = "none";
7172 // synopsys translate_on
7173
7174 // atom is at PIN_F26
7175 stratix_io \inst|d_set_hsync_counter_out~I (
7176         .datain(\inst|vga_driver_unit|d_set_hsync_counter ),
7177         .ddiodatain(gnd),
7178         .oe(vcc),
7179         .outclk(gnd),
7180         .outclkena(vcc),
7181         .inclk(gnd),
7182         .inclkena(vcc),
7183         .areset(gnd),
7184         .sreset(gnd),
7185         .delayctrlin(gnd),
7186         .devclrn(devclrn),
7187         .devpor(devpor),
7188         .devoe(devoe),
7189         .combout(),
7190         .regout(),
7191         .ddioregout(),
7192         .padio(d_set_hsync_counter),
7193         .dqsundelayedout());
7194 // synopsys translate_off
7195 defparam \inst|d_set_hsync_counter_out~I .ddio_mode = "none";
7196 defparam \inst|d_set_hsync_counter_out~I .input_async_reset = "none";
7197 defparam \inst|d_set_hsync_counter_out~I .input_power_up = "low";
7198 defparam \inst|d_set_hsync_counter_out~I .input_register_mode = "none";
7199 defparam \inst|d_set_hsync_counter_out~I .input_sync_reset = "none";
7200 defparam \inst|d_set_hsync_counter_out~I .oe_async_reset = "none";
7201 defparam \inst|d_set_hsync_counter_out~I .oe_power_up = "low";
7202 defparam \inst|d_set_hsync_counter_out~I .oe_register_mode = "none";
7203 defparam \inst|d_set_hsync_counter_out~I .oe_sync_reset = "none";
7204 defparam \inst|d_set_hsync_counter_out~I .operation_mode = "output";
7205 defparam \inst|d_set_hsync_counter_out~I .output_async_reset = "none";
7206 defparam \inst|d_set_hsync_counter_out~I .output_power_up = "low";
7207 defparam \inst|d_set_hsync_counter_out~I .output_register_mode = "none";
7208 defparam \inst|d_set_hsync_counter_out~I .output_sync_reset = "none";
7209 // synopsys translate_on
7210
7211 // atom is at PIN_F24
7212 stratix_io \inst|d_set_vsync_counter_out~I (
7213         .datain(\inst|vga_driver_unit|d_set_vsync_counter ),
7214         .ddiodatain(gnd),
7215         .oe(vcc),
7216         .outclk(gnd),
7217         .outclkena(vcc),
7218         .inclk(gnd),
7219         .inclkena(vcc),
7220         .areset(gnd),
7221         .sreset(gnd),
7222         .delayctrlin(gnd),
7223         .devclrn(devclrn),
7224         .devpor(devpor),
7225         .devoe(devoe),
7226         .combout(),
7227         .regout(),
7228         .ddioregout(),
7229         .padio(d_set_vsync_counter),
7230         .dqsundelayedout());
7231 // synopsys translate_off
7232 defparam \inst|d_set_vsync_counter_out~I .ddio_mode = "none";
7233 defparam \inst|d_set_vsync_counter_out~I .input_async_reset = "none";
7234 defparam \inst|d_set_vsync_counter_out~I .input_power_up = "low";
7235 defparam \inst|d_set_vsync_counter_out~I .input_register_mode = "none";
7236 defparam \inst|d_set_vsync_counter_out~I .input_sync_reset = "none";
7237 defparam \inst|d_set_vsync_counter_out~I .oe_async_reset = "none";
7238 defparam \inst|d_set_vsync_counter_out~I .oe_power_up = "low";
7239 defparam \inst|d_set_vsync_counter_out~I .oe_register_mode = "none";
7240 defparam \inst|d_set_vsync_counter_out~I .oe_sync_reset = "none";
7241 defparam \inst|d_set_vsync_counter_out~I .operation_mode = "output";
7242 defparam \inst|d_set_vsync_counter_out~I .output_async_reset = "none";
7243 defparam \inst|d_set_vsync_counter_out~I .output_power_up = "low";
7244 defparam \inst|d_set_vsync_counter_out~I .output_register_mode = "none";
7245 defparam \inst|d_set_vsync_counter_out~I .output_sync_reset = "none";
7246 // synopsys translate_on
7247
7248 // atom is at PIN_L3
7249 stratix_io \inst|d_r_out~I (
7250         .datain(\~STRATIX_FITTER_CREATED_GND~I_combout ),
7251         .ddiodatain(gnd),
7252         .oe(vcc),
7253         .outclk(gnd),
7254         .outclkena(vcc),
7255         .inclk(gnd),
7256         .inclkena(vcc),
7257         .areset(gnd),
7258         .sreset(gnd),
7259         .delayctrlin(gnd),
7260         .devclrn(devclrn),
7261         .devpor(devpor),
7262         .devoe(devoe),
7263         .combout(),
7264         .regout(),
7265         .ddioregout(),
7266         .padio(d_r),
7267         .dqsundelayedout());
7268 // synopsys translate_off
7269 defparam \inst|d_r_out~I .ddio_mode = "none";
7270 defparam \inst|d_r_out~I .input_async_reset = "none";
7271 defparam \inst|d_r_out~I .input_power_up = "low";
7272 defparam \inst|d_r_out~I .input_register_mode = "none";
7273 defparam \inst|d_r_out~I .input_sync_reset = "none";
7274 defparam \inst|d_r_out~I .oe_async_reset = "none";
7275 defparam \inst|d_r_out~I .oe_power_up = "low";
7276 defparam \inst|d_r_out~I .oe_register_mode = "none";
7277 defparam \inst|d_r_out~I .oe_sync_reset = "none";
7278 defparam \inst|d_r_out~I .operation_mode = "output";
7279 defparam \inst|d_r_out~I .output_async_reset = "none";
7280 defparam \inst|d_r_out~I .output_power_up = "low";
7281 defparam \inst|d_r_out~I .output_register_mode = "none";
7282 defparam \inst|d_r_out~I .output_sync_reset = "none";
7283 // synopsys translate_on
7284
7285 // atom is at PIN_K24
7286 stratix_io \inst|d_g_out~I (
7287         .datain(\~STRATIX_FITTER_CREATED_GND~I_combout ),
7288         .ddiodatain(gnd),
7289         .oe(vcc),
7290         .outclk(gnd),
7291         .outclkena(vcc),
7292         .inclk(gnd),
7293         .inclkena(vcc),
7294         .areset(gnd),
7295         .sreset(gnd),
7296         .delayctrlin(gnd),
7297         .devclrn(devclrn),
7298         .devpor(devpor),
7299         .devoe(devoe),
7300         .combout(),
7301         .regout(),
7302         .ddioregout(),
7303         .padio(d_g),
7304         .dqsundelayedout());
7305 // synopsys translate_off
7306 defparam \inst|d_g_out~I .ddio_mode = "none";
7307 defparam \inst|d_g_out~I .input_async_reset = "none";
7308 defparam \inst|d_g_out~I .input_power_up = "low";
7309 defparam \inst|d_g_out~I .input_register_mode = "none";
7310 defparam \inst|d_g_out~I .input_sync_reset = "none";
7311 defparam \inst|d_g_out~I .oe_async_reset = "none";
7312 defparam \inst|d_g_out~I .oe_power_up = "low";
7313 defparam \inst|d_g_out~I .oe_register_mode = "none";
7314 defparam \inst|d_g_out~I .oe_sync_reset = "none";
7315 defparam \inst|d_g_out~I .operation_mode = "output";
7316 defparam \inst|d_g_out~I .output_async_reset = "none";
7317 defparam \inst|d_g_out~I .output_power_up = "low";
7318 defparam \inst|d_g_out~I .output_register_mode = "none";
7319 defparam \inst|d_g_out~I .output_sync_reset = "none";
7320 // synopsys translate_on
7321
7322 // atom is at PIN_K20
7323 stratix_io \inst|d_b_out~I (
7324         .datain(\inst|vga_control_unit|b ),
7325         .ddiodatain(gnd),
7326         .oe(vcc),
7327         .outclk(gnd),
7328         .outclkena(vcc),
7329         .inclk(gnd),
7330         .inclkena(vcc),
7331         .areset(gnd),
7332         .sreset(gnd),
7333         .delayctrlin(gnd),
7334         .devclrn(devclrn),
7335         .devpor(devpor),
7336         .devoe(devoe),
7337         .combout(),
7338         .regout(),
7339         .ddioregout(),
7340         .padio(d_b),
7341         .dqsundelayedout());
7342 // synopsys translate_off
7343 defparam \inst|d_b_out~I .ddio_mode = "none";
7344 defparam \inst|d_b_out~I .input_async_reset = "none";
7345 defparam \inst|d_b_out~I .input_power_up = "low";
7346 defparam \inst|d_b_out~I .input_register_mode = "none";
7347 defparam \inst|d_b_out~I .input_sync_reset = "none";
7348 defparam \inst|d_b_out~I .oe_async_reset = "none";
7349 defparam \inst|d_b_out~I .oe_power_up = "low";
7350 defparam \inst|d_b_out~I .oe_register_mode = "none";
7351 defparam \inst|d_b_out~I .oe_sync_reset = "none";
7352 defparam \inst|d_b_out~I .operation_mode = "output";
7353 defparam \inst|d_b_out~I .output_async_reset = "none";
7354 defparam \inst|d_b_out~I .output_power_up = "low";
7355 defparam \inst|d_b_out~I .output_register_mode = "none";
7356 defparam \inst|d_b_out~I .output_sync_reset = "none";
7357 // synopsys translate_on
7358
7359 // atom is at PIN_J21
7360 stratix_io \inst|d_h_enable_out~I (
7361         .datain(\inst|vga_driver_unit|h_enable_sig ),
7362         .ddiodatain(gnd),
7363         .oe(vcc),
7364         .outclk(gnd),
7365         .outclkena(vcc),
7366         .inclk(gnd),
7367         .inclkena(vcc),
7368         .areset(gnd),
7369         .sreset(gnd),
7370         .delayctrlin(gnd),
7371         .devclrn(devclrn),
7372         .devpor(devpor),
7373         .devoe(devoe),
7374         .combout(),
7375         .regout(),
7376         .ddioregout(),
7377         .padio(d_h_enable),
7378         .dqsundelayedout());
7379 // synopsys translate_off
7380 defparam \inst|d_h_enable_out~I .ddio_mode = "none";
7381 defparam \inst|d_h_enable_out~I .input_async_reset = "none";
7382 defparam \inst|d_h_enable_out~I .input_power_up = "low";
7383 defparam \inst|d_h_enable_out~I .input_register_mode = "none";
7384 defparam \inst|d_h_enable_out~I .input_sync_reset = "none";
7385 defparam \inst|d_h_enable_out~I .oe_async_reset = "none";
7386 defparam \inst|d_h_enable_out~I .oe_power_up = "low";
7387 defparam \inst|d_h_enable_out~I .oe_register_mode = "none";
7388 defparam \inst|d_h_enable_out~I .oe_sync_reset = "none";
7389 defparam \inst|d_h_enable_out~I .operation_mode = "output";
7390 defparam \inst|d_h_enable_out~I .output_async_reset = "none";
7391 defparam \inst|d_h_enable_out~I .output_power_up = "low";
7392 defparam \inst|d_h_enable_out~I .output_register_mode = "none";
7393 defparam \inst|d_h_enable_out~I .output_sync_reset = "none";
7394 // synopsys translate_on
7395
7396 // atom is at PIN_H18
7397 stratix_io \inst|d_v_enable_out~I (
7398         .datain(\inst|vga_driver_unit|v_enable_sig ),
7399         .ddiodatain(gnd),
7400         .oe(vcc),
7401         .outclk(gnd),
7402         .outclkena(vcc),
7403         .inclk(gnd),
7404         .inclkena(vcc),
7405         .areset(gnd),
7406         .sreset(gnd),
7407         .delayctrlin(gnd),
7408         .devclrn(devclrn),
7409         .devpor(devpor),
7410         .devoe(devoe),
7411         .combout(),
7412         .regout(),
7413         .ddioregout(),
7414         .padio(d_v_enable),
7415         .dqsundelayedout());
7416 // synopsys translate_off
7417 defparam \inst|d_v_enable_out~I .ddio_mode = "none";
7418 defparam \inst|d_v_enable_out~I .input_async_reset = "none";
7419 defparam \inst|d_v_enable_out~I .input_power_up = "low";
7420 defparam \inst|d_v_enable_out~I .input_register_mode = "none";
7421 defparam \inst|d_v_enable_out~I .input_sync_reset = "none";
7422 defparam \inst|d_v_enable_out~I .oe_async_reset = "none";
7423 defparam \inst|d_v_enable_out~I .oe_power_up = "low";
7424 defparam \inst|d_v_enable_out~I .oe_register_mode = "none";
7425 defparam \inst|d_v_enable_out~I .oe_sync_reset = "none";
7426 defparam \inst|d_v_enable_out~I .operation_mode = "output";
7427 defparam \inst|d_v_enable_out~I .output_async_reset = "none";
7428 defparam \inst|d_v_enable_out~I .output_power_up = "low";
7429 defparam \inst|d_v_enable_out~I .output_register_mode = "none";
7430 defparam \inst|d_v_enable_out~I .output_sync_reset = "none";
7431 // synopsys translate_on
7432
7433 // atom is at PIN_K3
7434 stratix_io \inst|d_state_clk_out~I (
7435         .datain(\inst1|altpll_component|_clk0 ),
7436         .ddiodatain(gnd),
7437         .oe(vcc),
7438         .outclk(gnd),
7439         .outclkena(vcc),
7440         .inclk(gnd),
7441         .inclkena(vcc),
7442         .areset(gnd),
7443         .sreset(gnd),
7444         .delayctrlin(gnd),
7445         .devclrn(devclrn),
7446         .devpor(devpor),
7447         .devoe(devoe),
7448         .combout(),
7449         .regout(),
7450         .ddioregout(),
7451         .padio(d_state_clk),
7452         .dqsundelayedout());
7453 // synopsys translate_off
7454 defparam \inst|d_state_clk_out~I .ddio_mode = "none";
7455 defparam \inst|d_state_clk_out~I .input_async_reset = "none";
7456 defparam \inst|d_state_clk_out~I .input_power_up = "low";
7457 defparam \inst|d_state_clk_out~I .input_register_mode = "none";
7458 defparam \inst|d_state_clk_out~I .input_sync_reset = "none";
7459 defparam \inst|d_state_clk_out~I .oe_async_reset = "none";
7460 defparam \inst|d_state_clk_out~I .oe_power_up = "low";
7461 defparam \inst|d_state_clk_out~I .oe_register_mode = "none";
7462 defparam \inst|d_state_clk_out~I .oe_sync_reset = "none";
7463 defparam \inst|d_state_clk_out~I .operation_mode = "output";
7464 defparam \inst|d_state_clk_out~I .output_async_reset = "none";
7465 defparam \inst|d_state_clk_out~I .output_power_up = "low";
7466 defparam \inst|d_state_clk_out~I .output_register_mode = "none";
7467 defparam \inst|d_state_clk_out~I .output_sync_reset = "none";
7468 // synopsys translate_on
7469
7470 // atom is at PIN_H3
7471 stratix_io \inst|d_toggle_out~I (
7472         .datain(\inst|vga_control_unit|toggle_sig ),
7473         .ddiodatain(gnd),
7474         .oe(vcc),
7475         .outclk(gnd),
7476         .outclkena(vcc),
7477         .inclk(gnd),
7478         .inclkena(vcc),
7479         .areset(gnd),
7480         .sreset(gnd),
7481         .delayctrlin(gnd),
7482         .devclrn(devclrn),
7483         .devpor(devpor),
7484         .devoe(devoe),
7485         .combout(),
7486         .regout(),
7487         .ddioregout(),
7488         .padio(d_toggle),
7489         .dqsundelayedout());
7490 // synopsys translate_off
7491 defparam \inst|d_toggle_out~I .ddio_mode = "none";
7492 defparam \inst|d_toggle_out~I .input_async_reset = "none";
7493 defparam \inst|d_toggle_out~I .input_power_up = "low";
7494 defparam \inst|d_toggle_out~I .input_register_mode = "none";
7495 defparam \inst|d_toggle_out~I .input_sync_reset = "none";
7496 defparam \inst|d_toggle_out~I .oe_async_reset = "none";
7497 defparam \inst|d_toggle_out~I .oe_power_up = "low";
7498 defparam \inst|d_toggle_out~I .oe_register_mode = "none";
7499 defparam \inst|d_toggle_out~I .oe_sync_reset = "none";
7500 defparam \inst|d_toggle_out~I .operation_mode = "output";
7501 defparam \inst|d_toggle_out~I .output_async_reset = "none";
7502 defparam \inst|d_toggle_out~I .output_power_up = "low";
7503 defparam \inst|d_toggle_out~I .output_register_mode = "none";
7504 defparam \inst|d_toggle_out~I .output_sync_reset = "none";
7505 // synopsys translate_on
7506
7507 // atom is at PIN_E22
7508 stratix_io \inst|r0_pin_out~I (
7509         .datain(\~STRATIX_FITTER_CREATED_GND~I_combout ),
7510         .ddiodatain(gnd),
7511         .oe(vcc),
7512         .outclk(gnd),
7513         .outclkena(vcc),
7514         .inclk(gnd),
7515         .inclkena(vcc),
7516         .areset(gnd),
7517         .sreset(gnd),
7518         .delayctrlin(gnd),
7519         .devclrn(devclrn),
7520         .devpor(devpor),
7521         .devoe(devoe),
7522         .combout(),
7523         .regout(),
7524         .ddioregout(),
7525         .padio(r0_pin),
7526         .dqsundelayedout());
7527 // synopsys translate_off
7528 defparam \inst|r0_pin_out~I .ddio_mode = "none";
7529 defparam \inst|r0_pin_out~I .input_async_reset = "none";
7530 defparam \inst|r0_pin_out~I .input_power_up = "low";
7531 defparam \inst|r0_pin_out~I .input_register_mode = "none";
7532 defparam \inst|r0_pin_out~I .input_sync_reset = "none";
7533 defparam \inst|r0_pin_out~I .oe_async_reset = "none";
7534 defparam \inst|r0_pin_out~I .oe_power_up = "low";
7535 defparam \inst|r0_pin_out~I .oe_register_mode = "none";
7536 defparam \inst|r0_pin_out~I .oe_sync_reset = "none";
7537 defparam \inst|r0_pin_out~I .operation_mode = "output";
7538 defparam \inst|r0_pin_out~I .output_async_reset = "none";
7539 defparam \inst|r0_pin_out~I .output_power_up = "low";
7540 defparam \inst|r0_pin_out~I .output_register_mode = "none";
7541 defparam \inst|r0_pin_out~I .output_sync_reset = "none";
7542 // synopsys translate_on
7543
7544 // atom is at PIN_T4
7545 stratix_io \inst|r1_pin_out~I (
7546         .datain(\~STRATIX_FITTER_CREATED_GND~I_combout ),
7547         .ddiodatain(gnd),
7548         .oe(vcc),
7549         .outclk(gnd),
7550         .outclkena(vcc),
7551         .inclk(gnd),
7552         .inclkena(vcc),
7553         .areset(gnd),
7554         .sreset(gnd),
7555         .delayctrlin(gnd),
7556         .devclrn(devclrn),
7557         .devpor(devpor),
7558         .devoe(devoe),
7559         .combout(),
7560         .regout(),
7561         .ddioregout(),
7562         .padio(r1_pin),
7563         .dqsundelayedout());
7564 // synopsys translate_off
7565 defparam \inst|r1_pin_out~I .ddio_mode = "none";
7566 defparam \inst|r1_pin_out~I .input_async_reset = "none";
7567 defparam \inst|r1_pin_out~I .input_power_up = "low";
7568 defparam \inst|r1_pin_out~I .input_register_mode = "none";
7569 defparam \inst|r1_pin_out~I .input_sync_reset = "none";
7570 defparam \inst|r1_pin_out~I .oe_async_reset = "none";
7571 defparam \inst|r1_pin_out~I .oe_power_up = "low";
7572 defparam \inst|r1_pin_out~I .oe_register_mode = "none";
7573 defparam \inst|r1_pin_out~I .oe_sync_reset = "none";
7574 defparam \inst|r1_pin_out~I .operation_mode = "output";
7575 defparam \inst|r1_pin_out~I .output_async_reset = "none";
7576 defparam \inst|r1_pin_out~I .output_power_up = "low";
7577 defparam \inst|r1_pin_out~I .output_register_mode = "none";
7578 defparam \inst|r1_pin_out~I .output_sync_reset = "none";
7579 // synopsys translate_on
7580
7581 // atom is at PIN_T7
7582 stratix_io \inst|r2_pin_out~I (
7583         .datain(\~STRATIX_FITTER_CREATED_GND~I_combout ),
7584         .ddiodatain(gnd),
7585         .oe(vcc),
7586         .outclk(gnd),
7587         .outclkena(vcc),
7588         .inclk(gnd),
7589         .inclkena(vcc),
7590         .areset(gnd),
7591         .sreset(gnd),
7592         .delayctrlin(gnd),
7593         .devclrn(devclrn),
7594         .devpor(devpor),
7595         .devoe(devoe),
7596         .combout(),
7597         .regout(),
7598         .ddioregout(),
7599         .padio(r2_pin),
7600         .dqsundelayedout());
7601 // synopsys translate_off
7602 defparam \inst|r2_pin_out~I .ddio_mode = "none";
7603 defparam \inst|r2_pin_out~I .input_async_reset = "none";
7604 defparam \inst|r2_pin_out~I .input_power_up = "low";
7605 defparam \inst|r2_pin_out~I .input_register_mode = "none";
7606 defparam \inst|r2_pin_out~I .input_sync_reset = "none";
7607 defparam \inst|r2_pin_out~I .oe_async_reset = "none";
7608 defparam \inst|r2_pin_out~I .oe_power_up = "low";
7609 defparam \inst|r2_pin_out~I .oe_register_mode = "none";
7610 defparam \inst|r2_pin_out~I .oe_sync_reset = "none";
7611 defparam \inst|r2_pin_out~I .operation_mode = "output";
7612 defparam \inst|r2_pin_out~I .output_async_reset = "none";
7613 defparam \inst|r2_pin_out~I .output_power_up = "low";
7614 defparam \inst|r2_pin_out~I .output_register_mode = "none";
7615 defparam \inst|r2_pin_out~I .output_sync_reset = "none";
7616 // synopsys translate_on
7617
7618 // atom is at PIN_E23
7619 stratix_io \inst|g0_pin_out~I (
7620         .datain(\~STRATIX_FITTER_CREATED_GND~I_combout ),
7621         .ddiodatain(gnd),
7622         .oe(vcc),
7623         .outclk(gnd),
7624         .outclkena(vcc),
7625         .inclk(gnd),
7626         .inclkena(vcc),
7627         .areset(gnd),
7628         .sreset(gnd),
7629         .delayctrlin(gnd),
7630         .devclrn(devclrn),
7631         .devpor(devpor),
7632         .devoe(devoe),
7633         .combout(),
7634         .regout(),
7635         .ddioregout(),
7636         .padio(g0_pin),
7637         .dqsundelayedout());
7638 // synopsys translate_off
7639 defparam \inst|g0_pin_out~I .ddio_mode = "none";
7640 defparam \inst|g0_pin_out~I .input_async_reset = "none";
7641 defparam \inst|g0_pin_out~I .input_power_up = "low";
7642 defparam \inst|g0_pin_out~I .input_register_mode = "none";
7643 defparam \inst|g0_pin_out~I .input_sync_reset = "none";
7644 defparam \inst|g0_pin_out~I .oe_async_reset = "none";
7645 defparam \inst|g0_pin_out~I .oe_power_up = "low";
7646 defparam \inst|g0_pin_out~I .oe_register_mode = "none";
7647 defparam \inst|g0_pin_out~I .oe_sync_reset = "none";
7648 defparam \inst|g0_pin_out~I .operation_mode = "output";
7649 defparam \inst|g0_pin_out~I .output_async_reset = "none";
7650 defparam \inst|g0_pin_out~I .output_power_up = "low";
7651 defparam \inst|g0_pin_out~I .output_register_mode = "none";
7652 defparam \inst|g0_pin_out~I .output_sync_reset = "none";
7653 // synopsys translate_on
7654
7655 // atom is at PIN_T5
7656 stratix_io \inst|g1_pin_out~I (
7657         .datain(\~STRATIX_FITTER_CREATED_GND~I_combout ),
7658         .ddiodatain(gnd),
7659         .oe(vcc),
7660         .outclk(gnd),
7661         .outclkena(vcc),
7662         .inclk(gnd),
7663         .inclkena(vcc),
7664         .areset(gnd),
7665         .sreset(gnd),
7666         .delayctrlin(gnd),
7667         .devclrn(devclrn),
7668         .devpor(devpor),
7669         .devoe(devoe),
7670         .combout(),
7671         .regout(),
7672         .ddioregout(),
7673         .padio(g1_pin),
7674         .dqsundelayedout());
7675 // synopsys translate_off
7676 defparam \inst|g1_pin_out~I .ddio_mode = "none";
7677 defparam \inst|g1_pin_out~I .input_async_reset = "none";
7678 defparam \inst|g1_pin_out~I .input_power_up = "low";
7679 defparam \inst|g1_pin_out~I .input_register_mode = "none";
7680 defparam \inst|g1_pin_out~I .input_sync_reset = "none";
7681 defparam \inst|g1_pin_out~I .oe_async_reset = "none";
7682 defparam \inst|g1_pin_out~I .oe_power_up = "low";
7683 defparam \inst|g1_pin_out~I .oe_register_mode = "none";
7684 defparam \inst|g1_pin_out~I .oe_sync_reset = "none";
7685 defparam \inst|g1_pin_out~I .operation_mode = "output";
7686 defparam \inst|g1_pin_out~I .output_async_reset = "none";
7687 defparam \inst|g1_pin_out~I .output_power_up = "low";
7688 defparam \inst|g1_pin_out~I .output_register_mode = "none";
7689 defparam \inst|g1_pin_out~I .output_sync_reset = "none";
7690 // synopsys translate_on
7691
7692 // atom is at PIN_T24
7693 stratix_io \inst|g2_pin_out~I (
7694         .datain(\~STRATIX_FITTER_CREATED_GND~I_combout ),
7695         .ddiodatain(gnd),
7696         .oe(vcc),
7697         .outclk(gnd),
7698         .outclkena(vcc),
7699         .inclk(gnd),
7700         .inclkena(vcc),
7701         .areset(gnd),
7702         .sreset(gnd),
7703         .delayctrlin(gnd),
7704         .devclrn(devclrn),
7705         .devpor(devpor),
7706         .devoe(devoe),
7707         .combout(),
7708         .regout(),
7709         .ddioregout(),
7710         .padio(g2_pin),
7711         .dqsundelayedout());
7712 // synopsys translate_off
7713 defparam \inst|g2_pin_out~I .ddio_mode = "none";
7714 defparam \inst|g2_pin_out~I .input_async_reset = "none";
7715 defparam \inst|g2_pin_out~I .input_power_up = "low";
7716 defparam \inst|g2_pin_out~I .input_register_mode = "none";
7717 defparam \inst|g2_pin_out~I .input_sync_reset = "none";
7718 defparam \inst|g2_pin_out~I .oe_async_reset = "none";
7719 defparam \inst|g2_pin_out~I .oe_power_up = "low";
7720 defparam \inst|g2_pin_out~I .oe_register_mode = "none";
7721 defparam \inst|g2_pin_out~I .oe_sync_reset = "none";
7722 defparam \inst|g2_pin_out~I .operation_mode = "output";
7723 defparam \inst|g2_pin_out~I .output_async_reset = "none";
7724 defparam \inst|g2_pin_out~I .output_power_up = "low";
7725 defparam \inst|g2_pin_out~I .output_register_mode = "none";
7726 defparam \inst|g2_pin_out~I .output_sync_reset = "none";
7727 // synopsys translate_on
7728
7729 // atom is at PIN_E24
7730 stratix_io \inst|b0_pin_out~I (
7731         .datain(\inst|vga_control_unit|b ),
7732         .ddiodatain(gnd),
7733         .oe(vcc),
7734         .outclk(gnd),
7735         .outclkena(vcc),
7736         .inclk(gnd),
7737         .inclkena(vcc),
7738         .areset(gnd),
7739         .sreset(gnd),
7740         .delayctrlin(gnd),
7741         .devclrn(devclrn),
7742         .devpor(devpor),
7743         .devoe(devoe),
7744         .combout(),
7745         .regout(),
7746         .ddioregout(),
7747         .padio(b0_pin),
7748         .dqsundelayedout());
7749 // synopsys translate_off
7750 defparam \inst|b0_pin_out~I .ddio_mode = "none";
7751 defparam \inst|b0_pin_out~I .input_async_reset = "none";
7752 defparam \inst|b0_pin_out~I .input_power_up = "low";
7753 defparam \inst|b0_pin_out~I .input_register_mode = "none";
7754 defparam \inst|b0_pin_out~I .input_sync_reset = "none";
7755 defparam \inst|b0_pin_out~I .oe_async_reset = "none";
7756 defparam \inst|b0_pin_out~I .oe_power_up = "low";
7757 defparam \inst|b0_pin_out~I .oe_register_mode = "none";
7758 defparam \inst|b0_pin_out~I .oe_sync_reset = "none";
7759 defparam \inst|b0_pin_out~I .operation_mode = "output";
7760 defparam \inst|b0_pin_out~I .output_async_reset = "none";
7761 defparam \inst|b0_pin_out~I .output_power_up = "low";
7762 defparam \inst|b0_pin_out~I .output_register_mode = "none";
7763 defparam \inst|b0_pin_out~I .output_sync_reset = "none";
7764 // synopsys translate_on
7765
7766 // atom is at PIN_T6
7767 stratix_io \inst|b1_pin_out~I (
7768         .datain(\inst|vga_control_unit|b ),
7769         .ddiodatain(gnd),
7770         .oe(vcc),
7771         .outclk(gnd),
7772         .outclkena(vcc),
7773         .inclk(gnd),
7774         .inclkena(vcc),
7775         .areset(gnd),
7776         .sreset(gnd),
7777         .delayctrlin(gnd),
7778         .devclrn(devclrn),
7779         .devpor(devpor),
7780         .devoe(devoe),
7781         .combout(),
7782         .regout(),
7783         .ddioregout(),
7784         .padio(b1_pin),
7785         .dqsundelayedout());
7786 // synopsys translate_off
7787 defparam \inst|b1_pin_out~I .ddio_mode = "none";
7788 defparam \inst|b1_pin_out~I .input_async_reset = "none";
7789 defparam \inst|b1_pin_out~I .input_power_up = "low";
7790 defparam \inst|b1_pin_out~I .input_register_mode = "none";
7791 defparam \inst|b1_pin_out~I .input_sync_reset = "none";
7792 defparam \inst|b1_pin_out~I .oe_async_reset = "none";
7793 defparam \inst|b1_pin_out~I .oe_power_up = "low";
7794 defparam \inst|b1_pin_out~I .oe_register_mode = "none";
7795 defparam \inst|b1_pin_out~I .oe_sync_reset = "none";
7796 defparam \inst|b1_pin_out~I .operation_mode = "output";
7797 defparam \inst|b1_pin_out~I .output_async_reset = "none";
7798 defparam \inst|b1_pin_out~I .output_power_up = "low";
7799 defparam \inst|b1_pin_out~I .output_register_mode = "none";
7800 defparam \inst|b1_pin_out~I .output_sync_reset = "none";
7801 // synopsys translate_on
7802
7803 // atom is at PIN_F1
7804 stratix_io \inst|hsync_pin_out~I (
7805         .datain(\inst|vga_driver_unit|h_sync ),
7806         .ddiodatain(gnd),
7807         .oe(vcc),
7808         .outclk(gnd),
7809         .outclkena(vcc),
7810         .inclk(gnd),
7811         .inclkena(vcc),
7812         .areset(gnd),
7813         .sreset(gnd),
7814         .delayctrlin(gnd),
7815         .devclrn(devclrn),
7816         .devpor(devpor),
7817         .devoe(devoe),
7818         .combout(),
7819         .regout(),
7820         .ddioregout(),
7821         .padio(hsync_pin),
7822         .dqsundelayedout());
7823 // synopsys translate_off
7824 defparam \inst|hsync_pin_out~I .ddio_mode = "none";
7825 defparam \inst|hsync_pin_out~I .input_async_reset = "none";
7826 defparam \inst|hsync_pin_out~I .input_power_up = "low";
7827 defparam \inst|hsync_pin_out~I .input_register_mode = "none";
7828 defparam \inst|hsync_pin_out~I .input_sync_reset = "none";
7829 defparam \inst|hsync_pin_out~I .oe_async_reset = "none";
7830 defparam \inst|hsync_pin_out~I .oe_power_up = "low";
7831 defparam \inst|hsync_pin_out~I .oe_register_mode = "none";
7832 defparam \inst|hsync_pin_out~I .oe_sync_reset = "none";
7833 defparam \inst|hsync_pin_out~I .operation_mode = "output";
7834 defparam \inst|hsync_pin_out~I .output_async_reset = "none";
7835 defparam \inst|hsync_pin_out~I .output_power_up = "low";
7836 defparam \inst|hsync_pin_out~I .output_register_mode = "none";
7837 defparam \inst|hsync_pin_out~I .output_sync_reset = "none";
7838 // synopsys translate_on
7839
7840 // atom is at PIN_F2
7841 stratix_io \inst|vsync_pin_out~I (
7842         .datain(\inst|vga_driver_unit|v_sync ),
7843         .ddiodatain(gnd),
7844         .oe(vcc),
7845         .outclk(gnd),
7846         .outclkena(vcc),
7847         .inclk(gnd),
7848         .inclkena(vcc),
7849         .areset(gnd),
7850         .sreset(gnd),
7851         .delayctrlin(gnd),
7852         .devclrn(devclrn),
7853         .devpor(devpor),
7854         .devoe(devoe),
7855         .combout(),
7856         .regout(),
7857         .ddioregout(),
7858         .padio(vsync_pin),
7859         .dqsundelayedout());
7860 // synopsys translate_off
7861 defparam \inst|vsync_pin_out~I .ddio_mode = "none";
7862 defparam \inst|vsync_pin_out~I .input_async_reset = "none";
7863 defparam \inst|vsync_pin_out~I .input_power_up = "low";
7864 defparam \inst|vsync_pin_out~I .input_register_mode = "none";
7865 defparam \inst|vsync_pin_out~I .input_sync_reset = "none";
7866 defparam \inst|vsync_pin_out~I .oe_async_reset = "none";
7867 defparam \inst|vsync_pin_out~I .oe_power_up = "low";
7868 defparam \inst|vsync_pin_out~I .oe_register_mode = "none";
7869 defparam \inst|vsync_pin_out~I .oe_sync_reset = "none";
7870 defparam \inst|vsync_pin_out~I .operation_mode = "output";
7871 defparam \inst|vsync_pin_out~I .output_async_reset = "none";
7872 defparam \inst|vsync_pin_out~I .output_power_up = "low";
7873 defparam \inst|vsync_pin_out~I .output_register_mode = "none";
7874 defparam \inst|vsync_pin_out~I .output_sync_reset = "none";
7875 // synopsys translate_on
7876
7877 // atom is at PIN_K5
7878 stratix_io \inst|d_column_counter_out_9_~I (
7879         .datain(\inst|vga_driver_unit|column_counter_sig_9 ),
7880         .ddiodatain(gnd),
7881         .oe(vcc),
7882         .outclk(gnd),
7883         .outclkena(vcc),
7884         .inclk(gnd),
7885         .inclkena(vcc),
7886         .areset(gnd),
7887         .sreset(gnd),
7888         .delayctrlin(gnd),
7889         .devclrn(devclrn),
7890         .devpor(devpor),
7891         .devoe(devoe),
7892         .combout(),
7893         .regout(),
7894         .ddioregout(),
7895         .padio(d_column_counter[9]),
7896         .dqsundelayedout());
7897 // synopsys translate_off
7898 defparam \inst|d_column_counter_out_9_~I .ddio_mode = "none";
7899 defparam \inst|d_column_counter_out_9_~I .input_async_reset = "none";
7900 defparam \inst|d_column_counter_out_9_~I .input_power_up = "low";
7901 defparam \inst|d_column_counter_out_9_~I .input_register_mode = "none";
7902 defparam \inst|d_column_counter_out_9_~I .input_sync_reset = "none";
7903 defparam \inst|d_column_counter_out_9_~I .oe_async_reset = "none";
7904 defparam \inst|d_column_counter_out_9_~I .oe_power_up = "low";
7905 defparam \inst|d_column_counter_out_9_~I .oe_register_mode = "none";
7906 defparam \inst|d_column_counter_out_9_~I .oe_sync_reset = "none";
7907 defparam \inst|d_column_counter_out_9_~I .operation_mode = "output";
7908 defparam \inst|d_column_counter_out_9_~I .output_async_reset = "none";
7909 defparam \inst|d_column_counter_out_9_~I .output_power_up = "low";
7910 defparam \inst|d_column_counter_out_9_~I .output_register_mode = "none";
7911 defparam \inst|d_column_counter_out_9_~I .output_sync_reset = "none";
7912 // synopsys translate_on
7913
7914 // atom is at PIN_K19
7915 stratix_io \inst|d_column_counter_out_8_~I (
7916         .datain(\inst|vga_driver_unit|column_counter_sig_8 ),
7917         .ddiodatain(gnd),
7918         .oe(vcc),
7919         .outclk(gnd),
7920         .outclkena(vcc),
7921         .inclk(gnd),
7922         .inclkena(vcc),
7923         .areset(gnd),
7924         .sreset(gnd),
7925         .delayctrlin(gnd),
7926         .devclrn(devclrn),
7927         .devpor(devpor),
7928         .devoe(devoe),
7929         .combout(),
7930         .regout(),
7931         .ddioregout(),
7932         .padio(d_column_counter[8]),
7933         .dqsundelayedout());
7934 // synopsys translate_off
7935 defparam \inst|d_column_counter_out_8_~I .ddio_mode = "none";
7936 defparam \inst|d_column_counter_out_8_~I .input_async_reset = "none";
7937 defparam \inst|d_column_counter_out_8_~I .input_power_up = "low";
7938 defparam \inst|d_column_counter_out_8_~I .input_register_mode = "none";
7939 defparam \inst|d_column_counter_out_8_~I .input_sync_reset = "none";
7940 defparam \inst|d_column_counter_out_8_~I .oe_async_reset = "none";
7941 defparam \inst|d_column_counter_out_8_~I .oe_power_up = "low";
7942 defparam \inst|d_column_counter_out_8_~I .oe_register_mode = "none";
7943 defparam \inst|d_column_counter_out_8_~I .oe_sync_reset = "none";
7944 defparam \inst|d_column_counter_out_8_~I .operation_mode = "output";
7945 defparam \inst|d_column_counter_out_8_~I .output_async_reset = "none";
7946 defparam \inst|d_column_counter_out_8_~I .output_power_up = "low";
7947 defparam \inst|d_column_counter_out_8_~I .output_register_mode = "none";
7948 defparam \inst|d_column_counter_out_8_~I .output_sync_reset = "none";
7949 // synopsys translate_on
7950
7951 // atom is at PIN_K23
7952 stratix_io \inst|d_column_counter_out_7_~I (
7953         .datain(\inst|vga_driver_unit|column_counter_sig_7 ),
7954         .ddiodatain(gnd),
7955         .oe(vcc),
7956         .outclk(gnd),
7957         .outclkena(vcc),
7958         .inclk(gnd),
7959         .inclkena(vcc),
7960         .areset(gnd),
7961         .sreset(gnd),
7962         .delayctrlin(gnd),
7963         .devclrn(devclrn),
7964         .devpor(devpor),
7965         .devoe(devoe),
7966         .combout(),
7967         .regout(),
7968         .ddioregout(),
7969         .padio(d_column_counter[7]),
7970         .dqsundelayedout());
7971 // synopsys translate_off
7972 defparam \inst|d_column_counter_out_7_~I .ddio_mode = "none";
7973 defparam \inst|d_column_counter_out_7_~I .input_async_reset = "none";
7974 defparam \inst|d_column_counter_out_7_~I .input_power_up = "low";
7975 defparam \inst|d_column_counter_out_7_~I .input_register_mode = "none";
7976 defparam \inst|d_column_counter_out_7_~I .input_sync_reset = "none";
7977 defparam \inst|d_column_counter_out_7_~I .oe_async_reset = "none";
7978 defparam \inst|d_column_counter_out_7_~I .oe_power_up = "low";
7979 defparam \inst|d_column_counter_out_7_~I .oe_register_mode = "none";
7980 defparam \inst|d_column_counter_out_7_~I .oe_sync_reset = "none";
7981 defparam \inst|d_column_counter_out_7_~I .operation_mode = "output";
7982 defparam \inst|d_column_counter_out_7_~I .output_async_reset = "none";
7983 defparam \inst|d_column_counter_out_7_~I .output_power_up = "low";
7984 defparam \inst|d_column_counter_out_7_~I .output_register_mode = "none";
7985 defparam \inst|d_column_counter_out_7_~I .output_sync_reset = "none";
7986 // synopsys translate_on
7987
7988 // atom is at PIN_L2
7989 stratix_io \inst|d_column_counter_out_6_~I (
7990         .datain(\inst|vga_driver_unit|column_counter_sig_6 ),
7991         .ddiodatain(gnd),
7992         .oe(vcc),
7993         .outclk(gnd),
7994         .outclkena(vcc),
7995         .inclk(gnd),
7996         .inclkena(vcc),
7997         .areset(gnd),
7998         .sreset(gnd),
7999         .delayctrlin(gnd),
8000         .devclrn(devclrn),
8001         .devpor(devpor),
8002         .devoe(devoe),
8003         .combout(),
8004         .regout(),
8005         .ddioregout(),
8006         .padio(d_column_counter[6]),
8007         .dqsundelayedout());
8008 // synopsys translate_off
8009 defparam \inst|d_column_counter_out_6_~I .ddio_mode = "none";
8010 defparam \inst|d_column_counter_out_6_~I .input_async_reset = "none";
8011 defparam \inst|d_column_counter_out_6_~I .input_power_up = "low";
8012 defparam \inst|d_column_counter_out_6_~I .input_register_mode = "none";
8013 defparam \inst|d_column_counter_out_6_~I .input_sync_reset = "none";
8014 defparam \inst|d_column_counter_out_6_~I .oe_async_reset = "none";
8015 defparam \inst|d_column_counter_out_6_~I .oe_power_up = "low";
8016 defparam \inst|d_column_counter_out_6_~I .oe_register_mode = "none";
8017 defparam \inst|d_column_counter_out_6_~I .oe_sync_reset = "none";
8018 defparam \inst|d_column_counter_out_6_~I .operation_mode = "output";
8019 defparam \inst|d_column_counter_out_6_~I .output_async_reset = "none";
8020 defparam \inst|d_column_counter_out_6_~I .output_power_up = "low";
8021 defparam \inst|d_column_counter_out_6_~I .output_register_mode = "none";
8022 defparam \inst|d_column_counter_out_6_~I .output_sync_reset = "none";
8023 // synopsys translate_on
8024
8025 // atom is at PIN_L4
8026 stratix_io \inst|d_column_counter_out_5_~I (
8027         .datain(\inst|vga_driver_unit|column_counter_sig_5 ),
8028         .ddiodatain(gnd),
8029         .oe(vcc),
8030         .outclk(gnd),
8031         .outclkena(vcc),
8032         .inclk(gnd),
8033         .inclkena(vcc),
8034         .areset(gnd),
8035         .sreset(gnd),
8036         .delayctrlin(gnd),
8037         .devclrn(devclrn),
8038         .devpor(devpor),
8039         .devoe(devoe),
8040         .combout(),
8041         .regout(),
8042         .ddioregout(),
8043         .padio(d_column_counter[5]),
8044         .dqsundelayedout());
8045 // synopsys translate_off
8046 defparam \inst|d_column_counter_out_5_~I .ddio_mode = "none";
8047 defparam \inst|d_column_counter_out_5_~I .input_async_reset = "none";
8048 defparam \inst|d_column_counter_out_5_~I .input_power_up = "low";
8049 defparam \inst|d_column_counter_out_5_~I .input_register_mode = "none";
8050 defparam \inst|d_column_counter_out_5_~I .input_sync_reset = "none";
8051 defparam \inst|d_column_counter_out_5_~I .oe_async_reset = "none";
8052 defparam \inst|d_column_counter_out_5_~I .oe_power_up = "low";
8053 defparam \inst|d_column_counter_out_5_~I .oe_register_mode = "none";
8054 defparam \inst|d_column_counter_out_5_~I .oe_sync_reset = "none";
8055 defparam \inst|d_column_counter_out_5_~I .operation_mode = "output";
8056 defparam \inst|d_column_counter_out_5_~I .output_async_reset = "none";
8057 defparam \inst|d_column_counter_out_5_~I .output_power_up = "low";
8058 defparam \inst|d_column_counter_out_5_~I .output_register_mode = "none";
8059 defparam \inst|d_column_counter_out_5_~I .output_sync_reset = "none";
8060 // synopsys translate_on
8061
8062 // atom is at PIN_L6
8063 stratix_io \inst|d_column_counter_out_4_~I (
8064         .datain(\inst|vga_driver_unit|column_counter_sig_4 ),
8065         .ddiodatain(gnd),
8066         .oe(vcc),
8067         .outclk(gnd),
8068         .outclkena(vcc),
8069         .inclk(gnd),
8070         .inclkena(vcc),
8071         .areset(gnd),
8072         .sreset(gnd),
8073         .delayctrlin(gnd),
8074         .devclrn(devclrn),
8075         .devpor(devpor),
8076         .devoe(devoe),
8077         .combout(),
8078         .regout(),
8079         .ddioregout(),
8080         .padio(d_column_counter[4]),
8081         .dqsundelayedout());
8082 // synopsys translate_off
8083 defparam \inst|d_column_counter_out_4_~I .ddio_mode = "none";
8084 defparam \inst|d_column_counter_out_4_~I .input_async_reset = "none";
8085 defparam \inst|d_column_counter_out_4_~I .input_power_up = "low";
8086 defparam \inst|d_column_counter_out_4_~I .input_register_mode = "none";
8087 defparam \inst|d_column_counter_out_4_~I .input_sync_reset = "none";
8088 defparam \inst|d_column_counter_out_4_~I .oe_async_reset = "none";
8089 defparam \inst|d_column_counter_out_4_~I .oe_power_up = "low";
8090 defparam \inst|d_column_counter_out_4_~I .oe_register_mode = "none";
8091 defparam \inst|d_column_counter_out_4_~I .oe_sync_reset = "none";
8092 defparam \inst|d_column_counter_out_4_~I .operation_mode = "output";
8093 defparam \inst|d_column_counter_out_4_~I .output_async_reset = "none";
8094 defparam \inst|d_column_counter_out_4_~I .output_power_up = "low";
8095 defparam \inst|d_column_counter_out_4_~I .output_register_mode = "none";
8096 defparam \inst|d_column_counter_out_4_~I .output_sync_reset = "none";
8097 // synopsys translate_on
8098
8099 // atom is at PIN_L20
8100 stratix_io \inst|d_column_counter_out_3_~I (
8101         .datain(\inst|vga_driver_unit|column_counter_sig_3 ),
8102         .ddiodatain(gnd),
8103         .oe(vcc),
8104         .outclk(gnd),
8105         .outclkena(vcc),
8106         .inclk(gnd),
8107         .inclkena(vcc),
8108         .areset(gnd),
8109         .sreset(gnd),
8110         .delayctrlin(gnd),
8111         .devclrn(devclrn),
8112         .devpor(devpor),
8113         .devoe(devoe),
8114         .combout(),
8115         .regout(),
8116         .ddioregout(),
8117         .padio(d_column_counter[3]),
8118         .dqsundelayedout());
8119 // synopsys translate_off
8120 defparam \inst|d_column_counter_out_3_~I .ddio_mode = "none";
8121 defparam \inst|d_column_counter_out_3_~I .input_async_reset = "none";
8122 defparam \inst|d_column_counter_out_3_~I .input_power_up = "low";
8123 defparam \inst|d_column_counter_out_3_~I .input_register_mode = "none";
8124 defparam \inst|d_column_counter_out_3_~I .input_sync_reset = "none";
8125 defparam \inst|d_column_counter_out_3_~I .oe_async_reset = "none";
8126 defparam \inst|d_column_counter_out_3_~I .oe_power_up = "low";
8127 defparam \inst|d_column_counter_out_3_~I .oe_register_mode = "none";
8128 defparam \inst|d_column_counter_out_3_~I .oe_sync_reset = "none";
8129 defparam \inst|d_column_counter_out_3_~I .operation_mode = "output";
8130 defparam \inst|d_column_counter_out_3_~I .output_async_reset = "none";
8131 defparam \inst|d_column_counter_out_3_~I .output_power_up = "low";
8132 defparam \inst|d_column_counter_out_3_~I .output_register_mode = "none";
8133 defparam \inst|d_column_counter_out_3_~I .output_sync_reset = "none";
8134 // synopsys translate_on
8135
8136 // atom is at PIN_L21
8137 stratix_io \inst|d_column_counter_out_2_~I (
8138         .datain(\inst|vga_driver_unit|column_counter_sig_2 ),
8139         .ddiodatain(gnd),
8140         .oe(vcc),
8141         .outclk(gnd),
8142         .outclkena(vcc),
8143         .inclk(gnd),
8144         .inclkena(vcc),
8145         .areset(gnd),
8146         .sreset(gnd),
8147         .delayctrlin(gnd),
8148         .devclrn(devclrn),
8149         .devpor(devpor),
8150         .devoe(devoe),
8151         .combout(),
8152         .regout(),
8153         .ddioregout(),
8154         .padio(d_column_counter[2]),
8155         .dqsundelayedout());
8156 // synopsys translate_off
8157 defparam \inst|d_column_counter_out_2_~I .ddio_mode = "none";
8158 defparam \inst|d_column_counter_out_2_~I .input_async_reset = "none";
8159 defparam \inst|d_column_counter_out_2_~I .input_power_up = "low";
8160 defparam \inst|d_column_counter_out_2_~I .input_register_mode = "none";
8161 defparam \inst|d_column_counter_out_2_~I .input_sync_reset = "none";
8162 defparam \inst|d_column_counter_out_2_~I .oe_async_reset = "none";
8163 defparam \inst|d_column_counter_out_2_~I .oe_power_up = "low";
8164 defparam \inst|d_column_counter_out_2_~I .oe_register_mode = "none";
8165 defparam \inst|d_column_counter_out_2_~I .oe_sync_reset = "none";
8166 defparam \inst|d_column_counter_out_2_~I .operation_mode = "output";
8167 defparam \inst|d_column_counter_out_2_~I .output_async_reset = "none";
8168 defparam \inst|d_column_counter_out_2_~I .output_power_up = "low";
8169 defparam \inst|d_column_counter_out_2_~I .output_register_mode = "none";
8170 defparam \inst|d_column_counter_out_2_~I .output_sync_reset = "none";
8171 // synopsys translate_on
8172
8173 // atom is at PIN_L22
8174 stratix_io \inst|d_column_counter_out_1_~I (
8175         .datain(\inst|vga_driver_unit|column_counter_sig_1 ),
8176         .ddiodatain(gnd),
8177         .oe(vcc),
8178         .outclk(gnd),
8179         .outclkena(vcc),
8180         .inclk(gnd),
8181         .inclkena(vcc),
8182         .areset(gnd),
8183         .sreset(gnd),
8184         .delayctrlin(gnd),
8185         .devclrn(devclrn),
8186         .devpor(devpor),
8187         .devoe(devoe),
8188         .combout(),
8189         .regout(),
8190         .ddioregout(),
8191         .padio(d_column_counter[1]),
8192         .dqsundelayedout());
8193 // synopsys translate_off
8194 defparam \inst|d_column_counter_out_1_~I .ddio_mode = "none";
8195 defparam \inst|d_column_counter_out_1_~I .input_async_reset = "none";
8196 defparam \inst|d_column_counter_out_1_~I .input_power_up = "low";
8197 defparam \inst|d_column_counter_out_1_~I .input_register_mode = "none";
8198 defparam \inst|d_column_counter_out_1_~I .input_sync_reset = "none";
8199 defparam \inst|d_column_counter_out_1_~I .oe_async_reset = "none";
8200 defparam \inst|d_column_counter_out_1_~I .oe_power_up = "low";
8201 defparam \inst|d_column_counter_out_1_~I .oe_register_mode = "none";
8202 defparam \inst|d_column_counter_out_1_~I .oe_sync_reset = "none";
8203 defparam \inst|d_column_counter_out_1_~I .operation_mode = "output";
8204 defparam \inst|d_column_counter_out_1_~I .output_async_reset = "none";
8205 defparam \inst|d_column_counter_out_1_~I .output_power_up = "low";
8206 defparam \inst|d_column_counter_out_1_~I .output_register_mode = "none";
8207 defparam \inst|d_column_counter_out_1_~I .output_sync_reset = "none";
8208 // synopsys translate_on
8209
8210 // atom is at PIN_L23
8211 stratix_io \inst|d_column_counter_out_0_~I (
8212         .datain(\inst|vga_driver_unit|column_counter_sig_0 ),
8213         .ddiodatain(gnd),
8214         .oe(vcc),
8215         .outclk(gnd),
8216         .outclkena(vcc),
8217         .inclk(gnd),
8218         .inclkena(vcc),
8219         .areset(gnd),
8220         .sreset(gnd),
8221         .delayctrlin(gnd),
8222         .devclrn(devclrn),
8223         .devpor(devpor),
8224         .devoe(devoe),
8225         .combout(),
8226         .regout(),
8227         .ddioregout(),
8228         .padio(d_column_counter[0]),
8229         .dqsundelayedout());
8230 // synopsys translate_off
8231 defparam \inst|d_column_counter_out_0_~I .ddio_mode = "none";
8232 defparam \inst|d_column_counter_out_0_~I .input_async_reset = "none";
8233 defparam \inst|d_column_counter_out_0_~I .input_power_up = "low";
8234 defparam \inst|d_column_counter_out_0_~I .input_register_mode = "none";
8235 defparam \inst|d_column_counter_out_0_~I .input_sync_reset = "none";
8236 defparam \inst|d_column_counter_out_0_~I .oe_async_reset = "none";
8237 defparam \inst|d_column_counter_out_0_~I .oe_power_up = "low";
8238 defparam \inst|d_column_counter_out_0_~I .oe_register_mode = "none";
8239 defparam \inst|d_column_counter_out_0_~I .oe_sync_reset = "none";
8240 defparam \inst|d_column_counter_out_0_~I .operation_mode = "output";
8241 defparam \inst|d_column_counter_out_0_~I .output_async_reset = "none";
8242 defparam \inst|d_column_counter_out_0_~I .output_power_up = "low";
8243 defparam \inst|d_column_counter_out_0_~I .output_register_mode = "none";
8244 defparam \inst|d_column_counter_out_0_~I .output_sync_reset = "none";
8245 // synopsys translate_on
8246
8247 // atom is at PIN_G18
8248 stratix_io \inst|d_hsync_counter_out_9_~I (
8249         .datain(\inst|vga_driver_unit|hsync_counter_9 ),
8250         .ddiodatain(gnd),
8251         .oe(vcc),
8252         .outclk(gnd),
8253         .outclkena(vcc),
8254         .inclk(gnd),
8255         .inclkena(vcc),
8256         .areset(gnd),
8257         .sreset(gnd),
8258         .delayctrlin(gnd),
8259         .devclrn(devclrn),
8260         .devpor(devpor),
8261         .devoe(devoe),
8262         .combout(),
8263         .regout(),
8264         .ddioregout(),
8265         .padio(d_hsync_counter[9]),
8266         .dqsundelayedout());
8267 // synopsys translate_off
8268 defparam \inst|d_hsync_counter_out_9_~I .ddio_mode = "none";
8269 defparam \inst|d_hsync_counter_out_9_~I .input_async_reset = "none";
8270 defparam \inst|d_hsync_counter_out_9_~I .input_power_up = "low";
8271 defparam \inst|d_hsync_counter_out_9_~I .input_register_mode = "none";
8272 defparam \inst|d_hsync_counter_out_9_~I .input_sync_reset = "none";
8273 defparam \inst|d_hsync_counter_out_9_~I .oe_async_reset = "none";
8274 defparam \inst|d_hsync_counter_out_9_~I .oe_power_up = "low";
8275 defparam \inst|d_hsync_counter_out_9_~I .oe_register_mode = "none";
8276 defparam \inst|d_hsync_counter_out_9_~I .oe_sync_reset = "none";
8277 defparam \inst|d_hsync_counter_out_9_~I .operation_mode = "output";
8278 defparam \inst|d_hsync_counter_out_9_~I .output_async_reset = "none";
8279 defparam \inst|d_hsync_counter_out_9_~I .output_power_up = "low";
8280 defparam \inst|d_hsync_counter_out_9_~I .output_register_mode = "none";
8281 defparam \inst|d_hsync_counter_out_9_~I .output_sync_reset = "none";
8282 // synopsys translate_on
8283
8284 // atom is at PIN_G22
8285 stratix_io \inst|d_hsync_counter_out_8_~I (
8286         .datain(\inst|vga_driver_unit|hsync_counter_8 ),
8287         .ddiodatain(gnd),
8288         .oe(vcc),
8289         .outclk(gnd),
8290         .outclkena(vcc),
8291         .inclk(gnd),
8292         .inclkena(vcc),
8293         .areset(gnd),
8294         .sreset(gnd),
8295         .delayctrlin(gnd),
8296         .devclrn(devclrn),
8297         .devpor(devpor),
8298         .devoe(devoe),
8299         .combout(),
8300         .regout(),
8301         .ddioregout(),
8302         .padio(d_hsync_counter[8]),
8303         .dqsundelayedout());
8304 // synopsys translate_off
8305 defparam \inst|d_hsync_counter_out_8_~I .ddio_mode = "none";
8306 defparam \inst|d_hsync_counter_out_8_~I .input_async_reset = "none";
8307 defparam \inst|d_hsync_counter_out_8_~I .input_power_up = "low";
8308 defparam \inst|d_hsync_counter_out_8_~I .input_register_mode = "none";
8309 defparam \inst|d_hsync_counter_out_8_~I .input_sync_reset = "none";
8310 defparam \inst|d_hsync_counter_out_8_~I .oe_async_reset = "none";
8311 defparam \inst|d_hsync_counter_out_8_~I .oe_power_up = "low";
8312 defparam \inst|d_hsync_counter_out_8_~I .oe_register_mode = "none";
8313 defparam \inst|d_hsync_counter_out_8_~I .oe_sync_reset = "none";
8314 defparam \inst|d_hsync_counter_out_8_~I .operation_mode = "output";
8315 defparam \inst|d_hsync_counter_out_8_~I .output_async_reset = "none";
8316 defparam \inst|d_hsync_counter_out_8_~I .output_power_up = "low";
8317 defparam \inst|d_hsync_counter_out_8_~I .output_register_mode = "none";
8318 defparam \inst|d_hsync_counter_out_8_~I .output_sync_reset = "none";
8319 // synopsys translate_on
8320
8321 // atom is at PIN_G25
8322 stratix_io \inst|d_hsync_counter_out_7_~I (
8323         .datain(\inst|vga_driver_unit|hsync_counter_7 ),
8324         .ddiodatain(gnd),
8325         .oe(vcc),
8326         .outclk(gnd),
8327         .outclkena(vcc),
8328         .inclk(gnd),
8329         .inclkena(vcc),
8330         .areset(gnd),
8331         .sreset(gnd),
8332         .delayctrlin(gnd),
8333         .devclrn(devclrn),
8334         .devpor(devpor),
8335         .devoe(devoe),
8336         .combout(),
8337         .regout(),
8338         .ddioregout(),
8339         .padio(d_hsync_counter[7]),
8340         .dqsundelayedout());
8341 // synopsys translate_off
8342 defparam \inst|d_hsync_counter_out_7_~I .ddio_mode = "none";
8343 defparam \inst|d_hsync_counter_out_7_~I .input_async_reset = "none";
8344 defparam \inst|d_hsync_counter_out_7_~I .input_power_up = "low";
8345 defparam \inst|d_hsync_counter_out_7_~I .input_register_mode = "none";
8346 defparam \inst|d_hsync_counter_out_7_~I .input_sync_reset = "none";
8347 defparam \inst|d_hsync_counter_out_7_~I .oe_async_reset = "none";
8348 defparam \inst|d_hsync_counter_out_7_~I .oe_power_up = "low";
8349 defparam \inst|d_hsync_counter_out_7_~I .oe_register_mode = "none";
8350 defparam \inst|d_hsync_counter_out_7_~I .oe_sync_reset = "none";
8351 defparam \inst|d_hsync_counter_out_7_~I .operation_mode = "output";
8352 defparam \inst|d_hsync_counter_out_7_~I .output_async_reset = "none";
8353 defparam \inst|d_hsync_counter_out_7_~I .output_power_up = "low";
8354 defparam \inst|d_hsync_counter_out_7_~I .output_register_mode = "none";
8355 defparam \inst|d_hsync_counter_out_7_~I .output_sync_reset = "none";
8356 // synopsys translate_on
8357
8358 // atom is at PIN_C10
8359 stratix_io \inst|d_hsync_counter_out_6_~I (
8360         .datain(\inst|vga_driver_unit|hsync_counter_6 ),
8361         .ddiodatain(gnd),
8362         .oe(vcc),
8363         .outclk(gnd),
8364         .outclkena(vcc),
8365         .inclk(gnd),
8366         .inclkena(vcc),
8367         .areset(gnd),
8368         .sreset(gnd),
8369         .delayctrlin(gnd),
8370         .devclrn(devclrn),
8371         .devpor(devpor),
8372         .devoe(devoe),
8373         .combout(),
8374         .regout(),
8375         .ddioregout(),
8376         .padio(d_hsync_counter[6]),
8377         .dqsundelayedout());
8378 // synopsys translate_off
8379 defparam \inst|d_hsync_counter_out_6_~I .ddio_mode = "none";
8380 defparam \inst|d_hsync_counter_out_6_~I .input_async_reset = "none";
8381 defparam \inst|d_hsync_counter_out_6_~I .input_power_up = "low";
8382 defparam \inst|d_hsync_counter_out_6_~I .input_register_mode = "none";
8383 defparam \inst|d_hsync_counter_out_6_~I .input_sync_reset = "none";
8384 defparam \inst|d_hsync_counter_out_6_~I .oe_async_reset = "none";
8385 defparam \inst|d_hsync_counter_out_6_~I .oe_power_up = "low";
8386 defparam \inst|d_hsync_counter_out_6_~I .oe_register_mode = "none";
8387 defparam \inst|d_hsync_counter_out_6_~I .oe_sync_reset = "none";
8388 defparam \inst|d_hsync_counter_out_6_~I .operation_mode = "output";
8389 defparam \inst|d_hsync_counter_out_6_~I .output_async_reset = "none";
8390 defparam \inst|d_hsync_counter_out_6_~I .output_power_up = "low";
8391 defparam \inst|d_hsync_counter_out_6_~I .output_register_mode = "none";
8392 defparam \inst|d_hsync_counter_out_6_~I .output_sync_reset = "none";
8393 // synopsys translate_on
8394
8395 // atom is at PIN_A9
8396 stratix_io \inst|d_hsync_counter_out_5_~I (
8397         .datain(\inst|vga_driver_unit|hsync_counter_5 ),
8398         .ddiodatain(gnd),
8399         .oe(vcc),
8400         .outclk(gnd),
8401         .outclkena(vcc),
8402         .inclk(gnd),
8403         .inclkena(vcc),
8404         .areset(gnd),
8405         .sreset(gnd),
8406         .delayctrlin(gnd),
8407         .devclrn(devclrn),
8408         .devpor(devpor),
8409         .devoe(devoe),
8410         .combout(),
8411         .regout(),
8412         .ddioregout(),
8413         .padio(d_hsync_counter[5]),
8414         .dqsundelayedout());
8415 // synopsys translate_off
8416 defparam \inst|d_hsync_counter_out_5_~I .ddio_mode = "none";
8417 defparam \inst|d_hsync_counter_out_5_~I .input_async_reset = "none";
8418 defparam \inst|d_hsync_counter_out_5_~I .input_power_up = "low";
8419 defparam \inst|d_hsync_counter_out_5_~I .input_register_mode = "none";
8420 defparam \inst|d_hsync_counter_out_5_~I .input_sync_reset = "none";
8421 defparam \inst|d_hsync_counter_out_5_~I .oe_async_reset = "none";
8422 defparam \inst|d_hsync_counter_out_5_~I .oe_power_up = "low";
8423 defparam \inst|d_hsync_counter_out_5_~I .oe_register_mode = "none";
8424 defparam \inst|d_hsync_counter_out_5_~I .oe_sync_reset = "none";
8425 defparam \inst|d_hsync_counter_out_5_~I .operation_mode = "output";
8426 defparam \inst|d_hsync_counter_out_5_~I .output_async_reset = "none";
8427 defparam \inst|d_hsync_counter_out_5_~I .output_power_up = "low";
8428 defparam \inst|d_hsync_counter_out_5_~I .output_register_mode = "none";
8429 defparam \inst|d_hsync_counter_out_5_~I .output_sync_reset = "none";
8430 // synopsys translate_on
8431
8432 // atom is at PIN_H1
8433 stratix_io \inst|d_hsync_counter_out_4_~I (
8434         .datain(\inst|vga_driver_unit|hsync_counter_4 ),
8435         .ddiodatain(gnd),
8436         .oe(vcc),
8437         .outclk(gnd),
8438         .outclkena(vcc),
8439         .inclk(gnd),
8440         .inclkena(vcc),
8441         .areset(gnd),
8442         .sreset(gnd),
8443         .delayctrlin(gnd),
8444         .devclrn(devclrn),
8445         .devpor(devpor),
8446         .devoe(devoe),
8447         .combout(),
8448         .regout(),
8449         .ddioregout(),
8450         .padio(d_hsync_counter[4]),
8451         .dqsundelayedout());
8452 // synopsys translate_off
8453 defparam \inst|d_hsync_counter_out_4_~I .ddio_mode = "none";
8454 defparam \inst|d_hsync_counter_out_4_~I .input_async_reset = "none";
8455 defparam \inst|d_hsync_counter_out_4_~I .input_power_up = "low";
8456 defparam \inst|d_hsync_counter_out_4_~I .input_register_mode = "none";
8457 defparam \inst|d_hsync_counter_out_4_~I .input_sync_reset = "none";
8458 defparam \inst|d_hsync_counter_out_4_~I .oe_async_reset = "none";
8459 defparam \inst|d_hsync_counter_out_4_~I .oe_power_up = "low";
8460 defparam \inst|d_hsync_counter_out_4_~I .oe_register_mode = "none";
8461 defparam \inst|d_hsync_counter_out_4_~I .oe_sync_reset = "none";
8462 defparam \inst|d_hsync_counter_out_4_~I .operation_mode = "output";
8463 defparam \inst|d_hsync_counter_out_4_~I .output_async_reset = "none";
8464 defparam \inst|d_hsync_counter_out_4_~I .output_power_up = "low";
8465 defparam \inst|d_hsync_counter_out_4_~I .output_register_mode = "none";
8466 defparam \inst|d_hsync_counter_out_4_~I .output_sync_reset = "none";
8467 // synopsys translate_on
8468
8469 // atom is at PIN_B10
8470 stratix_io \inst|d_hsync_counter_out_3_~I (
8471         .datain(\inst|vga_driver_unit|hsync_counter_3 ),
8472         .ddiodatain(gnd),
8473         .oe(vcc),
8474         .outclk(gnd),
8475         .outclkena(vcc),
8476         .inclk(gnd),
8477         .inclkena(vcc),
8478         .areset(gnd),
8479         .sreset(gnd),
8480         .delayctrlin(gnd),
8481         .devclrn(devclrn),
8482         .devpor(devpor),
8483         .devoe(devoe),
8484         .combout(),
8485         .regout(),
8486         .ddioregout(),
8487         .padio(d_hsync_counter[3]),
8488         .dqsundelayedout());
8489 // synopsys translate_off
8490 defparam \inst|d_hsync_counter_out_3_~I .ddio_mode = "none";
8491 defparam \inst|d_hsync_counter_out_3_~I .input_async_reset = "none";
8492 defparam \inst|d_hsync_counter_out_3_~I .input_power_up = "low";
8493 defparam \inst|d_hsync_counter_out_3_~I .input_register_mode = "none";
8494 defparam \inst|d_hsync_counter_out_3_~I .input_sync_reset = "none";
8495 defparam \inst|d_hsync_counter_out_3_~I .oe_async_reset = "none";
8496 defparam \inst|d_hsync_counter_out_3_~I .oe_power_up = "low";
8497 defparam \inst|d_hsync_counter_out_3_~I .oe_register_mode = "none";
8498 defparam \inst|d_hsync_counter_out_3_~I .oe_sync_reset = "none";
8499 defparam \inst|d_hsync_counter_out_3_~I .operation_mode = "output";
8500 defparam \inst|d_hsync_counter_out_3_~I .output_async_reset = "none";
8501 defparam \inst|d_hsync_counter_out_3_~I .output_power_up = "low";
8502 defparam \inst|d_hsync_counter_out_3_~I .output_register_mode = "none";
8503 defparam \inst|d_hsync_counter_out_3_~I .output_sync_reset = "none";
8504 // synopsys translate_on
8505
8506 // atom is at PIN_D10
8507 stratix_io \inst|d_hsync_counter_out_2_~I (
8508         .datain(\inst|vga_driver_unit|hsync_counter_2 ),
8509         .ddiodatain(gnd),
8510         .oe(vcc),
8511         .outclk(gnd),
8512         .outclkena(vcc),
8513         .inclk(gnd),
8514         .inclkena(vcc),
8515         .areset(gnd),
8516         .sreset(gnd),
8517         .delayctrlin(gnd),
8518         .devclrn(devclrn),
8519         .devpor(devpor),
8520         .devoe(devoe),
8521         .combout(),
8522         .regout(),
8523         .ddioregout(),
8524         .padio(d_hsync_counter[2]),
8525         .dqsundelayedout());
8526 // synopsys translate_off
8527 defparam \inst|d_hsync_counter_out_2_~I .ddio_mode = "none";
8528 defparam \inst|d_hsync_counter_out_2_~I .input_async_reset = "none";
8529 defparam \inst|d_hsync_counter_out_2_~I .input_power_up = "low";
8530 defparam \inst|d_hsync_counter_out_2_~I .input_register_mode = "none";
8531 defparam \inst|d_hsync_counter_out_2_~I .input_sync_reset = "none";
8532 defparam \inst|d_hsync_counter_out_2_~I .oe_async_reset = "none";
8533 defparam \inst|d_hsync_counter_out_2_~I .oe_power_up = "low";
8534 defparam \inst|d_hsync_counter_out_2_~I .oe_register_mode = "none";
8535 defparam \inst|d_hsync_counter_out_2_~I .oe_sync_reset = "none";
8536 defparam \inst|d_hsync_counter_out_2_~I .operation_mode = "output";
8537 defparam \inst|d_hsync_counter_out_2_~I .output_async_reset = "none";
8538 defparam \inst|d_hsync_counter_out_2_~I .output_power_up = "low";
8539 defparam \inst|d_hsync_counter_out_2_~I .output_register_mode = "none";
8540 defparam \inst|d_hsync_counter_out_2_~I .output_sync_reset = "none";
8541 // synopsys translate_on
8542
8543 // atom is at PIN_AC10
8544 stratix_io \inst|d_hsync_counter_out_1_~I (
8545         .datain(\inst|vga_driver_unit|hsync_counter_1 ),
8546         .ddiodatain(gnd),
8547         .oe(vcc),
8548         .outclk(gnd),
8549         .outclkena(vcc),
8550         .inclk(gnd),
8551         .inclkena(vcc),
8552         .areset(gnd),
8553         .sreset(gnd),
8554         .delayctrlin(gnd),
8555         .devclrn(devclrn),
8556         .devpor(devpor),
8557         .devoe(devoe),
8558         .combout(),
8559         .regout(),
8560         .ddioregout(),
8561         .padio(d_hsync_counter[1]),
8562         .dqsundelayedout());
8563 // synopsys translate_off
8564 defparam \inst|d_hsync_counter_out_1_~I .ddio_mode = "none";
8565 defparam \inst|d_hsync_counter_out_1_~I .input_async_reset = "none";
8566 defparam \inst|d_hsync_counter_out_1_~I .input_power_up = "low";
8567 defparam \inst|d_hsync_counter_out_1_~I .input_register_mode = "none";
8568 defparam \inst|d_hsync_counter_out_1_~I .input_sync_reset = "none";
8569 defparam \inst|d_hsync_counter_out_1_~I .oe_async_reset = "none";
8570 defparam \inst|d_hsync_counter_out_1_~I .oe_power_up = "low";
8571 defparam \inst|d_hsync_counter_out_1_~I .oe_register_mode = "none";
8572 defparam \inst|d_hsync_counter_out_1_~I .oe_sync_reset = "none";
8573 defparam \inst|d_hsync_counter_out_1_~I .operation_mode = "output";
8574 defparam \inst|d_hsync_counter_out_1_~I .output_async_reset = "none";
8575 defparam \inst|d_hsync_counter_out_1_~I .output_power_up = "low";
8576 defparam \inst|d_hsync_counter_out_1_~I .output_register_mode = "none";
8577 defparam \inst|d_hsync_counter_out_1_~I .output_sync_reset = "none";
8578 // synopsys translate_on
8579
8580 // atom is at PIN_H4
8581 stratix_io \inst|d_hsync_counter_out_0_~I (
8582         .datain(\inst|vga_driver_unit|hsync_counter_0 ),
8583         .ddiodatain(gnd),
8584         .oe(vcc),
8585         .outclk(gnd),
8586         .outclkena(vcc),
8587         .inclk(gnd),
8588         .inclkena(vcc),
8589         .areset(gnd),
8590         .sreset(gnd),
8591         .delayctrlin(gnd),
8592         .devclrn(devclrn),
8593         .devpor(devpor),
8594         .devoe(devoe),
8595         .combout(),
8596         .regout(),
8597         .ddioregout(),
8598         .padio(d_hsync_counter[0]),
8599         .dqsundelayedout());
8600 // synopsys translate_off
8601 defparam \inst|d_hsync_counter_out_0_~I .ddio_mode = "none";
8602 defparam \inst|d_hsync_counter_out_0_~I .input_async_reset = "none";
8603 defparam \inst|d_hsync_counter_out_0_~I .input_power_up = "low";
8604 defparam \inst|d_hsync_counter_out_0_~I .input_register_mode = "none";
8605 defparam \inst|d_hsync_counter_out_0_~I .input_sync_reset = "none";
8606 defparam \inst|d_hsync_counter_out_0_~I .oe_async_reset = "none";
8607 defparam \inst|d_hsync_counter_out_0_~I .oe_power_up = "low";
8608 defparam \inst|d_hsync_counter_out_0_~I .oe_register_mode = "none";
8609 defparam \inst|d_hsync_counter_out_0_~I .oe_sync_reset = "none";
8610 defparam \inst|d_hsync_counter_out_0_~I .operation_mode = "output";
8611 defparam \inst|d_hsync_counter_out_0_~I .output_async_reset = "none";
8612 defparam \inst|d_hsync_counter_out_0_~I .output_power_up = "low";
8613 defparam \inst|d_hsync_counter_out_0_~I .output_register_mode = "none";
8614 defparam \inst|d_hsync_counter_out_0_~I .output_sync_reset = "none";
8615 // synopsys translate_on
8616
8617 // atom is at PIN_Y5
8618 stratix_io \inst|d_hsync_state_out_0_~I (
8619         .datain(\inst|vga_driver_unit|hsync_state_0 ),
8620         .ddiodatain(gnd),
8621         .oe(vcc),
8622         .outclk(gnd),
8623         .outclkena(vcc),
8624         .inclk(gnd),
8625         .inclkena(vcc),
8626         .areset(gnd),
8627         .sreset(gnd),
8628         .delayctrlin(gnd),
8629         .devclrn(devclrn),
8630         .devpor(devpor),
8631         .devoe(devoe),
8632         .combout(),
8633         .regout(),
8634         .ddioregout(),
8635         .padio(d_hsync_state[0]),
8636         .dqsundelayedout());
8637 // synopsys translate_off
8638 defparam \inst|d_hsync_state_out_0_~I .ddio_mode = "none";
8639 defparam \inst|d_hsync_state_out_0_~I .input_async_reset = "none";
8640 defparam \inst|d_hsync_state_out_0_~I .input_power_up = "low";
8641 defparam \inst|d_hsync_state_out_0_~I .input_register_mode = "none";
8642 defparam \inst|d_hsync_state_out_0_~I .input_sync_reset = "none";
8643 defparam \inst|d_hsync_state_out_0_~I .oe_async_reset = "none";
8644 defparam \inst|d_hsync_state_out_0_~I .oe_power_up = "low";
8645 defparam \inst|d_hsync_state_out_0_~I .oe_register_mode = "none";
8646 defparam \inst|d_hsync_state_out_0_~I .oe_sync_reset = "none";
8647 defparam \inst|d_hsync_state_out_0_~I .operation_mode = "output";
8648 defparam \inst|d_hsync_state_out_0_~I .output_async_reset = "none";
8649 defparam \inst|d_hsync_state_out_0_~I .output_power_up = "low";
8650 defparam \inst|d_hsync_state_out_0_~I .output_register_mode = "none";
8651 defparam \inst|d_hsync_state_out_0_~I .output_sync_reset = "none";
8652 // synopsys translate_on
8653
8654 // atom is at PIN_F19
8655 stratix_io \inst|d_hsync_state_out_1_~I (
8656         .datain(\inst|vga_driver_unit|hsync_state_1 ),
8657         .ddiodatain(gnd),
8658         .oe(vcc),
8659         .outclk(gnd),
8660         .outclkena(vcc),
8661         .inclk(gnd),
8662         .inclkena(vcc),
8663         .areset(gnd),
8664         .sreset(gnd),
8665         .delayctrlin(gnd),
8666         .devclrn(devclrn),
8667         .devpor(devpor),
8668         .devoe(devoe),
8669         .combout(),
8670         .regout(),
8671         .ddioregout(),
8672         .padio(d_hsync_state[1]),
8673         .dqsundelayedout());
8674 // synopsys translate_off
8675 defparam \inst|d_hsync_state_out_1_~I .ddio_mode = "none";
8676 defparam \inst|d_hsync_state_out_1_~I .input_async_reset = "none";
8677 defparam \inst|d_hsync_state_out_1_~I .input_power_up = "low";
8678 defparam \inst|d_hsync_state_out_1_~I .input_register_mode = "none";
8679 defparam \inst|d_hsync_state_out_1_~I .input_sync_reset = "none";
8680 defparam \inst|d_hsync_state_out_1_~I .oe_async_reset = "none";
8681 defparam \inst|d_hsync_state_out_1_~I .oe_power_up = "low";
8682 defparam \inst|d_hsync_state_out_1_~I .oe_register_mode = "none";
8683 defparam \inst|d_hsync_state_out_1_~I .oe_sync_reset = "none";
8684 defparam \inst|d_hsync_state_out_1_~I .operation_mode = "output";
8685 defparam \inst|d_hsync_state_out_1_~I .output_async_reset = "none";
8686 defparam \inst|d_hsync_state_out_1_~I .output_power_up = "low";
8687 defparam \inst|d_hsync_state_out_1_~I .output_register_mode = "none";
8688 defparam \inst|d_hsync_state_out_1_~I .output_sync_reset = "none";
8689 // synopsys translate_on
8690
8691 // atom is at PIN_F17
8692 stratix_io \inst|d_hsync_state_out_2_~I (
8693         .datain(\inst|vga_driver_unit|hsync_state_2 ),
8694         .ddiodatain(gnd),
8695         .oe(vcc),
8696         .outclk(gnd),
8697         .outclkena(vcc),
8698         .inclk(gnd),
8699         .inclkena(vcc),
8700         .areset(gnd),
8701         .sreset(gnd),
8702         .delayctrlin(gnd),
8703         .devclrn(devclrn),
8704         .devpor(devpor),
8705         .devoe(devoe),
8706         .combout(),
8707         .regout(),
8708         .ddioregout(),
8709         .padio(d_hsync_state[2]),
8710         .dqsundelayedout());
8711 // synopsys translate_off
8712 defparam \inst|d_hsync_state_out_2_~I .ddio_mode = "none";
8713 defparam \inst|d_hsync_state_out_2_~I .input_async_reset = "none";
8714 defparam \inst|d_hsync_state_out_2_~I .input_power_up = "low";
8715 defparam \inst|d_hsync_state_out_2_~I .input_register_mode = "none";
8716 defparam \inst|d_hsync_state_out_2_~I .input_sync_reset = "none";
8717 defparam \inst|d_hsync_state_out_2_~I .oe_async_reset = "none";
8718 defparam \inst|d_hsync_state_out_2_~I .oe_power_up = "low";
8719 defparam \inst|d_hsync_state_out_2_~I .oe_register_mode = "none";
8720 defparam \inst|d_hsync_state_out_2_~I .oe_sync_reset = "none";
8721 defparam \inst|d_hsync_state_out_2_~I .operation_mode = "output";
8722 defparam \inst|d_hsync_state_out_2_~I .output_async_reset = "none";
8723 defparam \inst|d_hsync_state_out_2_~I .output_power_up = "low";
8724 defparam \inst|d_hsync_state_out_2_~I .output_register_mode = "none";
8725 defparam \inst|d_hsync_state_out_2_~I .output_sync_reset = "none";
8726 // synopsys translate_on
8727
8728 // atom is at PIN_Y2
8729 stratix_io \inst|d_hsync_state_out_3_~I (
8730         .datain(\inst|vga_driver_unit|hsync_state_3 ),
8731         .ddiodatain(gnd),
8732         .oe(vcc),
8733         .outclk(gnd),
8734         .outclkena(vcc),
8735         .inclk(gnd),
8736         .inclkena(vcc),
8737         .areset(gnd),
8738         .sreset(gnd),
8739         .delayctrlin(gnd),
8740         .devclrn(devclrn),
8741         .devpor(devpor),
8742         .devoe(devoe),
8743         .combout(),
8744         .regout(),
8745         .ddioregout(),
8746         .padio(d_hsync_state[3]),
8747         .dqsundelayedout());
8748 // synopsys translate_off
8749 defparam \inst|d_hsync_state_out_3_~I .ddio_mode = "none";
8750 defparam \inst|d_hsync_state_out_3_~I .input_async_reset = "none";
8751 defparam \inst|d_hsync_state_out_3_~I .input_power_up = "low";
8752 defparam \inst|d_hsync_state_out_3_~I .input_register_mode = "none";
8753 defparam \inst|d_hsync_state_out_3_~I .input_sync_reset = "none";
8754 defparam \inst|d_hsync_state_out_3_~I .oe_async_reset = "none";
8755 defparam \inst|d_hsync_state_out_3_~I .oe_power_up = "low";
8756 defparam \inst|d_hsync_state_out_3_~I .oe_register_mode = "none";
8757 defparam \inst|d_hsync_state_out_3_~I .oe_sync_reset = "none";
8758 defparam \inst|d_hsync_state_out_3_~I .operation_mode = "output";
8759 defparam \inst|d_hsync_state_out_3_~I .output_async_reset = "none";
8760 defparam \inst|d_hsync_state_out_3_~I .output_power_up = "low";
8761 defparam \inst|d_hsync_state_out_3_~I .output_register_mode = "none";
8762 defparam \inst|d_hsync_state_out_3_~I .output_sync_reset = "none";
8763 // synopsys translate_on
8764
8765 // atom is at PIN_F10
8766 stratix_io \inst|d_hsync_state_out_4_~I (
8767         .datain(\inst|vga_driver_unit|hsync_state_4 ),
8768         .ddiodatain(gnd),
8769         .oe(vcc),
8770         .outclk(gnd),
8771         .outclkena(vcc),
8772         .inclk(gnd),
8773         .inclkena(vcc),
8774         .areset(gnd),
8775         .sreset(gnd),
8776         .delayctrlin(gnd),
8777         .devclrn(devclrn),
8778         .devpor(devpor),
8779         .devoe(devoe),
8780         .combout(),
8781         .regout(),
8782         .ddioregout(),
8783         .padio(d_hsync_state[4]),
8784         .dqsundelayedout());
8785 // synopsys translate_off
8786 defparam \inst|d_hsync_state_out_4_~I .ddio_mode = "none";
8787 defparam \inst|d_hsync_state_out_4_~I .input_async_reset = "none";
8788 defparam \inst|d_hsync_state_out_4_~I .input_power_up = "low";
8789 defparam \inst|d_hsync_state_out_4_~I .input_register_mode = "none";
8790 defparam \inst|d_hsync_state_out_4_~I .input_sync_reset = "none";
8791 defparam \inst|d_hsync_state_out_4_~I .oe_async_reset = "none";
8792 defparam \inst|d_hsync_state_out_4_~I .oe_power_up = "low";
8793 defparam \inst|d_hsync_state_out_4_~I .oe_register_mode = "none";
8794 defparam \inst|d_hsync_state_out_4_~I .oe_sync_reset = "none";
8795 defparam \inst|d_hsync_state_out_4_~I .operation_mode = "output";
8796 defparam \inst|d_hsync_state_out_4_~I .output_async_reset = "none";
8797 defparam \inst|d_hsync_state_out_4_~I .output_power_up = "low";
8798 defparam \inst|d_hsync_state_out_4_~I .output_register_mode = "none";
8799 defparam \inst|d_hsync_state_out_4_~I .output_sync_reset = "none";
8800 // synopsys translate_on
8801
8802 // atom is at PIN_F9
8803 stratix_io \inst|d_hsync_state_out_5_~I (
8804         .datain(\inst|vga_driver_unit|hsync_state_5 ),
8805         .ddiodatain(gnd),
8806         .oe(vcc),
8807         .outclk(gnd),
8808         .outclkena(vcc),
8809         .inclk(gnd),
8810         .inclkena(vcc),
8811         .areset(gnd),
8812         .sreset(gnd),
8813         .delayctrlin(gnd),
8814         .devclrn(devclrn),
8815         .devpor(devpor),
8816         .devoe(devoe),
8817         .combout(),
8818         .regout(),
8819         .ddioregout(),
8820         .padio(d_hsync_state[5]),
8821         .dqsundelayedout());
8822 // synopsys translate_off
8823 defparam \inst|d_hsync_state_out_5_~I .ddio_mode = "none";
8824 defparam \inst|d_hsync_state_out_5_~I .input_async_reset = "none";
8825 defparam \inst|d_hsync_state_out_5_~I .input_power_up = "low";
8826 defparam \inst|d_hsync_state_out_5_~I .input_register_mode = "none";
8827 defparam \inst|d_hsync_state_out_5_~I .input_sync_reset = "none";
8828 defparam \inst|d_hsync_state_out_5_~I .oe_async_reset = "none";
8829 defparam \inst|d_hsync_state_out_5_~I .oe_power_up = "low";
8830 defparam \inst|d_hsync_state_out_5_~I .oe_register_mode = "none";
8831 defparam \inst|d_hsync_state_out_5_~I .oe_sync_reset = "none";
8832 defparam \inst|d_hsync_state_out_5_~I .operation_mode = "output";
8833 defparam \inst|d_hsync_state_out_5_~I .output_async_reset = "none";
8834 defparam \inst|d_hsync_state_out_5_~I .output_power_up = "low";
8835 defparam \inst|d_hsync_state_out_5_~I .output_register_mode = "none";
8836 defparam \inst|d_hsync_state_out_5_~I .output_sync_reset = "none";
8837 // synopsys translate_on
8838
8839 // atom is at PIN_F6
8840 stratix_io \inst|d_hsync_state_out_6_~I (
8841         .datain(\inst|vga_driver_unit|hsync_state_6 ),
8842         .ddiodatain(gnd),
8843         .oe(vcc),
8844         .outclk(gnd),
8845         .outclkena(vcc),
8846         .inclk(gnd),
8847         .inclkena(vcc),
8848         .areset(gnd),
8849         .sreset(gnd),
8850         .delayctrlin(gnd),
8851         .devclrn(devclrn),
8852         .devpor(devpor),
8853         .devoe(devoe),
8854         .combout(),
8855         .regout(),
8856         .ddioregout(),
8857         .padio(d_hsync_state[6]),
8858         .dqsundelayedout());
8859 // synopsys translate_off
8860 defparam \inst|d_hsync_state_out_6_~I .ddio_mode = "none";
8861 defparam \inst|d_hsync_state_out_6_~I .input_async_reset = "none";
8862 defparam \inst|d_hsync_state_out_6_~I .input_power_up = "low";
8863 defparam \inst|d_hsync_state_out_6_~I .input_register_mode = "none";
8864 defparam \inst|d_hsync_state_out_6_~I .input_sync_reset = "none";
8865 defparam \inst|d_hsync_state_out_6_~I .oe_async_reset = "none";
8866 defparam \inst|d_hsync_state_out_6_~I .oe_power_up = "low";
8867 defparam \inst|d_hsync_state_out_6_~I .oe_register_mode = "none";
8868 defparam \inst|d_hsync_state_out_6_~I .oe_sync_reset = "none";
8869 defparam \inst|d_hsync_state_out_6_~I .operation_mode = "output";
8870 defparam \inst|d_hsync_state_out_6_~I .output_async_reset = "none";
8871 defparam \inst|d_hsync_state_out_6_~I .output_power_up = "low";
8872 defparam \inst|d_hsync_state_out_6_~I .output_register_mode = "none";
8873 defparam \inst|d_hsync_state_out_6_~I .output_sync_reset = "none";
8874 // synopsys translate_on
8875
8876 // atom is at PIN_L25
8877 stratix_io \inst|d_line_counter_out_8_~I (
8878         .datain(\inst|vga_driver_unit|line_counter_sig_8 ),
8879         .ddiodatain(gnd),
8880         .oe(vcc),
8881         .outclk(gnd),
8882         .outclkena(vcc),
8883         .inclk(gnd),
8884         .inclkena(vcc),
8885         .areset(gnd),
8886         .sreset(gnd),
8887         .delayctrlin(gnd),
8888         .devclrn(devclrn),
8889         .devpor(devpor),
8890         .devoe(devoe),
8891         .combout(),
8892         .regout(),
8893         .ddioregout(),
8894         .padio(d_line_counter[8]),
8895         .dqsundelayedout());
8896 // synopsys translate_off
8897 defparam \inst|d_line_counter_out_8_~I .ddio_mode = "none";
8898 defparam \inst|d_line_counter_out_8_~I .input_async_reset = "none";
8899 defparam \inst|d_line_counter_out_8_~I .input_power_up = "low";
8900 defparam \inst|d_line_counter_out_8_~I .input_register_mode = "none";
8901 defparam \inst|d_line_counter_out_8_~I .input_sync_reset = "none";
8902 defparam \inst|d_line_counter_out_8_~I .oe_async_reset = "none";
8903 defparam \inst|d_line_counter_out_8_~I .oe_power_up = "low";
8904 defparam \inst|d_line_counter_out_8_~I .oe_register_mode = "none";
8905 defparam \inst|d_line_counter_out_8_~I .oe_sync_reset = "none";
8906 defparam \inst|d_line_counter_out_8_~I .operation_mode = "output";
8907 defparam \inst|d_line_counter_out_8_~I .output_async_reset = "none";
8908 defparam \inst|d_line_counter_out_8_~I .output_power_up = "low";
8909 defparam \inst|d_line_counter_out_8_~I .output_register_mode = "none";
8910 defparam \inst|d_line_counter_out_8_~I .output_sync_reset = "none";
8911 // synopsys translate_on
8912
8913 // atom is at PIN_L24
8914 stratix_io \inst|d_line_counter_out_7_~I (
8915         .datain(\inst|vga_driver_unit|line_counter_sig_7 ),
8916         .ddiodatain(gnd),
8917         .oe(vcc),
8918         .outclk(gnd),
8919         .outclkena(vcc),
8920         .inclk(gnd),
8921         .inclkena(vcc),
8922         .areset(gnd),
8923         .sreset(gnd),
8924         .delayctrlin(gnd),
8925         .devclrn(devclrn),
8926         .devpor(devpor),
8927         .devoe(devoe),
8928         .combout(),
8929         .regout(),
8930         .ddioregout(),
8931         .padio(d_line_counter[7]),
8932         .dqsundelayedout());
8933 // synopsys translate_off
8934 defparam \inst|d_line_counter_out_7_~I .ddio_mode = "none";
8935 defparam \inst|d_line_counter_out_7_~I .input_async_reset = "none";
8936 defparam \inst|d_line_counter_out_7_~I .input_power_up = "low";
8937 defparam \inst|d_line_counter_out_7_~I .input_register_mode = "none";
8938 defparam \inst|d_line_counter_out_7_~I .input_sync_reset = "none";
8939 defparam \inst|d_line_counter_out_7_~I .oe_async_reset = "none";
8940 defparam \inst|d_line_counter_out_7_~I .oe_power_up = "low";
8941 defparam \inst|d_line_counter_out_7_~I .oe_register_mode = "none";
8942 defparam \inst|d_line_counter_out_7_~I .oe_sync_reset = "none";
8943 defparam \inst|d_line_counter_out_7_~I .operation_mode = "output";
8944 defparam \inst|d_line_counter_out_7_~I .output_async_reset = "none";
8945 defparam \inst|d_line_counter_out_7_~I .output_power_up = "low";
8946 defparam \inst|d_line_counter_out_7_~I .output_register_mode = "none";
8947 defparam \inst|d_line_counter_out_7_~I .output_sync_reset = "none";
8948 // synopsys translate_on
8949
8950 // atom is at PIN_M5
8951 stratix_io \inst|d_line_counter_out_6_~I (
8952         .datain(\inst|vga_driver_unit|line_counter_sig_6 ),
8953         .ddiodatain(gnd),
8954         .oe(vcc),
8955         .outclk(gnd),
8956         .outclkena(vcc),
8957         .inclk(gnd),
8958         .inclkena(vcc),
8959         .areset(gnd),
8960         .sreset(gnd),
8961         .delayctrlin(gnd),
8962         .devclrn(devclrn),
8963         .devpor(devpor),
8964         .devoe(devoe),
8965         .combout(),
8966         .regout(),
8967         .ddioregout(),
8968         .padio(d_line_counter[6]),
8969         .dqsundelayedout());
8970 // synopsys translate_off
8971 defparam \inst|d_line_counter_out_6_~I .ddio_mode = "none";
8972 defparam \inst|d_line_counter_out_6_~I .input_async_reset = "none";
8973 defparam \inst|d_line_counter_out_6_~I .input_power_up = "low";
8974 defparam \inst|d_line_counter_out_6_~I .input_register_mode = "none";
8975 defparam \inst|d_line_counter_out_6_~I .input_sync_reset = "none";
8976 defparam \inst|d_line_counter_out_6_~I .oe_async_reset = "none";
8977 defparam \inst|d_line_counter_out_6_~I .oe_power_up = "low";
8978 defparam \inst|d_line_counter_out_6_~I .oe_register_mode = "none";
8979 defparam \inst|d_line_counter_out_6_~I .oe_sync_reset = "none";
8980 defparam \inst|d_line_counter_out_6_~I .operation_mode = "output";
8981 defparam \inst|d_line_counter_out_6_~I .output_async_reset = "none";
8982 defparam \inst|d_line_counter_out_6_~I .output_power_up = "low";
8983 defparam \inst|d_line_counter_out_6_~I .output_register_mode = "none";
8984 defparam \inst|d_line_counter_out_6_~I .output_sync_reset = "none";
8985 // synopsys translate_on
8986
8987 // atom is at PIN_M6
8988 stratix_io \inst|d_line_counter_out_5_~I (
8989         .datain(\inst|vga_driver_unit|line_counter_sig_5 ),
8990         .ddiodatain(gnd),
8991         .oe(vcc),
8992         .outclk(gnd),
8993         .outclkena(vcc),
8994         .inclk(gnd),
8995         .inclkena(vcc),
8996         .areset(gnd),
8997         .sreset(gnd),
8998         .delayctrlin(gnd),
8999         .devclrn(devclrn),
9000         .devpor(devpor),
9001         .devoe(devoe),
9002         .combout(),
9003         .regout(),
9004         .ddioregout(),
9005         .padio(d_line_counter[5]),
9006         .dqsundelayedout());
9007 // synopsys translate_off
9008 defparam \inst|d_line_counter_out_5_~I .ddio_mode = "none";
9009 defparam \inst|d_line_counter_out_5_~I .input_async_reset = "none";
9010 defparam \inst|d_line_counter_out_5_~I .input_power_up = "low";
9011 defparam \inst|d_line_counter_out_5_~I .input_register_mode = "none";
9012 defparam \inst|d_line_counter_out_5_~I .input_sync_reset = "none";
9013 defparam \inst|d_line_counter_out_5_~I .oe_async_reset = "none";
9014 defparam \inst|d_line_counter_out_5_~I .oe_power_up = "low";
9015 defparam \inst|d_line_counter_out_5_~I .oe_register_mode = "none";
9016 defparam \inst|d_line_counter_out_5_~I .oe_sync_reset = "none";
9017 defparam \inst|d_line_counter_out_5_~I .operation_mode = "output";
9018 defparam \inst|d_line_counter_out_5_~I .output_async_reset = "none";
9019 defparam \inst|d_line_counter_out_5_~I .output_power_up = "low";
9020 defparam \inst|d_line_counter_out_5_~I .output_register_mode = "none";
9021 defparam \inst|d_line_counter_out_5_~I .output_sync_reset = "none";
9022 // synopsys translate_on
9023
9024 // atom is at PIN_M8
9025 stratix_io \inst|d_line_counter_out_4_~I (
9026         .datain(\inst|vga_driver_unit|line_counter_sig_4 ),
9027         .ddiodatain(gnd),
9028         .oe(vcc),
9029         .outclk(gnd),
9030         .outclkena(vcc),
9031         .inclk(gnd),
9032         .inclkena(vcc),
9033         .areset(gnd),
9034         .sreset(gnd),
9035         .delayctrlin(gnd),
9036         .devclrn(devclrn),
9037         .devpor(devpor),
9038         .devoe(devoe),
9039         .combout(),
9040         .regout(),
9041         .ddioregout(),
9042         .padio(d_line_counter[4]),
9043         .dqsundelayedout());
9044 // synopsys translate_off
9045 defparam \inst|d_line_counter_out_4_~I .ddio_mode = "none";
9046 defparam \inst|d_line_counter_out_4_~I .input_async_reset = "none";
9047 defparam \inst|d_line_counter_out_4_~I .input_power_up = "low";
9048 defparam \inst|d_line_counter_out_4_~I .input_register_mode = "none";
9049 defparam \inst|d_line_counter_out_4_~I .input_sync_reset = "none";
9050 defparam \inst|d_line_counter_out_4_~I .oe_async_reset = "none";
9051 defparam \inst|d_line_counter_out_4_~I .oe_power_up = "low";
9052 defparam \inst|d_line_counter_out_4_~I .oe_register_mode = "none";
9053 defparam \inst|d_line_counter_out_4_~I .oe_sync_reset = "none";
9054 defparam \inst|d_line_counter_out_4_~I .operation_mode = "output";
9055 defparam \inst|d_line_counter_out_4_~I .output_async_reset = "none";
9056 defparam \inst|d_line_counter_out_4_~I .output_power_up = "low";
9057 defparam \inst|d_line_counter_out_4_~I .output_register_mode = "none";
9058 defparam \inst|d_line_counter_out_4_~I .output_sync_reset = "none";
9059 // synopsys translate_on
9060
9061 // atom is at PIN_M9
9062 stratix_io \inst|d_line_counter_out_3_~I (
9063         .datain(\inst|vga_driver_unit|line_counter_sig_3 ),
9064         .ddiodatain(gnd),
9065         .oe(vcc),
9066         .outclk(gnd),
9067         .outclkena(vcc),
9068         .inclk(gnd),
9069         .inclkena(vcc),
9070         .areset(gnd),
9071         .sreset(gnd),
9072         .delayctrlin(gnd),
9073         .devclrn(devclrn),
9074         .devpor(devpor),
9075         .devoe(devoe),
9076         .combout(),
9077         .regout(),
9078         .ddioregout(),
9079         .padio(d_line_counter[3]),
9080         .dqsundelayedout());
9081 // synopsys translate_off
9082 defparam \inst|d_line_counter_out_3_~I .ddio_mode = "none";
9083 defparam \inst|d_line_counter_out_3_~I .input_async_reset = "none";
9084 defparam \inst|d_line_counter_out_3_~I .input_power_up = "low";
9085 defparam \inst|d_line_counter_out_3_~I .input_register_mode = "none";
9086 defparam \inst|d_line_counter_out_3_~I .input_sync_reset = "none";
9087 defparam \inst|d_line_counter_out_3_~I .oe_async_reset = "none";
9088 defparam \inst|d_line_counter_out_3_~I .oe_power_up = "low";
9089 defparam \inst|d_line_counter_out_3_~I .oe_register_mode = "none";
9090 defparam \inst|d_line_counter_out_3_~I .oe_sync_reset = "none";
9091 defparam \inst|d_line_counter_out_3_~I .operation_mode = "output";
9092 defparam \inst|d_line_counter_out_3_~I .output_async_reset = "none";
9093 defparam \inst|d_line_counter_out_3_~I .output_power_up = "low";
9094 defparam \inst|d_line_counter_out_3_~I .output_register_mode = "none";
9095 defparam \inst|d_line_counter_out_3_~I .output_sync_reset = "none";
9096 // synopsys translate_on
9097
9098 // atom is at PIN_J22
9099 stratix_io \inst|d_line_counter_out_2_~I (
9100         .datain(\inst|vga_driver_unit|line_counter_sig_2 ),
9101         .ddiodatain(gnd),
9102         .oe(vcc),
9103         .outclk(gnd),
9104         .outclkena(vcc),
9105         .inclk(gnd),
9106         .inclkena(vcc),
9107         .areset(gnd),
9108         .sreset(gnd),
9109         .delayctrlin(gnd),
9110         .devclrn(devclrn),
9111         .devpor(devpor),
9112         .devoe(devoe),
9113         .combout(),
9114         .regout(),
9115         .ddioregout(),
9116         .padio(d_line_counter[2]),
9117         .dqsundelayedout());
9118 // synopsys translate_off
9119 defparam \inst|d_line_counter_out_2_~I .ddio_mode = "none";
9120 defparam \inst|d_line_counter_out_2_~I .input_async_reset = "none";
9121 defparam \inst|d_line_counter_out_2_~I .input_power_up = "low";
9122 defparam \inst|d_line_counter_out_2_~I .input_register_mode = "none";
9123 defparam \inst|d_line_counter_out_2_~I .input_sync_reset = "none";
9124 defparam \inst|d_line_counter_out_2_~I .oe_async_reset = "none";
9125 defparam \inst|d_line_counter_out_2_~I .oe_power_up = "low";
9126 defparam \inst|d_line_counter_out_2_~I .oe_register_mode = "none";
9127 defparam \inst|d_line_counter_out_2_~I .oe_sync_reset = "none";
9128 defparam \inst|d_line_counter_out_2_~I .operation_mode = "output";
9129 defparam \inst|d_line_counter_out_2_~I .output_async_reset = "none";
9130 defparam \inst|d_line_counter_out_2_~I .output_power_up = "low";
9131 defparam \inst|d_line_counter_out_2_~I .output_register_mode = "none";
9132 defparam \inst|d_line_counter_out_2_~I .output_sync_reset = "none";
9133 // synopsys translate_on
9134
9135 // atom is at PIN_K4
9136 stratix_io \inst|d_line_counter_out_1_~I (
9137         .datain(\inst|vga_driver_unit|line_counter_sig_1 ),
9138         .ddiodatain(gnd),
9139         .oe(vcc),
9140         .outclk(gnd),
9141         .outclkena(vcc),
9142         .inclk(gnd),
9143         .inclkena(vcc),
9144         .areset(gnd),
9145         .sreset(gnd),
9146         .delayctrlin(gnd),
9147         .devclrn(devclrn),
9148         .devpor(devpor),
9149         .devoe(devoe),
9150         .combout(),
9151         .regout(),
9152         .ddioregout(),
9153         .padio(d_line_counter[1]),
9154         .dqsundelayedout());
9155 // synopsys translate_off
9156 defparam \inst|d_line_counter_out_1_~I .ddio_mode = "none";
9157 defparam \inst|d_line_counter_out_1_~I .input_async_reset = "none";
9158 defparam \inst|d_line_counter_out_1_~I .input_power_up = "low";
9159 defparam \inst|d_line_counter_out_1_~I .input_register_mode = "none";
9160 defparam \inst|d_line_counter_out_1_~I .input_sync_reset = "none";
9161 defparam \inst|d_line_counter_out_1_~I .oe_async_reset = "none";
9162 defparam \inst|d_line_counter_out_1_~I .oe_power_up = "low";
9163 defparam \inst|d_line_counter_out_1_~I .oe_register_mode = "none";
9164 defparam \inst|d_line_counter_out_1_~I .oe_sync_reset = "none";
9165 defparam \inst|d_line_counter_out_1_~I .operation_mode = "output";
9166 defparam \inst|d_line_counter_out_1_~I .output_async_reset = "none";
9167 defparam \inst|d_line_counter_out_1_~I .output_power_up = "low";
9168 defparam \inst|d_line_counter_out_1_~I .output_register_mode = "none";
9169 defparam \inst|d_line_counter_out_1_~I .output_sync_reset = "none";
9170 // synopsys translate_on
9171
9172 // atom is at PIN_K6
9173 stratix_io \inst|d_line_counter_out_0_~I (
9174         .datain(\inst|vga_driver_unit|line_counter_sig_0 ),
9175         .ddiodatain(gnd),
9176         .oe(vcc),
9177         .outclk(gnd),
9178         .outclkena(vcc),
9179         .inclk(gnd),
9180         .inclkena(vcc),
9181         .areset(gnd),
9182         .sreset(gnd),
9183         .delayctrlin(gnd),
9184         .devclrn(devclrn),
9185         .devpor(devpor),
9186         .devoe(devoe),
9187         .combout(),
9188         .regout(),
9189         .ddioregout(),
9190         .padio(d_line_counter[0]),
9191         .dqsundelayedout());
9192 // synopsys translate_off
9193 defparam \inst|d_line_counter_out_0_~I .ddio_mode = "none";
9194 defparam \inst|d_line_counter_out_0_~I .input_async_reset = "none";
9195 defparam \inst|d_line_counter_out_0_~I .input_power_up = "low";
9196 defparam \inst|d_line_counter_out_0_~I .input_register_mode = "none";
9197 defparam \inst|d_line_counter_out_0_~I .input_sync_reset = "none";
9198 defparam \inst|d_line_counter_out_0_~I .oe_async_reset = "none";
9199 defparam \inst|d_line_counter_out_0_~I .oe_power_up = "low";
9200 defparam \inst|d_line_counter_out_0_~I .oe_register_mode = "none";
9201 defparam \inst|d_line_counter_out_0_~I .oe_sync_reset = "none";
9202 defparam \inst|d_line_counter_out_0_~I .operation_mode = "output";
9203 defparam \inst|d_line_counter_out_0_~I .output_async_reset = "none";
9204 defparam \inst|d_line_counter_out_0_~I .output_power_up = "low";
9205 defparam \inst|d_line_counter_out_0_~I .output_register_mode = "none";
9206 defparam \inst|d_line_counter_out_0_~I .output_sync_reset = "none";
9207 // synopsys translate_on
9208
9209 // atom is at PIN_T19
9210 stratix_io \inst|d_toggle_counter_out_24_~I (
9211         .datain(\~STRATIX_FITTER_CREATED_GND~I_combout ),
9212         .ddiodatain(gnd),
9213         .oe(vcc),
9214         .outclk(gnd),
9215         .outclkena(vcc),
9216         .inclk(gnd),
9217         .inclkena(vcc),
9218         .areset(gnd),
9219         .sreset(gnd),
9220         .delayctrlin(gnd),
9221         .devclrn(devclrn),
9222         .devpor(devpor),
9223         .devoe(devoe),
9224         .combout(),
9225         .regout(),
9226         .ddioregout(),
9227         .padio(d_toggle_counter[24]),
9228         .dqsundelayedout());
9229 // synopsys translate_off
9230 defparam \inst|d_toggle_counter_out_24_~I .ddio_mode = "none";
9231 defparam \inst|d_toggle_counter_out_24_~I .input_async_reset = "none";
9232 defparam \inst|d_toggle_counter_out_24_~I .input_power_up = "low";
9233 defparam \inst|d_toggle_counter_out_24_~I .input_register_mode = "none";
9234 defparam \inst|d_toggle_counter_out_24_~I .input_sync_reset = "none";
9235 defparam \inst|d_toggle_counter_out_24_~I .oe_async_reset = "none";
9236 defparam \inst|d_toggle_counter_out_24_~I .oe_power_up = "low";
9237 defparam \inst|d_toggle_counter_out_24_~I .oe_register_mode = "none";
9238 defparam \inst|d_toggle_counter_out_24_~I .oe_sync_reset = "none";
9239 defparam \inst|d_toggle_counter_out_24_~I .operation_mode = "output";
9240 defparam \inst|d_toggle_counter_out_24_~I .output_async_reset = "none";
9241 defparam \inst|d_toggle_counter_out_24_~I .output_power_up = "low";
9242 defparam \inst|d_toggle_counter_out_24_~I .output_register_mode = "none";
9243 defparam \inst|d_toggle_counter_out_24_~I .output_sync_reset = "none";
9244 // synopsys translate_on
9245
9246 // atom is at PIN_F23
9247 stratix_io \inst|d_toggle_counter_out_23_~I (
9248         .datain(\~STRATIX_FITTER_CREATED_GND~I_combout ),
9249         .ddiodatain(gnd),
9250         .oe(vcc),
9251         .outclk(gnd),
9252         .outclkena(vcc),
9253         .inclk(gnd),
9254         .inclkena(vcc),
9255         .areset(gnd),
9256         .sreset(gnd),
9257         .delayctrlin(gnd),
9258         .devclrn(devclrn),
9259         .devpor(devpor),
9260         .devoe(devoe),
9261         .combout(),
9262         .regout(),
9263         .ddioregout(),
9264         .padio(d_toggle_counter[23]),
9265         .dqsundelayedout());
9266 // synopsys translate_off
9267 defparam \inst|d_toggle_counter_out_23_~I .ddio_mode = "none";
9268 defparam \inst|d_toggle_counter_out_23_~I .input_async_reset = "none";
9269 defparam \inst|d_toggle_counter_out_23_~I .input_power_up = "low";
9270 defparam \inst|d_toggle_counter_out_23_~I .input_register_mode = "none";
9271 defparam \inst|d_toggle_counter_out_23_~I .input_sync_reset = "none";
9272 defparam \inst|d_toggle_counter_out_23_~I .oe_async_reset = "none";
9273 defparam \inst|d_toggle_counter_out_23_~I .oe_power_up = "low";
9274 defparam \inst|d_toggle_counter_out_23_~I .oe_register_mode = "none";
9275 defparam \inst|d_toggle_counter_out_23_~I .oe_sync_reset = "none";
9276 defparam \inst|d_toggle_counter_out_23_~I .operation_mode = "output";
9277 defparam \inst|d_toggle_counter_out_23_~I .output_async_reset = "none";
9278 defparam \inst|d_toggle_counter_out_23_~I .output_power_up = "low";
9279 defparam \inst|d_toggle_counter_out_23_~I .output_register_mode = "none";
9280 defparam \inst|d_toggle_counter_out_23_~I .output_sync_reset = "none";
9281 // synopsys translate_on
9282
9283 // atom is at PIN_F25
9284 stratix_io \inst|d_toggle_counter_out_22_~I (
9285         .datain(\~STRATIX_FITTER_CREATED_GND~I_combout ),
9286         .ddiodatain(gnd),
9287         .oe(vcc),
9288         .outclk(gnd),
9289         .outclkena(vcc),
9290         .inclk(gnd),
9291         .inclkena(vcc),
9292         .areset(gnd),
9293         .sreset(gnd),
9294         .delayctrlin(gnd),
9295         .devclrn(devclrn),
9296         .devpor(devpor),
9297         .devoe(devoe),
9298         .combout(),
9299         .regout(),
9300         .ddioregout(),
9301         .padio(d_toggle_counter[22]),
9302         .dqsundelayedout());
9303 // synopsys translate_off
9304 defparam \inst|d_toggle_counter_out_22_~I .ddio_mode = "none";
9305 defparam \inst|d_toggle_counter_out_22_~I .input_async_reset = "none";
9306 defparam \inst|d_toggle_counter_out_22_~I .input_power_up = "low";
9307 defparam \inst|d_toggle_counter_out_22_~I .input_register_mode = "none";
9308 defparam \inst|d_toggle_counter_out_22_~I .input_sync_reset = "none";
9309 defparam \inst|d_toggle_counter_out_22_~I .oe_async_reset = "none";
9310 defparam \inst|d_toggle_counter_out_22_~I .oe_power_up = "low";
9311 defparam \inst|d_toggle_counter_out_22_~I .oe_register_mode = "none";
9312 defparam \inst|d_toggle_counter_out_22_~I .oe_sync_reset = "none";
9313 defparam \inst|d_toggle_counter_out_22_~I .operation_mode = "output";
9314 defparam \inst|d_toggle_counter_out_22_~I .output_async_reset = "none";
9315 defparam \inst|d_toggle_counter_out_22_~I .output_power_up = "low";
9316 defparam \inst|d_toggle_counter_out_22_~I .output_register_mode = "none";
9317 defparam \inst|d_toggle_counter_out_22_~I .output_sync_reset = "none";
9318 // synopsys translate_on
9319
9320 // atom is at PIN_G1
9321 stratix_io \inst|d_toggle_counter_out_21_~I (
9322         .datain(\~STRATIX_FITTER_CREATED_GND~I_combout ),
9323         .ddiodatain(gnd),
9324         .oe(vcc),
9325         .outclk(gnd),
9326         .outclkena(vcc),
9327         .inclk(gnd),
9328         .inclkena(vcc),
9329         .areset(gnd),
9330         .sreset(gnd),
9331         .delayctrlin(gnd),
9332         .devclrn(devclrn),
9333         .devpor(devpor),
9334         .devoe(devoe),
9335         .combout(),
9336         .regout(),
9337         .ddioregout(),
9338         .padio(d_toggle_counter[21]),
9339         .dqsundelayedout());
9340 // synopsys translate_off
9341 defparam \inst|d_toggle_counter_out_21_~I .ddio_mode = "none";
9342 defparam \inst|d_toggle_counter_out_21_~I .input_async_reset = "none";
9343 defparam \inst|d_toggle_counter_out_21_~I .input_power_up = "low";
9344 defparam \inst|d_toggle_counter_out_21_~I .input_register_mode = "none";
9345 defparam \inst|d_toggle_counter_out_21_~I .input_sync_reset = "none";
9346 defparam \inst|d_toggle_counter_out_21_~I .oe_async_reset = "none";
9347 defparam \inst|d_toggle_counter_out_21_~I .oe_power_up = "low";
9348 defparam \inst|d_toggle_counter_out_21_~I .oe_register_mode = "none";
9349 defparam \inst|d_toggle_counter_out_21_~I .oe_sync_reset = "none";
9350 defparam \inst|d_toggle_counter_out_21_~I .operation_mode = "output";
9351 defparam \inst|d_toggle_counter_out_21_~I .output_async_reset = "none";
9352 defparam \inst|d_toggle_counter_out_21_~I .output_power_up = "low";
9353 defparam \inst|d_toggle_counter_out_21_~I .output_register_mode = "none";
9354 defparam \inst|d_toggle_counter_out_21_~I .output_sync_reset = "none";
9355 // synopsys translate_on
9356
9357 // atom is at PIN_G3
9358 stratix_io \inst|d_toggle_counter_out_20_~I (
9359         .datain(\~STRATIX_FITTER_CREATED_GND~I_combout ),
9360         .ddiodatain(gnd),
9361         .oe(vcc),
9362         .outclk(gnd),
9363         .outclkena(vcc),
9364         .inclk(gnd),
9365         .inclkena(vcc),
9366         .areset(gnd),
9367         .sreset(gnd),
9368         .delayctrlin(gnd),
9369         .devclrn(devclrn),
9370         .devpor(devpor),
9371         .devoe(devoe),
9372         .combout(),
9373         .regout(),
9374         .ddioregout(),
9375         .padio(d_toggle_counter[20]),
9376         .dqsundelayedout());
9377 // synopsys translate_off
9378 defparam \inst|d_toggle_counter_out_20_~I .ddio_mode = "none";
9379 defparam \inst|d_toggle_counter_out_20_~I .input_async_reset = "none";
9380 defparam \inst|d_toggle_counter_out_20_~I .input_power_up = "low";
9381 defparam \inst|d_toggle_counter_out_20_~I .input_register_mode = "none";
9382 defparam \inst|d_toggle_counter_out_20_~I .input_sync_reset = "none";
9383 defparam \inst|d_toggle_counter_out_20_~I .oe_async_reset = "none";
9384 defparam \inst|d_toggle_counter_out_20_~I .oe_power_up = "low";
9385 defparam \inst|d_toggle_counter_out_20_~I .oe_register_mode = "none";
9386 defparam \inst|d_toggle_counter_out_20_~I .oe_sync_reset = "none";
9387 defparam \inst|d_toggle_counter_out_20_~I .operation_mode = "output";
9388 defparam \inst|d_toggle_counter_out_20_~I .output_async_reset = "none";
9389 defparam \inst|d_toggle_counter_out_20_~I .output_power_up = "low";
9390 defparam \inst|d_toggle_counter_out_20_~I .output_register_mode = "none";
9391 defparam \inst|d_toggle_counter_out_20_~I .output_sync_reset = "none";
9392 // synopsys translate_on
9393
9394 // atom is at PIN_G5
9395 stratix_io \inst|d_toggle_counter_out_19_~I (
9396         .datain(\inst|vga_control_unit|toggle_counter_sig_19 ),
9397         .ddiodatain(gnd),
9398         .oe(vcc),
9399         .outclk(gnd),
9400         .outclkena(vcc),
9401         .inclk(gnd),
9402         .inclkena(vcc),
9403         .areset(gnd),
9404         .sreset(gnd),
9405         .delayctrlin(gnd),
9406         .devclrn(devclrn),
9407         .devpor(devpor),
9408         .devoe(devoe),
9409         .combout(),
9410         .regout(),
9411         .ddioregout(),
9412         .padio(d_toggle_counter[19]),
9413         .dqsundelayedout());
9414 // synopsys translate_off
9415 defparam \inst|d_toggle_counter_out_19_~I .ddio_mode = "none";
9416 defparam \inst|d_toggle_counter_out_19_~I .input_async_reset = "none";
9417 defparam \inst|d_toggle_counter_out_19_~I .input_power_up = "low";
9418 defparam \inst|d_toggle_counter_out_19_~I .input_register_mode = "none";
9419 defparam \inst|d_toggle_counter_out_19_~I .input_sync_reset = "none";
9420 defparam \inst|d_toggle_counter_out_19_~I .oe_async_reset = "none";
9421 defparam \inst|d_toggle_counter_out_19_~I .oe_power_up = "low";
9422 defparam \inst|d_toggle_counter_out_19_~I .oe_register_mode = "none";
9423 defparam \inst|d_toggle_counter_out_19_~I .oe_sync_reset = "none";
9424 defparam \inst|d_toggle_counter_out_19_~I .operation_mode = "output";
9425 defparam \inst|d_toggle_counter_out_19_~I .output_async_reset = "none";
9426 defparam \inst|d_toggle_counter_out_19_~I .output_power_up = "low";
9427 defparam \inst|d_toggle_counter_out_19_~I .output_register_mode = "none";
9428 defparam \inst|d_toggle_counter_out_19_~I .output_sync_reset = "none";
9429 // synopsys translate_on
9430
9431 // atom is at PIN_G20
9432 stratix_io \inst|d_toggle_counter_out_18_~I (
9433         .datain(\inst|vga_control_unit|toggle_counter_sig_18 ),
9434         .ddiodatain(gnd),
9435         .oe(vcc),
9436         .outclk(gnd),
9437         .outclkena(vcc),
9438         .inclk(gnd),
9439         .inclkena(vcc),
9440         .areset(gnd),
9441         .sreset(gnd),
9442         .delayctrlin(gnd),
9443         .devclrn(devclrn),
9444         .devpor(devpor),
9445         .devoe(devoe),
9446         .combout(),
9447         .regout(),
9448         .ddioregout(),
9449         .padio(d_toggle_counter[18]),
9450         .dqsundelayedout());
9451 // synopsys translate_off
9452 defparam \inst|d_toggle_counter_out_18_~I .ddio_mode = "none";
9453 defparam \inst|d_toggle_counter_out_18_~I .input_async_reset = "none";
9454 defparam \inst|d_toggle_counter_out_18_~I .input_power_up = "low";
9455 defparam \inst|d_toggle_counter_out_18_~I .input_register_mode = "none";
9456 defparam \inst|d_toggle_counter_out_18_~I .input_sync_reset = "none";
9457 defparam \inst|d_toggle_counter_out_18_~I .oe_async_reset = "none";
9458 defparam \inst|d_toggle_counter_out_18_~I .oe_power_up = "low";
9459 defparam \inst|d_toggle_counter_out_18_~I .oe_register_mode = "none";
9460 defparam \inst|d_toggle_counter_out_18_~I .oe_sync_reset = "none";
9461 defparam \inst|d_toggle_counter_out_18_~I .operation_mode = "output";
9462 defparam \inst|d_toggle_counter_out_18_~I .output_async_reset = "none";
9463 defparam \inst|d_toggle_counter_out_18_~I .output_power_up = "low";
9464 defparam \inst|d_toggle_counter_out_18_~I .output_register_mode = "none";
9465 defparam \inst|d_toggle_counter_out_18_~I .output_sync_reset = "none";
9466 // synopsys translate_on
9467
9468 // atom is at PIN_G21
9469 stratix_io \inst|d_toggle_counter_out_17_~I (
9470         .datain(\inst|vga_control_unit|toggle_counter_sig_17 ),
9471         .ddiodatain(gnd),
9472         .oe(vcc),
9473         .outclk(gnd),
9474         .outclkena(vcc),
9475         .inclk(gnd),
9476         .inclkena(vcc),
9477         .areset(gnd),
9478         .sreset(gnd),
9479         .delayctrlin(gnd),
9480         .devclrn(devclrn),
9481         .devpor(devpor),
9482         .devoe(devoe),
9483         .combout(),
9484         .regout(),
9485         .ddioregout(),
9486         .padio(d_toggle_counter[17]),
9487         .dqsundelayedout());
9488 // synopsys translate_off
9489 defparam \inst|d_toggle_counter_out_17_~I .ddio_mode = "none";
9490 defparam \inst|d_toggle_counter_out_17_~I .input_async_reset = "none";
9491 defparam \inst|d_toggle_counter_out_17_~I .input_power_up = "low";
9492 defparam \inst|d_toggle_counter_out_17_~I .input_register_mode = "none";
9493 defparam \inst|d_toggle_counter_out_17_~I .input_sync_reset = "none";
9494 defparam \inst|d_toggle_counter_out_17_~I .oe_async_reset = "none";
9495 defparam \inst|d_toggle_counter_out_17_~I .oe_power_up = "low";
9496 defparam \inst|d_toggle_counter_out_17_~I .oe_register_mode = "none";
9497 defparam \inst|d_toggle_counter_out_17_~I .oe_sync_reset = "none";
9498 defparam \inst|d_toggle_counter_out_17_~I .operation_mode = "output";
9499 defparam \inst|d_toggle_counter_out_17_~I .output_async_reset = "none";
9500 defparam \inst|d_toggle_counter_out_17_~I .output_power_up = "low";
9501 defparam \inst|d_toggle_counter_out_17_~I .output_register_mode = "none";
9502 defparam \inst|d_toggle_counter_out_17_~I .output_sync_reset = "none";
9503 // synopsys translate_on
9504
9505 // atom is at PIN_G23
9506 stratix_io \inst|d_toggle_counter_out_16_~I (
9507         .datain(\inst|vga_control_unit|toggle_counter_sig_16 ),
9508         .ddiodatain(gnd),
9509         .oe(vcc),
9510         .outclk(gnd),
9511         .outclkena(vcc),
9512         .inclk(gnd),
9513         .inclkena(vcc),
9514         .areset(gnd),
9515         .sreset(gnd),
9516         .delayctrlin(gnd),
9517         .devclrn(devclrn),
9518         .devpor(devpor),
9519         .devoe(devoe),
9520         .combout(),
9521         .regout(),
9522         .ddioregout(),
9523         .padio(d_toggle_counter[16]),
9524         .dqsundelayedout());
9525 // synopsys translate_off
9526 defparam \inst|d_toggle_counter_out_16_~I .ddio_mode = "none";
9527 defparam \inst|d_toggle_counter_out_16_~I .input_async_reset = "none";
9528 defparam \inst|d_toggle_counter_out_16_~I .input_power_up = "low";
9529 defparam \inst|d_toggle_counter_out_16_~I .input_register_mode = "none";
9530 defparam \inst|d_toggle_counter_out_16_~I .input_sync_reset = "none";
9531 defparam \inst|d_toggle_counter_out_16_~I .oe_async_reset = "none";
9532 defparam \inst|d_toggle_counter_out_16_~I .oe_power_up = "low";
9533 defparam \inst|d_toggle_counter_out_16_~I .oe_register_mode = "none";
9534 defparam \inst|d_toggle_counter_out_16_~I .oe_sync_reset = "none";
9535 defparam \inst|d_toggle_counter_out_16_~I .operation_mode = "output";
9536 defparam \inst|d_toggle_counter_out_16_~I .output_async_reset = "none";
9537 defparam \inst|d_toggle_counter_out_16_~I .output_power_up = "low";
9538 defparam \inst|d_toggle_counter_out_16_~I .output_register_mode = "none";
9539 defparam \inst|d_toggle_counter_out_16_~I .output_sync_reset = "none";
9540 // synopsys translate_on
9541
9542 // atom is at PIN_G24
9543 stratix_io \inst|d_toggle_counter_out_15_~I (
9544         .datain(\inst|vga_control_unit|toggle_counter_sig_15 ),
9545         .ddiodatain(gnd),
9546         .oe(vcc),
9547         .outclk(gnd),
9548         .outclkena(vcc),
9549         .inclk(gnd),
9550         .inclkena(vcc),
9551         .areset(gnd),
9552         .sreset(gnd),
9553         .delayctrlin(gnd),
9554         .devclrn(devclrn),
9555         .devpor(devpor),
9556         .devoe(devoe),
9557         .combout(),
9558         .regout(),
9559         .ddioregout(),
9560         .padio(d_toggle_counter[15]),
9561         .dqsundelayedout());
9562 // synopsys translate_off
9563 defparam \inst|d_toggle_counter_out_15_~I .ddio_mode = "none";
9564 defparam \inst|d_toggle_counter_out_15_~I .input_async_reset = "none";
9565 defparam \inst|d_toggle_counter_out_15_~I .input_power_up = "low";
9566 defparam \inst|d_toggle_counter_out_15_~I .input_register_mode = "none";
9567 defparam \inst|d_toggle_counter_out_15_~I .input_sync_reset = "none";
9568 defparam \inst|d_toggle_counter_out_15_~I .oe_async_reset = "none";
9569 defparam \inst|d_toggle_counter_out_15_~I .oe_power_up = "low";
9570 defparam \inst|d_toggle_counter_out_15_~I .oe_register_mode = "none";
9571 defparam \inst|d_toggle_counter_out_15_~I .oe_sync_reset = "none";
9572 defparam \inst|d_toggle_counter_out_15_~I .operation_mode = "output";
9573 defparam \inst|d_toggle_counter_out_15_~I .output_async_reset = "none";
9574 defparam \inst|d_toggle_counter_out_15_~I .output_power_up = "low";
9575 defparam \inst|d_toggle_counter_out_15_~I .output_register_mode = "none";
9576 defparam \inst|d_toggle_counter_out_15_~I .output_sync_reset = "none";
9577 // synopsys translate_on
9578
9579 // atom is at PIN_F13
9580 stratix_io \inst|d_toggle_counter_out_14_~I (
9581         .datain(\inst|vga_control_unit|toggle_counter_sig_14 ),
9582         .ddiodatain(gnd),
9583         .oe(vcc),
9584         .outclk(gnd),
9585         .outclkena(vcc),
9586         .inclk(gnd),
9587         .inclkena(vcc),
9588         .areset(gnd),
9589         .sreset(gnd),
9590         .delayctrlin(gnd),
9591         .devclrn(devclrn),
9592         .devpor(devpor),
9593         .devoe(devoe),
9594         .combout(),
9595         .regout(),
9596         .ddioregout(),
9597         .padio(d_toggle_counter[14]),
9598         .dqsundelayedout());
9599 // synopsys translate_off
9600 defparam \inst|d_toggle_counter_out_14_~I .ddio_mode = "none";
9601 defparam \inst|d_toggle_counter_out_14_~I .input_async_reset = "none";
9602 defparam \inst|d_toggle_counter_out_14_~I .input_power_up = "low";
9603 defparam \inst|d_toggle_counter_out_14_~I .input_register_mode = "none";
9604 defparam \inst|d_toggle_counter_out_14_~I .input_sync_reset = "none";
9605 defparam \inst|d_toggle_counter_out_14_~I .oe_async_reset = "none";
9606 defparam \inst|d_toggle_counter_out_14_~I .oe_power_up = "low";
9607 defparam \inst|d_toggle_counter_out_14_~I .oe_register_mode = "none";
9608 defparam \inst|d_toggle_counter_out_14_~I .oe_sync_reset = "none";
9609 defparam \inst|d_toggle_counter_out_14_~I .operation_mode = "output";
9610 defparam \inst|d_toggle_counter_out_14_~I .output_async_reset = "none";
9611 defparam \inst|d_toggle_counter_out_14_~I .output_power_up = "low";
9612 defparam \inst|d_toggle_counter_out_14_~I .output_register_mode = "none";
9613 defparam \inst|d_toggle_counter_out_14_~I .output_sync_reset = "none";
9614 // synopsys translate_on
9615
9616 // atom is at PIN_E16
9617 stratix_io \inst|d_toggle_counter_out_13_~I (
9618         .datain(\inst|vga_control_unit|toggle_counter_sig_13 ),
9619         .ddiodatain(gnd),
9620         .oe(vcc),
9621         .outclk(gnd),
9622         .outclkena(vcc),
9623         .inclk(gnd),
9624         .inclkena(vcc),
9625         .areset(gnd),
9626         .sreset(gnd),
9627         .delayctrlin(gnd),
9628         .devclrn(devclrn),
9629         .devpor(devpor),
9630         .devoe(devoe),
9631         .combout(),
9632         .regout(),
9633         .ddioregout(),
9634         .padio(d_toggle_counter[13]),
9635         .dqsundelayedout());
9636 // synopsys translate_off
9637 defparam \inst|d_toggle_counter_out_13_~I .ddio_mode = "none";
9638 defparam \inst|d_toggle_counter_out_13_~I .input_async_reset = "none";
9639 defparam \inst|d_toggle_counter_out_13_~I .input_power_up = "low";
9640 defparam \inst|d_toggle_counter_out_13_~I .input_register_mode = "none";
9641 defparam \inst|d_toggle_counter_out_13_~I .input_sync_reset = "none";
9642 defparam \inst|d_toggle_counter_out_13_~I .oe_async_reset = "none";
9643 defparam \inst|d_toggle_counter_out_13_~I .oe_power_up = "low";
9644 defparam \inst|d_toggle_counter_out_13_~I .oe_register_mode = "none";
9645 defparam \inst|d_toggle_counter_out_13_~I .oe_sync_reset = "none";
9646 defparam \inst|d_toggle_counter_out_13_~I .operation_mode = "output";
9647 defparam \inst|d_toggle_counter_out_13_~I .output_async_reset = "none";
9648 defparam \inst|d_toggle_counter_out_13_~I .output_power_up = "low";
9649 defparam \inst|d_toggle_counter_out_13_~I .output_register_mode = "none";
9650 defparam \inst|d_toggle_counter_out_13_~I .output_sync_reset = "none";
9651 // synopsys translate_on
9652
9653 // atom is at PIN_E14
9654 stratix_io \inst|d_toggle_counter_out_12_~I (
9655         .datain(\inst|vga_control_unit|toggle_counter_sig_12 ),
9656         .ddiodatain(gnd),
9657         .oe(vcc),
9658         .outclk(gnd),
9659         .outclkena(vcc),
9660         .inclk(gnd),
9661         .inclkena(vcc),
9662         .areset(gnd),
9663         .sreset(gnd),
9664         .delayctrlin(gnd),
9665         .devclrn(devclrn),
9666         .devpor(devpor),
9667         .devoe(devoe),
9668         .combout(),
9669         .regout(),
9670         .ddioregout(),
9671         .padio(d_toggle_counter[12]),
9672         .dqsundelayedout());
9673 // synopsys translate_off
9674 defparam \inst|d_toggle_counter_out_12_~I .ddio_mode = "none";
9675 defparam \inst|d_toggle_counter_out_12_~I .input_async_reset = "none";
9676 defparam \inst|d_toggle_counter_out_12_~I .input_power_up = "low";
9677 defparam \inst|d_toggle_counter_out_12_~I .input_register_mode = "none";
9678 defparam \inst|d_toggle_counter_out_12_~I .input_sync_reset = "none";
9679 defparam \inst|d_toggle_counter_out_12_~I .oe_async_reset = "none";
9680 defparam \inst|d_toggle_counter_out_12_~I .oe_power_up = "low";
9681 defparam \inst|d_toggle_counter_out_12_~I .oe_register_mode = "none";
9682 defparam \inst|d_toggle_counter_out_12_~I .oe_sync_reset = "none";
9683 defparam \inst|d_toggle_counter_out_12_~I .operation_mode = "output";
9684 defparam \inst|d_toggle_counter_out_12_~I .output_async_reset = "none";
9685 defparam \inst|d_toggle_counter_out_12_~I .output_power_up = "low";
9686 defparam \inst|d_toggle_counter_out_12_~I .output_register_mode = "none";
9687 defparam \inst|d_toggle_counter_out_12_~I .output_sync_reset = "none";
9688 // synopsys translate_on
9689
9690 // atom is at PIN_D24
9691 stratix_io \inst|d_toggle_counter_out_11_~I (
9692         .datain(\inst|vga_control_unit|toggle_counter_sig_11 ),
9693         .ddiodatain(gnd),
9694         .oe(vcc),
9695         .outclk(gnd),
9696         .outclkena(vcc),
9697         .inclk(gnd),
9698         .inclkena(vcc),
9699         .areset(gnd),
9700         .sreset(gnd),
9701         .delayctrlin(gnd),
9702         .devclrn(devclrn),
9703         .devpor(devpor),
9704         .devoe(devoe),
9705         .combout(),
9706         .regout(),
9707         .ddioregout(),
9708         .padio(d_toggle_counter[11]),
9709         .dqsundelayedout());
9710 // synopsys translate_off
9711 defparam \inst|d_toggle_counter_out_11_~I .ddio_mode = "none";
9712 defparam \inst|d_toggle_counter_out_11_~I .input_async_reset = "none";
9713 defparam \inst|d_toggle_counter_out_11_~I .input_power_up = "low";
9714 defparam \inst|d_toggle_counter_out_11_~I .input_register_mode = "none";
9715 defparam \inst|d_toggle_counter_out_11_~I .input_sync_reset = "none";
9716 defparam \inst|d_toggle_counter_out_11_~I .oe_async_reset = "none";
9717 defparam \inst|d_toggle_counter_out_11_~I .oe_power_up = "low";
9718 defparam \inst|d_toggle_counter_out_11_~I .oe_register_mode = "none";
9719 defparam \inst|d_toggle_counter_out_11_~I .oe_sync_reset = "none";
9720 defparam \inst|d_toggle_counter_out_11_~I .operation_mode = "output";
9721 defparam \inst|d_toggle_counter_out_11_~I .output_async_reset = "none";
9722 defparam \inst|d_toggle_counter_out_11_~I .output_power_up = "low";
9723 defparam \inst|d_toggle_counter_out_11_~I .output_register_mode = "none";
9724 defparam \inst|d_toggle_counter_out_11_~I .output_sync_reset = "none";
9725 // synopsys translate_on
9726
9727 // atom is at PIN_F12
9728 stratix_io \inst|d_toggle_counter_out_10_~I (
9729         .datain(\inst|vga_control_unit|toggle_counter_sig_10 ),
9730         .ddiodatain(gnd),
9731         .oe(vcc),
9732         .outclk(gnd),
9733         .outclkena(vcc),
9734         .inclk(gnd),
9735         .inclkena(vcc),
9736         .areset(gnd),
9737         .sreset(gnd),
9738         .delayctrlin(gnd),
9739         .devclrn(devclrn),
9740         .devpor(devpor),
9741         .devoe(devoe),
9742         .combout(),
9743         .regout(),
9744         .ddioregout(),
9745         .padio(d_toggle_counter[10]),
9746         .dqsundelayedout());
9747 // synopsys translate_off
9748 defparam \inst|d_toggle_counter_out_10_~I .ddio_mode = "none";
9749 defparam \inst|d_toggle_counter_out_10_~I .input_async_reset = "none";
9750 defparam \inst|d_toggle_counter_out_10_~I .input_power_up = "low";
9751 defparam \inst|d_toggle_counter_out_10_~I .input_register_mode = "none";
9752 defparam \inst|d_toggle_counter_out_10_~I .input_sync_reset = "none";
9753 defparam \inst|d_toggle_counter_out_10_~I .oe_async_reset = "none";
9754 defparam \inst|d_toggle_counter_out_10_~I .oe_power_up = "low";
9755 defparam \inst|d_toggle_counter_out_10_~I .oe_register_mode = "none";
9756 defparam \inst|d_toggle_counter_out_10_~I .oe_sync_reset = "none";
9757 defparam \inst|d_toggle_counter_out_10_~I .operation_mode = "output";
9758 defparam \inst|d_toggle_counter_out_10_~I .output_async_reset = "none";
9759 defparam \inst|d_toggle_counter_out_10_~I .output_power_up = "low";
9760 defparam \inst|d_toggle_counter_out_10_~I .output_register_mode = "none";
9761 defparam \inst|d_toggle_counter_out_10_~I .output_sync_reset = "none";
9762 // synopsys translate_on
9763
9764 // atom is at PIN_C16
9765 stratix_io \inst|d_toggle_counter_out_9_~I (
9766         .datain(\inst|vga_control_unit|toggle_counter_sig_9 ),
9767         .ddiodatain(gnd),
9768         .oe(vcc),
9769         .outclk(gnd),
9770         .outclkena(vcc),
9771         .inclk(gnd),
9772         .inclkena(vcc),
9773         .areset(gnd),
9774         .sreset(gnd),
9775         .delayctrlin(gnd),
9776         .devclrn(devclrn),
9777         .devpor(devpor),
9778         .devoe(devoe),
9779         .combout(),
9780         .regout(),
9781         .ddioregout(),
9782         .padio(d_toggle_counter[9]),
9783         .dqsundelayedout());
9784 // synopsys translate_off
9785 defparam \inst|d_toggle_counter_out_9_~I .ddio_mode = "none";
9786 defparam \inst|d_toggle_counter_out_9_~I .input_async_reset = "none";
9787 defparam \inst|d_toggle_counter_out_9_~I .input_power_up = "low";
9788 defparam \inst|d_toggle_counter_out_9_~I .input_register_mode = "none";
9789 defparam \inst|d_toggle_counter_out_9_~I .input_sync_reset = "none";
9790 defparam \inst|d_toggle_counter_out_9_~I .oe_async_reset = "none";
9791 defparam \inst|d_toggle_counter_out_9_~I .oe_power_up = "low";
9792 defparam \inst|d_toggle_counter_out_9_~I .oe_register_mode = "none";
9793 defparam \inst|d_toggle_counter_out_9_~I .oe_sync_reset = "none";
9794 defparam \inst|d_toggle_counter_out_9_~I .operation_mode = "output";
9795 defparam \inst|d_toggle_counter_out_9_~I .output_async_reset = "none";
9796 defparam \inst|d_toggle_counter_out_9_~I .output_power_up = "low";
9797 defparam \inst|d_toggle_counter_out_9_~I .output_register_mode = "none";
9798 defparam \inst|d_toggle_counter_out_9_~I .output_sync_reset = "none";
9799 // synopsys translate_on
9800
9801 // atom is at PIN_H16
9802 stratix_io \inst|d_toggle_counter_out_8_~I (
9803         .datain(\inst|vga_control_unit|toggle_counter_sig_8 ),
9804         .ddiodatain(gnd),
9805         .oe(vcc),
9806         .outclk(gnd),
9807         .outclkena(vcc),
9808         .inclk(gnd),
9809         .inclkena(vcc),
9810         .areset(gnd),
9811         .sreset(gnd),
9812         .delayctrlin(gnd),
9813         .devclrn(devclrn),
9814         .devpor(devpor),
9815         .devoe(devoe),
9816         .combout(),
9817         .regout(),
9818         .ddioregout(),
9819         .padio(d_toggle_counter[8]),
9820         .dqsundelayedout());
9821 // synopsys translate_off
9822 defparam \inst|d_toggle_counter_out_8_~I .ddio_mode = "none";
9823 defparam \inst|d_toggle_counter_out_8_~I .input_async_reset = "none";
9824 defparam \inst|d_toggle_counter_out_8_~I .input_power_up = "low";
9825 defparam \inst|d_toggle_counter_out_8_~I .input_register_mode = "none";
9826 defparam \inst|d_toggle_counter_out_8_~I .input_sync_reset = "none";
9827 defparam \inst|d_toggle_counter_out_8_~I .oe_async_reset = "none";
9828 defparam \inst|d_toggle_counter_out_8_~I .oe_power_up = "low";
9829 defparam \inst|d_toggle_counter_out_8_~I .oe_register_mode = "none";
9830 defparam \inst|d_toggle_counter_out_8_~I .oe_sync_reset = "none";
9831 defparam \inst|d_toggle_counter_out_8_~I .operation_mode = "output";
9832 defparam \inst|d_toggle_counter_out_8_~I .output_async_reset = "none";
9833 defparam \inst|d_toggle_counter_out_8_~I .output_power_up = "low";
9834 defparam \inst|d_toggle_counter_out_8_~I .output_register_mode = "none";
9835 defparam \inst|d_toggle_counter_out_8_~I .output_sync_reset = "none";
9836 // synopsys translate_on
9837
9838 // atom is at PIN_AA16
9839 stratix_io \inst|d_toggle_counter_out_7_~I (
9840         .datain(\inst|vga_control_unit|toggle_counter_sig_7 ),
9841         .ddiodatain(gnd),
9842         .oe(vcc),
9843         .outclk(gnd),
9844         .outclkena(vcc),
9845         .inclk(gnd),
9846         .inclkena(vcc),
9847         .areset(gnd),
9848         .sreset(gnd),
9849         .delayctrlin(gnd),
9850         .devclrn(devclrn),
9851         .devpor(devpor),
9852         .devoe(devoe),
9853         .combout(),
9854         .regout(),
9855         .ddioregout(),
9856         .padio(d_toggle_counter[7]),
9857         .dqsundelayedout());
9858 // synopsys translate_off
9859 defparam \inst|d_toggle_counter_out_7_~I .ddio_mode = "none";
9860 defparam \inst|d_toggle_counter_out_7_~I .input_async_reset = "none";
9861 defparam \inst|d_toggle_counter_out_7_~I .input_power_up = "low";
9862 defparam \inst|d_toggle_counter_out_7_~I .input_register_mode = "none";
9863 defparam \inst|d_toggle_counter_out_7_~I .input_sync_reset = "none";
9864 defparam \inst|d_toggle_counter_out_7_~I .oe_async_reset = "none";
9865 defparam \inst|d_toggle_counter_out_7_~I .oe_power_up = "low";
9866 defparam \inst|d_toggle_counter_out_7_~I .oe_register_mode = "none";
9867 defparam \inst|d_toggle_counter_out_7_~I .oe_sync_reset = "none";
9868 defparam \inst|d_toggle_counter_out_7_~I .operation_mode = "output";
9869 defparam \inst|d_toggle_counter_out_7_~I .output_async_reset = "none";
9870 defparam \inst|d_toggle_counter_out_7_~I .output_power_up = "low";
9871 defparam \inst|d_toggle_counter_out_7_~I .output_register_mode = "none";
9872 defparam \inst|d_toggle_counter_out_7_~I .output_sync_reset = "none";
9873 // synopsys translate_on
9874
9875 // atom is at PIN_F15
9876 stratix_io \inst|d_toggle_counter_out_6_~I (
9877         .datain(\inst|vga_control_unit|toggle_counter_sig_6 ),
9878         .ddiodatain(gnd),
9879         .oe(vcc),
9880         .outclk(gnd),
9881         .outclkena(vcc),
9882         .inclk(gnd),
9883         .inclkena(vcc),
9884         .areset(gnd),
9885         .sreset(gnd),
9886         .delayctrlin(gnd),
9887         .devclrn(devclrn),
9888         .devpor(devpor),
9889         .devoe(devoe),
9890         .combout(),
9891         .regout(),
9892         .ddioregout(),
9893         .padio(d_toggle_counter[6]),
9894         .dqsundelayedout());
9895 // synopsys translate_off
9896 defparam \inst|d_toggle_counter_out_6_~I .ddio_mode = "none";
9897 defparam \inst|d_toggle_counter_out_6_~I .input_async_reset = "none";
9898 defparam \inst|d_toggle_counter_out_6_~I .input_power_up = "low";
9899 defparam \inst|d_toggle_counter_out_6_~I .input_register_mode = "none";
9900 defparam \inst|d_toggle_counter_out_6_~I .input_sync_reset = "none";
9901 defparam \inst|d_toggle_counter_out_6_~I .oe_async_reset = "none";
9902 defparam \inst|d_toggle_counter_out_6_~I .oe_power_up = "low";
9903 defparam \inst|d_toggle_counter_out_6_~I .oe_register_mode = "none";
9904 defparam \inst|d_toggle_counter_out_6_~I .oe_sync_reset = "none";
9905 defparam \inst|d_toggle_counter_out_6_~I .operation_mode = "output";
9906 defparam \inst|d_toggle_counter_out_6_~I .output_async_reset = "none";
9907 defparam \inst|d_toggle_counter_out_6_~I .output_power_up = "low";
9908 defparam \inst|d_toggle_counter_out_6_~I .output_register_mode = "none";
9909 defparam \inst|d_toggle_counter_out_6_~I .output_sync_reset = "none";
9910 // synopsys translate_on
9911
9912 // atom is at PIN_C15
9913 stratix_io \inst|d_toggle_counter_out_5_~I (
9914         .datain(\inst|vga_control_unit|toggle_counter_sig_5 ),
9915         .ddiodatain(gnd),
9916         .oe(vcc),
9917         .outclk(gnd),
9918         .outclkena(vcc),
9919         .inclk(gnd),
9920         .inclkena(vcc),
9921         .areset(gnd),
9922         .sreset(gnd),
9923         .delayctrlin(gnd),
9924         .devclrn(devclrn),
9925         .devpor(devpor),
9926         .devoe(devoe),
9927         .combout(),
9928         .regout(),
9929         .ddioregout(),
9930         .padio(d_toggle_counter[5]),
9931         .dqsundelayedout());
9932 // synopsys translate_off
9933 defparam \inst|d_toggle_counter_out_5_~I .ddio_mode = "none";
9934 defparam \inst|d_toggle_counter_out_5_~I .input_async_reset = "none";
9935 defparam \inst|d_toggle_counter_out_5_~I .input_power_up = "low";
9936 defparam \inst|d_toggle_counter_out_5_~I .input_register_mode = "none";
9937 defparam \inst|d_toggle_counter_out_5_~I .input_sync_reset = "none";
9938 defparam \inst|d_toggle_counter_out_5_~I .oe_async_reset = "none";
9939 defparam \inst|d_toggle_counter_out_5_~I .oe_power_up = "low";
9940 defparam \inst|d_toggle_counter_out_5_~I .oe_register_mode = "none";
9941 defparam \inst|d_toggle_counter_out_5_~I .oe_sync_reset = "none";
9942 defparam \inst|d_toggle_counter_out_5_~I .operation_mode = "output";
9943 defparam \inst|d_toggle_counter_out_5_~I .output_async_reset = "none";
9944 defparam \inst|d_toggle_counter_out_5_~I .output_power_up = "low";
9945 defparam \inst|d_toggle_counter_out_5_~I .output_register_mode = "none";
9946 defparam \inst|d_toggle_counter_out_5_~I .output_sync_reset = "none";
9947 // synopsys translate_on
9948
9949 // atom is at PIN_Y16
9950 stratix_io \inst|d_toggle_counter_out_4_~I (
9951         .datain(\inst|vga_control_unit|toggle_counter_sig_4 ),
9952         .ddiodatain(gnd),
9953         .oe(vcc),
9954         .outclk(gnd),
9955         .outclkena(vcc),
9956         .inclk(gnd),
9957         .inclkena(vcc),
9958         .areset(gnd),
9959         .sreset(gnd),
9960         .delayctrlin(gnd),
9961         .devclrn(devclrn),
9962         .devpor(devpor),
9963         .devoe(devoe),
9964         .combout(),
9965         .regout(),
9966         .ddioregout(),
9967         .padio(d_toggle_counter[4]),
9968         .dqsundelayedout());
9969 // synopsys translate_off
9970 defparam \inst|d_toggle_counter_out_4_~I .ddio_mode = "none";
9971 defparam \inst|d_toggle_counter_out_4_~I .input_async_reset = "none";
9972 defparam \inst|d_toggle_counter_out_4_~I .input_power_up = "low";
9973 defparam \inst|d_toggle_counter_out_4_~I .input_register_mode = "none";
9974 defparam \inst|d_toggle_counter_out_4_~I .input_sync_reset = "none";
9975 defparam \inst|d_toggle_counter_out_4_~I .oe_async_reset = "none";
9976 defparam \inst|d_toggle_counter_out_4_~I .oe_power_up = "low";
9977 defparam \inst|d_toggle_counter_out_4_~I .oe_register_mode = "none";
9978 defparam \inst|d_toggle_counter_out_4_~I .oe_sync_reset = "none";
9979 defparam \inst|d_toggle_counter_out_4_~I .operation_mode = "output";
9980 defparam \inst|d_toggle_counter_out_4_~I .output_async_reset = "none";
9981 defparam \inst|d_toggle_counter_out_4_~I .output_power_up = "low";
9982 defparam \inst|d_toggle_counter_out_4_~I .output_register_mode = "none";
9983 defparam \inst|d_toggle_counter_out_4_~I .output_sync_reset = "none";
9984 // synopsys translate_on
9985
9986 // atom is at PIN_E13
9987 stratix_io \inst|d_toggle_counter_out_3_~I (
9988         .datain(\inst|vga_control_unit|toggle_counter_sig_3 ),
9989         .ddiodatain(gnd),
9990         .oe(vcc),
9991         .outclk(gnd),
9992         .outclkena(vcc),
9993         .inclk(gnd),
9994         .inclkena(vcc),
9995         .areset(gnd),
9996         .sreset(gnd),
9997         .delayctrlin(gnd),
9998         .devclrn(devclrn),
9999         .devpor(devpor),
10000         .devoe(devoe),
10001         .combout(),
10002         .regout(),
10003         .ddioregout(),
10004         .padio(d_toggle_counter[3]),
10005         .dqsundelayedout());
10006 // synopsys translate_off
10007 defparam \inst|d_toggle_counter_out_3_~I .ddio_mode = "none";
10008 defparam \inst|d_toggle_counter_out_3_~I .input_async_reset = "none";
10009 defparam \inst|d_toggle_counter_out_3_~I .input_power_up = "low";
10010 defparam \inst|d_toggle_counter_out_3_~I .input_register_mode = "none";
10011 defparam \inst|d_toggle_counter_out_3_~I .input_sync_reset = "none";
10012 defparam \inst|d_toggle_counter_out_3_~I .oe_async_reset = "none";
10013 defparam \inst|d_toggle_counter_out_3_~I .oe_power_up = "low";
10014 defparam \inst|d_toggle_counter_out_3_~I .oe_register_mode = "none";
10015 defparam \inst|d_toggle_counter_out_3_~I .oe_sync_reset = "none";
10016 defparam \inst|d_toggle_counter_out_3_~I .operation_mode = "output";
10017 defparam \inst|d_toggle_counter_out_3_~I .output_async_reset = "none";
10018 defparam \inst|d_toggle_counter_out_3_~I .output_power_up = "low";
10019 defparam \inst|d_toggle_counter_out_3_~I .output_register_mode = "none";
10020 defparam \inst|d_toggle_counter_out_3_~I .output_sync_reset = "none";
10021 // synopsys translate_on
10022
10023 // atom is at PIN_B16
10024 stratix_io \inst|d_toggle_counter_out_2_~I (
10025         .datain(\inst|vga_control_unit|toggle_counter_sig_2 ),
10026         .ddiodatain(gnd),
10027         .oe(vcc),
10028         .outclk(gnd),
10029         .outclkena(vcc),
10030         .inclk(gnd),
10031         .inclkena(vcc),
10032         .areset(gnd),
10033         .sreset(gnd),
10034         .delayctrlin(gnd),
10035         .devclrn(devclrn),
10036         .devpor(devpor),
10037         .devoe(devoe),
10038         .combout(),
10039         .regout(),
10040         .ddioregout(),
10041         .padio(d_toggle_counter[2]),
10042         .dqsundelayedout());
10043 // synopsys translate_off
10044 defparam \inst|d_toggle_counter_out_2_~I .ddio_mode = "none";
10045 defparam \inst|d_toggle_counter_out_2_~I .input_async_reset = "none";
10046 defparam \inst|d_toggle_counter_out_2_~I .input_power_up = "low";
10047 defparam \inst|d_toggle_counter_out_2_~I .input_register_mode = "none";
10048 defparam \inst|d_toggle_counter_out_2_~I .input_sync_reset = "none";
10049 defparam \inst|d_toggle_counter_out_2_~I .oe_async_reset = "none";
10050 defparam \inst|d_toggle_counter_out_2_~I .oe_power_up = "low";
10051 defparam \inst|d_toggle_counter_out_2_~I .oe_register_mode = "none";
10052 defparam \inst|d_toggle_counter_out_2_~I .oe_sync_reset = "none";
10053 defparam \inst|d_toggle_counter_out_2_~I .operation_mode = "output";
10054 defparam \inst|d_toggle_counter_out_2_~I .output_async_reset = "none";
10055 defparam \inst|d_toggle_counter_out_2_~I .output_power_up = "low";
10056 defparam \inst|d_toggle_counter_out_2_~I .output_register_mode = "none";
10057 defparam \inst|d_toggle_counter_out_2_~I .output_sync_reset = "none";
10058 // synopsys translate_on
10059
10060 // atom is at PIN_C25
10061 stratix_io \inst|d_toggle_counter_out_1_~I (
10062         .datain(\inst|vga_control_unit|toggle_counter_sig_1 ),
10063         .ddiodatain(gnd),
10064         .oe(vcc),
10065         .outclk(gnd),
10066         .outclkena(vcc),
10067         .inclk(gnd),
10068         .inclkena(vcc),
10069         .areset(gnd),
10070         .sreset(gnd),
10071         .delayctrlin(gnd),
10072         .devclrn(devclrn),
10073         .devpor(devpor),
10074         .devoe(devoe),
10075         .combout(),
10076         .regout(),
10077         .ddioregout(),
10078         .padio(d_toggle_counter[1]),
10079         .dqsundelayedout());
10080 // synopsys translate_off
10081 defparam \inst|d_toggle_counter_out_1_~I .ddio_mode = "none";
10082 defparam \inst|d_toggle_counter_out_1_~I .input_async_reset = "none";
10083 defparam \inst|d_toggle_counter_out_1_~I .input_power_up = "low";
10084 defparam \inst|d_toggle_counter_out_1_~I .input_register_mode = "none";
10085 defparam \inst|d_toggle_counter_out_1_~I .input_sync_reset = "none";
10086 defparam \inst|d_toggle_counter_out_1_~I .oe_async_reset = "none";
10087 defparam \inst|d_toggle_counter_out_1_~I .oe_power_up = "low";
10088 defparam \inst|d_toggle_counter_out_1_~I .oe_register_mode = "none";
10089 defparam \inst|d_toggle_counter_out_1_~I .oe_sync_reset = "none";
10090 defparam \inst|d_toggle_counter_out_1_~I .operation_mode = "output";
10091 defparam \inst|d_toggle_counter_out_1_~I .output_async_reset = "none";
10092 defparam \inst|d_toggle_counter_out_1_~I .output_power_up = "low";
10093 defparam \inst|d_toggle_counter_out_1_~I .output_register_mode = "none";
10094 defparam \inst|d_toggle_counter_out_1_~I .output_sync_reset = "none";
10095 // synopsys translate_on
10096
10097 // atom is at PIN_H26
10098 stratix_io \inst|d_toggle_counter_out_0_~I (
10099         .datain(\inst|vga_control_unit|toggle_counter_sig_0 ),
10100         .ddiodatain(gnd),
10101         .oe(vcc),
10102         .outclk(gnd),
10103         .outclkena(vcc),
10104         .inclk(gnd),
10105         .inclkena(vcc),
10106         .areset(gnd),
10107         .sreset(gnd),
10108         .delayctrlin(gnd),
10109         .devclrn(devclrn),
10110         .devpor(devpor),
10111         .devoe(devoe),
10112         .combout(),
10113         .regout(),
10114         .ddioregout(),
10115         .padio(d_toggle_counter[0]),
10116         .dqsundelayedout());
10117 // synopsys translate_off
10118 defparam \inst|d_toggle_counter_out_0_~I .ddio_mode = "none";
10119 defparam \inst|d_toggle_counter_out_0_~I .input_async_reset = "none";
10120 defparam \inst|d_toggle_counter_out_0_~I .input_power_up = "low";
10121 defparam \inst|d_toggle_counter_out_0_~I .input_register_mode = "none";
10122 defparam \inst|d_toggle_counter_out_0_~I .input_sync_reset = "none";
10123 defparam \inst|d_toggle_counter_out_0_~I .oe_async_reset = "none";
10124 defparam \inst|d_toggle_counter_out_0_~I .oe_power_up = "low";
10125 defparam \inst|d_toggle_counter_out_0_~I .oe_register_mode = "none";
10126 defparam \inst|d_toggle_counter_out_0_~I .oe_sync_reset = "none";
10127 defparam \inst|d_toggle_counter_out_0_~I .operation_mode = "output";
10128 defparam \inst|d_toggle_counter_out_0_~I .output_async_reset = "none";
10129 defparam \inst|d_toggle_counter_out_0_~I .output_power_up = "low";
10130 defparam \inst|d_toggle_counter_out_0_~I .output_register_mode = "none";
10131 defparam \inst|d_toggle_counter_out_0_~I .output_sync_reset = "none";
10132 // synopsys translate_on
10133
10134 // atom is at PIN_G2
10135 stratix_io \inst|d_vsync_counter_out_9_~I (
10136         .datain(\inst|vga_driver_unit|vsync_counter_9 ),
10137         .ddiodatain(gnd),
10138         .oe(vcc),
10139         .outclk(gnd),
10140         .outclkena(vcc),
10141         .inclk(gnd),
10142         .inclkena(vcc),
10143         .areset(gnd),
10144         .sreset(gnd),
10145         .delayctrlin(gnd),
10146         .devclrn(devclrn),
10147         .devpor(devpor),
10148         .devoe(devoe),
10149         .combout(),
10150         .regout(),
10151         .ddioregout(),
10152         .padio(d_vsync_counter[9]),
10153         .dqsundelayedout());
10154 // synopsys translate_off
10155 defparam \inst|d_vsync_counter_out_9_~I .ddio_mode = "none";
10156 defparam \inst|d_vsync_counter_out_9_~I .input_async_reset = "none";
10157 defparam \inst|d_vsync_counter_out_9_~I .input_power_up = "low";
10158 defparam \inst|d_vsync_counter_out_9_~I .input_register_mode = "none";
10159 defparam \inst|d_vsync_counter_out_9_~I .input_sync_reset = "none";
10160 defparam \inst|d_vsync_counter_out_9_~I .oe_async_reset = "none";
10161 defparam \inst|d_vsync_counter_out_9_~I .oe_power_up = "low";
10162 defparam \inst|d_vsync_counter_out_9_~I .oe_register_mode = "none";
10163 defparam \inst|d_vsync_counter_out_9_~I .oe_sync_reset = "none";
10164 defparam \inst|d_vsync_counter_out_9_~I .operation_mode = "output";
10165 defparam \inst|d_vsync_counter_out_9_~I .output_async_reset = "none";
10166 defparam \inst|d_vsync_counter_out_9_~I .output_power_up = "low";
10167 defparam \inst|d_vsync_counter_out_9_~I .output_register_mode = "none";
10168 defparam \inst|d_vsync_counter_out_9_~I .output_sync_reset = "none";
10169 // synopsys translate_on
10170
10171 // atom is at PIN_G4
10172 stratix_io \inst|d_vsync_counter_out_8_~I (
10173         .datain(\inst|vga_driver_unit|vsync_counter_8 ),
10174         .ddiodatain(gnd),
10175         .oe(vcc),
10176         .outclk(gnd),
10177         .outclkena(vcc),
10178         .inclk(gnd),
10179         .inclkena(vcc),
10180         .areset(gnd),
10181         .sreset(gnd),
10182         .delayctrlin(gnd),
10183         .devclrn(devclrn),
10184         .devpor(devpor),
10185         .devoe(devoe),
10186         .combout(),
10187         .regout(),
10188         .ddioregout(),
10189         .padio(d_vsync_counter[8]),
10190         .dqsundelayedout());
10191 // synopsys translate_off
10192 defparam \inst|d_vsync_counter_out_8_~I .ddio_mode = "none";
10193 defparam \inst|d_vsync_counter_out_8_~I .input_async_reset = "none";
10194 defparam \inst|d_vsync_counter_out_8_~I .input_power_up = "low";
10195 defparam \inst|d_vsync_counter_out_8_~I .input_register_mode = "none";
10196 defparam \inst|d_vsync_counter_out_8_~I .input_sync_reset = "none";
10197 defparam \inst|d_vsync_counter_out_8_~I .oe_async_reset = "none";
10198 defparam \inst|d_vsync_counter_out_8_~I .oe_power_up = "low";
10199 defparam \inst|d_vsync_counter_out_8_~I .oe_register_mode = "none";
10200 defparam \inst|d_vsync_counter_out_8_~I .oe_sync_reset = "none";
10201 defparam \inst|d_vsync_counter_out_8_~I .operation_mode = "output";
10202 defparam \inst|d_vsync_counter_out_8_~I .output_async_reset = "none";
10203 defparam \inst|d_vsync_counter_out_8_~I .output_power_up = "low";
10204 defparam \inst|d_vsync_counter_out_8_~I .output_register_mode = "none";
10205 defparam \inst|d_vsync_counter_out_8_~I .output_sync_reset = "none";
10206 // synopsys translate_on
10207
10208 // atom is at PIN_G6
10209 stratix_io \inst|d_vsync_counter_out_7_~I (
10210         .datain(\inst|vga_driver_unit|vsync_counter_7 ),
10211         .ddiodatain(gnd),
10212         .oe(vcc),
10213         .outclk(gnd),
10214         .outclkena(vcc),
10215         .inclk(gnd),
10216         .inclkena(vcc),
10217         .areset(gnd),
10218         .sreset(gnd),
10219         .delayctrlin(gnd),
10220         .devclrn(devclrn),
10221         .devpor(devpor),
10222         .devoe(devoe),
10223         .combout(),
10224         .regout(),
10225         .ddioregout(),
10226         .padio(d_vsync_counter[7]),
10227         .dqsundelayedout());
10228 // synopsys translate_off
10229 defparam \inst|d_vsync_counter_out_7_~I .ddio_mode = "none";
10230 defparam \inst|d_vsync_counter_out_7_~I .input_async_reset = "none";
10231 defparam \inst|d_vsync_counter_out_7_~I .input_power_up = "low";
10232 defparam \inst|d_vsync_counter_out_7_~I .input_register_mode = "none";
10233 defparam \inst|d_vsync_counter_out_7_~I .input_sync_reset = "none";
10234 defparam \inst|d_vsync_counter_out_7_~I .oe_async_reset = "none";
10235 defparam \inst|d_vsync_counter_out_7_~I .oe_power_up = "low";
10236 defparam \inst|d_vsync_counter_out_7_~I .oe_register_mode = "none";
10237 defparam \inst|d_vsync_counter_out_7_~I .oe_sync_reset = "none";
10238 defparam \inst|d_vsync_counter_out_7_~I .operation_mode = "output";
10239 defparam \inst|d_vsync_counter_out_7_~I .output_async_reset = "none";
10240 defparam \inst|d_vsync_counter_out_7_~I .output_power_up = "low";
10241 defparam \inst|d_vsync_counter_out_7_~I .output_register_mode = "none";
10242 defparam \inst|d_vsync_counter_out_7_~I .output_sync_reset = "none";
10243 // synopsys translate_on
10244
10245 // atom is at PIN_A10
10246 stratix_io \inst|d_vsync_counter_out_6_~I (
10247         .datain(\inst|vga_driver_unit|vsync_counter_6 ),
10248         .ddiodatain(gnd),
10249         .oe(vcc),
10250         .outclk(gnd),
10251         .outclkena(vcc),
10252         .inclk(gnd),
10253         .inclkena(vcc),
10254         .areset(gnd),
10255         .sreset(gnd),
10256         .delayctrlin(gnd),
10257         .devclrn(devclrn),
10258         .devpor(devpor),
10259         .devoe(devoe),
10260         .combout(),
10261         .regout(),
10262         .ddioregout(),
10263         .padio(d_vsync_counter[6]),
10264         .dqsundelayedout());
10265 // synopsys translate_off
10266 defparam \inst|d_vsync_counter_out_6_~I .ddio_mode = "none";
10267 defparam \inst|d_vsync_counter_out_6_~I .input_async_reset = "none";
10268 defparam \inst|d_vsync_counter_out_6_~I .input_power_up = "low";
10269 defparam \inst|d_vsync_counter_out_6_~I .input_register_mode = "none";
10270 defparam \inst|d_vsync_counter_out_6_~I .input_sync_reset = "none";
10271 defparam \inst|d_vsync_counter_out_6_~I .oe_async_reset = "none";
10272 defparam \inst|d_vsync_counter_out_6_~I .oe_power_up = "low";
10273 defparam \inst|d_vsync_counter_out_6_~I .oe_register_mode = "none";
10274 defparam \inst|d_vsync_counter_out_6_~I .oe_sync_reset = "none";
10275 defparam \inst|d_vsync_counter_out_6_~I .operation_mode = "output";
10276 defparam \inst|d_vsync_counter_out_6_~I .output_async_reset = "none";
10277 defparam \inst|d_vsync_counter_out_6_~I .output_power_up = "low";
10278 defparam \inst|d_vsync_counter_out_6_~I .output_register_mode = "none";
10279 defparam \inst|d_vsync_counter_out_6_~I .output_sync_reset = "none";
10280 // synopsys translate_on
10281
10282 // atom is at PIN_D11
10283 stratix_io \inst|d_vsync_counter_out_5_~I (
10284         .datain(\inst|vga_driver_unit|vsync_counter_5 ),
10285         .ddiodatain(gnd),
10286         .oe(vcc),
10287         .outclk(gnd),
10288         .outclkena(vcc),
10289         .inclk(gnd),
10290         .inclkena(vcc),
10291         .areset(gnd),
10292         .sreset(gnd),
10293         .delayctrlin(gnd),
10294         .devclrn(devclrn),
10295         .devpor(devpor),
10296         .devoe(devoe),
10297         .combout(),
10298         .regout(),
10299         .ddioregout(),
10300         .padio(d_vsync_counter[5]),
10301         .dqsundelayedout());
10302 // synopsys translate_off
10303 defparam \inst|d_vsync_counter_out_5_~I .ddio_mode = "none";
10304 defparam \inst|d_vsync_counter_out_5_~I .input_async_reset = "none";
10305 defparam \inst|d_vsync_counter_out_5_~I .input_power_up = "low";
10306 defparam \inst|d_vsync_counter_out_5_~I .input_register_mode = "none";
10307 defparam \inst|d_vsync_counter_out_5_~I .input_sync_reset = "none";
10308 defparam \inst|d_vsync_counter_out_5_~I .oe_async_reset = "none";
10309 defparam \inst|d_vsync_counter_out_5_~I .oe_power_up = "low";
10310 defparam \inst|d_vsync_counter_out_5_~I .oe_register_mode = "none";
10311 defparam \inst|d_vsync_counter_out_5_~I .oe_sync_reset = "none";
10312 defparam \inst|d_vsync_counter_out_5_~I .operation_mode = "output";
10313 defparam \inst|d_vsync_counter_out_5_~I .output_async_reset = "none";
10314 defparam \inst|d_vsync_counter_out_5_~I .output_power_up = "low";
10315 defparam \inst|d_vsync_counter_out_5_~I .output_register_mode = "none";
10316 defparam \inst|d_vsync_counter_out_5_~I .output_sync_reset = "none";
10317 // synopsys translate_on
10318
10319 // atom is at PIN_H2
10320 stratix_io \inst|d_vsync_counter_out_4_~I (
10321         .datain(\inst|vga_driver_unit|vsync_counter_4 ),
10322         .ddiodatain(gnd),
10323         .oe(vcc),
10324         .outclk(gnd),
10325         .outclkena(vcc),
10326         .inclk(gnd),
10327         .inclkena(vcc),
10328         .areset(gnd),
10329         .sreset(gnd),
10330         .delayctrlin(gnd),
10331         .devclrn(devclrn),
10332         .devpor(devpor),
10333         .devoe(devoe),
10334         .combout(),
10335         .regout(),
10336         .ddioregout(),
10337         .padio(d_vsync_counter[4]),
10338         .dqsundelayedout());
10339 // synopsys translate_off
10340 defparam \inst|d_vsync_counter_out_4_~I .ddio_mode = "none";
10341 defparam \inst|d_vsync_counter_out_4_~I .input_async_reset = "none";
10342 defparam \inst|d_vsync_counter_out_4_~I .input_power_up = "low";
10343 defparam \inst|d_vsync_counter_out_4_~I .input_register_mode = "none";
10344 defparam \inst|d_vsync_counter_out_4_~I .input_sync_reset = "none";
10345 defparam \inst|d_vsync_counter_out_4_~I .oe_async_reset = "none";
10346 defparam \inst|d_vsync_counter_out_4_~I .oe_power_up = "low";
10347 defparam \inst|d_vsync_counter_out_4_~I .oe_register_mode = "none";
10348 defparam \inst|d_vsync_counter_out_4_~I .oe_sync_reset = "none";
10349 defparam \inst|d_vsync_counter_out_4_~I .operation_mode = "output";
10350 defparam \inst|d_vsync_counter_out_4_~I .output_async_reset = "none";
10351 defparam \inst|d_vsync_counter_out_4_~I .output_power_up = "low";
10352 defparam \inst|d_vsync_counter_out_4_~I .output_register_mode = "none";
10353 defparam \inst|d_vsync_counter_out_4_~I .output_sync_reset = "none";
10354 // synopsys translate_on
10355
10356 // atom is at PIN_G10
10357 stratix_io \inst|d_vsync_counter_out_3_~I (
10358         .datain(\inst|vga_driver_unit|vsync_counter_3 ),
10359         .ddiodatain(gnd),
10360         .oe(vcc),
10361         .outclk(gnd),
10362         .outclkena(vcc),
10363         .inclk(gnd),
10364         .inclkena(vcc),
10365         .areset(gnd),
10366         .sreset(gnd),
10367         .delayctrlin(gnd),
10368         .devclrn(devclrn),
10369         .devpor(devpor),
10370         .devoe(devoe),
10371         .combout(),
10372         .regout(),
10373         .ddioregout(),
10374         .padio(d_vsync_counter[3]),
10375         .dqsundelayedout());
10376 // synopsys translate_off
10377 defparam \inst|d_vsync_counter_out_3_~I .ddio_mode = "none";
10378 defparam \inst|d_vsync_counter_out_3_~I .input_async_reset = "none";
10379 defparam \inst|d_vsync_counter_out_3_~I .input_power_up = "low";
10380 defparam \inst|d_vsync_counter_out_3_~I .input_register_mode = "none";
10381 defparam \inst|d_vsync_counter_out_3_~I .input_sync_reset = "none";
10382 defparam \inst|d_vsync_counter_out_3_~I .oe_async_reset = "none";
10383 defparam \inst|d_vsync_counter_out_3_~I .oe_power_up = "low";
10384 defparam \inst|d_vsync_counter_out_3_~I .oe_register_mode = "none";
10385 defparam \inst|d_vsync_counter_out_3_~I .oe_sync_reset = "none";
10386 defparam \inst|d_vsync_counter_out_3_~I .operation_mode = "output";
10387 defparam \inst|d_vsync_counter_out_3_~I .output_async_reset = "none";
10388 defparam \inst|d_vsync_counter_out_3_~I .output_power_up = "low";
10389 defparam \inst|d_vsync_counter_out_3_~I .output_register_mode = "none";
10390 defparam \inst|d_vsync_counter_out_3_~I .output_sync_reset = "none";
10391 // synopsys translate_on
10392
10393 // atom is at PIN_C11
10394 stratix_io \inst|d_vsync_counter_out_2_~I (
10395         .datain(\inst|vga_driver_unit|vsync_counter_2 ),
10396         .ddiodatain(gnd),
10397         .oe(vcc),
10398         .outclk(gnd),
10399         .outclkena(vcc),
10400         .inclk(gnd),
10401         .inclkena(vcc),
10402         .areset(gnd),
10403         .sreset(gnd),
10404         .delayctrlin(gnd),
10405         .devclrn(devclrn),
10406         .devpor(devpor),
10407         .devoe(devoe),
10408         .combout(),
10409         .regout(),
10410         .ddioregout(),
10411         .padio(d_vsync_counter[2]),
10412         .dqsundelayedout());
10413 // synopsys translate_off
10414 defparam \inst|d_vsync_counter_out_2_~I .ddio_mode = "none";
10415 defparam \inst|d_vsync_counter_out_2_~I .input_async_reset = "none";
10416 defparam \inst|d_vsync_counter_out_2_~I .input_power_up = "low";
10417 defparam \inst|d_vsync_counter_out_2_~I .input_register_mode = "none";
10418 defparam \inst|d_vsync_counter_out_2_~I .input_sync_reset = "none";
10419 defparam \inst|d_vsync_counter_out_2_~I .oe_async_reset = "none";
10420 defparam \inst|d_vsync_counter_out_2_~I .oe_power_up = "low";
10421 defparam \inst|d_vsync_counter_out_2_~I .oe_register_mode = "none";
10422 defparam \inst|d_vsync_counter_out_2_~I .oe_sync_reset = "none";
10423 defparam \inst|d_vsync_counter_out_2_~I .operation_mode = "output";
10424 defparam \inst|d_vsync_counter_out_2_~I .output_async_reset = "none";
10425 defparam \inst|d_vsync_counter_out_2_~I .output_power_up = "low";
10426 defparam \inst|d_vsync_counter_out_2_~I .output_register_mode = "none";
10427 defparam \inst|d_vsync_counter_out_2_~I .output_sync_reset = "none";
10428 // synopsys translate_on
10429
10430 // atom is at PIN_H10
10431 stratix_io \inst|d_vsync_counter_out_1_~I (
10432         .datain(\inst|vga_driver_unit|vsync_counter_1 ),
10433         .ddiodatain(gnd),
10434         .oe(vcc),
10435         .outclk(gnd),
10436         .outclkena(vcc),
10437         .inclk(gnd),
10438         .inclkena(vcc),
10439         .areset(gnd),
10440         .sreset(gnd),
10441         .delayctrlin(gnd),
10442         .devclrn(devclrn),
10443         .devpor(devpor),
10444         .devoe(devoe),
10445         .combout(),
10446         .regout(),
10447         .ddioregout(),
10448         .padio(d_vsync_counter[1]),
10449         .dqsundelayedout());
10450 // synopsys translate_off
10451 defparam \inst|d_vsync_counter_out_1_~I .ddio_mode = "none";
10452 defparam \inst|d_vsync_counter_out_1_~I .input_async_reset = "none";
10453 defparam \inst|d_vsync_counter_out_1_~I .input_power_up = "low";
10454 defparam \inst|d_vsync_counter_out_1_~I .input_register_mode = "none";
10455 defparam \inst|d_vsync_counter_out_1_~I .input_sync_reset = "none";
10456 defparam \inst|d_vsync_counter_out_1_~I .oe_async_reset = "none";
10457 defparam \inst|d_vsync_counter_out_1_~I .oe_power_up = "low";
10458 defparam \inst|d_vsync_counter_out_1_~I .oe_register_mode = "none";
10459 defparam \inst|d_vsync_counter_out_1_~I .oe_sync_reset = "none";
10460 defparam \inst|d_vsync_counter_out_1_~I .operation_mode = "output";
10461 defparam \inst|d_vsync_counter_out_1_~I .output_async_reset = "none";
10462 defparam \inst|d_vsync_counter_out_1_~I .output_power_up = "low";
10463 defparam \inst|d_vsync_counter_out_1_~I .output_register_mode = "none";
10464 defparam \inst|d_vsync_counter_out_1_~I .output_sync_reset = "none";
10465 // synopsys translate_on
10466
10467 // atom is at PIN_G9
10468 stratix_io \inst|d_vsync_counter_out_0_~I (
10469         .datain(\inst|vga_driver_unit|vsync_counter_0 ),
10470         .ddiodatain(gnd),
10471         .oe(vcc),
10472         .outclk(gnd),
10473         .outclkena(vcc),
10474         .inclk(gnd),
10475         .inclkena(vcc),
10476         .areset(gnd),
10477         .sreset(gnd),
10478         .delayctrlin(gnd),
10479         .devclrn(devclrn),
10480         .devpor(devpor),
10481         .devoe(devoe),
10482         .combout(),
10483         .regout(),
10484         .ddioregout(),
10485         .padio(d_vsync_counter[0]),
10486         .dqsundelayedout());
10487 // synopsys translate_off
10488 defparam \inst|d_vsync_counter_out_0_~I .ddio_mode = "none";
10489 defparam \inst|d_vsync_counter_out_0_~I .input_async_reset = "none";
10490 defparam \inst|d_vsync_counter_out_0_~I .input_power_up = "low";
10491 defparam \inst|d_vsync_counter_out_0_~I .input_register_mode = "none";
10492 defparam \inst|d_vsync_counter_out_0_~I .input_sync_reset = "none";
10493 defparam \inst|d_vsync_counter_out_0_~I .oe_async_reset = "none";
10494 defparam \inst|d_vsync_counter_out_0_~I .oe_power_up = "low";
10495 defparam \inst|d_vsync_counter_out_0_~I .oe_register_mode = "none";
10496 defparam \inst|d_vsync_counter_out_0_~I .oe_sync_reset = "none";
10497 defparam \inst|d_vsync_counter_out_0_~I .operation_mode = "output";
10498 defparam \inst|d_vsync_counter_out_0_~I .output_async_reset = "none";
10499 defparam \inst|d_vsync_counter_out_0_~I .output_power_up = "low";
10500 defparam \inst|d_vsync_counter_out_0_~I .output_register_mode = "none";
10501 defparam \inst|d_vsync_counter_out_0_~I .output_sync_reset = "none";
10502 // synopsys translate_on
10503
10504 // atom is at PIN_F5
10505 stratix_io \inst|d_vsync_state_out_0_~I (
10506         .datain(\inst|vga_driver_unit|vsync_state_0 ),
10507         .ddiodatain(gnd),
10508         .oe(vcc),
10509         .outclk(gnd),
10510         .outclkena(vcc),
10511         .inclk(gnd),
10512         .inclkena(vcc),
10513         .areset(gnd),
10514         .sreset(gnd),
10515         .delayctrlin(gnd),
10516         .devclrn(devclrn),
10517         .devpor(devpor),
10518         .devoe(devoe),
10519         .combout(),
10520         .regout(),
10521         .ddioregout(),
10522         .padio(d_vsync_state[0]),
10523         .dqsundelayedout());
10524 // synopsys translate_off
10525 defparam \inst|d_vsync_state_out_0_~I .ddio_mode = "none";
10526 defparam \inst|d_vsync_state_out_0_~I .input_async_reset = "none";
10527 defparam \inst|d_vsync_state_out_0_~I .input_power_up = "low";
10528 defparam \inst|d_vsync_state_out_0_~I .input_register_mode = "none";
10529 defparam \inst|d_vsync_state_out_0_~I .input_sync_reset = "none";
10530 defparam \inst|d_vsync_state_out_0_~I .oe_async_reset = "none";
10531 defparam \inst|d_vsync_state_out_0_~I .oe_power_up = "low";
10532 defparam \inst|d_vsync_state_out_0_~I .oe_register_mode = "none";
10533 defparam \inst|d_vsync_state_out_0_~I .oe_sync_reset = "none";
10534 defparam \inst|d_vsync_state_out_0_~I .operation_mode = "output";
10535 defparam \inst|d_vsync_state_out_0_~I .output_async_reset = "none";
10536 defparam \inst|d_vsync_state_out_0_~I .output_power_up = "low";
10537 defparam \inst|d_vsync_state_out_0_~I .output_register_mode = "none";
10538 defparam \inst|d_vsync_state_out_0_~I .output_sync_reset = "none";
10539 // synopsys translate_on
10540
10541 // atom is at PIN_F4
10542 stratix_io \inst|d_vsync_state_out_1_~I (
10543         .datain(\inst|vga_driver_unit|vsync_state_1 ),
10544         .ddiodatain(gnd),
10545         .oe(vcc),
10546         .outclk(gnd),
10547         .outclkena(vcc),
10548         .inclk(gnd),
10549         .inclkena(vcc),
10550         .areset(gnd),
10551         .sreset(gnd),
10552         .delayctrlin(gnd),
10553         .devclrn(devclrn),
10554         .devpor(devpor),
10555         .devoe(devoe),
10556         .combout(),
10557         .regout(),
10558         .ddioregout(),
10559         .padio(d_vsync_state[1]),
10560         .dqsundelayedout());
10561 // synopsys translate_off
10562 defparam \inst|d_vsync_state_out_1_~I .ddio_mode = "none";
10563 defparam \inst|d_vsync_state_out_1_~I .input_async_reset = "none";
10564 defparam \inst|d_vsync_state_out_1_~I .input_power_up = "low";
10565 defparam \inst|d_vsync_state_out_1_~I .input_register_mode = "none";
10566 defparam \inst|d_vsync_state_out_1_~I .input_sync_reset = "none";
10567 defparam \inst|d_vsync_state_out_1_~I .oe_async_reset = "none";
10568 defparam \inst|d_vsync_state_out_1_~I .oe_power_up = "low";
10569 defparam \inst|d_vsync_state_out_1_~I .oe_register_mode = "none";
10570 defparam \inst|d_vsync_state_out_1_~I .oe_sync_reset = "none";
10571 defparam \inst|d_vsync_state_out_1_~I .operation_mode = "output";
10572 defparam \inst|d_vsync_state_out_1_~I .output_async_reset = "none";
10573 defparam \inst|d_vsync_state_out_1_~I .output_power_up = "low";
10574 defparam \inst|d_vsync_state_out_1_~I .output_register_mode = "none";
10575 defparam \inst|d_vsync_state_out_1_~I .output_sync_reset = "none";
10576 // synopsys translate_on
10577
10578 // atom is at PIN_F3
10579 stratix_io \inst|d_vsync_state_out_2_~I (
10580         .datain(\inst|vga_driver_unit|vsync_state_2 ),
10581         .ddiodatain(gnd),
10582         .oe(vcc),
10583         .outclk(gnd),
10584         .outclkena(vcc),
10585         .inclk(gnd),
10586         .inclkena(vcc),
10587         .areset(gnd),
10588         .sreset(gnd),
10589         .delayctrlin(gnd),
10590         .devclrn(devclrn),
10591         .devpor(devpor),
10592         .devoe(devoe),
10593         .combout(),
10594         .regout(),
10595         .ddioregout(),
10596         .padio(d_vsync_state[2]),
10597         .dqsundelayedout());
10598 // synopsys translate_off
10599 defparam \inst|d_vsync_state_out_2_~I .ddio_mode = "none";
10600 defparam \inst|d_vsync_state_out_2_~I .input_async_reset = "none";
10601 defparam \inst|d_vsync_state_out_2_~I .input_power_up = "low";
10602 defparam \inst|d_vsync_state_out_2_~I .input_register_mode = "none";
10603 defparam \inst|d_vsync_state_out_2_~I .input_sync_reset = "none";
10604 defparam \inst|d_vsync_state_out_2_~I .oe_async_reset = "none";
10605 defparam \inst|d_vsync_state_out_2_~I .oe_power_up = "low";
10606 defparam \inst|d_vsync_state_out_2_~I .oe_register_mode = "none";
10607 defparam \inst|d_vsync_state_out_2_~I .oe_sync_reset = "none";
10608 defparam \inst|d_vsync_state_out_2_~I .operation_mode = "output";
10609 defparam \inst|d_vsync_state_out_2_~I .output_async_reset = "none";
10610 defparam \inst|d_vsync_state_out_2_~I .output_power_up = "low";
10611 defparam \inst|d_vsync_state_out_2_~I .output_register_mode = "none";
10612 defparam \inst|d_vsync_state_out_2_~I .output_sync_reset = "none";
10613 // synopsys translate_on
10614
10615 // atom is at PIN_M19
10616 stratix_io \inst|d_vsync_state_out_3_~I (
10617         .datain(\inst|vga_driver_unit|vsync_state_3 ),
10618         .ddiodatain(gnd),
10619         .oe(vcc),
10620         .outclk(gnd),
10621         .outclkena(vcc),
10622         .inclk(gnd),
10623         .inclkena(vcc),
10624         .areset(gnd),
10625         .sreset(gnd),
10626         .delayctrlin(gnd),
10627         .devclrn(devclrn),
10628         .devpor(devpor),
10629         .devoe(devoe),
10630         .combout(),
10631         .regout(),
10632         .ddioregout(),
10633         .padio(d_vsync_state[3]),
10634         .dqsundelayedout());
10635 // synopsys translate_off
10636 defparam \inst|d_vsync_state_out_3_~I .ddio_mode = "none";
10637 defparam \inst|d_vsync_state_out_3_~I .input_async_reset = "none";
10638 defparam \inst|d_vsync_state_out_3_~I .input_power_up = "low";
10639 defparam \inst|d_vsync_state_out_3_~I .input_register_mode = "none";
10640 defparam \inst|d_vsync_state_out_3_~I .input_sync_reset = "none";
10641 defparam \inst|d_vsync_state_out_3_~I .oe_async_reset = "none";
10642 defparam \inst|d_vsync_state_out_3_~I .oe_power_up = "low";
10643 defparam \inst|d_vsync_state_out_3_~I .oe_register_mode = "none";
10644 defparam \inst|d_vsync_state_out_3_~I .oe_sync_reset = "none";
10645 defparam \inst|d_vsync_state_out_3_~I .operation_mode = "output";
10646 defparam \inst|d_vsync_state_out_3_~I .output_async_reset = "none";
10647 defparam \inst|d_vsync_state_out_3_~I .output_power_up = "low";
10648 defparam \inst|d_vsync_state_out_3_~I .output_register_mode = "none";
10649 defparam \inst|d_vsync_state_out_3_~I .output_sync_reset = "none";
10650 // synopsys translate_on
10651
10652 // atom is at PIN_M18
10653 stratix_io \inst|d_vsync_state_out_4_~I (
10654         .datain(\inst|vga_driver_unit|vsync_state_4 ),
10655         .ddiodatain(gnd),
10656         .oe(vcc),
10657         .outclk(gnd),
10658         .outclkena(vcc),
10659         .inclk(gnd),
10660         .inclkena(vcc),
10661         .areset(gnd),
10662         .sreset(gnd),
10663         .delayctrlin(gnd),
10664         .devclrn(devclrn),
10665         .devpor(devpor),
10666         .devoe(devoe),
10667         .combout(),
10668         .regout(),
10669         .ddioregout(),
10670         .padio(d_vsync_state[4]),
10671         .dqsundelayedout());
10672 // synopsys translate_off
10673 defparam \inst|d_vsync_state_out_4_~I .ddio_mode = "none";
10674 defparam \inst|d_vsync_state_out_4_~I .input_async_reset = "none";
10675 defparam \inst|d_vsync_state_out_4_~I .input_power_up = "low";
10676 defparam \inst|d_vsync_state_out_4_~I .input_register_mode = "none";
10677 defparam \inst|d_vsync_state_out_4_~I .input_sync_reset = "none";
10678 defparam \inst|d_vsync_state_out_4_~I .oe_async_reset = "none";
10679 defparam \inst|d_vsync_state_out_4_~I .oe_power_up = "low";
10680 defparam \inst|d_vsync_state_out_4_~I .oe_register_mode = "none";
10681 defparam \inst|d_vsync_state_out_4_~I .oe_sync_reset = "none";
10682 defparam \inst|d_vsync_state_out_4_~I .operation_mode = "output";
10683 defparam \inst|d_vsync_state_out_4_~I .output_async_reset = "none";
10684 defparam \inst|d_vsync_state_out_4_~I .output_power_up = "low";
10685 defparam \inst|d_vsync_state_out_4_~I .output_register_mode = "none";
10686 defparam \inst|d_vsync_state_out_4_~I .output_sync_reset = "none";
10687 // synopsys translate_on
10688
10689 // atom is at PIN_M7
10690 stratix_io \inst|d_vsync_state_out_5_~I (
10691         .datain(\inst|vga_driver_unit|vsync_state_5 ),
10692         .ddiodatain(gnd),
10693         .oe(vcc),
10694         .outclk(gnd),
10695         .outclkena(vcc),
10696         .inclk(gnd),
10697         .inclkena(vcc),
10698         .areset(gnd),
10699         .sreset(gnd),
10700         .delayctrlin(gnd),
10701         .devclrn(devclrn),
10702         .devpor(devpor),
10703         .devoe(devoe),
10704         .combout(),
10705         .regout(),
10706         .ddioregout(),
10707         .padio(d_vsync_state[5]),
10708         .dqsundelayedout());
10709 // synopsys translate_off
10710 defparam \inst|d_vsync_state_out_5_~I .ddio_mode = "none";
10711 defparam \inst|d_vsync_state_out_5_~I .input_async_reset = "none";
10712 defparam \inst|d_vsync_state_out_5_~I .input_power_up = "low";
10713 defparam \inst|d_vsync_state_out_5_~I .input_register_mode = "none";
10714 defparam \inst|d_vsync_state_out_5_~I .input_sync_reset = "none";
10715 defparam \inst|d_vsync_state_out_5_~I .oe_async_reset = "none";
10716 defparam \inst|d_vsync_state_out_5_~I .oe_power_up = "low";
10717 defparam \inst|d_vsync_state_out_5_~I .oe_register_mode = "none";
10718 defparam \inst|d_vsync_state_out_5_~I .oe_sync_reset = "none";
10719 defparam \inst|d_vsync_state_out_5_~I .operation_mode = "output";
10720 defparam \inst|d_vsync_state_out_5_~I .output_async_reset = "none";
10721 defparam \inst|d_vsync_state_out_5_~I .output_power_up = "low";
10722 defparam \inst|d_vsync_state_out_5_~I .output_register_mode = "none";
10723 defparam \inst|d_vsync_state_out_5_~I .output_sync_reset = "none";
10724 // synopsys translate_on
10725
10726 // atom is at PIN_M4
10727 stratix_io \inst|d_vsync_state_out_6_~I (
10728         .datain(\inst|vga_driver_unit|vsync_state_6 ),
10729         .ddiodatain(gnd),
10730         .oe(vcc),
10731         .outclk(gnd),
10732         .outclkena(vcc),
10733         .inclk(gnd),
10734         .inclkena(vcc),
10735         .areset(gnd),
10736         .sreset(gnd),
10737         .delayctrlin(gnd),
10738         .devclrn(devclrn),
10739         .devpor(devpor),
10740         .devoe(devoe),
10741         .combout(),
10742         .regout(),
10743         .ddioregout(),
10744         .padio(d_vsync_state[6]),
10745         .dqsundelayedout());
10746 // synopsys translate_off
10747 defparam \inst|d_vsync_state_out_6_~I .ddio_mode = "none";
10748 defparam \inst|d_vsync_state_out_6_~I .input_async_reset = "none";
10749 defparam \inst|d_vsync_state_out_6_~I .input_power_up = "low";
10750 defparam \inst|d_vsync_state_out_6_~I .input_register_mode = "none";
10751 defparam \inst|d_vsync_state_out_6_~I .input_sync_reset = "none";
10752 defparam \inst|d_vsync_state_out_6_~I .oe_async_reset = "none";
10753 defparam \inst|d_vsync_state_out_6_~I .oe_power_up = "low";
10754 defparam \inst|d_vsync_state_out_6_~I .oe_register_mode = "none";
10755 defparam \inst|d_vsync_state_out_6_~I .oe_sync_reset = "none";
10756 defparam \inst|d_vsync_state_out_6_~I .operation_mode = "output";
10757 defparam \inst|d_vsync_state_out_6_~I .output_async_reset = "none";
10758 defparam \inst|d_vsync_state_out_6_~I .output_power_up = "low";
10759 defparam \inst|d_vsync_state_out_6_~I .output_register_mode = "none";
10760 defparam \inst|d_vsync_state_out_6_~I .output_sync_reset = "none";
10761 // synopsys translate_on
10762
10763 // atom is at PIN_T2
10764 stratix_io \inst|seven_seg_pin_tri_13_~I (
10765         .datain(!\~STRATIX_FITTER_CREATED_GND~I_combout ),
10766         .ddiodatain(gnd),
10767         .oe(vcc),
10768         .outclk(gnd),
10769         .outclkena(vcc),
10770         .inclk(gnd),
10771         .inclkena(vcc),
10772         .areset(gnd),
10773         .sreset(gnd),
10774         .delayctrlin(gnd),
10775         .devclrn(devclrn),
10776         .devpor(devpor),
10777         .devoe(devoe),
10778         .combout(),
10779         .regout(),
10780         .ddioregout(),
10781         .padio(seven_seg_pin[13]),
10782         .dqsundelayedout());
10783 // synopsys translate_off
10784 defparam \inst|seven_seg_pin_tri_13_~I .ddio_mode = "none";
10785 defparam \inst|seven_seg_pin_tri_13_~I .input_async_reset = "none";
10786 defparam \inst|seven_seg_pin_tri_13_~I .input_power_up = "low";
10787 defparam \inst|seven_seg_pin_tri_13_~I .input_register_mode = "none";
10788 defparam \inst|seven_seg_pin_tri_13_~I .input_sync_reset = "none";
10789 defparam \inst|seven_seg_pin_tri_13_~I .oe_async_reset = "none";
10790 defparam \inst|seven_seg_pin_tri_13_~I .oe_power_up = "low";
10791 defparam \inst|seven_seg_pin_tri_13_~I .oe_register_mode = "none";
10792 defparam \inst|seven_seg_pin_tri_13_~I .oe_sync_reset = "none";
10793 defparam \inst|seven_seg_pin_tri_13_~I .operation_mode = "output";
10794 defparam \inst|seven_seg_pin_tri_13_~I .output_async_reset = "none";
10795 defparam \inst|seven_seg_pin_tri_13_~I .output_power_up = "low";
10796 defparam \inst|seven_seg_pin_tri_13_~I .output_register_mode = "none";
10797 defparam \inst|seven_seg_pin_tri_13_~I .output_sync_reset = "none";
10798 // synopsys translate_on
10799
10800 // atom is at PIN_AA11
10801 stratix_io \inst|seven_seg_pin_out_12_~I (
10802         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
10803         .ddiodatain(gnd),
10804         .oe(vcc),
10805         .outclk(gnd),
10806         .outclkena(vcc),
10807         .inclk(gnd),
10808         .inclkena(vcc),
10809         .areset(gnd),
10810         .sreset(gnd),
10811         .delayctrlin(gnd),
10812         .devclrn(devclrn),
10813         .devpor(devpor),
10814         .devoe(devoe),
10815         .combout(),
10816         .regout(),
10817         .ddioregout(),
10818         .padio(seven_seg_pin[12]),
10819         .dqsundelayedout());
10820 // synopsys translate_off
10821 defparam \inst|seven_seg_pin_out_12_~I .ddio_mode = "none";
10822 defparam \inst|seven_seg_pin_out_12_~I .input_async_reset = "none";
10823 defparam \inst|seven_seg_pin_out_12_~I .input_power_up = "low";
10824 defparam \inst|seven_seg_pin_out_12_~I .input_register_mode = "none";
10825 defparam \inst|seven_seg_pin_out_12_~I .input_sync_reset = "none";
10826 defparam \inst|seven_seg_pin_out_12_~I .oe_async_reset = "none";
10827 defparam \inst|seven_seg_pin_out_12_~I .oe_power_up = "low";
10828 defparam \inst|seven_seg_pin_out_12_~I .oe_register_mode = "none";
10829 defparam \inst|seven_seg_pin_out_12_~I .oe_sync_reset = "none";
10830 defparam \inst|seven_seg_pin_out_12_~I .operation_mode = "output";
10831 defparam \inst|seven_seg_pin_out_12_~I .output_async_reset = "none";
10832 defparam \inst|seven_seg_pin_out_12_~I .output_power_up = "low";
10833 defparam \inst|seven_seg_pin_out_12_~I .output_register_mode = "none";
10834 defparam \inst|seven_seg_pin_out_12_~I .output_sync_reset = "none";
10835 // synopsys translate_on
10836
10837 // atom is at PIN_R6
10838 stratix_io \inst|seven_seg_pin_out_11_~I (
10839         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
10840         .ddiodatain(gnd),
10841         .oe(vcc),
10842         .outclk(gnd),
10843         .outclkena(vcc),
10844         .inclk(gnd),
10845         .inclkena(vcc),
10846         .areset(gnd),
10847         .sreset(gnd),
10848         .delayctrlin(gnd),
10849         .devclrn(devclrn),
10850         .devpor(devpor),
10851         .devoe(devoe),
10852         .combout(),
10853         .regout(),
10854         .ddioregout(),
10855         .padio(seven_seg_pin[11]),
10856         .dqsundelayedout());
10857 // synopsys translate_off
10858 defparam \inst|seven_seg_pin_out_11_~I .ddio_mode = "none";
10859 defparam \inst|seven_seg_pin_out_11_~I .input_async_reset = "none";
10860 defparam \inst|seven_seg_pin_out_11_~I .input_power_up = "low";
10861 defparam \inst|seven_seg_pin_out_11_~I .input_register_mode = "none";
10862 defparam \inst|seven_seg_pin_out_11_~I .input_sync_reset = "none";
10863 defparam \inst|seven_seg_pin_out_11_~I .oe_async_reset = "none";
10864 defparam \inst|seven_seg_pin_out_11_~I .oe_power_up = "low";
10865 defparam \inst|seven_seg_pin_out_11_~I .oe_register_mode = "none";
10866 defparam \inst|seven_seg_pin_out_11_~I .oe_sync_reset = "none";
10867 defparam \inst|seven_seg_pin_out_11_~I .operation_mode = "output";
10868 defparam \inst|seven_seg_pin_out_11_~I .output_async_reset = "none";
10869 defparam \inst|seven_seg_pin_out_11_~I .output_power_up = "low";
10870 defparam \inst|seven_seg_pin_out_11_~I .output_register_mode = "none";
10871 defparam \inst|seven_seg_pin_out_11_~I .output_sync_reset = "none";
10872 // synopsys translate_on
10873
10874 // atom is at PIN_R4
10875 stratix_io \inst|seven_seg_pin_out_10_~I (
10876         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
10877         .ddiodatain(gnd),
10878         .oe(vcc),
10879         .outclk(gnd),
10880         .outclkena(vcc),
10881         .inclk(gnd),
10882         .inclkena(vcc),
10883         .areset(gnd),
10884         .sreset(gnd),
10885         .delayctrlin(gnd),
10886         .devclrn(devclrn),
10887         .devpor(devpor),
10888         .devoe(devoe),
10889         .combout(),
10890         .regout(),
10891         .ddioregout(),
10892         .padio(seven_seg_pin[10]),
10893         .dqsundelayedout());
10894 // synopsys translate_off
10895 defparam \inst|seven_seg_pin_out_10_~I .ddio_mode = "none";
10896 defparam \inst|seven_seg_pin_out_10_~I .input_async_reset = "none";
10897 defparam \inst|seven_seg_pin_out_10_~I .input_power_up = "low";
10898 defparam \inst|seven_seg_pin_out_10_~I .input_register_mode = "none";
10899 defparam \inst|seven_seg_pin_out_10_~I .input_sync_reset = "none";
10900 defparam \inst|seven_seg_pin_out_10_~I .oe_async_reset = "none";
10901 defparam \inst|seven_seg_pin_out_10_~I .oe_power_up = "low";
10902 defparam \inst|seven_seg_pin_out_10_~I .oe_register_mode = "none";
10903 defparam \inst|seven_seg_pin_out_10_~I .oe_sync_reset = "none";
10904 defparam \inst|seven_seg_pin_out_10_~I .operation_mode = "output";
10905 defparam \inst|seven_seg_pin_out_10_~I .output_async_reset = "none";
10906 defparam \inst|seven_seg_pin_out_10_~I .output_power_up = "low";
10907 defparam \inst|seven_seg_pin_out_10_~I .output_register_mode = "none";
10908 defparam \inst|seven_seg_pin_out_10_~I .output_sync_reset = "none";
10909 // synopsys translate_on
10910
10911 // atom is at PIN_N8
10912 stratix_io \inst|seven_seg_pin_out_9_~I (
10913         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
10914         .ddiodatain(gnd),
10915         .oe(vcc),
10916         .outclk(gnd),
10917         .outclkena(vcc),
10918         .inclk(gnd),
10919         .inclkena(vcc),
10920         .areset(gnd),
10921         .sreset(gnd),
10922         .delayctrlin(gnd),
10923         .devclrn(devclrn),
10924         .devpor(devpor),
10925         .devoe(devoe),
10926         .combout(),
10927         .regout(),
10928         .ddioregout(),
10929         .padio(seven_seg_pin[9]),
10930         .dqsundelayedout());
10931 // synopsys translate_off
10932 defparam \inst|seven_seg_pin_out_9_~I .ddio_mode = "none";
10933 defparam \inst|seven_seg_pin_out_9_~I .input_async_reset = "none";
10934 defparam \inst|seven_seg_pin_out_9_~I .input_power_up = "low";
10935 defparam \inst|seven_seg_pin_out_9_~I .input_register_mode = "none";
10936 defparam \inst|seven_seg_pin_out_9_~I .input_sync_reset = "none";
10937 defparam \inst|seven_seg_pin_out_9_~I .oe_async_reset = "none";
10938 defparam \inst|seven_seg_pin_out_9_~I .oe_power_up = "low";
10939 defparam \inst|seven_seg_pin_out_9_~I .oe_register_mode = "none";
10940 defparam \inst|seven_seg_pin_out_9_~I .oe_sync_reset = "none";
10941 defparam \inst|seven_seg_pin_out_9_~I .operation_mode = "output";
10942 defparam \inst|seven_seg_pin_out_9_~I .output_async_reset = "none";
10943 defparam \inst|seven_seg_pin_out_9_~I .output_power_up = "low";
10944 defparam \inst|seven_seg_pin_out_9_~I .output_register_mode = "none";
10945 defparam \inst|seven_seg_pin_out_9_~I .output_sync_reset = "none";
10946 // synopsys translate_on
10947
10948 // atom is at PIN_N7
10949 stratix_io \inst|seven_seg_pin_out_8_~I (
10950         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
10951         .ddiodatain(gnd),
10952         .oe(vcc),
10953         .outclk(gnd),
10954         .outclkena(vcc),
10955         .inclk(gnd),
10956         .inclkena(vcc),
10957         .areset(gnd),
10958         .sreset(gnd),
10959         .delayctrlin(gnd),
10960         .devclrn(devclrn),
10961         .devpor(devpor),
10962         .devoe(devoe),
10963         .combout(),
10964         .regout(),
10965         .ddioregout(),
10966         .padio(seven_seg_pin[8]),
10967         .dqsundelayedout());
10968 // synopsys translate_off
10969 defparam \inst|seven_seg_pin_out_8_~I .ddio_mode = "none";
10970 defparam \inst|seven_seg_pin_out_8_~I .input_async_reset = "none";
10971 defparam \inst|seven_seg_pin_out_8_~I .input_power_up = "low";
10972 defparam \inst|seven_seg_pin_out_8_~I .input_register_mode = "none";
10973 defparam \inst|seven_seg_pin_out_8_~I .input_sync_reset = "none";
10974 defparam \inst|seven_seg_pin_out_8_~I .oe_async_reset = "none";
10975 defparam \inst|seven_seg_pin_out_8_~I .oe_power_up = "low";
10976 defparam \inst|seven_seg_pin_out_8_~I .oe_register_mode = "none";
10977 defparam \inst|seven_seg_pin_out_8_~I .oe_sync_reset = "none";
10978 defparam \inst|seven_seg_pin_out_8_~I .operation_mode = "output";
10979 defparam \inst|seven_seg_pin_out_8_~I .output_async_reset = "none";
10980 defparam \inst|seven_seg_pin_out_8_~I .output_power_up = "low";
10981 defparam \inst|seven_seg_pin_out_8_~I .output_register_mode = "none";
10982 defparam \inst|seven_seg_pin_out_8_~I .output_sync_reset = "none";
10983 // synopsys translate_on
10984
10985 // atom is at PIN_Y11
10986 stratix_io \inst|seven_seg_pin_out_7_~I (
10987         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
10988         .ddiodatain(gnd),
10989         .oe(vcc),
10990         .outclk(gnd),
10991         .outclkena(vcc),
10992         .inclk(gnd),
10993         .inclkena(vcc),
10994         .areset(gnd),
10995         .sreset(gnd),
10996         .delayctrlin(gnd),
10997         .devclrn(devclrn),
10998         .devpor(devpor),
10999         .devoe(devoe),
11000         .combout(),
11001         .regout(),
11002         .ddioregout(),
11003         .padio(seven_seg_pin[7]),
11004         .dqsundelayedout());
11005 // synopsys translate_off
11006 defparam \inst|seven_seg_pin_out_7_~I .ddio_mode = "none";
11007 defparam \inst|seven_seg_pin_out_7_~I .input_async_reset = "none";
11008 defparam \inst|seven_seg_pin_out_7_~I .input_power_up = "low";
11009 defparam \inst|seven_seg_pin_out_7_~I .input_register_mode = "none";
11010 defparam \inst|seven_seg_pin_out_7_~I .input_sync_reset = "none";
11011 defparam \inst|seven_seg_pin_out_7_~I .oe_async_reset = "none";
11012 defparam \inst|seven_seg_pin_out_7_~I .oe_power_up = "low";
11013 defparam \inst|seven_seg_pin_out_7_~I .oe_register_mode = "none";
11014 defparam \inst|seven_seg_pin_out_7_~I .oe_sync_reset = "none";
11015 defparam \inst|seven_seg_pin_out_7_~I .operation_mode = "output";
11016 defparam \inst|seven_seg_pin_out_7_~I .output_async_reset = "none";
11017 defparam \inst|seven_seg_pin_out_7_~I .output_power_up = "low";
11018 defparam \inst|seven_seg_pin_out_7_~I .output_register_mode = "none";
11019 defparam \inst|seven_seg_pin_out_7_~I .output_sync_reset = "none";
11020 // synopsys translate_on
11021
11022 // atom is at PIN_R23
11023 stratix_io \inst|seven_seg_pin_tri_6_~I (
11024         .datain(!\~STRATIX_FITTER_CREATED_GND~I_combout ),
11025         .ddiodatain(gnd),
11026         .oe(vcc),
11027         .outclk(gnd),
11028         .outclkena(vcc),
11029         .inclk(gnd),
11030         .inclkena(vcc),
11031         .areset(gnd),
11032         .sreset(gnd),
11033         .delayctrlin(gnd),
11034         .devclrn(devclrn),
11035         .devpor(devpor),
11036         .devoe(devoe),
11037         .combout(),
11038         .regout(),
11039         .ddioregout(),
11040         .padio(seven_seg_pin[6]),
11041         .dqsundelayedout());
11042 // synopsys translate_off
11043 defparam \inst|seven_seg_pin_tri_6_~I .ddio_mode = "none";
11044 defparam \inst|seven_seg_pin_tri_6_~I .input_async_reset = "none";
11045 defparam \inst|seven_seg_pin_tri_6_~I .input_power_up = "low";
11046 defparam \inst|seven_seg_pin_tri_6_~I .input_register_mode = "none";
11047 defparam \inst|seven_seg_pin_tri_6_~I .input_sync_reset = "none";
11048 defparam \inst|seven_seg_pin_tri_6_~I .oe_async_reset = "none";
11049 defparam \inst|seven_seg_pin_tri_6_~I .oe_power_up = "low";
11050 defparam \inst|seven_seg_pin_tri_6_~I .oe_register_mode = "none";
11051 defparam \inst|seven_seg_pin_tri_6_~I .oe_sync_reset = "none";
11052 defparam \inst|seven_seg_pin_tri_6_~I .operation_mode = "output";
11053 defparam \inst|seven_seg_pin_tri_6_~I .output_async_reset = "none";
11054 defparam \inst|seven_seg_pin_tri_6_~I .output_power_up = "low";
11055 defparam \inst|seven_seg_pin_tri_6_~I .output_register_mode = "none";
11056 defparam \inst|seven_seg_pin_tri_6_~I .output_sync_reset = "none";
11057 // synopsys translate_on
11058
11059 // atom is at PIN_R22
11060 stratix_io \inst|seven_seg_pin_tri_5_~I (
11061         .datain(!\~STRATIX_FITTER_CREATED_GND~I_combout ),
11062         .ddiodatain(gnd),
11063         .oe(vcc),
11064         .outclk(gnd),
11065         .outclkena(vcc),
11066         .inclk(gnd),
11067         .inclkena(vcc),
11068         .areset(gnd),
11069         .sreset(gnd),
11070         .delayctrlin(gnd),
11071         .devclrn(devclrn),
11072         .devpor(devpor),
11073         .devoe(devoe),
11074         .combout(),
11075         .regout(),
11076         .ddioregout(),
11077         .padio(seven_seg_pin[5]),
11078         .dqsundelayedout());
11079 // synopsys translate_off
11080 defparam \inst|seven_seg_pin_tri_5_~I .ddio_mode = "none";
11081 defparam \inst|seven_seg_pin_tri_5_~I .input_async_reset = "none";
11082 defparam \inst|seven_seg_pin_tri_5_~I .input_power_up = "low";
11083 defparam \inst|seven_seg_pin_tri_5_~I .input_register_mode = "none";
11084 defparam \inst|seven_seg_pin_tri_5_~I .input_sync_reset = "none";
11085 defparam \inst|seven_seg_pin_tri_5_~I .oe_async_reset = "none";
11086 defparam \inst|seven_seg_pin_tri_5_~I .oe_power_up = "low";
11087 defparam \inst|seven_seg_pin_tri_5_~I .oe_register_mode = "none";
11088 defparam \inst|seven_seg_pin_tri_5_~I .oe_sync_reset = "none";
11089 defparam \inst|seven_seg_pin_tri_5_~I .operation_mode = "output";
11090 defparam \inst|seven_seg_pin_tri_5_~I .output_async_reset = "none";
11091 defparam \inst|seven_seg_pin_tri_5_~I .output_power_up = "low";
11092 defparam \inst|seven_seg_pin_tri_5_~I .output_register_mode = "none";
11093 defparam \inst|seven_seg_pin_tri_5_~I .output_sync_reset = "none";
11094 // synopsys translate_on
11095
11096 // atom is at PIN_R21
11097 stratix_io \inst|seven_seg_pin_tri_4_~I (
11098         .datain(!\~STRATIX_FITTER_CREATED_GND~I_combout ),
11099         .ddiodatain(gnd),
11100         .oe(vcc),
11101         .outclk(gnd),
11102         .outclkena(vcc),
11103         .inclk(gnd),
11104         .inclkena(vcc),
11105         .areset(gnd),
11106         .sreset(gnd),
11107         .delayctrlin(gnd),
11108         .devclrn(devclrn),
11109         .devpor(devpor),
11110         .devoe(devoe),
11111         .combout(),
11112         .regout(),
11113         .ddioregout(),
11114         .padio(seven_seg_pin[4]),
11115         .dqsundelayedout());
11116 // synopsys translate_off
11117 defparam \inst|seven_seg_pin_tri_4_~I .ddio_mode = "none";
11118 defparam \inst|seven_seg_pin_tri_4_~I .input_async_reset = "none";
11119 defparam \inst|seven_seg_pin_tri_4_~I .input_power_up = "low";
11120 defparam \inst|seven_seg_pin_tri_4_~I .input_register_mode = "none";
11121 defparam \inst|seven_seg_pin_tri_4_~I .input_sync_reset = "none";
11122 defparam \inst|seven_seg_pin_tri_4_~I .oe_async_reset = "none";
11123 defparam \inst|seven_seg_pin_tri_4_~I .oe_power_up = "low";
11124 defparam \inst|seven_seg_pin_tri_4_~I .oe_register_mode = "none";
11125 defparam \inst|seven_seg_pin_tri_4_~I .oe_sync_reset = "none";
11126 defparam \inst|seven_seg_pin_tri_4_~I .operation_mode = "output";
11127 defparam \inst|seven_seg_pin_tri_4_~I .output_async_reset = "none";
11128 defparam \inst|seven_seg_pin_tri_4_~I .output_power_up = "low";
11129 defparam \inst|seven_seg_pin_tri_4_~I .output_register_mode = "none";
11130 defparam \inst|seven_seg_pin_tri_4_~I .output_sync_reset = "none";
11131 // synopsys translate_on
11132
11133 // atom is at PIN_R20
11134 stratix_io \inst|seven_seg_pin_tri_3_~I (
11135         .datain(!\~STRATIX_FITTER_CREATED_GND~I_combout ),
11136         .ddiodatain(gnd),
11137         .oe(vcc),
11138         .outclk(gnd),
11139         .outclkena(vcc),
11140         .inclk(gnd),
11141         .inclkena(vcc),
11142         .areset(gnd),
11143         .sreset(gnd),
11144         .delayctrlin(gnd),
11145         .devclrn(devclrn),
11146         .devpor(devpor),
11147         .devoe(devoe),
11148         .combout(),
11149         .regout(),
11150         .ddioregout(),
11151         .padio(seven_seg_pin[3]),
11152         .dqsundelayedout());
11153 // synopsys translate_off
11154 defparam \inst|seven_seg_pin_tri_3_~I .ddio_mode = "none";
11155 defparam \inst|seven_seg_pin_tri_3_~I .input_async_reset = "none";
11156 defparam \inst|seven_seg_pin_tri_3_~I .input_power_up = "low";
11157 defparam \inst|seven_seg_pin_tri_3_~I .input_register_mode = "none";
11158 defparam \inst|seven_seg_pin_tri_3_~I .input_sync_reset = "none";
11159 defparam \inst|seven_seg_pin_tri_3_~I .oe_async_reset = "none";
11160 defparam \inst|seven_seg_pin_tri_3_~I .oe_power_up = "low";
11161 defparam \inst|seven_seg_pin_tri_3_~I .oe_register_mode = "none";
11162 defparam \inst|seven_seg_pin_tri_3_~I .oe_sync_reset = "none";
11163 defparam \inst|seven_seg_pin_tri_3_~I .operation_mode = "output";
11164 defparam \inst|seven_seg_pin_tri_3_~I .output_async_reset = "none";
11165 defparam \inst|seven_seg_pin_tri_3_~I .output_power_up = "low";
11166 defparam \inst|seven_seg_pin_tri_3_~I .output_register_mode = "none";
11167 defparam \inst|seven_seg_pin_tri_3_~I .output_sync_reset = "none";
11168 // synopsys translate_on
11169
11170 // atom is at PIN_R19
11171 stratix_io \inst|seven_seg_pin_out_2_~I (
11172         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
11173         .ddiodatain(gnd),
11174         .oe(vcc),
11175         .outclk(gnd),
11176         .outclkena(vcc),
11177         .inclk(gnd),
11178         .inclkena(vcc),
11179         .areset(gnd),
11180         .sreset(gnd),
11181         .delayctrlin(gnd),
11182         .devclrn(devclrn),
11183         .devpor(devpor),
11184         .devoe(devoe),
11185         .combout(),
11186         .regout(),
11187         .ddioregout(),
11188         .padio(seven_seg_pin[2]),
11189         .dqsundelayedout());
11190 // synopsys translate_off
11191 defparam \inst|seven_seg_pin_out_2_~I .ddio_mode = "none";
11192 defparam \inst|seven_seg_pin_out_2_~I .input_async_reset = "none";
11193 defparam \inst|seven_seg_pin_out_2_~I .input_power_up = "low";
11194 defparam \inst|seven_seg_pin_out_2_~I .input_register_mode = "none";
11195 defparam \inst|seven_seg_pin_out_2_~I .input_sync_reset = "none";
11196 defparam \inst|seven_seg_pin_out_2_~I .oe_async_reset = "none";
11197 defparam \inst|seven_seg_pin_out_2_~I .oe_power_up = "low";
11198 defparam \inst|seven_seg_pin_out_2_~I .oe_register_mode = "none";
11199 defparam \inst|seven_seg_pin_out_2_~I .oe_sync_reset = "none";
11200 defparam \inst|seven_seg_pin_out_2_~I .operation_mode = "output";
11201 defparam \inst|seven_seg_pin_out_2_~I .output_async_reset = "none";
11202 defparam \inst|seven_seg_pin_out_2_~I .output_power_up = "low";
11203 defparam \inst|seven_seg_pin_out_2_~I .output_register_mode = "none";
11204 defparam \inst|seven_seg_pin_out_2_~I .output_sync_reset = "none";
11205 // synopsys translate_on
11206
11207 // atom is at PIN_R9
11208 stratix_io \inst|seven_seg_pin_out_1_~I (
11209         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
11210         .ddiodatain(gnd),
11211         .oe(vcc),
11212         .outclk(gnd),
11213         .outclkena(vcc),
11214         .inclk(gnd),
11215         .inclkena(vcc),
11216         .areset(gnd),
11217         .sreset(gnd),
11218         .delayctrlin(gnd),
11219         .devclrn(devclrn),
11220         .devpor(devpor),
11221         .devoe(devoe),
11222         .combout(),
11223         .regout(),
11224         .ddioregout(),
11225         .padio(seven_seg_pin[1]),
11226         .dqsundelayedout());
11227 // synopsys translate_off
11228 defparam \inst|seven_seg_pin_out_1_~I .ddio_mode = "none";
11229 defparam \inst|seven_seg_pin_out_1_~I .input_async_reset = "none";
11230 defparam \inst|seven_seg_pin_out_1_~I .input_power_up = "low";
11231 defparam \inst|seven_seg_pin_out_1_~I .input_register_mode = "none";
11232 defparam \inst|seven_seg_pin_out_1_~I .input_sync_reset = "none";
11233 defparam \inst|seven_seg_pin_out_1_~I .oe_async_reset = "none";
11234 defparam \inst|seven_seg_pin_out_1_~I .oe_power_up = "low";
11235 defparam \inst|seven_seg_pin_out_1_~I .oe_register_mode = "none";
11236 defparam \inst|seven_seg_pin_out_1_~I .oe_sync_reset = "none";
11237 defparam \inst|seven_seg_pin_out_1_~I .operation_mode = "output";
11238 defparam \inst|seven_seg_pin_out_1_~I .output_async_reset = "none";
11239 defparam \inst|seven_seg_pin_out_1_~I .output_power_up = "low";
11240 defparam \inst|seven_seg_pin_out_1_~I .output_register_mode = "none";
11241 defparam \inst|seven_seg_pin_out_1_~I .output_sync_reset = "none";
11242 // synopsys translate_on
11243
11244 // atom is at PIN_R8
11245 stratix_io \inst|seven_seg_pin_tri_0_~I (
11246         .datain(!\~STRATIX_FITTER_CREATED_GND~I_combout ),
11247         .ddiodatain(gnd),
11248         .oe(vcc),
11249         .outclk(gnd),
11250         .outclkena(vcc),
11251         .inclk(gnd),
11252         .inclkena(vcc),
11253         .areset(gnd),
11254         .sreset(gnd),
11255         .delayctrlin(gnd),
11256         .devclrn(devclrn),
11257         .devpor(devpor),
11258         .devoe(devoe),
11259         .combout(),
11260         .regout(),
11261         .ddioregout(),
11262         .padio(seven_seg_pin[0]),
11263         .dqsundelayedout());
11264 // synopsys translate_off
11265 defparam \inst|seven_seg_pin_tri_0_~I .ddio_mode = "none";
11266 defparam \inst|seven_seg_pin_tri_0_~I .input_async_reset = "none";
11267 defparam \inst|seven_seg_pin_tri_0_~I .input_power_up = "low";
11268 defparam \inst|seven_seg_pin_tri_0_~I .input_register_mode = "none";
11269 defparam \inst|seven_seg_pin_tri_0_~I .input_sync_reset = "none";
11270 defparam \inst|seven_seg_pin_tri_0_~I .oe_async_reset = "none";
11271 defparam \inst|seven_seg_pin_tri_0_~I .oe_power_up = "low";
11272 defparam \inst|seven_seg_pin_tri_0_~I .oe_register_mode = "none";
11273 defparam \inst|seven_seg_pin_tri_0_~I .oe_sync_reset = "none";
11274 defparam \inst|seven_seg_pin_tri_0_~I .operation_mode = "output";
11275 defparam \inst|seven_seg_pin_tri_0_~I .output_async_reset = "none";
11276 defparam \inst|seven_seg_pin_tri_0_~I .output_power_up = "low";
11277 defparam \inst|seven_seg_pin_tri_0_~I .output_register_mode = "none";
11278 defparam \inst|seven_seg_pin_tri_0_~I .output_sync_reset = "none";
11279 // synopsys translate_on
11280
11281 endmodule