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HEAD
4er slot (3. bsp fertig)
[dide_16.git]
/
bsp3
/
Designflow
/
syn
/
rev_1
/
vga_cons.tcl
1
source "/opt/synplify/fpga_c200906/lib/altera/quartus_cons.tcl"
2
syn_create_and_open_prj vga
3
source $::quartus(binpath)/prj_asd_import.tcl
4
syn_create_and_open_csf vga
5
syn_handle_cons vga
6
syn_compile_quartus