bsp2/Designflow/ppr/download/vga_pll.qsf

   1 # -------------------------------------------------------------------------- #
   2 #
   3 # Copyright (C) 1991-2009 Altera Corporation
   4 # Your use of Altera Corporation's design tools, logic functions
   5 # and other software and tools, and its AMPP partner logic
   6 # functions, and any output files from any of the foregoing
   7 # (including device programming or simulation files), and any
   8 # associated documentation or information are expressly subject
   9 # to the terms and conditions of the Altera Program License
  10 # Subscription Agreement, Altera MegaCore Function License
  11 # Agreement, or other applicable license agreement, including,
  12 # without limitation, that your use is for the sole purpose of
  13 # programming logic devices manufactured by Altera and sold by
  14 # Altera or its authorized distributors.  Please refer to the
  15 # applicable agreement for further details.
  16 #
  17 # -------------------------------------------------------------------------- #
  18 #
  19 # Quartus II
  20 # Version 9.0 Build 132 02/25/2009 SJ Full Version
  21 # Date created = 14:44:43  October 28, 2009
  22 #
  23 # -------------------------------------------------------------------------- #
  24 #
  25 # Notes:
  26 #
  27 # 1) The default values for assignments are stored in the file:
  28 #               vga_pll_assignment_defaults.qdf
  29 #    If this file doesn't exist, see file:
  30 #               assignment_defaults.qdf
  31 #
  32 # 2) Altera recommends that you do not modify this file. This
  33 #    file is updated automatically by the Quartus II software
  34 #    and any changes you make may be lost or overwritten.
  35 #
  36 # -------------------------------------------------------------------------- #
  37
  38
  39 set_global_assignment -name FAMILY Stratix
  40 set_global_assignment -name DEVICE EP1S25F672C6
  41 set_global_assignment -name TOP_LEVEL_ENTITY vga_pll
  42 set_global_assignment -name ORIGINAL_QUARTUS_VERSION 6.0
  43 set_global_assignment -name PROJECT_CREATION_TIME_DATE "09:04:10  SEPTEMBER 29, 2006"
  44 set_global_assignment -name LAST_QUARTUS_VERSION 6.0
  45 set_global_assignment -name EDA_DESIGN_ENTRY_SYNTHESIS_TOOL "Synplify Pro"
  46 set_global_assignment -name EDA_LMF_FILE synplcty.lmf -section_id eda_design_synthesis
  47 set_global_assignment -name EDA_INPUT_DATA_FORMAT VQM -section_id eda_design_synthesis
  48 set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (Verilog)"
  49 set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VERILOG -section_id eda_simulation
  50 set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga
  51 set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
  52 set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
  53 set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
  54 set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
  55 set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
  56 set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
  57 set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
  58 set_global_assignment -name BDF_FILE ../../src/vga_pll.bdf
  59 set_global_assignment -name VQM_FILE ../../syn/rev_1/vga.vqm
  60 set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation
  61 set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
  62 set_global_assignment -name DEVICE_FILTER_PIN_COUNT 672
  63 set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 6
  64 set_global_assignment -name BSF_FILE ../../src/vpll.bsf
  65 set_global_assignment -name VHDL_FILE ../../src/vpll.vhd
  66 set_location_assignment PIN_E24 -to b0_pin
  67 set_location_assignment PIN_T6 -to b1_pin
  68 set_location_assignment PIN_N3 -to board_clk
  69 set_location_assignment PIN_E23 -to g0_pin
  70 set_location_assignment PIN_T5 -to g1_pin
  71 set_location_assignment PIN_T24 -to g2_pin
  72 set_location_assignment PIN_F1 -to hsync_pin
  73 set_location_assignment PIN_E22 -to r0_pin
  74 set_location_assignment PIN_T4 -to r1_pin
  75 set_location_assignment PIN_T7 -to r2_pin
  76 set_location_assignment PIN_A5 -to reset
  77 set_location_assignment PIN_F2 -to vsync_pin
  78 set_location_assignment PIN_Y5 -to d_hsync_state[0]
  79 set_location_assignment PIN_F19 -to d_hsync_state[1]
  80 set_location_assignment PIN_F17 -to d_hsync_state[2]
  81 set_location_assignment PIN_Y2 -to d_hsync_state[3]
  82 set_location_assignment PIN_F10 -to d_hsync_state[4]
  83 set_location_assignment PIN_F9 -to d_hsync_state[5]
  84 set_location_assignment PIN_F6 -to d_hsync_state[6]
  85 set_location_assignment PIN_H4 -to d_hsync_counter[0]
  86 set_location_assignment PIN_G25 -to d_hsync_counter[7]
  87 set_location_assignment PIN_G22 -to d_hsync_counter[8]
  88 set_location_assignment PIN_G18 -to d_hsync_counter[9]
  89 set_location_assignment PIN_F5 -to d_vsync_state[0]
  90 set_location_assignment PIN_F4 -to d_vsync_state[1]
  91 set_location_assignment PIN_F3 -to d_vsync_state[2]
  92 set_location_assignment PIN_M19 -to d_vsync_state[3]
  93 set_location_assignment PIN_M18 -to d_vsync_state[4]
  94 set_location_assignment PIN_M7 -to d_vsync_state[5]
  95 set_location_assignment PIN_M4 -to d_vsync_state[6]
  96 set_location_assignment PIN_G9 -to d_vsync_counter[0]
  97 set_location_assignment PIN_G6 -to d_vsync_counter[7]
  98 set_location_assignment PIN_G4 -to d_vsync_counter[8]
  99 set_location_assignment PIN_G2 -to d_vsync_counter[9]
 100 set_location_assignment PIN_K6 -to d_line_counter[0]
 101 set_location_assignment PIN_K4 -to d_line_counter[1]
 102 set_location_assignment PIN_J22 -to d_line_counter[2]
 103 set_location_assignment PIN_M9 -to d_line_counter[3]
 104 set_location_assignment PIN_M8 -to d_line_counter[4]
 105 set_location_assignment PIN_M6 -to d_line_counter[5]
 106 set_location_assignment PIN_M5 -to d_line_counter[6]
 107 set_location_assignment PIN_L24 -to d_line_counter[7]
 108 set_location_assignment PIN_L25 -to d_line_counter[8]
 109 set_location_assignment PIN_L23 -to d_column_counter[0]
 110 set_location_assignment PIN_L22 -to d_column_counter[1]
 111 set_location_assignment PIN_L21 -to d_column_counter[2]
 112 set_location_assignment PIN_L20 -to d_column_counter[3]
 113 set_location_assignment PIN_L6 -to d_column_counter[4]
 114 set_location_assignment PIN_L4 -to d_column_counter[5]
 115 set_location_assignment PIN_L2 -to d_column_counter[6]
 116 set_location_assignment PIN_K23 -to d_column_counter[7]
 117 set_location_assignment PIN_K19 -to d_column_counter[8]
 118 set_location_assignment PIN_K5 -to d_column_counter[9]
 119 set_location_assignment PIN_L7 -to d_hsync
 120 set_location_assignment PIN_L5 -to d_vsync
 121 set_location_assignment PIN_F26 -to d_set_hsync_counter
 122 set_location_assignment PIN_F24 -to d_set_vsync_counter
 123 set_location_assignment PIN_F21 -to d_set_line_counter
 124 set_location_assignment PIN_Y23 -to d_set_column_counter
 125 set_location_assignment PIN_L3 -to d_r
 126 set_location_assignment PIN_K24 -to d_g
 127 set_location_assignment PIN_K20 -to d_b
 128 set_location_assignment PIN_H18 -to d_v_enable
 129 set_location_assignment PIN_J21 -to d_h_enable
 130 set_location_assignment PIN_R8 -to seven_seg_pin[0]
 131 set_location_assignment PIN_R9 -to seven_seg_pin[1]
 132 set_location_assignment PIN_R19 -to seven_seg_pin[2]
 133 set_location_assignment PIN_R20 -to seven_seg_pin[3]
 134 set_location_assignment PIN_R21 -to seven_seg_pin[4]
 135 set_location_assignment PIN_R22 -to seven_seg_pin[5]
 136 set_location_assignment PIN_R23 -to seven_seg_pin[6]
 137 set_location_assignment PIN_Y11 -to seven_seg_pin[7]
 138 set_location_assignment PIN_N7 -to seven_seg_pin[8]
 139 set_location_assignment PIN_N8 -to seven_seg_pin[9]
 140 set_location_assignment PIN_R4 -to seven_seg_pin[10]
 141 set_location_assignment PIN_R6 -to seven_seg_pin[11]
 142 set_location_assignment PIN_AA11 -to seven_seg_pin[12]
 143 set_location_assignment PIN_T2 -to seven_seg_pin[13]
 144 set_location_assignment PIN_K3 -to d_state_clk
 145 set_location_assignment PIN_H3 -to d_toggle
 146 set_location_assignment PIN_H26 -to d_toggle_counter[0]
 147 set_location_assignment PIN_G24 -to d_toggle_counter[15]
 148 set_location_assignment PIN_G23 -to d_toggle_counter[16]
 149 set_location_assignment PIN_G21 -to d_toggle_counter[17]
 150 set_location_assignment PIN_G20 -to d_toggle_counter[18]
 151 set_location_assignment PIN_G5 -to d_toggle_counter[19]
 152 set_location_assignment PIN_G3 -to d_toggle_counter[20]
 153 set_location_assignment PIN_G1 -to d_toggle_counter[21]
 154 set_location_assignment PIN_F25 -to d_toggle_counter[22]
 155 set_location_assignment PIN_F23 -to d_toggle_counter[23]
 156 set_location_assignment PIN_T19 -to d_toggle_counter[24]
 157 set_instance_assignment -name SLOW_SLEW_RATE ON -to d_column_counter
 158 set_instance_assignment -name SLOW_SLEW_RATE ON -to d_hsync_counter
 159 set_instance_assignment -name SLOW_SLEW_RATE ON -to d_hsync_counter[1]
 160 set_instance_assignment -name SLOW_SLEW_RATE ON -to d_hsync_counter[2]
 161 set_instance_assignment -name SLOW_SLEW_RATE ON -to d_hsync_counter[3]
 162 set_instance_assignment -name SLOW_SLEW_RATE ON -to d_hsync_counter[4]
 163 set_instance_assignment -name SLOW_SLEW_RATE ON -to d_hsync_counter[5]
 164 set_instance_assignment -name SLOW_SLEW_RATE ON -to d_hsync_counter[6]
 165 set_instance_assignment -name SLOW_SLEW_RATE ON -to d_hsync_state
 166 set_instance_assignment -name SLOW_SLEW_RATE ON -to d_line_counter
 167 set_instance_assignment -name SLOW_SLEW_RATE ON -to d_vsync_counter
 168 set_instance_assignment -name SLOW_SLEW_RATE ON -to d_vsync_counter[1]
 169 set_instance_assignment -name SLOW_SLEW_RATE ON -to d_vsync_counter[2]
 170 set_instance_assignment -name SLOW_SLEW_RATE ON -to d_vsync_counter[3]
 171 set_instance_assignment -name SLOW_SLEW_RATE ON -to d_vsync_counter[4]
 172 set_instance_assignment -name SLOW_SLEW_RATE ON -to d_vsync_counter[5]
 173 set_instance_assignment -name SLOW_SLEW_RATE ON -to d_vsync_counter[6]
 174 set_instance_assignment -name SLOW_SLEW_RATE ON -to d_vsync_state
 175 set_instance_assignment -name SLOW_SLEW_RATE ON -to seven_seg_pin