projects / coreboot.git / history
? search:
summary | shortlog | log | commit | commitdiff | tree
first ⋅ prev ⋅ next
Fix ECC disable option for AMD Fam10 DDR2 and DDR3.
[coreboot.git] / src / northbridge / amd / amdmct / mct / mctecc_d.c
2012-03-02 Marc JonesFix ECC disable option for AMD Fam10 DDR2 and DDR3. blob | commitdiff | raw
2010-10-09 Zheng BaoTrivial. Spell checking. blob | commitdiff | raw | diff to current
2010-07-08 Stefan ReinauerFix all warnings in the tree blob | commitdiff | raw | diff to current
2008-04-11 Marc Jones (marc... Bring Fam10 memory controller init up to date with... blob | commitdiff | raw | diff to current
2008-01-18 Stefan ReinauerPlease bear with me - another rename checkin. This... blob | commitdiff | raw | diff to current
2007-12-19 Marc JonesInitial AMD Barcelona support for rev Bx. blob | commitdiff | raw | diff to current
my coreboot WIP stuff (asus m5a99x-evo board)