wurms gitweb - coreboot.git/history - src/northbridge/amd/amdmct/mct/mct

2009-09-14	Marc Jones	Use the coreboot pci config read/write functions instea...	blob \| commitdiff \| raw
2009-08-25	Zheng Bao	Without this patch, if we only got a DIMM in Channel...	blob \| commitdiff \| raw \| diff to current
2009-06-06	Marco Schmidt	Fix for Erratum 350 for AMD Fam10h CPUs.	blob \| commitdiff \| raw \| diff to current
2008-12-05	Stefan Reinauer	Fixes to AMD MCT code, found by Marco Schmidt <mschmidt...	blob \| commitdiff \| raw \| diff to current
2008-07-23	Marc Jones	Memory initialization support for AMD Fam10 B3 (B0...	blob \| commitdiff \| raw \| diff to current
2008-04-11	Marc Jones (marc...	Bring Fam10 memory controller init up to date with...	blob \| commitdiff \| raw \| diff to current
2008-01-18	Stefan Reinauer	Please bear with me - another rename checkin. This...	blob \| commitdiff \| raw \| diff to current
2007-12-19	Marc Jones	Initial AMD Barcelona support for rev Bx.	blob \| commitdiff \| raw \| diff to current

my coreboot WIP stuff (asus m5a99x-evo board)