Add support for the Intel NM10 (a variant of ICH7) and ICH8 southbridges.
authorCorey Osgood <corey.osgood@gmail.com>
Tue, 17 Aug 2010 08:33:44 +0000 (08:33 +0000)
committerStefan Reinauer <stepan@openbios.org>
Tue, 17 Aug 2010 08:33:44 +0000 (08:33 +0000)
Both are tested and appear to be working, however I'm not 100% clear
on if the NM10 has any other PCI IDs.

Signed-off-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Paul Menzel <paulepanter@users.sourceforge.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5709 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

util/inteltool/gpio.c
util/inteltool/inteltool.c
util/inteltool/inteltool.h
util/inteltool/powermgt.c
util/inteltool/rootcmplx.c

index a3b6e3d4a0f2d704b88c13d4f2e208625664bd73..75658a9782317ad6a8ce6a614736cbdb644fc2ba 100644 (file)
@@ -171,6 +171,7 @@ int print_gpios(struct pci_dev *sb)
                gpio_registers = ich9_gpio_registers;
                size = ARRAY_SIZE(ich9_gpio_registers);
                break;
+       case PCI_DEVICE_ID_INTEL_ICH8:
        case PCI_DEVICE_ID_INTEL_ICH8M:
                gpiobase = pci_read_word(sb, 0x48) & 0xfffc;
                gpio_registers = ich8_gpio_registers;
@@ -180,6 +181,7 @@ int print_gpios(struct pci_dev *sb)
        case PCI_DEVICE_ID_INTEL_ICH7M:
        case PCI_DEVICE_ID_INTEL_ICH7DH:
        case PCI_DEVICE_ID_INTEL_ICH7MDH:
+       case PCI_DEVICE_ID_INTEL_NM10:
                gpiobase = pci_read_word(sb, 0x48) & 0xfffc;
                gpio_registers = ich7_gpio_registers;
                size = ARRAY_SIZE(ich7_gpio_registers);
index 678930d5c2e5483321e94ebea66eafb5c0a1792e..c6a835fd7e9a856ce75b6f050ca171d4d683269c 100644 (file)
@@ -61,6 +61,8 @@ static const struct {
        { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9M, "ICH9M" },
        { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9ME, "ICH9M-E" },
        { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8M, "ICH8-M" },
+       { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8, "ICH8" },
+       { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_NM10, "NM10" },
        { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7MDH, "ICH7-M DH" },
        { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7M, "ICH7-M" },
        { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7, "ICH7" },
index c0a2c2066b5130368fac38f08e26e76a989ecd90..8eb70895058114cae2454e5a81803884fd4d1452 100644 (file)
@@ -43,6 +43,8 @@
 #define PCI_DEVICE_ID_INTEL_ICH7               0x27b8
 #define PCI_DEVICE_ID_INTEL_ICH7M              0x27b9
 #define PCI_DEVICE_ID_INTEL_ICH7MDH            0x27bd
+#define PCI_DEVICE_ID_INTEL_NM10               0x27bc
+#define PCI_DEVICE_ID_INTEL_ICH8               0x2810
 #define PCI_DEVICE_ID_INTEL_ICH8M              0x2815
 #define PCI_DEVICE_ID_INTEL_ICH9DH             0x2912
 #define PCI_DEVICE_ID_INTEL_ICH9DO             0x2914
index f7275843f1484b0c0fb9b1094f5ce54480726dc8..5f938353ee44262c3585c42e32a60528c70e19a2 100644 (file)
@@ -477,6 +477,7 @@ int print_pmbase(struct pci_dev *sb)
        case PCI_DEVICE_ID_INTEL_ICH7M:
        case PCI_DEVICE_ID_INTEL_ICH7DH:
        case PCI_DEVICE_ID_INTEL_ICH7MDH:
+       case PCI_DEVICE_ID_INTEL_NM10:
                pmbase = pci_read_word(sb, 0x40) & 0xfffc;
                pm_registers = ich7_pm_registers;
                size = ARRAY_SIZE(ich7_pm_registers);
@@ -491,6 +492,7 @@ int print_pmbase(struct pci_dev *sb)
                pm_registers = ich9_pm_registers;
                size = ARRAY_SIZE(ich9_pm_registers);
                break;
+       case PCI_DEVICE_ID_INTEL_ICH8:
        case PCI_DEVICE_ID_INTEL_ICH8M:
                pmbase = pci_read_word(sb, 0x40) & 0xfffc;
                pm_registers = ich8_pm_registers;
index b89e6a1b6bbdd35924b79e5aaf90e9e37c1e0e39..215c15075601940b2add3f1c6fccd02da09fcb3a 100644 (file)
@@ -43,6 +43,8 @@ int print_rcba(struct pci_dev *sb)
        case PCI_DEVICE_ID_INTEL_ICH9M:
        case PCI_DEVICE_ID_INTEL_ICH9ME:
        case PCI_DEVICE_ID_INTEL_ICH8M:
+       case PCI_DEVICE_ID_INTEL_ICH8:
+       case PCI_DEVICE_ID_INTEL_NM10:
                rcba_phys = pci_read_long(sb, 0xf0) & 0xfffffffe;
                break;
        case PCI_DEVICE_ID_INTEL_ICH: